OpenCores
URL https://opencores.org/ocsvn/zipcpu/zipcpu/trunk

Subversion Repositories zipcpu

[/] [zipcpu/] [trunk/] [sw/] [gcc-zippatch.patch] - Blame information for rev 111

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Line No. Rev Author Line
1 102 dgisselq
diff -Naur '--exclude=*.swp' gcc-5.3.0-original/config.sub gcc-5.3.0-zip/config.sub
2
--- gcc-5.3.0-original/config.sub       2015-01-02 04:30:21.000000000 -0500
3
+++ gcc-5.3.0-zip/config.sub    2016-01-30 12:27:56.023073747 -0500
4
@@ -316,7 +316,7 @@
5
        | visium \
6
        | we32k \
7
        | x86 | xc16x | xstormy16 | xtensa \
8
-       | z8k | z80)
9
+       | z8k | z80 | zip)
10
                basic_machine=$basic_machine-unknown
11
                ;;
12
        c54x)
13
@@ -1547,6 +1547,9 @@
14
 # system, and we'll never get to this point.
15
 
16
 case $basic_machine in
17
+       zip-*)
18
+               os=-elf
19
+               ;;
20
        score-*)
21
                os=-elf
22
                ;;
23
diff -Naur '--exclude=*.swp' gcc-5.3.0-original/configure gcc-5.3.0-zip/configure
24
--- gcc-5.3.0-original/configure        2015-05-03 13:29:57.000000000 -0400
25
+++ gcc-5.3.0-zip/configure     2016-01-30 16:19:48.264867231 -0500
26
@@ -3927,6 +3927,8 @@
27
   vax-*-*)
28
     noconfigdirs="$noconfigdirs target-newlib target-libgloss"
29
     ;;
30
+  zip*)
31
+    noconfigdirs="$noconfigdirs target-libffi target-boehm-gc gdb gprof"
32
 esac
33
 
34
 # If we aren't building newlib, then don't build libgloss, since libgloss
35
diff -Naur '--exclude=*.swp' gcc-5.3.0-original/configure.ac gcc-5.3.0-zip/configure.ac
36
--- gcc-5.3.0-original/configure.ac     2015-05-03 13:29:57.000000000 -0400
37
+++ gcc-5.3.0-zip/configure.ac  2016-02-12 10:47:23.847194843 -0500
38
@@ -1274,6 +1274,10 @@
39
   vax-*-*)
40
     noconfigdirs="$noconfigdirs target-newlib target-libgloss"
41
     ;;
42
+  zip*)
43
+    noconfigdirs="$noconfigdirs target-libffi target-boehm-gc gdb gprof"
44
+    unsupported_languages="$unsupported_languages fortran java"
45
+    ;;
46
 esac
47
 
48
 # If we aren't building newlib, then don't build libgloss, since libgloss
49 111 dgisselq
diff -Naur '--exclude=*.swp' gcc-5.3.0-original/gcc/cgraphbuild.c gcc-5.3.0-zip/gcc/cgraphbuild.c
50
--- gcc-5.3.0-original/gcc/cgraphbuild.c        2015-01-09 15:18:42.000000000 -0500
51
+++ gcc-5.3.0-zip/gcc/cgraphbuild.c     2016-03-24 22:13:24.815287808 -0400
52
@@ -62,6 +62,13 @@
53
 #include "ipa-prop.h"
54
 #include "ipa-inline.h"
55
 
56
+#ifdef DO_ZIP_DEBUGS
57
+extern void zip_debug_rtx(const_rtx);
58
+#define        ZIP_DEBUG_LINE(STR,RTX) do { fprintf(stderr, "%s:%d/%s\n", __FILE__,__LINE__,STR); zip_debug_rtx(RTX); } while(0)
59
+#else
60
+#define        ZIP_DEBUG_LINE(STR,RTX)
61
+#endif
62
+
63
 /* Context of record_reference.  */
64
 struct record_reference_ctx
65
 {
66 102 dgisselq
diff -Naur '--exclude=*.swp' gcc-5.3.0-original/gcc/common/config/zip/zip-common.c gcc-5.3.0-zip/gcc/common/config/zip/zip-common.c
67
--- gcc-5.3.0-original/gcc/common/config/zip/zip-common.c       1969-12-31 19:00:00.000000000 -0500
68
+++ gcc-5.3.0-zip/gcc/common/config/zip/zip-common.c    2016-02-14 00:54:31.821055716 -0500
69
@@ -0,0 +1,52 @@
70
+////////////////////////////////////////////////////////////////////////////////
71
+//
72
+// Filename:   common/config/zip/zip-common.c
73
+//
74
+// Project:    Zip CPU backend for the GNU Compiler Collection
75
+//
76
+// Purpose:    To eliminate the frame register automatically.
77
+//
78
+// Creator:    Dan Gisselquist, Ph.D.
79
+//             Gisselquist Technology, LLC
80
+//
81
+////////////////////////////////////////////////////////////////////////////////
82
+//
83
+// Copyright (C) 2016, Gisselquist Technology, LLC
84
+//
85
+// This program is free software (firmware): you can redistribute it and/or
86
+// modify it under the terms of  the GNU General Public License as published
87
+// by the Free Software Foundation, either version 3 of the License, or (at
88
+// your option) any later version.
89
+//
90
+// This program is distributed in the hope that it will be useful, but WITHOUT
91
+// ANY WARRANTY; without even the implied warranty of MERCHANTIBILITY or
92
+// FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
93
+// for more details.
94
+//
95
+// You should have received a copy of the GNU General Public License along
96
+// with this program.  (It's in the $(ROOT)/doc directory, run make with no
97
+// target there if the PDF file isn't present.)  If not, see
98
+// <http://www.gnu.org/licenses/> for a copy.
99
+//
100
+// License:    GPL, v3, as defined and found on www.gnu.org,
101
+//             http://www.gnu.org/licenses/gpl.html
102
+//
103
+//
104
+////////////////////////////////////////////////////////////////////////////////
105
+#include "config.h"
106
+#include "system.h"
107
+#include "coretypes.h"
108
+#include "tm.h"
109
+#include "common/common-target.h"
110
+#include "common/common-target-def.h"
111
+
112
+static const struct default_options zip_option_optimization_table[] =
113
+  {
114
+    { OPT_LEVELS_1_PLUS, OPT_fomit_frame_pointer, NULL, 1 },
115
+    { OPT_LEVELS_NONE, 0, NULL, 0 }
116
+  };
117
+
118
+#undef TARGET_OPTION_OPTIMIZATION_TABLE
119
+#define        TARGET_OPTION_OPTIMIZATION_TABLE        zip_option_optimization_table
120
+
121
+struct gcc_targetm_common      targetm_common = TARGETM_COMMON_INITIALIZER;
122
diff -Naur '--exclude=*.swp' gcc-5.3.0-original/gcc/config/aarch64/aarch64-linux.h gcc-5.3.0-zip/gcc/config/aarch64/aarch64-linux.h
123 111 dgisselq
--- gcc-5.3.0-original/gcc/config/aarch64/aarch64-linux.h       2016-03-25 10:21:47.127775498 -0400
124 102 dgisselq
+++ gcc-5.3.0-zip/gcc/config/aarch64/aarch64-linux.h    2015-07-24 12:00:26.000000000 -0400
125
@@ -21,7 +21,7 @@
126
 #ifndef GCC_AARCH64_LINUX_H
127
 #define GCC_AARCH64_LINUX_H
128
 
129
-#define GLIBC_DYNAMIC_LINKER "/tools/lib/ld-linux-aarch64%{mbig-endian:_be}%{mabi=ilp32:_ilp32}.so.1"
130
+#define GLIBC_DYNAMIC_LINKER "/lib/ld-linux-aarch64%{mbig-endian:_be}%{mabi=ilp32:_ilp32}.so.1"
131
 
132
 #undef  ASAN_CC1_SPEC
133
 #define ASAN_CC1_SPEC "%{%:sanitize(address):-funwind-tables}"
134
diff -Naur '--exclude=*.swp' gcc-5.3.0-original/gcc/config/alpha/linux-elf.h gcc-5.3.0-zip/gcc/config/alpha/linux-elf.h
135 111 dgisselq
--- gcc-5.3.0-original/gcc/config/alpha/linux-elf.h     2016-03-25 10:21:47.127775498 -0400
136 102 dgisselq
+++ gcc-5.3.0-zip/gcc/config/alpha/linux-elf.h  2015-01-05 07:33:28.000000000 -0500
137
@@ -23,8 +23,8 @@
138
 #define EXTRA_SPECS \
139
 { "elf_dynamic_linker", ELF_DYNAMIC_LINKER },
140
 
141
-#define GLIBC_DYNAMIC_LINKER   "/tools/lib/ld-linux.so.2"
142
-#define UCLIBC_DYNAMIC_LINKER "/tools/lib/ld-uClibc.so.0"
143
+#define GLIBC_DYNAMIC_LINKER   "/lib/ld-linux.so.2"
144
+#define UCLIBC_DYNAMIC_LINKER "/lib/ld-uClibc.so.0"
145
 #if DEFAULT_LIBC == LIBC_UCLIBC
146
 #define CHOOSE_DYNAMIC_LINKER(G, U) "%{mglibc:" G ";:" U "}"
147
 #elif DEFAULT_LIBC == LIBC_GLIBC
148
diff -Naur '--exclude=*.swp' gcc-5.3.0-original/gcc/config/arm/linux-eabi.h gcc-5.3.0-zip/gcc/config/arm/linux-eabi.h
149 111 dgisselq
--- gcc-5.3.0-original/gcc/config/arm/linux-eabi.h      2016-03-25 10:21:47.243774882 -0400
150 102 dgisselq
+++ gcc-5.3.0-zip/gcc/config/arm/linux-eabi.h   2015-01-05 07:33:28.000000000 -0500
151
@@ -68,8 +68,8 @@
152
    GLIBC_DYNAMIC_LINKER_DEFAULT and TARGET_DEFAULT_FLOAT_ABI.  */
153
 
154
 #undef  GLIBC_DYNAMIC_LINKER
155
-#define GLIBC_DYNAMIC_LINKER_SOFT_FLOAT "/tools/lib/ld-linux.so.3"
156
-#define GLIBC_DYNAMIC_LINKER_HARD_FLOAT "/tools/lib/ld-linux-armhf.so.3"
157
+#define GLIBC_DYNAMIC_LINKER_SOFT_FLOAT "/lib/ld-linux.so.3"
158
+#define GLIBC_DYNAMIC_LINKER_HARD_FLOAT "/lib/ld-linux-armhf.so.3"
159
 #define GLIBC_DYNAMIC_LINKER_DEFAULT GLIBC_DYNAMIC_LINKER_SOFT_FLOAT
160
 
161
 #define GLIBC_DYNAMIC_LINKER \
162
diff -Naur '--exclude=*.swp' gcc-5.3.0-original/gcc/config/arm/linux-elf.h gcc-5.3.0-zip/gcc/config/arm/linux-elf.h
163 111 dgisselq
--- gcc-5.3.0-original/gcc/config/arm/linux-elf.h       2016-03-25 10:21:47.243774882 -0400
164 102 dgisselq
+++ gcc-5.3.0-zip/gcc/config/arm/linux-elf.h    2015-06-23 05:26:54.000000000 -0400
165
@@ -62,7 +62,7 @@
166
 
167
 #define LIBGCC_SPEC "%{mfloat-abi=soft*:-lfloat} -lgcc"
168
 
169
-#define GLIBC_DYNAMIC_LINKER "/tools/lib/ld-linux.so.2"
170
+#define GLIBC_DYNAMIC_LINKER "/lib/ld-linux.so.2"
171
 
172
 #define LINUX_TARGET_LINK_SPEC  "%{h*} \
173
    %{static:-Bstatic} \
174
diff -Naur '--exclude=*.swp' gcc-5.3.0-original/gcc/config/bfin/linux.h gcc-5.3.0-zip/gcc/config/bfin/linux.h
175 111 dgisselq
--- gcc-5.3.0-original/gcc/config/bfin/linux.h  2016-03-25 10:21:47.243774882 -0400
176 102 dgisselq
+++ gcc-5.3.0-zip/gcc/config/bfin/linux.h       2015-01-05 07:33:28.000000000 -0500
177
@@ -45,7 +45,7 @@
178
   %{shared:-G -Bdynamic} \
179
   %{!shared: %{!static: \
180
    %{rdynamic:-export-dynamic} \
181
-   -dynamic-linker /tools/lib/ld-uClibc.so.0} \
182
+   -dynamic-linker /lib/ld-uClibc.so.0} \
183
    %{static}} -init __init -fini __fini"
184
 
185
 #undef TARGET_SUPPORTS_SYNC_CALLS
186
diff -Naur '--exclude=*.swp' gcc-5.3.0-original/gcc/config/cris/linux.h gcc-5.3.0-zip/gcc/config/cris/linux.h
187 111 dgisselq
--- gcc-5.3.0-original/gcc/config/cris/linux.h  2016-03-25 10:21:47.243774882 -0400
188 102 dgisselq
+++ gcc-5.3.0-zip/gcc/config/cris/linux.h       2015-01-05 07:33:28.000000000 -0500
189
@@ -102,7 +102,7 @@
190
 #undef CRIS_DEFAULT_CPU_VERSION
191
 #define CRIS_DEFAULT_CPU_VERSION CRIS_CPU_NG
192
 
193
-#define GLIBC_DYNAMIC_LINKER "/tools/lib/ld.so.1"
194
+#define GLIBC_DYNAMIC_LINKER "/lib/ld.so.1"
195
 
196
 #undef CRIS_LINK_SUBTARGET_SPEC
197
 #define CRIS_LINK_SUBTARGET_SPEC \
198
diff -Naur '--exclude=*.swp' gcc-5.3.0-original/gcc/config/freebsd-spec.h gcc-5.3.0-zip/gcc/config/freebsd-spec.h
199 111 dgisselq
--- gcc-5.3.0-original/gcc/config/freebsd-spec.h        2016-03-25 10:21:47.243774882 -0400
200 102 dgisselq
+++ gcc-5.3.0-zip/gcc/config/freebsd-spec.h     2015-06-25 13:53:14.000000000 -0400
201
@@ -129,9 +129,9 @@
202
 #endif
203
 
204
 #if FBSD_MAJOR < 6
205
-#define FBSD_DYNAMIC_LINKER "/tools/libexec/ld-elf.so.1"
206
+#define FBSD_DYNAMIC_LINKER "/usr/libexec/ld-elf.so.1"
207
 #else
208
-#define FBSD_DYNAMIC_LINKER "/tools/libexec/ld-elf.so.1"
209
+#define FBSD_DYNAMIC_LINKER "/libexec/ld-elf.so.1"
210
 #endif
211
 
212
 /* NOTE: The freebsd-spec.h header is included also for various
213
diff -Naur '--exclude=*.swp' gcc-5.3.0-original/gcc/config/frv/linux.h gcc-5.3.0-zip/gcc/config/frv/linux.h
214 111 dgisselq
--- gcc-5.3.0-original/gcc/config/frv/linux.h   2016-03-25 10:21:47.243774882 -0400
215 102 dgisselq
+++ gcc-5.3.0-zip/gcc/config/frv/linux.h        2015-01-05 07:33:28.000000000 -0500
216
@@ -34,7 +34,7 @@
217
 #define ENDFILE_SPEC \
218
   "%{shared|pie:crtendS.o%s;:crtend.o%s} crtn.o%s"
219
 
220
-#define GLIBC_DYNAMIC_LINKER "/tools/lib/ld.so.1"
221
+#define GLIBC_DYNAMIC_LINKER "/lib/ld.so.1"
222
 
223
 #undef LINK_SPEC
224
 #define LINK_SPEC "\
225
diff -Naur '--exclude=*.swp' gcc-5.3.0-original/gcc/config/i386/gnu.h gcc-5.3.0-zip/gcc/config/i386/gnu.h
226 111 dgisselq
--- gcc-5.3.0-original/gcc/config/i386/gnu.h    2016-03-25 10:21:47.243774882 -0400
227 102 dgisselq
+++ gcc-5.3.0-zip/gcc/config/i386/gnu.h 2015-01-05 07:33:28.000000000 -0500
228
@@ -22,7 +22,7 @@
229
 #define GNU_USER_LINK_EMULATION "elf_i386"
230
 
231
 #undef GNU_USER_DYNAMIC_LINKER
232
-#define GNU_USER_DYNAMIC_LINKER "/tools/lib/ld.so"
233
+#define GNU_USER_DYNAMIC_LINKER "/lib/ld.so"
234
 
235
 #undef STARTFILE_SPEC
236
 #if defined HAVE_LD_PIE
237
diff -Naur '--exclude=*.swp' gcc-5.3.0-original/gcc/config/i386/kfreebsd-gnu64.h gcc-5.3.0-zip/gcc/config/i386/kfreebsd-gnu64.h
238 111 dgisselq
--- gcc-5.3.0-original/gcc/config/i386/kfreebsd-gnu64.h 2016-03-25 10:21:47.243774882 -0400
239 102 dgisselq
+++ gcc-5.3.0-zip/gcc/config/i386/kfreebsd-gnu64.h      2015-01-05 07:33:28.000000000 -0500
240
@@ -22,6 +22,6 @@
241
 #define GNU_USER_LINK_EMULATION64 "elf_x86_64_fbsd"
242
 #define GNU_USER_LINK_EMULATIONX32 "elf32_x86_64_fbsd"
243
 
244
-#define GLIBC_DYNAMIC_LINKER32 "/tools/lib/ld.so.1"
245
-#define GLIBC_DYNAMIC_LINKER64 "/tools/lib/ld-kfreebsd-x86-64.so.1"
246
-#define GLIBC_DYNAMIC_LINKERX32 "/tools/lib/ld-kfreebsd-x32.so.1"
247
+#define GLIBC_DYNAMIC_LINKER32 "/lib/ld.so.1"
248
+#define GLIBC_DYNAMIC_LINKER64 "/lib/ld-kfreebsd-x86-64.so.1"
249
+#define GLIBC_DYNAMIC_LINKERX32 "/lib/ld-kfreebsd-x32.so.1"
250
diff -Naur '--exclude=*.swp' gcc-5.3.0-original/gcc/config/i386/kfreebsd-gnu.h gcc-5.3.0-zip/gcc/config/i386/kfreebsd-gnu.h
251 111 dgisselq
--- gcc-5.3.0-original/gcc/config/i386/kfreebsd-gnu.h   2016-03-25 10:21:47.243774882 -0400
252 102 dgisselq
+++ gcc-5.3.0-zip/gcc/config/i386/kfreebsd-gnu.h        2015-01-05 07:33:28.000000000 -0500
253
@@ -19,4 +19,4 @@
254
 <http://www.gnu.org/licenses/>.  */
255
 
256
 #define GNU_USER_LINK_EMULATION "elf_i386_fbsd"
257
-#define GLIBC_DYNAMIC_LINKER "/tools/lib/ld.so.1"
258
+#define GLIBC_DYNAMIC_LINKER "/lib/ld.so.1"
259
diff -Naur '--exclude=*.swp' gcc-5.3.0-original/gcc/config/i386/linux64.h gcc-5.3.0-zip/gcc/config/i386/linux64.h
260 111 dgisselq
--- gcc-5.3.0-original/gcc/config/i386/linux64.h        2016-03-25 10:21:47.243774882 -0400
261 102 dgisselq
+++ gcc-5.3.0-zip/gcc/config/i386/linux64.h     2015-01-05 07:33:28.000000000 -0500
262
@@ -27,6 +27,6 @@
263
 #define GNU_USER_LINK_EMULATION64 "elf_x86_64"
264
 #define GNU_USER_LINK_EMULATIONX32 "elf32_x86_64"
265
 
266
-#define GLIBC_DYNAMIC_LINKER32 "/tools/lib/ld-linux.so.2"
267
-#define GLIBC_DYNAMIC_LINKER64 "/tools/lib64/ld-linux-x86-64.so.2"
268
-#define GLIBC_DYNAMIC_LINKERX32 "/tools/libx32/ld-linux-x32.so.2"
269
+#define GLIBC_DYNAMIC_LINKER32 "/lib/ld-linux.so.2"
270
+#define GLIBC_DYNAMIC_LINKER64 "/lib64/ld-linux-x86-64.so.2"
271
+#define GLIBC_DYNAMIC_LINKERX32 "/libx32/ld-linux-x32.so.2"
272
diff -Naur '--exclude=*.swp' gcc-5.3.0-original/gcc/config/i386/linux.h gcc-5.3.0-zip/gcc/config/i386/linux.h
273 111 dgisselq
--- gcc-5.3.0-original/gcc/config/i386/linux.h  2016-03-25 10:21:47.243774882 -0400
274 102 dgisselq
+++ gcc-5.3.0-zip/gcc/config/i386/linux.h       2015-01-05 07:33:28.000000000 -0500
275
@@ -20,4 +20,4 @@
276
 <http://www.gnu.org/licenses/>.  */
277
 
278
 #define GNU_USER_LINK_EMULATION "elf_i386"
279
-#define GLIBC_DYNAMIC_LINKER "/tools/lib/ld-linux.so.2"
280
+#define GLIBC_DYNAMIC_LINKER "/lib/ld-linux.so.2"
281
diff -Naur '--exclude=*.swp' gcc-5.3.0-original/gcc/config/ia64/linux.h gcc-5.3.0-zip/gcc/config/ia64/linux.h
282 111 dgisselq
--- gcc-5.3.0-original/gcc/config/ia64/linux.h  2016-03-25 10:21:47.243774882 -0400
283 102 dgisselq
+++ gcc-5.3.0-zip/gcc/config/ia64/linux.h       2015-01-05 07:33:28.000000000 -0500
284
@@ -55,7 +55,7 @@
285
 /* Define this for shared library support because it isn't in the main
286
    linux.h file.  */
287
 
288
-#define GLIBC_DYNAMIC_LINKER "/tools/lib/ld-linux-ia64.so.2"
289
+#define GLIBC_DYNAMIC_LINKER "/lib/ld-linux-ia64.so.2"
290
 
291
 #undef LINK_SPEC
292
 #define LINK_SPEC "\
293
diff -Naur '--exclude=*.swp' gcc-5.3.0-original/gcc/config/knetbsd-gnu.h gcc-5.3.0-zip/gcc/config/knetbsd-gnu.h
294 111 dgisselq
--- gcc-5.3.0-original/gcc/config/knetbsd-gnu.h 2016-03-25 10:21:47.243774882 -0400
295 102 dgisselq
+++ gcc-5.3.0-zip/gcc/config/knetbsd-gnu.h      2015-01-05 07:33:28.000000000 -0500
296
@@ -32,4 +32,4 @@
297
 
298
 
299
 #undef GNU_USER_DYNAMIC_LINKER
300
-#define GNU_USER_DYNAMIC_LINKER "/tools/lib/ld.so.1"
301
+#define GNU_USER_DYNAMIC_LINKER "/lib/ld.so.1"
302
diff -Naur '--exclude=*.swp' gcc-5.3.0-original/gcc/config/kopensolaris-gnu.h gcc-5.3.0-zip/gcc/config/kopensolaris-gnu.h
303 111 dgisselq
--- gcc-5.3.0-original/gcc/config/kopensolaris-gnu.h    2016-03-25 10:21:47.243774882 -0400
304 102 dgisselq
+++ gcc-5.3.0-zip/gcc/config/kopensolaris-gnu.h 2015-01-05 07:33:28.000000000 -0500
305
@@ -31,5 +31,4 @@
306
   while (0)
307
 
308
 #undef GNU_USER_DYNAMIC_LINKER
309
-#define GNU_USER_DYNAMIC_LINKER "/tools/lib/ld.so.1"
310
-
311
+#define GNU_USER_DYNAMIC_LINKER "/lib/ld.so.1"
312
diff -Naur '--exclude=*.swp' gcc-5.3.0-original/gcc/config/linux.h gcc-5.3.0-zip/gcc/config/linux.h
313 111 dgisselq
--- gcc-5.3.0-original/gcc/config/linux.h       2016-03-25 10:21:47.243774882 -0400
314 102 dgisselq
+++ gcc-5.3.0-zip/gcc/config/linux.h    2015-01-05 07:33:28.000000000 -0500
315
@@ -73,10 +73,10 @@
316
    GLIBC_DYNAMIC_LINKER must be defined for each target using them, or
317
    GLIBC_DYNAMIC_LINKER32 and GLIBC_DYNAMIC_LINKER64 for targets
318
    supporting both 32-bit and 64-bit compilation.  */
319
-#define UCLIBC_DYNAMIC_LINKER "/tools/lib/ld-uClibc.so.0"
320
-#define UCLIBC_DYNAMIC_LINKER32 "/tools/lib/ld-uClibc.so.0"
321
-#define UCLIBC_DYNAMIC_LINKER64 "/tools/lib/ld64-uClibc.so.0"
322
-#define UCLIBC_DYNAMIC_LINKERX32 "/tools/lib/ldx32-uClibc.so.0"
323
+#define UCLIBC_DYNAMIC_LINKER "/lib/ld-uClibc.so.0"
324
+#define UCLIBC_DYNAMIC_LINKER32 "/lib/ld-uClibc.so.0"
325
+#define UCLIBC_DYNAMIC_LINKER64 "/lib/ld64-uClibc.so.0"
326
+#define UCLIBC_DYNAMIC_LINKERX32 "/lib/ldx32-uClibc.so.0"
327
 #define BIONIC_DYNAMIC_LINKER "/system/bin/linker"
328
 #define BIONIC_DYNAMIC_LINKER32 "/system/bin/linker"
329
 #define BIONIC_DYNAMIC_LINKER64 "/system/bin/linker64"
330
diff -Naur '--exclude=*.swp' gcc-5.3.0-original/gcc/config/lm32/uclinux-elf.h gcc-5.3.0-zip/gcc/config/lm32/uclinux-elf.h
331 111 dgisselq
--- gcc-5.3.0-original/gcc/config/lm32/uclinux-elf.h    2016-03-25 10:21:47.243774882 -0400
332 102 dgisselq
+++ gcc-5.3.0-zip/gcc/config/lm32/uclinux-elf.h 2015-01-05 07:33:28.000000000 -0500
333
@@ -67,7 +67,7 @@
334
    %{shared:-shared} \
335
    %{symbolic:-Bsymbolic} \
336
    %{rdynamic:-export-dynamic} \
337
-   -dynamic-linker /tools/lib/ld-linux.so.2"
338
+   -dynamic-linker /lib/ld-linux.so.2"
339
 
340
 #define TARGET_OS_CPP_BUILTINS() GNU_USER_TARGET_OS_CPP_BUILTINS()
341
 
342
diff -Naur '--exclude=*.swp' gcc-5.3.0-original/gcc/config/m68k/linux.h gcc-5.3.0-zip/gcc/config/m68k/linux.h
343 111 dgisselq
--- gcc-5.3.0-original/gcc/config/m68k/linux.h  2016-03-25 10:21:47.243774882 -0400
344 102 dgisselq
+++ gcc-5.3.0-zip/gcc/config/m68k/linux.h       2015-01-05 07:33:28.000000000 -0500
345
@@ -71,7 +71,7 @@
346
    When the -shared link option is used a final link is not being
347
    done.  */
348
 
349
-#define GLIBC_DYNAMIC_LINKER "/tools/lib/ld.so.1"
350
+#define GLIBC_DYNAMIC_LINKER "/lib/ld.so.1"
351
 
352
 #undef LINK_SPEC
353
 #define LINK_SPEC "-m m68kelf %{shared} \
354
diff -Naur '--exclude=*.swp' gcc-5.3.0-original/gcc/config/microblaze/linux.h gcc-5.3.0-zip/gcc/config/microblaze/linux.h
355 111 dgisselq
--- gcc-5.3.0-original/gcc/config/microblaze/linux.h    2016-03-25 10:21:47.243774882 -0400
356 102 dgisselq
+++ gcc-5.3.0-zip/gcc/config/microblaze/linux.h 2015-05-28 10:08:19.000000000 -0400
357
@@ -28,7 +28,7 @@
358
 #undef TLS_NEEDS_GOT
359
 #define TLS_NEEDS_GOT 1
360
 
361
-#define DYNAMIC_LINKER "/tools/lib/ld.so.1"
362
+#define DYNAMIC_LINKER "/lib/ld.so.1"
363
 #undef  SUBTARGET_EXTRA_SPECS
364
 #define SUBTARGET_EXTRA_SPECS \
365
   { "dynamic_linker", DYNAMIC_LINKER }
366
diff -Naur '--exclude=*.swp' gcc-5.3.0-original/gcc/config/mips/linux.h gcc-5.3.0-zip/gcc/config/mips/linux.h
367 111 dgisselq
--- gcc-5.3.0-original/gcc/config/mips/linux.h  2016-03-25 10:21:47.243774882 -0400
368 102 dgisselq
+++ gcc-5.3.0-zip/gcc/config/mips/linux.h       2015-01-05 07:33:28.000000000 -0500
369
@@ -22,20 +22,20 @@
370
 #define GNU_USER_LINK_EMULATIONN32 "elf32%{EB:b}%{EL:l}tsmipn32"
371
 
372
 #define GLIBC_DYNAMIC_LINKER32 \
373
-  "%{mnan=2008:/tools/lib/ld-linux-mipsn8.so.1;:/tools/lib/ld.so.1}"
374
+  "%{mnan=2008:/lib/ld-linux-mipsn8.so.1;:/lib/ld.so.1}"
375
 #define GLIBC_DYNAMIC_LINKER64 \
376
-  "%{mnan=2008:/tools/lib64/ld-linux-mipsn8.so.1;:/tools/lib64/ld.so.1}"
377
+  "%{mnan=2008:/lib64/ld-linux-mipsn8.so.1;:/lib64/ld.so.1}"
378
 #define GLIBC_DYNAMIC_LINKERN32 \
379
-  "%{mnan=2008:/tools/lib32/ld-linux-mipsn8.so.1;:/tools/lib32/ld.so.1}"
380
+  "%{mnan=2008:/lib32/ld-linux-mipsn8.so.1;:/lib32/ld.so.1}"
381
 
382
 #undef UCLIBC_DYNAMIC_LINKER32
383
 #define UCLIBC_DYNAMIC_LINKER32 \
384
-  "%{mnan=2008:/tools/lib/ld-uClibc-mipsn8.so.0;:/tools/lib/ld-uClibc.so.0}"
385
+  "%{mnan=2008:/lib/ld-uClibc-mipsn8.so.0;:/lib/ld-uClibc.so.0}"
386
 #undef UCLIBC_DYNAMIC_LINKER64
387
 #define UCLIBC_DYNAMIC_LINKER64 \
388
-  "%{mnan=2008:/tools/lib/ld64-uClibc-mipsn8.so.0;:/tools/lib/ld64-uClibc.so.0}"
389
+  "%{mnan=2008:/lib/ld64-uClibc-mipsn8.so.0;:/lib/ld64-uClibc.so.0}"
390
 #define UCLIBC_DYNAMIC_LINKERN32 \
391
-  "%{mnan=2008:/tools/lib32/ld-uClibc-mipsn8.so.0;:/tools/lib32/ld-uClibc.so.0}"
392
+  "%{mnan=2008:/lib32/ld-uClibc-mipsn8.so.0;:/lib32/ld-uClibc.so.0}"
393
 
394
 #define BIONIC_DYNAMIC_LINKERN32 "/system/bin/linker32"
395
 #define GNU_USER_DYNAMIC_LINKERN32 \
396
diff -Naur '--exclude=*.swp' gcc-5.3.0-original/gcc/config/mn10300/linux.h gcc-5.3.0-zip/gcc/config/mn10300/linux.h
397 111 dgisselq
--- gcc-5.3.0-original/gcc/config/mn10300/linux.h       2016-03-25 10:21:47.243774882 -0400
398 102 dgisselq
+++ gcc-5.3.0-zip/gcc/config/mn10300/linux.h    2015-01-05 07:33:28.000000000 -0500
399
@@ -32,7 +32,7 @@
400
 #undef  ASM_SPEC
401
 #define ASM_SPEC ""
402
 
403
-#define GLIBC_DYNAMIC_LINKER "/tools/lib/ld.so.1"
404
+#define GLIBC_DYNAMIC_LINKER "/lib/ld.so.1"
405
 
406
 #undef  LINK_SPEC
407
 #define LINK_SPEC "%{mrelax:--relax} %{shared:-shared} \
408
diff -Naur '--exclude=*.swp' gcc-5.3.0-original/gcc/config/pa/pa-linux.h gcc-5.3.0-zip/gcc/config/pa/pa-linux.h
409 111 dgisselq
--- gcc-5.3.0-original/gcc/config/pa/pa-linux.h 2016-03-25 10:21:47.243774882 -0400
410 102 dgisselq
+++ gcc-5.3.0-zip/gcc/config/pa/pa-linux.h      2015-09-24 20:04:26.000000000 -0400
411
@@ -37,7 +37,7 @@
412
 /* Define this for shared library support because it isn't in the main
413
    linux.h file.  */
414
 
415
-#define GLIBC_DYNAMIC_LINKER "/tools/lib/ld.so.1"
416
+#define GLIBC_DYNAMIC_LINKER "/lib/ld.so.1"
417
 
418
 #undef LINK_SPEC
419
 #define LINK_SPEC "\
420
diff -Naur '--exclude=*.swp' gcc-5.3.0-original/gcc/config/rs6000/linux64.h gcc-5.3.0-zip/gcc/config/rs6000/linux64.h
421 111 dgisselq
--- gcc-5.3.0-original/gcc/config/rs6000/linux64.h      2016-03-25 10:21:47.243774882 -0400
422 102 dgisselq
+++ gcc-5.3.0-zip/gcc/config/rs6000/linux64.h   2015-03-09 19:18:57.000000000 -0400
423
@@ -357,14 +357,14 @@
424
 #undef LINK_OS_DEFAULT_SPEC
425
 #define LINK_OS_DEFAULT_SPEC "%(link_os_linux)"
426
 
427
-#define GLIBC_DYNAMIC_LINKER32 "/tools/lib/ld.so.1"
428
+#define GLIBC_DYNAMIC_LINKER32 "/lib/ld.so.1"
429
 #ifdef LINUX64_DEFAULT_ABI_ELFv2
430
-#define GLIBC_DYNAMIC_LINKER64 "%{mabi=elfv1:/tools/lib64/ld64.so.1;:/tools/lib64/ld64.so.2}"
431
+#define GLIBC_DYNAMIC_LINKER64 "%{mabi=elfv1:/lib64/ld64.so.1;:/lib64/ld64.so.2}"
432
 #else
433
-#define GLIBC_DYNAMIC_LINKER64 "%{mabi=elfv2:/tools/lib64/ld64.so.2;:/tools/lib64/ld64.so.1}"
434
+#define GLIBC_DYNAMIC_LINKER64 "%{mabi=elfv2:/lib64/ld64.so.2;:/lib64/ld64.so.1}"
435
 #endif
436
-#define UCLIBC_DYNAMIC_LINKER32 "/tools/lib/ld-uClibc.so.0"
437
-#define UCLIBC_DYNAMIC_LINKER64 "/tools/lib/ld64-uClibc.so.0"
438
+#define UCLIBC_DYNAMIC_LINKER32 "/lib/ld-uClibc.so.0"
439
+#define UCLIBC_DYNAMIC_LINKER64 "/lib/ld64-uClibc.so.0"
440
 #if DEFAULT_LIBC == LIBC_UCLIBC
441
 #define CHOOSE_DYNAMIC_LINKER(G, U) "%{mglibc:" G ";:" U "}"
442
 #elif DEFAULT_LIBC == LIBC_GLIBC
443
diff -Naur '--exclude=*.swp' gcc-5.3.0-original/gcc/config/rs6000/sysv4.h gcc-5.3.0-zip/gcc/config/rs6000/sysv4.h
444 111 dgisselq
--- gcc-5.3.0-original/gcc/config/rs6000/sysv4.h        2016-03-25 10:21:47.315774500 -0400
445 102 dgisselq
+++ gcc-5.3.0-zip/gcc/config/rs6000/sysv4.h     2015-09-24 09:46:45.000000000 -0400
446
@@ -757,8 +757,8 @@
447
 
448
 #define LINK_START_LINUX_SPEC ""
449
 
450
-#define GLIBC_DYNAMIC_LINKER "/tools/lib/ld.so.1"
451
-#define UCLIBC_DYNAMIC_LINKER "/tools/lib/ld-uClibc.so.0"
452
+#define GLIBC_DYNAMIC_LINKER "/lib/ld.so.1"
453
+#define UCLIBC_DYNAMIC_LINKER "/lib/ld-uClibc.so.0"
454
 #if DEFAULT_LIBC == LIBC_UCLIBC
455
 #define CHOOSE_DYNAMIC_LINKER(G, U) "%{mglibc:" G ";:" U "}"
456
 #elif !defined (DEFAULT_LIBC) || DEFAULT_LIBC == LIBC_GLIBC
457
diff -Naur '--exclude=*.swp' gcc-5.3.0-original/gcc/config/s390/linux.h gcc-5.3.0-zip/gcc/config/s390/linux.h
458 111 dgisselq
--- gcc-5.3.0-original/gcc/config/s390/linux.h  2016-03-25 10:21:47.315774500 -0400
459 102 dgisselq
+++ gcc-5.3.0-zip/gcc/config/s390/linux.h       2015-05-11 03:14:10.000000000 -0400
460
@@ -60,8 +60,8 @@
461
 #define MULTILIB_DEFAULTS { "m31" }
462
 #endif
463
 
464
-#define GLIBC_DYNAMIC_LINKER32 "/tools/lib/ld.so.1"
465
-#define GLIBC_DYNAMIC_LINKER64 "/tools/lib/ld64.so.1"
466
+#define GLIBC_DYNAMIC_LINKER32 "/lib/ld.so.1"
467
+#define GLIBC_DYNAMIC_LINKER64 "/lib/ld64.so.1"
468
 
469
 #undef  LINK_SPEC
470
 #define LINK_SPEC \
471
diff -Naur '--exclude=*.swp' gcc-5.3.0-original/gcc/config/sh/linux.h gcc-5.3.0-zip/gcc/config/sh/linux.h
472 111 dgisselq
--- gcc-5.3.0-original/gcc/config/sh/linux.h    2016-03-25 10:21:47.315774500 -0400
473 102 dgisselq
+++ gcc-5.3.0-zip/gcc/config/sh/linux.h 2015-01-05 07:33:28.000000000 -0500
474
@@ -43,7 +43,7 @@
475
 
476
 #define TARGET_ASM_FILE_END file_end_indicate_exec_stack
477
 
478
-#define GLIBC_DYNAMIC_LINKER "/tools/lib/ld-linux.so.2"
479
+#define GLIBC_DYNAMIC_LINKER "/lib/ld-linux.so.2"
480
 
481
 #undef SUBTARGET_LINK_EMUL_SUFFIX
482
 #define SUBTARGET_LINK_EMUL_SUFFIX "_linux"
483
diff -Naur '--exclude=*.swp' gcc-5.3.0-original/gcc/config/sparc/linux64.h gcc-5.3.0-zip/gcc/config/sparc/linux64.h
484 111 dgisselq
--- gcc-5.3.0-original/gcc/config/sparc/linux64.h       2016-03-25 10:21:47.315774500 -0400
485 102 dgisselq
+++ gcc-5.3.0-zip/gcc/config/sparc/linux64.h    2015-01-05 07:33:28.000000000 -0500
486
@@ -84,8 +84,8 @@
487
    When the -shared link option is used a final link is not being
488
    done.  */
489
 
490
-#define GLIBC_DYNAMIC_LINKER32 "/tools/lib/ld-linux.so.2"
491
-#define GLIBC_DYNAMIC_LINKER64 "/tools/lib64/ld-linux.so.2"
492
+#define GLIBC_DYNAMIC_LINKER32 "/lib/ld-linux.so.2"
493
+#define GLIBC_DYNAMIC_LINKER64 "/lib64/ld-linux.so.2"
494
 
495
 #ifdef SPARC_BI_ARCH
496
 
497
@@ -193,7 +193,7 @@
498
 #else /* !SPARC_BI_ARCH */
499
 
500
 #undef LINK_SPEC
501
-#define LINK_SPEC "-m elf64_sparc -Y P,%R/tools/lib64 %{shared:-shared} \
502
+#define LINK_SPEC "-m elf64_sparc -Y P,%R/usr/lib64 %{shared:-shared} \
503
   %{!shared: \
504
     %{!static: \
505
       %{rdynamic:-export-dynamic} \
506
diff -Naur '--exclude=*.swp' gcc-5.3.0-original/gcc/config/sparc/linux.h gcc-5.3.0-zip/gcc/config/sparc/linux.h
507 111 dgisselq
--- gcc-5.3.0-original/gcc/config/sparc/linux.h 2016-03-25 10:21:47.315774500 -0400
508 102 dgisselq
+++ gcc-5.3.0-zip/gcc/config/sparc/linux.h      2015-01-05 07:33:28.000000000 -0500
509
@@ -83,7 +83,7 @@
510
    When the -shared link option is used a final link is not being
511
    done.  */
512
 
513
-#define GLIBC_DYNAMIC_LINKER "/tools/lib/ld-linux.so.2"
514
+#define GLIBC_DYNAMIC_LINKER "/lib/ld-linux.so.2"
515
 
516
 #undef  LINK_SPEC
517
 #define LINK_SPEC "-m elf32_sparc %{shared:-shared} \
518
diff -Naur '--exclude=*.swp' gcc-5.3.0-original/gcc/config/vax/linux.h gcc-5.3.0-zip/gcc/config/vax/linux.h
519 111 dgisselq
--- gcc-5.3.0-original/gcc/config/vax/linux.h   2016-03-25 10:21:47.315774500 -0400
520 102 dgisselq
+++ gcc-5.3.0-zip/gcc/config/vax/linux.h        2015-01-05 07:33:28.000000000 -0500
521
@@ -41,7 +41,7 @@
522
   %{!shared: \
523
     %{!static: \
524
       %{rdynamic:-export-dynamic} \
525
-      -dynamic-linker /tools/lib/ld.so.1} \
526
+      -dynamic-linker /lib/ld.so.1} \
527
     %{static:-static}}"
528
 
529
 #undef  WCHAR_TYPE
530
diff -Naur '--exclude=*.swp' gcc-5.3.0-original/gcc/config/xtensa/linux.h gcc-5.3.0-zip/gcc/config/xtensa/linux.h
531 111 dgisselq
--- gcc-5.3.0-original/gcc/config/xtensa/linux.h        2016-03-25 10:21:47.315774500 -0400
532 102 dgisselq
+++ gcc-5.3.0-zip/gcc/config/xtensa/linux.h     2015-01-05 07:33:28.000000000 -0500
533
@@ -44,7 +44,7 @@
534
   %{mlongcalls:--longcalls} \
535
   %{mno-longcalls:--no-longcalls}"
536
 
537
-#define GLIBC_DYNAMIC_LINKER "/tools/lib/ld.so.1"
538
+#define GLIBC_DYNAMIC_LINKER "/lib/ld.so.1"
539
 
540
 #undef LINK_SPEC
541
 #define LINK_SPEC \
542
diff -Naur '--exclude=*.swp' gcc-5.3.0-original/gcc/config/zip/netbsd.h gcc-5.3.0-zip/gcc/config/zip/netbsd.h
543
--- gcc-5.3.0-original/gcc/config/zip/netbsd.h  1969-12-31 19:00:00.000000000 -0500
544
+++ gcc-5.3.0-zip/gcc/config/zip/netbsd.h       2016-01-30 15:04:14.796899050 -0500
545
@@ -0,0 +1,82 @@
546
+////////////////////////////////////////////////////////////////////////////////
547
+//
548
+// Filename:   netbsd.h
549
+//
550
+// Project:    Zip CPU backend for the GNU Compiler Collection
551
+//
552
+// Purpose:
553
+//
554
+// Creator:    Dan Gisselquist, Ph.D.
555
+//             Gisselquist Technology, LLC
556
+//
557
+////////////////////////////////////////////////////////////////////////////////
558
+//
559
+// Copyright (C) 2016, Gisselquist Technology, LLC
560
+//
561
+// This program is free software (firmware): you can redistribute it and/or
562
+// modify it under the terms of  the GNU General Public License as published
563
+// by the Free Software Foundation, either version 3 of the License, or (at
564
+// your option) any later version.
565
+//
566
+// This program is distributed in the hope that it will be useful, but WITHOUT
567
+// ANY WARRANTY; without even the implied warranty of MERCHANTIBILITY or
568
+// FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
569
+// for more details.
570
+//
571
+// You should have received a copy of the GNU General Public License along
572
+// with this program.  (It's in the $(ROOT)/doc directory, run make with no
573
+// target there if the PDF file isn't present.)  If not, see
574
+// <http://www.gnu.org/licenses/> for a copy.
575
+//
576
+// License:    GPL, v3, as defined and found on www.gnu.org,
577
+//             http://www.gnu.org/licenses/gpl.html
578
+//
579
+//
580
+////////////////////////////////////////////////////////////////////////////////
581
+#ifndef        ZIP_NETBSD_H
582
+#define        ZIP_NETBSD_H
583
+
584
+/* Define default target values. */
585
+
586
+#undef MACHINE_TYPE
587
+#define        MACHINE_TYPE    "NetBSD/Zip ELF"
588
+
589
+#undef TARGET_OS_CPP_BUILTINS
590
+#define        TARGET_OS_CPP_BUILTINS()        \
591
+       do { NETBSD_OS_CPP_BUILTINS_ELF();              \
592
+       builtin_define("__ZIPCPU__");                   \
593
+       builtin_assert("cpu=zip");                      \
594
+       builtin_assert("machine=zip");                  \
595
+       } while(0);
596
+
597
+#undef CPP_SPEC
598
+#define        CPP_SPEC        NETBSD_CPP_SPEC
599
+
600
+#undef STARTFILE_SPEC
601
+#define        STARTFILE_SPEC  NETBSD_STARTFILE_SPEC
602
+
603
+#undef ENDFILE_SPEC
604
+#define        ENDFILE_SPEC    NETBSD_ENDFILE_SPEC
605
+
606
+#undef LIB_SPEC
607
+#define        LIB_SPEC        NETBSD_LIB_SPEC
608
+
609
+#undef TARGET_VERSION
610
+#define        TARGET_VERSION  fprintf(stderr, " (%s)", MACHINE_TYPE);
611
+
612
+/* Make gcc agree with <machine/ansi.h> */
613
+
614
+#undef WCHAR_TYPE
615
+#define        WCHAR_TYPE      "int"
616
+
617
+#undef WCHAR_TYPE_SIZE
618
+#define        WCHAR_TYPE_SIZE 32
619
+
620
+#undef WINT_TYPE
621
+#define        WINT_TYPE       "int"
622
+
623
+/* Clean up after the generic Zip/ELF configuration. */
624
+#undef MD_EXEC_PREFIX
625
+#undef MD_STARTFILE_PREFIX
626
+
627
+#endif /* ZIP_NETBSD_H */
628
diff -Naur '--exclude=*.swp' gcc-5.3.0-original/gcc/config/zip/t-zip gcc-5.3.0-zip/gcc/config/zip/t-zip
629
--- gcc-5.3.0-original/gcc/config/zip/t-zip     1969-12-31 19:00:00.000000000 -0500
630
+++ gcc-5.3.0-zip/gcc/config/zip/t-zip  2016-02-04 19:00:59.939652587 -0500
631
@@ -0,0 +1,47 @@
632
+################################################################################
633
+##
634
+## Filename:   t-zip
635
+##
636
+## Project:    Zip CPU backend for the GNU Compiler Collection
637
+##
638
+## Purpose:
639
+##
640
+## Creator:    Dan Gisselquist, Ph.D.
641
+##             Gisselquist Technology, LLC
642
+##
643
+################################################################################
644
+##
645
+## Copyright (C) 2016, Gisselquist Technology, LLC
646
+##
647
+## This program is free software (firmware): you can redistribute it and/or
648
+## modify it under the terms of  the GNU General Public License as published
649
+## by the Free Software Foundation, either version 3 of the License, or (at
650
+## your option) any later version.
651
+##
652
+## This program is distributed in the hope that it will be useful, but WITHOUT
653
+## ANY WARRANTY; without even the implied warranty of MERCHANTIBILITY or
654
+## FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
655
+## for more details.
656
+##
657
+## You should have received a copy of the GNU General Public License along
658
+## with this program.  (It's in the $(ROOT)/doc directory, run make with no
659
+## target there if the PDF file isn't present.)  If not, see
660
+## <http://www.gnu.org/licenses/> for a copy.
661
+##
662
+## License:    GPL, v3, as defined and found on www.gnu.org,
663
+##             http://www.gnu.org/licenses/gpl.html
664
+##
665
+##
666
+################################################################################
667
+
668
+FPBIT = fp-bit.c
669
+DPBIT = dp-bit.c
670
+
671
+# dp-bit.c: $(srcdir)/config/fp-bit.c
672
+       # cat $(srcdir)/config/fp-bit.c > dp-bit.c
673
+#
674
+# fp-bit.c: $(srcdir)/config/fp-bit.c
675
+       # echo '#define FLOAT" > fp-bit.c
676
+       # cat $(srcdir)/config/fp-bit.c >> fp-bit.c
677
+
678
+
679
diff -Naur '--exclude=*.swp' gcc-5.3.0-original/gcc/config/zip/zip.c gcc-5.3.0-zip/gcc/config/zip/zip.c
680
--- gcc-5.3.0-original/gcc/config/zip/zip.c     1969-12-31 19:00:00.000000000 -0500
681 111 dgisselq
+++ gcc-5.3.0-zip/gcc/config/zip/zip.c  2016-03-24 21:28:04.199373113 -0400
682
@@ -0,0 +1,2324 @@
683 102 dgisselq
+////////////////////////////////////////////////////////////////////////////////
684
+//
685
+// Filename:   zip.c
686
+//
687
+// Project:    Zip CPU backend for the GNU Compiler Collection
688
+//
689
+// Purpose:
690
+//
691
+// Creator:    Dan Gisselquist, Ph.D.
692
+//             Gisselquist Technology, LLC
693
+//
694
+////////////////////////////////////////////////////////////////////////////////
695
+//
696
+// Copyright (C) 2016, Gisselquist Technology, LLC
697
+//
698
+// This program is free software (firmware): you can redistribute it and/or
699
+// modify it under the terms of  the GNU General Public License as published
700
+// by the Free Software Foundation, either version 3 of the License, or (at
701
+// your option) any later version.
702
+//
703
+// This program is distributed in the hope that it will be useful, but WITHOUT
704
+// ANY WARRANTY; without even the implied warranty of MERCHANTIBILITY or
705
+// FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
706
+// for more details.
707
+//
708
+// You should have received a copy of the GNU General Public License along
709
+// with this program.  (It's in the $(ROOT)/doc directory, run make with no
710
+// target there if the PDF file isn't present.)  If not, see
711
+// <http://www.gnu.org/licenses/> for a copy.
712
+//
713
+// License:    GPL, v3, as defined and found on www.gnu.org,
714
+//             http://www.gnu.org/licenses/gpl.html
715
+//
716
+//
717
+////////////////////////////////////////////////////////////////////////////////
718
+#include "config.h"
719
+#include "system.h"
720
+#include "coretypes.h"
721
+#include "tm.h"
722
+#include "rtl.h"
723
+#include "dominance.h"
724
+#include "cfg.h"
725
+#include "cfgrtl.h"
726
+#include "cfganal.h"
727
+#include "lcm.h"
728
+#include "cfgbuild.h"
729
+#include "cfgcleanup.h"
730
+#include "predict.h"
731
+#include "basic-block.h"
732
+#include "df.h"
733
+#include "hashtab.h"
734
+#include "hash-set.h"
735
+#include "machmode.h"
736
+#include "symtab.h"
737
+#include "rtlhash.h"
738
+#include "tree.h"
739
+#include "regs.h"
740
+#include "hard-reg-set.h"
741
+#include "real.h"
742
+#include "insn-config.h"
743
+#include "conditions.h"
744
+#include "output.h"
745
+#include "insn-attr.h"
746
+#include "flags.h"
747
+#include "expr.h"
748
+#include "function.h"
749
+#include "recog.h"
750
+#include "toplev.h"
751
+#include "ggc.h"
752
+#include "builtins.h"
753
+#include "calls.h"
754
+#include "langhooks.h"
755
+#include "optabs.h"
756
+#include "explow.h"
757
+#include "emit-rtl.h"
758
+
759
+// #include "tmp_p.h"
760
+#include "target.h"
761
+#include "target-def.h"
762
+// #include "tm-constrs.h"
763
+// #include "tm-preds.h"
764
+
765
+#include "diagnostic.h"
766
+// #include "integrate.h"
767
+
768
+// static int  zip_arg_partial_bytes(CUMULATIVE_ARGS *, enum machine_mode, tree, bool);
769
+// static      bool    zip_pass_by_reference(CUMULATIVE_ARGS *, enum machine_mode, const_tree, bool);
770
+static bool    zip_return_in_memory(const_tree, const_tree);
771
+static bool    zip_frame_pointer_required(void);
772
+// static      bool    zip_must_pass_in_stack(enum machine_mode, const_tree);
773
+
774
+// static      void    zip_setup_incoming_varargs(CUMULATIVE_ARGS *, enum machine_mode, tree, int *, int);
775
+static void zip_function_arg_advance(cumulative_args_t ca, enum machine_mode mode,
776
+               const_tree type, bool named);
777
+static rtx zip_function_arg(cumulative_args_t ca, enum machine_mode mode, const_tree type, bool named);
778
+
779
+static void    zip_asm_trampoline_template(FILE *);
780
+static void    zip_trampoline_init(rtx, tree, rtx);
781
+static void    zip_init_builtins(void);
782
+static tree zip_builtin_decl(unsigned, bool);
783
+// static void zip_asm_output_anchor(rtx x);
784
+       void    zip_asm_output_def(FILE *s, const char *n, const char *v);
785
+       void    zip_update_cc_notice(rtx exp, rtx_insn *insn);
786
+static rtx     zip_expand_builtin(tree exp, rtx target, rtx subtarget,
787
+                       enum machine_mode tmode, int    ignore);
788
+static bool    zip_scalar_mode_supported_p(enum machine_mode mode);
789
+static bool    zip_libgcc_floating_mode_supported_p(enum machine_mode mode);
790
+static int     zip_address_cost(rtx addr, enum machine_mode mode, addr_space_t as, bool spd);
791
+static bool    zip_mode_dependent_address_p(const_rtx addr, addr_space_t);
792
+static unsigned HOST_WIDE_INT  zip_const_anchor = 0x20000;
793 111 dgisselq
+static          HOST_WIDE_INT  zip_min_opb_imm = -0x200000;
794
+static          HOST_WIDE_INT  zip_max_opb_imm =  0x1fffff;
795 102 dgisselq
+static          HOST_WIDE_INT  zip_min_anchor_offset = -0x20000;
796
+static          HOST_WIDE_INT  zip_max_anchor_offset =  0x1ffff;
797
+static          HOST_WIDE_INT  zip_min_mov_offset = -0x1000;
798
+static          HOST_WIDE_INT  zip_max_mov_offset =  0x0fff;
799
+static int     zip_sched_issue_rate(void) { return 1; }
800
+static bool    zip_legitimate_address_p(machine_mode, rtx, bool);
801
+static bool    zip_legitimate_move_operand_p(machine_mode, rtx, bool);
802
+       void    zip_debug_rtx_pfx(const char *, const_rtx x);
803
+       void    zip_debug_rtx(const_rtx x);
804
+static void    zip_override_options(void);
805
+static bool    zip_can_eliminate(int from ATTRIBUTE_UNUSED, int to);
806
+static int     zip_memory_move_cost(machine_mode, reg_class_t, bool);
807 111 dgisselq
+static rtx     zip_legitimize_address(rtx x, rtx oldx, machine_mode mode);
808 102 dgisselq
+
809
+
810 103 dgisselq
+#define        ALL_DEBUG_OFF   false
811 102 dgisselq
+#define        ALL_DEBUG_ON    false
812
+
813
+enum ZIP_BUILTIN_ID_CODE {
814
+       ZIP_BUILTIN_RTU,
815
+       ZIP_BUILTIN_HALT,
816
+       ZIP_BUILTIN_IDLE,
817
+       ZIP_BUILTIN_SYSCALL,
818
+       ZIP_BUILTIN_SAVE_CONTEXT,
819
+       ZIP_BUILTIN_RESTORE_CONTEXT,
820
+       ZIP_BUILTIN_BITREV,
821
+       ZIP_BUILTIN_CC,
822
+       ZIP_BUILTIN_MAX
823
+};
824
+
825
+static GTY (()) tree   zip_builtins[(int)ZIP_BUILTIN_MAX];
826
+static enum insn_code  zip_builtins_icode[(int)ZIP_BUILTIN_MAX];
827
+
828
+
829
+#include "gt-zip.h"
830
+
831
+/* The Global 'targetm' Variable. */
832
+struct gcc_target      targetm = TARGET_INITIALIZER;
833
+
834
+
835
+enum   reg_class zip_reg_class(int);
836
+
837
+#define        LOSE_AND_RETURN(msgid, x)               \
838
+       do {                                    \
839
+               zip_operand_lossage(msgid, x);  \
840
+               return;                         \
841
+       } while(0)
842
+
843
+/* Per-function machine data. */
844
+struct GTY(()) machine_function
845
+{
846
+       /* number of pretented arguments for varargs */
847
+       int     pretend_size;
848
+
849
+       /* Number of bytes saved on the stack for local variables. */
850
+       int     local_vars_size;
851
+
852
+       /* Number of bytes saved on stack for register save area */
853
+       int     saved_reg_size;
854
+       int     save_ret;
855
+
856
+       int     sp_fp_offset;
857
+       bool    fp_needed;
858
+       int     size_for_adjusting_sp;
859
+};
860
+
861
+/* Allocate a chunk of memory for per-function machine-dependent data. */
862
+
863
+static struct machine_function *
864
+zip_init_machine_status(void) {
865
+       return ggc_cleared_alloc<machine_function>();
866
+}
867
+
868
+static void
869
+zip_override_options(void)
870
+{
871
+       init_machine_status = zip_init_machine_status;
872
+}
873
+
874
+enum   reg_class
875
+zip_reg_class(int regno)
876
+{
877
+       if (is_ZIP_GENERAL_REG(regno)) {
878
+               return GENERAL_REGS;
879
+       } else if (is_ZIP_REG(regno)) {
880
+               return ALL_REGS;
881
+       } return NO_REGS;
882
+}
883
+
884
+/* Worker function for TARGET_RETURN_IN_MEMORY. */
885
+static bool
886
+zip_return_in_memory(const_tree type, const_tree fntype ATTRIBUTE_UNUSED) {
887
+       const   HOST_WIDE_INT size = int_size_in_bytes(type);
888
+       return (size == -1)||(size > UNITS_PER_WORD);
889
+}
890
+
891
+/* Emit an error emssage when we're in an asm, and a fatal error for "normal"
892
+ * insn.  Formatted output isn't easily implemented, since we use output operand
893
+ * lossage to output the actual message and handle the categorization of the
894
+ * error.  */
895
+
896
+static void
897
+zip_operand_lossage(const char *msgid, rtx op) {
898
+       fprintf(stderr, "Operand lossage??\n");
899
+       debug_rtx(op);
900
+       zip_debug_rtx(op);
901
+       output_operand_lossage("%s", msgid);
902
+}
903
+
904
+/* The PRINT_OPERAND_ADDRESS worker.   */
905
+void
906
+zip_print_operand_address(FILE *file, rtx x) {
907
+       const bool      dbg = ((ALL_DEBUG_ON)||(false))&&(!ALL_DEBUG_OFF);
908
+
909
+       if (dbg) zip_debug_rtx(x);
910
+       switch(GET_CODE(x)) {
911
+               case REG:
912
+                       fprintf(file, "(%s)", reg_names[REGNO(x)]);
913
+                       break;
914
+               case SYMBOL_REF:
915
+                       fprintf(file, "%s", XSTR(x,0));
916
+                       break;
917
+               case LABEL_REF:
918
+                       x = LABEL_REF_LABEL(x);
919
+               case CODE_LABEL:
920
+                       { char buf[256];
921
+                       ASM_GENERATE_INTERNAL_LABEL(buf, "L", CODE_LABEL_NUMBER(x));
922
+#ifdef ASM_OUTPUT_LABEL_REF
923
+                       ASM_OUTPUT_LABEL_REF(file, buf);
924
+#else
925
+                       assemble_name(file, buf);
926
+#endif
927
+                       }
928
+                       break;
929
+               case PLUS:
930 111 dgisselq
+                       if (!REG_P(XEXP(x, 0))) {
931
+                               fprintf(stderr, "Unsupported address construct\n");
932
+                               zip_debug_rtx(x);
933 102 dgisselq
+                               abort();
934 111 dgisselq
+                       } if (CONST_INT_P(XEXP(x, 1))) {
935 102 dgisselq
+                               if (INTVAL(XEXP(x,1))!=0) {
936
+                                       fprintf(file, "%ld(%s)",
937
+                                       INTVAL(XEXP(x, 1)),
938
+                                       reg_names[REGNO(XEXP(x, 0))]);
939
+                               } else {
940
+                                       fprintf(file, "(%s)",
941
+                                       reg_names[REGNO(XEXP(x, 0))]);
942
+                               }
943
+                       } else if (GET_CODE(XEXP(x,1)) == SYMBOL_REF) {
944
+                               fprintf(file, "%s(%s)", XSTR(x,0),
945
+                                       reg_names[REGNO(XEXP(x, 0))]);
946
+                       } else if ((GET_CODE(XEXP(x, 1)) == MINUS)
947
+                               && (GET_CODE(XEXP(XEXP(x, 1), 0))==SYMBOL_REF)
948
+                               && (GET_CODE(XEXP(XEXP(x, 1), 1))==SYMBOL_REF)) {
949
+                               fprintf(file, "%s-%s(%s)",
950
+                                       XSTR(XEXP(XEXP(x, 1),0),0),
951
+                                       XSTR(XEXP(XEXP(x, 1),1),0),
952
+                                       reg_names[REGNO(XEXP(x, 0))]);
953
+                       } else
954
+                               fprintf(file, "#INVALID(%s)",
955
+                                       reg_names[REGNO(XEXP(x, 0))]);
956
+                       /*
957
+                       else if (GET_CODE(XEXP(addr, 1)) == LABEL)
958
+                               fprintf(file, "%s(%s)",
959
+                                       GET_CODE(XEXP(addr, 1)),
960
+                                       reg_names[REGNO(GET_CODE(XEXP(addr, 0)))]);
961
+                       else if ((GET_CODE(XEXP(addr, 1)) == MINUS)
962
+                               && (GET_CODE(XEXP(GET_CODE(XEXP(addr, 1)), 0))==LABEL)
963
+                               && (GET_CODE(XEXP(GET_CODE(XEXP(addr, 1)), 1))==LABEL)) {
964
+                               fprintf(file, "%s-%s(%s)",
965
+                                       reg_names[REGNO(GET_CODE(XEXP(addr, 0)))]);
966
+                                       reg_names[REGNO(GET_CODE(XEXP(addr, 0)))]);
967
+                                       reg_names[REGNO(GET_CODE(XEXP(addr, 0)))]);
968
+                       }
969
+                       */
970
+                       break;
971
+               // We don't support direct memory addressing within our
972
+               // instruction set, even though the instructions themselves
973
+               // would support direct memory addressing of the lower 18 bits
974
+               // of memory space.
975
+               case MEM:
976
+                       if (dbg) zip_debug_rtx(x);
977
+                       zip_print_operand_address(file, XEXP(x, 0));
978
+                       break;
979 111 dgisselq
+               case CONST_INT:
980
+                       fprintf(file, "%ld",INTVAL(x));
981
+                       break;
982 102 dgisselq
+               default:
983 111 dgisselq
+                       fprintf(stderr, "Unknown address format\n");
984
+                       zip_debug_rtx(x);
985 102 dgisselq
+                       abort(); break;
986
+                       // output_addr_const(file, x);
987
+               break;
988
+       }
989
+}
990
+
991
+/* The PRINT_OPERAND worker. */
992
+
993
+void
994
+zip_print_operand(FILE *file, rtx x, int code)
995
+{
996
+       rtx operand = x;
997
+       int     rgoff = 0;
998
+
999
+       // fprintf(file, "Print Operand!\n");
1000
+
1001
+       /* New code entries should just be added to the switch below.  If
1002
+        * handling is finished, just return.  If handling was just a
1003
+        * modification of the operand, the modified operand should be put in
1004
+        * "operand", and then do a break to let default handling
1005
+        * (zero-modifier) output the operand.
1006
+        */
1007
+       switch(code) {
1008
+               case 0:
1009
+                       /* No code, print as usual. */
1010
+                       break;
1011
+               case 'L':
1012
+                       /* Lower of two registers, print one up */
1013
+                       rgoff = 1;
1014
+                       break;
1015
+               case 'R':
1016
+               case 'H':
1017
+                       /* Higher of a register pair, print normal */
1018
+                       break;
1019
+
1020
+               default:
1021
+                       LOSE_AND_RETURN("invalid operand modifier letter", x);
1022
+       }
1023
+
1024
+       /* Print an operand as without a modifier letter. */
1025
+       switch (GET_CODE(operand)) {
1026
+       case REG:
1027
+               if (REGNO(operand)+rgoff >= FIRST_PSEUDO_REGISTER)
1028
+                       internal_error("internal error: bad register: %d", REGNO(operand));
1029
+               fprintf(file, "%s", reg_names[REGNO(operand)+rgoff]);
1030
+               return;
1031
+       case SCRATCH:
1032
+               LOSE_AND_RETURN("Need a scratch register", x);
1033
+               return;
1034
+
1035
+       case CODE_LABEL:
1036
+       case LABEL_REF:
1037
+       case SYMBOL_REF:
1038
+       case PLUS:
1039
+               PRINT_OPERAND_ADDRESS(file, operand);
1040
+               return;
1041
+       case MEM:
1042
+               PRINT_OPERAND_ADDRESS(file, XEXP(operand, 0));
1043
+               return;
1044
+
1045
+       default:
1046
+               /* No need to handle all strange variants, let
1047
+                * output_addr_const do it for us.
1048
+                */
1049
+               if (CONSTANT_P(operand)) {
1050
+                       output_addr_const(file, operand);
1051
+                       return;
1052
+               }
1053
+
1054
+               LOSE_AND_RETURN("unexpected operand", x);
1055
+       }
1056
+}
1057
+
1058
+static bool
1059
+zip_frame_pointer_required(void)
1060
+{
1061
+       // This should really depend upon whether we have variable sized
1062
+       // arguments in our frame or not.  Once this fails, let's look
1063
+       // at what the problem was and then whether or not we can detect
1064
+       // it.
1065
+       //
1066
+       // Use a GCC global to determine our answer
1067 103 dgisselq
+       if (cfun->calls_alloca)
1068
+               return true;
1069 102 dgisselq
+       return (frame_pointer_needed);
1070
+/*
1071
+       fprintf(stderr, "ZIP_FRAME_POINTER_REQUIRED()\n");
1072
+       if (frame_pointer_needed) {
1073
+               fprintf(stderr, "FRAME_POINTER_NEEDED is true\n");
1074
+               zip_debug_rtx(frame_pointer_rtx);
1075
+               if (frame_pointer_rtx == NULL_RTX)
1076
+                       return true;
1077
+               if (GET_CODE(frame_pointer_rtx)==PLUS) {
1078
+                       if ((REG_P(XEXP(frame_pointer_rtx,0)))
1079
+                               &&(REGNO(XEXP(frame_pointer_rtx, 0))==zip_SP)
1080
+                               &&(CONST_INT_P(XEXP(frame_pointer_rtx,1))))
1081
+                               return false;
1082
+                       if ((REG_P(XEXP(frame_pointer_rtx,1)))
1083
+                               &&(REGNO(XEXP(frame_pointer_rtx, 1))==zip_SP)
1084
+                               &&(CONST_INT_P(XEXP(frame_pointer_rtx,0))))
1085
+                               return false;
1086
+                       return true;
1087
+               } else if ((REG_P(frame_pointer_rtx))
1088
+                               &&(REGNO(frame_pointer_rtx) == zip_SP))
1089
+                       return false;
1090
+               return true;
1091
+       } else return false;
1092
+*/
1093
+}
1094
+
1095
+/* Determine whether or not a register needs to be saved on the stack or not.
1096
+ */
1097
+static bool
1098
+zip_save_reg(int regno) {
1099
+       if (regno == 0)
1100
+               return ((!crtl->is_leaf)
1101
+                       ||((df_regs_ever_live_p(0))&&(!call_used_regs[0])));
1102
+       else if ((regno == zip_GOT)&&(!ZIP_PIC))
1103
+               return  ((df_regs_ever_live_p(regno))
1104
+                               &&(!call_used_regs[regno]));
1105
+       else if (regno == zip_FP)
1106
+               return((zip_frame_pointer_required())||((df_regs_ever_live_p(regno))
1107
+                               &&(!call_used_regs[regno])));
1108
+       else if (regno < zip_FP)
1109
+               return  ((df_regs_ever_live_p(regno))
1110
+                               &&(!call_used_regs[regno]));
1111
+       return false;
1112
+}
1113
+
1114
+/* Compute the size of the local area and the size to be adjusted by the
1115
+ * prologue and epilogue.
1116
+ *
1117
+ * Here's what we are looking at (top is the current, bottom is the last ...)
1118
+ *
1119
+ *     Stack Pointer ->
1120
+ *                     Local variables (could be variable size)
1121
+ *     Frame Pointer ->        (= Stack Pointer + sp_fp_offset)
1122
+ *                     Saved return address, if saved
1123
+ *                     Other Saved registers
1124
+ *                     Saved frame pointer (if used)
1125
+ *                     Saved R12, if used
1126
+ *                     (Stack pointer is not saved)
1127
+ *     Original stack pointer ->       (= Stack_Pointer +size_for_adjusting_sp)
1128
+ *                     Called arguments (not passed in registers)
1129
+ *                     Return arguments (not R1, args.pretend_args_size)
1130
+ *             (Prior function's stack frame ... )
1131
+ *
1132
+ */
1133
+static void
1134
+zip_compute_frame(void) {
1135
+       int     regno;
1136
+       int     args_size;
1137
+
1138
+       // gcc_assert(crtl);
1139
+       gcc_assert(cfun);
1140
+       gcc_assert(cfun->machine);
1141
+
1142
+       args_size=(ACCUMULATE_OUTGOING_ARGS ? crtl->outgoing_args_size : 0);
1143
+
1144
+       if(crtl->args.pretend_args_size > 0) {
1145
+               args_size += crtl->args.pretend_args_size;
1146
+               // printf("%s pretend_args_size : %d\n", current_function_name(),
1147
+                       // crtl->args.pretend_args_size);
1148
+               cfun->machine->pretend_size = crtl->args.pretend_args_size;
1149
+       }
1150
+
1151
+       cfun->machine->local_vars_size = get_frame_size();
1152
+
1153
+       // Save callee-saved registers.
1154
+       cfun->machine->saved_reg_size = 0;
1155
+       for(regno=0; regno < FIRST_PSEUDO_REGISTER; regno++) {
1156
+               if (zip_save_reg(regno))
1157
+                       cfun->machine->saved_reg_size ++;
1158
+       }
1159
+
1160
+       cfun->machine->fp_needed = (zip_frame_pointer_required());
1161
+
1162
+       if ((cfun->machine->fp_needed)&&
1163
+                       (!df_regs_ever_live_p(zip_FP))) {
1164
+               cfun->machine->saved_reg_size ++;
1165
+       }
1166
+
1167
+       cfun->machine->sp_fp_offset = args_size + cfun->machine->local_vars_size;
1168
+       cfun->machine->size_for_adjusting_sp = cfun->machine->local_vars_size
1169
+                       + cfun->machine->saved_reg_size
1170
+                       + args_size;
1171
+
1172
+       /*
1173
+       if (cfun->machine->fp_needed)
1174
+               frame_pointer_rtx = gen_rtx_REG(Pmode, zip_FP);
1175
+       else
1176
+               frame_pointer_rtx = plus_constant(Pmode, gen_rtx_REG(Pmode, zip_SP),
1177
+                       cfun->machine->sp_fp_offset);
1178
+       */
1179
+}
1180
+
1181
+void
1182
+zip_expand_prologue(void) {
1183
+       rtx     insn;
1184
+
1185
+       const bool      dbg = ((ALL_DEBUG_ON)||(false))&&(!ALL_DEBUG_OFF);
1186
+       zip_compute_frame();
1187
+
1188 103 dgisselq
+       if (dbg)  fprintf(stderr, "Computing Prologue instructions\n");
1189 102 dgisselq
+       if (cfun->machine->size_for_adjusting_sp != 0) {
1190
+               insn = emit_insn(gen_subsi3(stack_pointer_rtx,
1191
+                               stack_pointer_rtx,
1192
+                       gen_int_mode(cfun->machine->size_for_adjusting_sp,
1193
+                               SImode)));
1194
+                       // cfun->machine->sp_fp_offset
1195
+
1196
+               RTX_FRAME_RELATED_P(insn) = 1;
1197
+       }
1198
+
1199
+       {
1200
+               int offset = 0, regno;
1201
+               for(regno=0; regno < FIRST_PSEUDO_REGISTER; regno++) {
1202
+                       if (zip_save_reg(regno)) {
1203
+                               insn=emit_insn(gen_movsi_sto(
1204
+                                       gen_rtx_MEM(SImode, plus_constant(
1205
+                                               Pmode, stack_pointer_rtx,
1206
+                                               cfun->machine->sp_fp_offset
1207
+                                               +offset++, true)),
1208
+                                       gen_rtx_REG(SImode, regno)));
1209
+                               RTX_FRAME_RELATED_P(insn) = 1;
1210
+                       }
1211
+               }
1212 103 dgisselq
+               if (dbg)  fprintf(stderr, "%d registers saved%s\n", offset,
1213
+                       (crtl->saves_all_registers)?", should be all of them":", less than all");
1214 102 dgisselq
+       }
1215
+
1216
+       if (cfun->machine->fp_needed) {
1217
+               if (dbg) zip_debug_rtx(stack_pointer_rtx);
1218
+               if (dbg) zip_debug_rtx(frame_pointer_rtx);
1219
+               insn = emit_insn(gen_movsi_reg_off(frame_pointer_rtx,
1220
+                               stack_pointer_rtx, gen_int_mode(
1221
+                                               cfun->machine->sp_fp_offset,
1222
+                                               SImode)));
1223
+               RTX_FRAME_RELATED_P(insn) = 1;
1224 103 dgisselq
+               if (dbg)  fprintf(stderr, "sp_fp_offset is %d\n", cfun->machine->sp_fp_offset);
1225 102 dgisselq
+       }
1226
+}
1227
+
1228
+bool
1229
+zip_use_return_insn(void)
1230
+{
1231
+       if ((!reload_completed)||(cfun->machine->fp_needed)
1232
+                       ||(get_frame_size()!=0)) {
1233
+               // If R0 ever gets pushed to the stack, then we cannot
1234
+               // use a master return from anywhere.  We need to clean up the
1235
+               // stack first.
1236
+               if ((!crtl->is_leaf)||((df_regs_ever_live_p(0))
1237
+                                               &&(!call_used_regs[0]))) {
1238
+                       return false;
1239
+               }
1240
+       }
1241
+       zip_compute_frame();
1242
+       return (cfun->machine->size_for_adjusting_sp == 0);
1243
+}
1244
+
1245
+/* As per the notes in M68k.c, quote the function epilogue should not depend
1246
+ * upon the current stack pointer.  It should use the frame poitner only,
1247
+ * if there is a frame pointer.  This is mandatory because of alloca; we also
1248
+ * take advantage of it to omit stack adjustments before returning ...
1249
+ *
1250
+ * Let's see if we can use their approach here.
1251
+ *
1252
+ * We can't.  Consider our choices:
1253
+ *     LOD (FP),R0
1254
+ *     LOD 1(FP),R4
1255
+ *     LOD 2(FP),R5
1256
+ *     LOD 3(FP),R6
1257
+ *     LOD 4(FP),FP
1258
+ *     ... Then what is the stack pointer?
1259
+ * or
1260
+ *     LOD (FP),R0
1261
+ *     LOD 1(FP),R4
1262
+ *     LOD 2(FP),R5
1263
+ *     LOD 3(FP),R6
1264
+ *     MOV FP,SP
1265
+ *     LOD 4(SP),FP
1266
+ *     ... Which suffers unnecessary pipeline stalls, and certainly doesn't
1267
+ *     exploit our pipeline memory function
1268
+ * or
1269
+ *     MOV FP,SP
1270
+ *     LOD (SP),R0
1271
+ *     LOD 1(SP),R4
1272
+ *     LOD 2(SP),R5
1273
+ *     LOD 3(SP),R6
1274
+ *     LOD 4(SP),FP
1275
+ * Which will be our choice.  Note that we do use the stack pointer, eventually.
1276
+ *
1277
+ */
1278
+void
1279
+zip_expand_epilogue(void) {
1280
+       int     regno, offset;
1281
+       const bool      dbg = ((ALL_DEBUG_ON)||(false))&&(!ALL_DEBUG_OFF);
1282
+
1283
+       zip_compute_frame();
1284
+
1285
+       if (dbg) fprintf(stderr, "EPILOG::\n");
1286
+       if (cfun->machine->fp_needed) {
1287
+               if (dbg) fprintf(stderr, "EPILOG::Moving frame pointer to stack register\n");
1288
+               emit_insn(gen_movsi_reg(stack_pointer_rtx, frame_pointer_rtx));
1289
+       }
1290
+
1291
+       if (cfun->machine->saved_reg_size != 0) {
1292
+               offset =  (cfun->machine->size_for_adjusting_sp -
1293
+                               cfun->machine->sp_fp_offset
1294
+                       - cfun->machine->saved_reg_size);
1295
+               if (dbg) fprintf(stderr, "EPILOG::Saved_REG_Size = %d\n", cfun->machine->saved_reg_size);
1296
+               for(regno=0; regno < FIRST_PSEUDO_REGISTER; regno++) {
1297
+                       if (zip_save_reg(regno)) {
1298
+                               if (dbg) fprintf(stderr, "EPILOG::RESTORING R%d\n", regno);
1299
+                               emit_insn(gen_movsi_lod(
1300
+                                               gen_rtx_REG(SImode, regno),
1301
+                                       gen_rtx_MEM(SImode, plus_constant( SImode,
1302
+                                               stack_pointer_rtx, offset++, true))));
1303
+                       }
1304
+               }
1305
+       }
1306
+
1307
+       if (cfun->machine->size_for_adjusting_sp != 0) {
1308
+               if (dbg) fprintf(stderr, "EPILOG::ADDSI3(StackPtr, %d)\n",
1309
+                               cfun->machine->size_for_adjusting_sp);
1310
+               emit_insn(gen_addsi3(stack_pointer_rtx, stack_pointer_rtx,
1311
+                       gen_int_mode(
1312
+                               cfun->machine->size_for_adjusting_sp
1313
+                               -cfun->machine->sp_fp_offset, SImode)));
1314
+       }
1315
+       if (dbg) fprintf(stderr, "EPILOG::EMITTING-RETURN\n");
1316
+
1317
+       emit_jump_insn(ret_rtx);
1318
+}
1319
+
1320
+/* Implement RETURN_ADDR_RTX(COUNT, FRAMEADDR).
1321
+ *
1322
+ * We currently only support calculating the return address for the current
1323
+ * frame.
1324
+ */
1325
+
1326
+/*
1327
+rtx
1328
+zip_return_addr_rtx(int count, rtx frame ATTRIBUTE_UNUSED)
1329
+{
1330
+       if (count)
1331
+               return NULL_RTX;
1332
+
1333
+       zip_compute_frame();
1334
+
1335
+       // saved return address for current function is at fp - 1
1336
+       if (cfun->machine->save_ret)
1337
+               return gen_rtx_MEM(Pmode, plus_constant(frame_pointer_rtx,
1338
+                               -UNITS_PER_WORD));
1339
+       return get_hard_reg_initial_val(Pmode, RETURN_ADDRESS_REGNUM);
1340
+}
1341
+*/
1342
+
1343
+/* Implements the macro INITIAL_ELIMINATION_OFFSET,
1344
+ * return the OFFSET.
1345
+ */
1346
+/*
1347
+int
1348
+zip_initial_elimination_offset(int from, int to) {
1349
+       int     ret = 0;
1350
+       zip_compute_frame();
1351
+
1352
+       if (((from) == FRAME_POINTER_REGNUM)&&((to) == STACK_POINTER_REGNUM)) {
1353
+               ret = cfun->machine->sp_fp_offset;
1354
+       } else if (((from)=ARG_POINTER_REGNUM)&&((to)==FRAME_POINTER_REGNUM)) {
1355
+               ret = cfun->machine->local_vars_size;
1356
+       } else {
1357
+               abort();
1358
+       }
1359
+
1360
+       return ret;
1361
+}
1362
+*/
1363
+
1364
+/* Return non-zero if the function argument described by TYPE is to be passed
1365
+ * by reference.
1366
+ */
1367
+/*
1368
+static bool
1369
+zip_pass_by_reference(CUMULATIVE_ARGS *cum ATTRIBUTE_UNUSED,
1370
+               enum machine_mode mode, const_tree type,
1371
+               bool name ATTRIBUTE_UNUSED) {
1372
+       unsigned        HOST_WIDE_INT   size;
1373
+
1374
+       if (type) {
1375
+               if (AGGREGATE_TYPE_P(type)) {
1376
+                       return TRUE;
1377
+               } size = int_size_in_bytes(type);
1378
+       } else
1379
+               size = GET_MODE_SIZE(mode);
1380
+
1381
+       return (size > GET_MODE_SIZE(SImode)); // > 1 word : is this okay?
1382
+       // The idea is to pass everything larger than an int by reference (or
1383
+       // on the stack)
1384
+}
1385
+*/
1386
+
1387
+/*
1388
+ * Code taken from m68k ...
1389
+ */
1390
+static bool
1391
+zip_can_eliminate(int from, int to)
1392
+{
1393
+       // fprintf(stderr, "CAN_ELIMINATE::QUERYING(%d,%d)\n", from, to);
1394
+       if ((from == zip_FP)&&(to == zip_SP))
1395
+               return !cfun->machine->fp_needed;
1396
+       return true;
1397
+}
1398
+
1399
+/*
1400
+static bool
1401
+zip_must_pass_in_stack(enum machine_mode mode, const_tree type)
1402
+{
1403
+       if (mode == BLKmode) {
1404
+               return true;
1405
+       } if (type == NULL) {
1406
+               return false;
1407
+       } return AGGREGATE_TYPE_P(type);
1408
+}
1409
+*/
1410
+
1411
+/*
1412
+static void
1413
+zip_basic_check(void)
1414
+{
1415
+       gcc_assert(mode_base_align[SImode]==4);
1416
+       if ((BITS_PER_UNIT != 32)
1417
+                       ||(GET_MODE_SIZE(SImode)!=1)
1418
+                       ||(GET_MODE_SIZE(DImode)!=1)
1419
+                       ||(HARD_REGNO_NREGS(0,SImode)!=1)) {
1420
+               printf("SIZEOF(SIMode) == %d\n", GET_MODE_SIZE(SImode));
1421
+               printf("BITS_PER_UNIT  == %d\n", BITS_PER_UNIT);
1422
+               gcc_assert(BITS_PER_UNIT==32);
1423
+               gcc_assert(GET_MODE_SIZE(SImode)==1);
1424
+               gcc_assert(HARD_REGNO_NREGS(0,SImode)==1);
1425
+       }
1426
+}
1427
+*/
1428
+
1429
+#define        zip_basic_check()
1430
+
1431
+/* Compute the number of word sized regiters needed to hold a function
1432
+ * argument of mode INT_MODE and tree type TYPE.
1433
+ */
1434
+int
1435
+zip_num_arg_regs(enum machine_mode mode, const_tree type) {
1436
+       int     size;
1437
+
1438
+       zip_basic_check();
1439
+
1440
+       if (targetm.calls.must_pass_in_stack(mode, type))
1441
+               return 0;
1442
+
1443
+       if ((type)&&(mode == BLKmode))
1444
+               size = int_size_in_bytes(type);
1445
+       else
1446
+               size = GET_MODE_SIZE(mode);
1447
+
1448
+       return (size + UNITS_PER_WORD - 1)/UNITS_PER_WORD;
1449
+}
1450
+
1451
+/* pushed in function prologue */
1452
+/*
1453
+static void
1454
+zip_setup_incoming_varargs(CUMULATIVE_ARGS *cum, enum machine_mode mode,
1455
+               tree type, int *pretend_size, int no_rtl) {
1456
+       if (no_rtl)
1457
+               return;
1458
+
1459
+       gcc_assert(mode != BLKmode);
1460
+
1461
+       if (*cum < (ZIP_LAST_ARG_REGNO+1)) {
1462
+               int size = ZIP_FIRST_ARG_REGNO + ZIP_NUM_ARGS_REGS - *cum;
1463
+               rtx     regblock;
1464
+               int     offset = (*cum - ZIP_FIRST_ARG_REGNO) * UNITS_PER_WORD;
1465
+               regblock = gen_rtx_MEM(BLKmode,
1466
+                       plus_constant(arg_pointer_rtx, offset));
1467
+               move_block_from_reg(*cum, regblock, size);
1468
+               *pretend_size = size * UNITS_PER_WORD;
1469
+       }
1470
+
1471
+       if (targetm.calls.strict_argument_naming(cum))
1472
+               *cum = *cum + zip_num_arg_regs(mode, type);
1473
+}
1474
+*/
1475
+
1476
+/*
1477
+static int
1478
+zip_arg_partial_bytes(CUMULATIVE_ARGS *cum, enum machine_mode mode,
1479
+               tree type, bool name ATTRIBUTE_UNUSED) {
1480
+       int     words;
1481
+       unsigned int    regs = zip_num_arg_regs(mode, type);
1482
+
1483
+       if (*cum >= ZIP_LAST_ARG_REGNO + 1)
1484
+               words = 0;
1485
+       else if ((*cum + regs) > ZIP_LAST_ARG_REGNO + 1)
1486
+               words = (*cum + regs) - ZIP_LAST_ARG_REGNO + 1;
1487
+       else
1488
+               words = 0;
1489
+
1490
+       return words * UNITS_PER_WORD;
1491
+}
1492
+*/
1493
+
1494
+static void
1495
+zip_function_arg_advance(cumulative_args_t ca, machine_mode mode,
1496
+               const_tree type, bool named ATTRIBUTE_UNUSED) {
1497
+       CUMULATIVE_ARGS *cum;
1498
+       int     nreg;
1499
+
1500
+       zip_basic_check();
1501
+
1502
+       cum = get_cumulative_args(ca);
1503
+       nreg = zip_num_arg_regs(mode, type);
1504
+       if (((*cum)+nreg) > NUM_ARG_REGS)
1505
+               (*cum) = NUM_ARG_REGS;
1506
+       else
1507
+               (*cum) += nreg;
1508
+}
1509
+
1510
+static rtx
1511
+zip_function_arg(cumulative_args_t ca, machine_mode mode,
1512
+               const_tree type ATTRIBUTE_UNUSED, bool named) {
1513
+       CUMULATIVE_ARGS *cum;
1514
+
1515
+       zip_basic_check();
1516
+
1517
+
1518
+       if (!named)
1519
+               return NULL_RTX;
1520
+       //if (targetm.calls.must_pass_in_stack(mode, type))
1521
+               //return NULL_RTX;
1522
+       cum = get_cumulative_args(ca);
1523
+
1524
+       if ((*cum) >= NUM_ARG_REGS)
1525
+               return NULL_RTX;
1526
+       return
1527
+               gen_rtx_REG(mode, (*cum)+1);
1528
+}
1529
+
1530
+/* NOTICE_UPDATE_CC sends us here
1531
+ */
1532
+void
1533
+zip_update_cc_notice(rtx exp, rtx_insn *insn)
1534
+{
1535
+       const bool      dbg = ((ALL_DEBUG_ON)||(false))&&(!ALL_DEBUG_OFF);
1536
+       enum    attr_ccresult  ccr;
1537
+       enum    attr_conditional  conditionally_executed;
1538
+
1539
+       // The default is that nothing has changed.
1540
+       // cc_status = cc_status_prev;
1541
+       rtx     src, dest;
1542
+
1543
+       if (dbg) fprintf(stderr, "CC-NOTICE ...\n");
1544
+       if (dbg) zip_debug_rtx_pfx("CC :", exp);
1545
+       if (dbg) debug_rtx(exp);
1546
+
1547
+       ccr = get_attr_ccresult(insn);
1548
+       if (ccr == CCRESULT_UNKNOWN) {
1549
+               CC_STATUS_INIT;
1550
+               if (dbg) fprintf(stderr, "\tINIT-CC\n");
1551
+               return;
1552
+       }
1553
+
1554
+       if ((GET_CODE(exp) == PARALLEL)&&(GET_CODE(XVECEXP(exp, 0, 0))==SET)) {
1555
+               // This works up and until we add cc0 parallel instructions
1556
+               // to our instruction set.
1557
+               dest = SET_DEST(XVECEXP(exp, 0, 0));
1558
+               src  = SET_SRC (XVECEXP(exp, 0, 0));
1559
+       } else if (GET_CODE(exp) == SET) {
1560
+               dest = SET_DEST(exp);
1561
+               src  = SET_SRC (exp);
1562
+       } else {
1563
+               // First, do nothing if we haven't touched the condition codes.
1564
+               // Condition codes can only be changed as a result of a set
1565
+               // expression ...?
1566
+               if (dbg) fprintf(stderr, "Non-set expression, doesn\'t touch condition codes\n");
1567
+               return;
1568
+       }
1569
+
1570 111 dgisselq
+
1571
+       if (ccr == CCRESULT_UNCHANGED) {
1572
+               if (dbg) fprintf(stderr, "\tUnchanged CC\n");
1573
+
1574
+               // We can't just run away here ... even though the CC result
1575
+               // hasn't changed, GCC's ability to recognize it as a valid
1576
+               // result has changed.  In other words, if we just 'set' a
1577
+               // value contained within either value1 or value2, then we'll
1578
+               // need to update those values so that they are no longer looked
1579
+               // upon as potentially containing the current CC values.
1580
+
1581
+               if (dest) {
1582
+                       if (dest == cc0_rtx)
1583
+                               CC_STATUS_INIT;
1584
+                       else if ((REG_P(dest))&&(dest != pc_rtx)) {
1585
+                               // An example here might be a load instruction
1586
+                               if (reg_mentioned_p(dest, cc_status.value1))
1587
+                                       cc_status.value1 = NULL_RTX;
1588
+                               if (reg_mentioned_p(dest, cc_status.value2))
1589
+                                       cc_status.value2 = NULL_RTX;
1590
+                       }
1591
+               }
1592
+               return;
1593
+       }
1594
+
1595 102 dgisselq
+       // Gotta wait on this test, until we know whether or not the
1596
+       // conditionally executed instruction was designed to set the
1597
+       // CC0 register.
1598
+       conditionally_executed = get_attr_conditional(insn);
1599
+       if ((conditionally_executed == CONDITIONAL_YES)&&(dest != cc0_rtx)) {
1600
+               // cc_status is unchanged
1601 111 dgisselq
+               // However, GCC's vision of it may have changed
1602
+               //
1603
+               // Initialize CC_STATUS
1604 102 dgisselq
+               if (dbg) fprintf(stderr, "\tCC -- unchanged (conditional exec)\n");
1605 111 dgisselq
+               CC_STATUS_INIT;
1606 102 dgisselq
+               return;
1607 111 dgisselq
+       } else if (GET_CODE(src)==IF_THEN_ELSE) {
1608
+               // Same thing as above
1609
+               CC_STATUS_INIT;
1610
+               return;
1611 102 dgisselq
+       }
1612
+
1613
+       if (ccr == CCRESULT_VALIDZN)
1614
+               cc_status.flags = CC_NO_OVERFLOW;
1615
+       else
1616
+               cc_status.flags = 0;
1617
+       cc_status.value1 = dest;
1618
+       if (dest == cc0_rtx)
1619
+               cc_status.value2 = src;
1620
+       else if((REG_P(dest))&&(!reg_mentioned_p(dest, src)))
1621
+               cc_status.value2 = src;
1622
+       else if((SUBREG_P(dest))&&(!reg_mentioned_p(XEXP(dest,0), src)))
1623
+               cc_status.value2 = src;
1624
+       else
1625
+               cc_status.value2 = 0;
1626
+       if (dbg) fprintf(stderr, "\tCC -- Set flags for\n");
1627
+       if (dbg) zip_debug_rtx_pfx("V1: ", dest);
1628
+       if ((dbg)&&(cc_status.value2)) zip_debug_rtx_pfx("V2: ", src);
1629
+       else if (dbg)   fprintf(stderr, "V2: (No SRC)\n");
1630
+       if ((dbg)&&(REG_P(dest))) fprintf(stderr, "src refers to dest ?? %s\n",
1631
+               refers_to_regno_p(REGNO(dest),REGNO(dest),src,NULL)?"Yes":"No");
1632
+       if ((dbg)&&(REG_P(dest))) fprintf(stderr, "Occurrs %d times\n",
1633
+               count_occurrences(dest,src,0));
1634
+       if ((dbg)&&(REG_P(dest))) fprintf(stderr, "%s mentioned\n",
1635
+               reg_mentioned_p(dest,src)?"Is":"Is not");
1636
+       if ((dbg)&&(REG_P(dest))) fprintf(stderr, "%s referenced\n",
1637
+               reg_referenced_p(dest,src)?"Is":"Is not");
1638
+
1639
+//
1640
+// These results are only used in final.c, where they are used to remove
1641
+// compare instructions if the optimizer is on.  If I produce nothing, no
1642
+// compare instructions will be removed.  If I produce something, a smart
1643
+// decision may be made to remove compare instructions.
1644
+//
1645
+// cc_status will be compared  with subsequent
1646
+//     (set (cc0) (something)) (i.e. compare only) instructions
1647
+//
1648
+//     (set (cc0) (compare (x) (y)))
1649
+//     dst = cc0 -- the destination of the set is ignored, save that it must be
1650
+//             cc0
1651
+//     src1 = (compare (x) (y))
1652
+//     if (src1 == compare)&&(y == (const_int 0))
1653
+//             src2 = (x)
1654
+//     else
1655
+//             src2 = null
1656
+//
1657
+//     Four conditions:
1658
+//     1. if (val1)&&(src1 == val1)
1659
+//             This would be true if I had seen a (set (val1) (src1)) insn
1660
+//             If I have seen a (set (val1) (src1))
1661
+//                     or equivalently a (set (val1) (compare (x) (y)))
1662
+//     or
1663
+//     2. if (val2)&&(src1 == val2)
1664
+//             This would be true if I had seen a (set (val1) (src1)) insn,
1665
+//             and only if val2 was still valid.
1666
+//     or
1667
+//     3. if (src2)&&(value1)&&(src2 == value1)
1668
+//             This would be true if we are comparing against zero, and the
1669
+//             number we are comparing against zero is value 1
1670
+//     or
1671
+//     4. if (src2)&&(value2)&&(src2 == value2)
1672
+//             ... or value2.  This is the common ZipCPU case.
1673
+//
1674
+//             then delete the compare.
1675
+//
1676
+}
1677
+
1678
+
1679
+/* totally buggy - we can't return pointers to nested functions */
1680
+static void
1681
+zip_asm_trampoline_template(FILE *f) {
1682
+       // Whereas at one time I thought I wouldn't need it, now I know I
1683
+       // need this trampoline function, although it is for a completely
1684
+       // different purpose than the one I was familiar with.
1685
+       fprintf(f, "\tldihi 0,r1\n");
1686
+       fprintf(f, "\tldilo 0,r1\n");
1687
+       fprintf(f, "\tjmp r1\n");
1688
+}
1689
+
1690
+/* Worker function for TARGET_TRAMPOLINE_INIT. */
1691
+static void
1692
+zip_trampoline_init(rtx m_tramp ATTRIBUTE_UNUSED,
1693
+       tree fndecl ATTRIBUTE_UNUSED,
1694
+       rtx chain_value ATTRIBUTE_UNUSED) {
1695
+// #warning "This needs to be filled out"
1696
+       abort();
1697
+}
1698
+
1699
+static tree
1700
+def_builtin(const char *name, enum insn_code icode, enum ZIP_BUILTIN_ID_CODE code,
1701
+       tree type)
1702
+{
1703
+       tree t = add_builtin_function(name,type,code,BUILT_IN_MD, NULL, NULL_TREE);
1704
+       zip_basic_check();
1705
+
1706
+       if(t) {
1707
+               zip_builtins[code] = t;
1708
+               zip_builtins_icode[code] = icode;
1709
+       }
1710
+
1711
+       return t;
1712
+
1713
+}
1714
+
1715
+void   zip_init_builtins(void) {
1716
+       zip_basic_check();
1717
+
1718
+  tree void_ftype_void = build_function_type_list(void_type_node, NULL_TREE);
1719
+#ifdef HAVE_zip_rtu
1720
+  def_builtin("zip_rtu", CODE_FOR_zip_rtu, ZIP_BUILTIN_RTU, void_ftype_void);
1721
+#endif
1722
+#ifdef HAVE_zip_halt
1723
+  def_builtin("zip_halt",  CODE_FOR_zip_halt,  ZIP_BUILTIN_HALT, void_ftype_void);
1724
+#endif
1725
+#ifdef HAVE_zip_idle
1726
+  def_builtin("zip_idle", CODE_FOR_zip_idle, ZIP_BUILTIN_IDLE, void_ftype_void);
1727
+#endif
1728
+
1729
+#ifdef HAVE_zip_syscall
1730
+// Support int SYSCALL(callID, int a, int b, int c);
1731
+  def_builtin("zip_syscall", CODE_FOR_zip_syscall, ZIP_BUILTIN_SYSCALL,
1732
+                       build_function_type_list(void_type_node, NULL_TREE));
1733
+#endif
1734
+
1735
+#ifdef HAVE_zip_save_context
1736
+  def_builtin("zip_save_context", CODE_FOR_zip_save_context, ZIP_BUILTIN_SAVE_CONTEXT,
1737
+               build_function_type_list(void_type_node, ptr_type_node, 0));
1738
+#endif
1739
+
1740
+#ifdef HAVE_zip_restore_context
1741
+  def_builtin("zip_restore_context", CODE_FOR_zip_restore_context, ZIP_BUILTIN_RESTORE_CONTEXT,
1742
+       build_function_type_list(void_type_node, ptr_type_node, 0));
1743
+#endif
1744
+
1745
+#ifdef HAVE_zip_bitrev
1746
+  def_builtin("zip_bitrev", CODE_FOR_zip_bitrev, ZIP_BUILTIN_BITREV,
1747
+       build_function_type_list(unsigned_type_node, unsigned_type_node,
1748
+               NULL_TREE));
1749
+#endif
1750
+
1751
+#ifdef HAVE_zip_cc
1752
+  def_builtin("zip_cc", CODE_FOR_zip_cc, ZIP_BUILTIN_CC,
1753
+       build_function_type_list(unsigned_type_node, NULL_TREE));
1754
+#endif
1755
+
1756
+}
1757
+
1758
+static tree
1759
+zip_builtin_decl(unsigned zip_builtin_code, bool initialize_p ATTRIBUTE_UNUSED)
1760
+{
1761
+  if (zip_builtin_code >= ZIP_BUILTIN_MAX)
1762
+    return error_mark_node;
1763
+
1764
+  return zip_builtins[zip_builtin_code];
1765
+}
1766
+
1767
+static rtx
1768
+zip_expand_builtin(tree exp, rtx target,
1769
+               rtx subtarget ATTRIBUTE_UNUSED,
1770
+               machine_mode tmode ATTRIBUTE_UNUSED,
1771
+               int     ignore ATTRIBUTE_UNUSED) {
1772
+
1773
+       tree    fndecl = TREE_OPERAND(CALL_EXPR_FN(exp), 0);
1774
+       bool    nonvoid = (TREE_TYPE(TREE_TYPE(fndecl)) != void_type_node);
1775
+       enum    ZIP_BUILTIN_ID_CODE code=(enum ZIP_BUILTIN_ID_CODE)DECL_FUNCTION_CODE(fndecl);
1776
+       enum    insn_code icode = zip_builtins_icode[code];
1777
+       rtx     pat, op[5];
1778
+       call_expr_arg_iterator  iter;
1779
+       tree    arg;
1780
+
1781
+       if ((code == ZIP_BUILTIN_SAVE_CONTEXT)
1782
+                       ||(code == ZIP_BUILTIN_RESTORE_CONTEXT)) {
1783
+               arg = first_call_expr_arg(exp, &iter);
1784
+               if (arg == error_mark_node)
1785
+                       return NULL_RTX;
1786
+               op[0] = expand_normal(arg);
1787
+               if (GET_CODE(op[0]) != REG)
1788
+                       op[0] = force_reg(Pmode, op[0]);
1789
+               pat = GEN_FCN(icode)(op[0]);
1790
+       } else if (code == ZIP_BUILTIN_BITREV) {
1791
+               arg = first_call_expr_arg(exp, &iter);
1792
+               if (arg == error_mark_node) {
1793
+                       return NULL_RTX;
1794
+               }
1795
+               op[0] = expand_normal(arg);
1796
+               if (!target)
1797
+                       target = gen_reg_rtx(SImode);
1798
+               pat = GEN_FCN(icode)(target, op[0]);
1799
+       } else if (code == ZIP_BUILTIN_CC) {
1800
+               if (!target)
1801
+                       target = gen_reg_rtx(SImode);
1802
+               pat = GEN_FCN(icode)(target);
1803
+       } else // RTU, HALT, IDLE
1804
+               pat = GEN_FCN(icode)();
1805
+       if (!pat)
1806
+               return NULL_RTX;
1807
+       emit_insn(pat);
1808
+       return (nonvoid ? target : const0_rtx);
1809
+}
1810
+
1811
+static bool
1812
+zip_scalar_mode_supported_p(enum machine_mode mode) {
1813
+       zip_basic_check();
1814
+
1815
+       return ((mode)==SImode)||((mode)==DImode); // ||((mode)==SFmode);
1816
+}
1817
+
1818
+static bool
1819
+zip_libgcc_floating_mode_supported_p(enum machine_mode mode) {
1820
+       return ((mode)==SFmode)||((mode)==DFmode);
1821
+}
1822
+
1823
+static int
1824
+zip_address_cost(rtx addr ATTRIBUTE_UNUSED,
1825
+       enum machine_mode mode ATTRIBUTE_UNUSED,
1826
+       addr_space_t as ATTRIBUTE_UNUSED, bool spd ATTRIBUTE_UNUSED) {
1827
+       return 1;
1828
+}
1829
+
1830
+static bool
1831
+zip_mode_dependent_address_p(const_rtx addr ATTRIBUTE_UNUSED,
1832
+       addr_space_t as ATTRIBUTE_UNUSED) {
1833
+       return false;
1834
+}
1835
+
1836
+/*
1837
+static void
1838
+zip_asm_output_anchor(rtx x) {
1839
+       printf("ANCHOR: OP(%d)\n", GET_CODE(x));
1840
+}
1841
+*/
1842
+
1843
+static void
1844
+zip_debug_print(const char *pfx, int lvl, const char *str) {
1845
+       int     i;
1846
+       i = lvl;
1847
+       if ((true)||(lvl == 0))
1848
+               fprintf(stderr, "%s", pfx);
1849
+       else
1850
+               i += strlen(pfx);
1851
+       while(i-->0)
1852
+               fprintf(stderr, "  ");
1853
+       fprintf(stderr, "%s\n", str);
1854
+}
1855
+
1856
+static void
1857
+zip_debug_print_m(const char *pfx, int lvl, const char *str, enum machine_mode m) {
1858
+       int     i;
1859
+
1860
+       i = lvl;
1861
+       if ((true)||(lvl == 0))
1862
+               fprintf(stderr, "%s", pfx);
1863
+       else
1864
+               i = lvl+strlen(pfx);
1865
+       while(i-->0)
1866
+               fprintf(stderr, "  ");
1867
+       switch(m) {
1868
+               case VOIDmode:
1869
+                       fprintf(stderr, "%s:V\n", str);
1870
+                       break;
1871
+               case BLKmode:
1872
+                       fprintf(stderr, "%s:BLK\n", str);
1873
+                       break;
1874
+               case BImode:
1875
+                       fprintf(stderr, "%s:BI\n", str);
1876
+                       break;
1877
+#ifdef HAVE_QImode
1878
+               case QImode:
1879
+                       fprintf(stderr, "%s:QI\n", str);
1880
+                       break;
1881
+#endif
1882
+#ifdef HAVE_HImode
1883
+               case HImode:
1884
+                       fprintf(stderr, "%s:HI\n", str);
1885
+                       break;
1886
+#endif
1887
+               case SImode:
1888
+                       fprintf(stderr, "%s:SI\n", str);
1889
+                       break;
1890
+               case DImode:
1891
+                       fprintf(stderr, "%s:DI\n", str);
1892
+                       break;
1893
+               default:
1894
+                       fprintf(stderr, "%s:?\n", str);
1895
+       }
1896
+}
1897
+
1898
+static void
1899
+zip_debug_rtx_1(const char *pfx, const_rtx x, int lvl) {
1900
+       if (x == NULL_RTX) {
1901
+               zip_debug_print(pfx, lvl, "(NULL-RTX)");
1902
+               return;
1903
+       } else if (GET_CODE(x) > NUM_RTX_CODE) {
1904
+               char    buf[64];
1905
+               sprintf(buf, "(BAD-RTX-CODE %d)", GET_CODE(x));
1906
+               zip_debug_print(pfx, lvl, buf);
1907
+               return;
1908
+       } switch(GET_CODE(x)) { // rtl.def
1909
+       case PARALLEL: zip_debug_print(pfx, lvl, "(PARALLEL");
1910
+               debug_rtx(x); break;
1911
+       case INT_LIST: zip_debug_print(pfx, lvl, "(INT-LIST"); break;
1912
+       case SEQUENCE: zip_debug_print(pfx, lvl, "(SEQUENCE"); break;
1913
+       case ADDRESS: zip_debug_print(pfx, lvl, "(ADDRESS"); break;
1914
+       case DEBUG_INSN: zip_debug_print(pfx, lvl, "(DEBUG-INSN"); break;
1915
+       case INSN:
1916
+               zip_debug_print(pfx, lvl, "(INSN");
1917
+               /*
1918
+               { const rtx_insn *tmp_rtx;
1919
+               for(tmp_rtx = as_a <const rtx_insn *>(x); tmp_rtx != 0; tmp_rtx = NEXT_INSN(tmp_rtx)) {
1920
+                       zip_debug_rtx_1(tmp_rtx, lvl+1);
1921
+               }}
1922
+               */
1923
+               zip_debug_rtx_1(pfx, PATTERN(x), lvl+1);
1924
+               zip_debug_print(pfx, lvl, ")");
1925
+               break;
1926
+       case JUMP_INSN: zip_debug_print(pfx, lvl, "(JUMP-INSN");
1927 111 dgisselq
+               zip_debug_rtx_1(pfx, PATTERN(x), lvl+1);
1928
+               zip_debug_print(pfx, lvl, ")");
1929
+               /*
1930 102 dgisselq
+               if (JUMP_LABEL(x)) {
1931 111 dgisselq
+                       if (GET_CODE(JUMP_LABEL(x)) == LABEL_REF) {
1932
+                               char    buf[64];
1933
+                               sprintf(buf, "(LABEL *.L%d))", CODE_LABEL_NUMBER(LABEL_REF_LABEL(JUMP_LABEL(x))));
1934
+                               zip_debug_print(pfx, lvl+1, buf);
1935
+                       } else if (GET_CODE(JUMP_LABEL(x))==CODE_LABEL) {
1936
+                               char    buf[64];
1937
+                               sprintf(buf, "(CODE_LABEL *.L%d))", CODE_LABEL_NUMBER(JUMP_LABEL(x)));
1938
+                               zip_debug_print(pfx, lvl+1, buf);
1939
+                       } else
1940
+                       zip_debug_print(pfx, lvl+1, "(w/Label))");
1941 102 dgisselq
+               } else
1942 111 dgisselq
+                       zip_debug_print(pfx, lvl+1, "(NO label))");
1943
+               debug_rtx(x);
1944
+               */
1945 102 dgisselq
+               break;
1946
+       case CALL:
1947
+               zip_debug_print(pfx, lvl, "(CALL (Adr) (Args)");
1948
+               zip_debug_rtx_1(pfx, XEXP(x,0), lvl+1);
1949
+               zip_debug_rtx_1(pfx, XEXP(x,1), lvl+1);
1950
+               zip_debug_print(pfx, lvl, ")");
1951
+               break;
1952
+       case CALL_INSN: zip_debug_print(pfx, lvl, "(CALL-INSN");
1953
+               debug_rtx(x);
1954
+               break;
1955
+       case BARRIER: zip_debug_print(pfx, lvl, "(BARRIER)"); break;
1956
+       case RETURN: zip_debug_print(pfx, lvl, "(RETURN)"); break;
1957
+       case NOTE:
1958
+               {       char buf[128];
1959
+                       sprintf(buf, "(NOTE %s)", GET_REG_NOTE_NAME(GET_MODE(x)));
1960
+                       zip_debug_print(pfx, lvl, buf);
1961
+               }break;
1962
+       case COND_EXEC: zip_debug_print(pfx, lvl, "(COND_EXEC)");
1963
+               debug_rtx(x);
1964
+               break;
1965
+       case ASM_INPUT: zip_debug_print(pfx, lvl, "(ASM INPUT)"); break;
1966
+       case ASM_OPERANDS: zip_debug_print(pfx, lvl, "(ASM OPERANDS)"); break;
1967
+       case UNSPEC: zip_debug_print(pfx, lvl, "(UNSPEC)"); break;
1968
+       case UNSPEC_VOLATILE: zip_debug_print(pfx, lvl, "(UNSPEC_VOLATILE)"); break;
1969
+       case CODE_LABEL:
1970
+               {
1971
+                       char    buf[64];
1972 111 dgisselq
+                       sprintf(buf, "(CODE_LABEL *.L%d)", CODE_LABEL_NUMBER(x));
1973 102 dgisselq
+                       zip_debug_print_m(pfx, lvl, buf, GET_MODE(x));
1974
+               } break;
1975
+       case SET:
1976
+               zip_debug_print_m(pfx, lvl, "(SET", GET_MODE(x));
1977
+               zip_debug_rtx_1(pfx, XEXP(x,0),lvl+1);
1978
+               zip_debug_rtx_1(pfx, XEXP(x,1),lvl+1);
1979
+               zip_debug_print(pfx, lvl, ")");
1980
+               break;
1981
+       case REG:
1982
+               if (REGNO(x) == zip_PC)
1983
+                       zip_debug_print(pfx, lvl, "(PC)");
1984
+               else if (REGNO(x) == zip_CC)
1985
+                       zip_debug_print(pfx, lvl, "(CC0)");
1986
+               else if (REGNO(x) == zip_SP)
1987
+                       zip_debug_print(pfx, lvl, "(SP)");
1988
+               else if (REGNO(x) == zip_FP)
1989
+                       zip_debug_print(pfx, lvl, "(REG FP)");
1990
+               else if (REGNO(x) == zip_GOT)
1991
+                       zip_debug_print(pfx, lvl, "(REG GBL)");
1992
+               else if (FUNCTION_VALUE_REGNO_P(REGNO(x)))
1993
+                       zip_debug_print(pfx, lvl, "(REG RTN-VL)");
1994
+               else if (REGNO(x) == RETURN_ADDRESS_REGNUM)
1995
+                       zip_debug_print(pfx, lvl, "(REG RTN-AD)");
1996
+               else { char buf[25];
1997
+               sprintf(buf, "(REG %d)", REGNO(x));
1998
+               zip_debug_print_m(pfx, lvl, buf, GET_MODE(x));
1999
+               } break;
2000
+       case IF_THEN_ELSE: // 51
2001
+               zip_debug_print(pfx, lvl, "(IF-THEN-ELSE");
2002
+               zip_debug_rtx_1(pfx, XEXP(x,0),lvl+1);
2003
+               zip_debug_rtx_1(pfx, XEXP(x,1),lvl+1);
2004
+               zip_debug_rtx_1(pfx, XEXP(x,2),lvl+1);
2005
+               zip_debug_print(pfx, lvl, ")");
2006
+               break;
2007
+       case PC:
2008
+               zip_debug_print(pfx, lvl, "(PC)");
2009
+               break;
2010
+       case CC0:
2011
+               zip_debug_print(pfx, lvl, "(CC0)");
2012
+               break;
2013
+       case COMPARE:
2014
+               zip_debug_print(pfx, lvl, "(COMPARE");
2015
+               zip_debug_rtx_1(pfx, XEXP(x,0),lvl+1);
2016
+               zip_debug_rtx_1(pfx, XEXP(x,1),lvl+1);
2017
+               zip_debug_print(pfx, lvl, ")");
2018
+               break;
2019 111 dgisselq
+       case CONST:
2020
+               zip_debug_print_m(pfx, lvl, "(CONST", GET_MODE(x));
2021
+               zip_debug_rtx_1(pfx, XEXP(x,0),lvl+1);
2022
+               zip_debug_print(pfx, lvl, ")");
2023
+               break;
2024 102 dgisselq
+       case CONST_INT:
2025
+               { char buf[25];
2026
+               if (GET_MODE(x)==SImode)
2027 111 dgisselq
+                       sprintf(buf, "(CONST_INT:SI %ld)", INTVAL(x));
2028 102 dgisselq
+               else if (GET_MODE(x)==VOIDmode)
2029 111 dgisselq
+                       sprintf(buf, "(CONST_INT:V %ld)", INTVAL(x));
2030 102 dgisselq
+               else
2031 111 dgisselq
+                       sprintf(buf, "(CONST_INT:? %ld)", INTVAL(x));
2032 102 dgisselq
+               zip_debug_print(pfx, lvl, buf);
2033
+               } break;
2034
+       case LABEL_REF:
2035 111 dgisselq
+               { char buf[256], *bp;
2036
+               sprintf(buf, "(LABEL *.L%d)", CODE_LABEL_NUMBER(LABEL_REF_LABEL(x)));
2037
+               zip_debug_print(pfx, lvl, buf);
2038
+               }
2039 102 dgisselq
+               break;
2040
+       case SYMBOL_REF:
2041
+               {
2042
+                       char buf[64];
2043
+                       sprintf(buf, "(SYMBOL: %s)", XSTR(x,0));
2044
+                       // fprintf(file, "%s", XSTR(x,0));
2045
+                       zip_debug_print(pfx, lvl, buf);
2046
+               }
2047
+               break;
2048
+       case MEM:
2049
+               zip_debug_print_m(pfx, lvl, "(MEM", GET_MODE(x));
2050
+               zip_debug_rtx_1(pfx, XEXP(x,0),lvl+1);
2051
+               zip_debug_print(pfx, lvl, ")");
2052
+               break;
2053
+       /*
2054
+       case VALUE:
2055
+               {
2056
+                       char buf[64];
2057
+                       sprintf(buf, "(VALUE: %d)", INTVAL(XEXP,0));
2058
+                       zip_debug_print_m(pfx, lvl, "buf", GET_MODE(x));
2059
+               }
2060
+               break;
2061
+       */
2062
+       case PLUS:
2063
+               zip_debug_print_m(pfx, lvl, "(PLUS", GET_MODE(x));
2064
+               zip_debug_rtx_1(pfx, XEXP(x,0),lvl+1);
2065
+               zip_debug_rtx_1(pfx, XEXP(x,1),lvl+1);
2066
+               zip_debug_print(pfx, lvl, ")");
2067
+               break;
2068
+       case MINUS:
2069
+               zip_debug_print_m(pfx, lvl, "(MINUS", GET_MODE(x));
2070
+               zip_debug_rtx_1(pfx, XEXP(x,0),lvl+1);
2071
+               zip_debug_rtx_1(pfx, XEXP(x,1),lvl+1);
2072
+               zip_debug_print(pfx, lvl, ")");
2073
+               break;
2074
+       case AND:
2075
+               zip_debug_print_m(pfx, lvl, "(AND", GET_MODE(x));
2076
+               zip_debug_rtx_1(pfx, XEXP(x,0),lvl+1);
2077
+               zip_debug_rtx_1(pfx, XEXP(x,1),lvl+1);
2078
+               zip_debug_print(pfx, lvl, ")");
2079
+               break;
2080
+       case IOR:
2081
+               zip_debug_print_m(pfx, lvl, "(OR", GET_MODE(x));
2082
+               zip_debug_rtx_1(pfx, XEXP(x,0),lvl+1);
2083
+               zip_debug_rtx_1(pfx, XEXP(x,1),lvl+1);
2084
+               zip_debug_print(pfx, lvl, ")");
2085
+               break;
2086
+       case XOR:
2087
+               zip_debug_print_m(pfx, lvl, "(XOR", GET_MODE(x));
2088
+               zip_debug_rtx_1(pfx, XEXP(x,0),lvl+1);
2089
+               zip_debug_rtx_1(pfx, XEXP(x,1),lvl+1);
2090
+               zip_debug_print(pfx, lvl, ")");
2091
+               break;
2092
+       case MULT:
2093
+               zip_debug_print_m(pfx, lvl, "(MULT", GET_MODE(x));
2094
+               zip_debug_rtx_1(pfx, XEXP(x,0),lvl+1);
2095
+               zip_debug_rtx_1(pfx, XEXP(x,1),lvl+1);
2096
+               zip_debug_print(pfx, lvl, ")");
2097
+               break;
2098
+       case EQ:        //
2099
+               zip_debug_print_m(pfx, lvl, "(EQ", GET_MODE(x));
2100
+               zip_debug_rtx_1(pfx, XEXP(x,0),lvl+1);
2101
+               zip_debug_rtx_1(pfx, XEXP(x,1),lvl+1);
2102
+               zip_debug_print(pfx, lvl, ")");
2103
+               break;
2104
+       case NE:        //
2105
+               zip_debug_print_m(pfx, lvl, "(NE", GET_MODE(x));
2106
+               zip_debug_rtx_1(pfx, XEXP(x,0),lvl+1);
2107
+               zip_debug_rtx_1(pfx, XEXP(x,1),lvl+1);
2108
+               zip_debug_print(pfx, lvl, ")");
2109
+               break;
2110
+       case GE:        //
2111
+               zip_debug_print_m(pfx, lvl, "(GE", GET_MODE(x));
2112
+               zip_debug_rtx_1(pfx, XEXP(x,0),lvl+1);
2113
+               zip_debug_rtx_1(pfx, XEXP(x,1),lvl+1);
2114
+               zip_debug_print(pfx, lvl, ")");
2115
+               break;
2116
+       case GT:        //
2117
+               zip_debug_print_m(pfx, lvl, "(GT", GET_MODE(x));
2118
+               zip_debug_rtx_1(pfx, XEXP(x,0),lvl+1);
2119
+               zip_debug_rtx_1(pfx, XEXP(x,1),lvl+1);
2120
+               zip_debug_print(pfx, lvl, ")");
2121
+               break;
2122
+       case LE:        //
2123
+               zip_debug_print_m(pfx, lvl, "(LE", GET_MODE(x));
2124
+               zip_debug_rtx_1(pfx, XEXP(x,0),lvl+1);
2125
+               zip_debug_rtx_1(pfx, XEXP(x,1),lvl+1);
2126
+               zip_debug_print(pfx, lvl, ")");
2127
+               break;
2128
+       case LT:        //
2129
+               zip_debug_print_m(pfx, lvl, "(LT", GET_MODE(x));
2130
+               zip_debug_rtx_1(pfx, XEXP(x,0),lvl+1);
2131
+               zip_debug_rtx_1(pfx, XEXP(x,1),lvl+1);
2132
+               zip_debug_print(pfx, lvl, ")");
2133
+               break;
2134
+       case GEU:       //
2135
+               zip_debug_print_m(pfx, lvl, "(GEU", GET_MODE(x));
2136
+               zip_debug_rtx_1(pfx, XEXP(x,0),lvl+1);
2137
+               zip_debug_rtx_1(pfx, XEXP(x,1),lvl+1);
2138
+               zip_debug_print(pfx, lvl, ")");
2139
+               break;
2140
+       case GTU:       //
2141
+               zip_debug_print_m(pfx, lvl, "(GTU", GET_MODE(x));
2142
+               zip_debug_rtx_1(pfx, XEXP(x,0),lvl+1);
2143
+               zip_debug_rtx_1(pfx, XEXP(x,1),lvl+1);
2144
+               zip_debug_print(pfx, lvl, ")");
2145
+               break;
2146
+       case LEU:       //
2147
+               zip_debug_print_m(pfx, lvl, "(LEU", GET_MODE(x));
2148
+               zip_debug_rtx_1(pfx, XEXP(x,0),lvl+1);
2149
+               zip_debug_rtx_1(pfx, XEXP(x,1),lvl+1);
2150
+               zip_debug_print(pfx, lvl, ")");
2151
+               break;
2152
+       case LTU:       //
2153
+               zip_debug_print_m(pfx, lvl, "(LTU", GET_MODE(x));
2154
+               zip_debug_rtx_1(pfx, XEXP(x,0),lvl+1);
2155
+               zip_debug_rtx_1(pfx, XEXP(x,1),lvl+1);
2156
+               zip_debug_print(pfx, lvl, ")");
2157
+               break;
2158
+       case SCRATCH:   //
2159
+               zip_debug_print_m(pfx, lvl, "(SCRATCH)", GET_MODE(x));
2160
+               break;
2161
+       case SUBREG:
2162
+               { char buf[25];
2163 111 dgisselq
+               if (REG_P(XEXP(x,0))) {
2164
+                       sprintf(buf, "(SUBREG %d/%d)", REGNO(XEXP(x,0)),
2165
+                               SUBREG_BYTE(x));
2166
+                       zip_debug_print(pfx, lvl, buf);
2167
+               } else if (MEM_P(XEXP(x,0))) {
2168
+                       sprintf(buf, "(SUBREG /%d", SUBREG_BYTE(x));
2169
+                       zip_debug_print(pfx, lvl, buf);
2170
+                       zip_debug_rtx_1(pfx, XEXP(x,0),lvl+1);
2171
+                       zip_debug_print(pfx, lvl, ")");
2172
+               } else {
2173
+                       sprintf(buf, "(SUBREG UNK /%d", SUBREG_BYTE(x));
2174
+                       zip_debug_print(pfx, lvl, buf);
2175
+                       zip_debug_rtx_1(pfx, XEXP(x,0),lvl+1);
2176
+                       zip_debug_print(pfx, lvl, ")");
2177
+               }}
2178
+               break;
2179 102 dgisselq
+       default:
2180 111 dgisselq
+               { char buf[128];
2181 102 dgisselq
+               sprintf(buf, "(? = %d) -- calling DEBUG-RTX", GET_CODE(x));
2182
+               zip_debug_print(pfx, lvl, buf);
2183
+               debug_rtx(x);
2184
+               } break;
2185
+       }
2186
+}
2187
+
2188
+void
2189
+zip_debug_rtx_pfx(const char *pfx, const_rtx x) {
2190
+       zip_debug_rtx_1(pfx, x, 0);
2191
+}
2192
+
2193
+void
2194
+zip_debug_rtx(const_rtx x) {
2195
+       zip_debug_rtx_pfx("", x);
2196
+}
2197
+
2198
+void
2199
+zip_debug_insn(rtx_insn *insn ATTRIBUTE_UNUSED) {
2200
+}
2201
+
2202
+void
2203
+zip_debug_bb(basic_block bb) {
2204
+       rtx_insn        *insn;
2205
+
2206
+       fprintf(stderr, "************ BASIC-BLOCK ***************\n");
2207
+       FOR_BB_INSNS(bb, insn)
2208
+       {
2209
+               zip_debug_rtx(insn);
2210
+       }
2211
+}
2212
+
2213
+
2214
+static bool
2215 111 dgisselq
+zip_legitimate_opb(const_rtx x, bool strict)
2216 102 dgisselq
+{
2217 103 dgisselq
+       const bool      dbg = ((ALL_DEBUG_ON)||(false))&&(!ALL_DEBUG_OFF);
2218 102 dgisselq
+
2219 111 dgisselq
+       if (dbg) fprintf(stderr, "ZIP-LEGITIMATE-OPB\n");
2220 102 dgisselq
+       if (dbg) zip_debug_rtx_pfx("Test: ", x);
2221
+
2222
+       if (NULL_RTX == x)
2223
+               return false;
2224
+       else if ((GET_MODE(x) != SImode)&&(GET_MODE(x) != VOIDmode))
2225
+               return false;
2226
+       else if (REG_P(x)) {
2227 111 dgisselq
+               bool    res;
2228 102 dgisselq
+               // Only insist the register b a valid register if strict is true
2229 111 dgisselq
+               res = (!strict)||((is_ZIP_REG(REGNO(x)))&&(REGNO(x) != zip_CC));
2230
+               if (dbg) fprintf(stderr, "ZIP-LEGITIMATE-OPB -> %s (Reg)\n",
2231
+                       (res)?"YES!":"No");
2232
+               return res;
2233
+       } else if ((!strict)&&(SUBREG_P(x))) {
2234
+               // Only insist the register b a valid register if strict is true
2235
+               if (dbg) fprintf(stderr, "ZIP-LEGITIMATE-OPB -> (Subreg(Reg),recurse)\n");
2236
+               return zip_legitimate_opb(XEXP(x,0), strict);
2237
+       } else if ((CONST_INT_P(x))
2238
+               &&(INTVAL(x) >= zip_min_opb_imm)
2239
+               &&(INTVAL(x) <= zip_max_opb_imm)) {
2240
+               if (dbg) fprintf(stderr, "ZIP-LEGITIMATE-OPB -> YES! (Const)\n");
2241
+               return true;
2242 102 dgisselq
+       } else if (GET_CODE(x) == PLUS) {
2243
+               // Is it a valid register?
2244
+               if(!REG_P(XEXP(x,0))) {
2245 111 dgisselq
+                       if (dbg) fprintf(stderr, "ZIP-LEGITIMATE-OPB -> No (No reg in +%s)\n",
2246 102 dgisselq
+                       (GET_CODE(XEXP(x,1))==REG)?", reg in op[1]":"");
2247
+                       return false;
2248 111 dgisselq
+               } if ((strict)&&((!is_ZIP_REG(REGNO(XEXP(x,0))))||(REGNO(XEXP(x,0)) == zip_CC))) {
2249
+                       if (dbg) fprintf(stderr, "ZIP-LEGITIMATE-OPB -> No (Wrong reg in +, %d)\n", REGNO(XEXP(x,0)));
2250 102 dgisselq
+                       return false;
2251
+               } if ((GET_CODE(XEXP(x, 1)) == CONST_INT)
2252
+                       &&(INTVAL(XEXP(x, 1)) <= zip_max_anchor_offset)
2253
+                       &&(INTVAL(XEXP(x, 1)) >= zip_min_anchor_offset)) {
2254 111 dgisselq
+                       if (dbg) fprintf(stderr, "ZIP-LEGITIMATE-OPB -> YES! (reg+int)\n");
2255 103 dgisselq
+                       // if((INTVAL(XEXP(x,1))<0)&&(REGNO(XEXP(x,0))==zip_SP))
2256
+                               // gcc_unreachable();
2257 102 dgisselq
+                       return true;
2258
+               } if ((GET_CODE(XEXP(x, 1)) == LABEL_REF)
2259
+                       ||(GET_CODE(XEXP(x, 1)) == SYMBOL_REF)) {
2260
+                       // While we can technically support this, the problem
2261
+                       // is that the symbol address could be anywhere, and we
2262
+                       // have no way of recovering if it's outside of our
2263
+                       // 14 allowable bits.
2264 111 dgisselq
+                       if (dbg) fprintf(stderr, "ZIP-LEGITIMATE-OPB -> No. (reg+lbl)\n");
2265 102 dgisselq
+                       return false;
2266
+               }
2267 111 dgisselq
+               // if ((GET_CODE(XEXP(x, 1)) == MINUS)
2268
+               //      &&((GET_CODE(XEXP(XEXP(x,1),0)) == LABEL_REF)
2269
+               //              ||(GET_CODE(XEXP(XEXP(x,1),0)) == CONST_INT)
2270
+               //              ||(GET_CODE(XEXP(XEXP(x,1),0)) == SYMBOL_REF))
2271
+               //      &&((GET_CODE(XEXP(XEXP(x,1),1)) == LABEL_REF)
2272
+               //              ||(GET_CODE(XEXP(XEXP(x,1),0)) == CONST_INT)
2273
+               //              ||(GET_CODE(XEXP(XEXP(x,1),1)) == SYMBOL_REF))
2274
+               //      &&((GET_CODE(XEXP(XEXP(x,1),0)))
2275
+               //              == (GET_CODE(XEXP(XEXP(x,1),1))))) {
2276
+               //      if (dbg) fprintf(stderr, "ZIP-LEGITIMATE-OPERAND-ADDRESS -> YES! (lbl-lbl+reg)\n");
2277
+               //      return true;
2278
+               //}
2279 102 dgisselq
+       }
2280
+
2281 111 dgisselq
+       if (dbg) fprintf(stderr, "ZIP-LEGITIMATE-OPB -> No\n");
2282 102 dgisselq
+       if (dbg) zip_debug_rtx(x);
2283
+       return false;
2284
+}
2285
+
2286
+static bool
2287
+zip_legitimate_move_operand_p(machine_mode mode ATTRIBUTE_UNUSED, rtx x, bool strict) {
2288
+       const bool      dbg = ((ALL_DEBUG_ON)||(false))&&(!ALL_DEBUG_OFF);
2289
+
2290
+       if (dbg) fprintf(stderr, "ZIP-VALID-MOVE-OPERAND\n");
2291
+       if (dbg) zip_debug_rtx_pfx("VMov?: ", x);
2292
+
2293
+       if (NULL_RTX == x)
2294
+               return false;
2295
+       else if (REG_P(x)) {
2296
+               // Only insist the register b a valid register if strict is true
2297
+               if (dbg) fprintf(stderr, "ZIP-VALID-MOVE-OPERAND -> YES! (Reg)\n");
2298 111 dgisselq
+               return (!strict)||((is_ZIP_REG(REGNO(x)))&&(REGNO(x) !=zip_CC));
2299 102 dgisselq
+       } else if (GET_CODE(x) == PLUS) {
2300 111 dgisselq
+               // if (GET_CODE(XEXP(x,0))==PLUS) {
2301
+               // return (zip_legitimate_opb(XEXP(x,0), strict))
2302
+               // &&(zip_const_address_operand(XEXP(x,0)));
2303
+               // }
2304 102 dgisselq
+               // Is it a valid register?
2305 111 dgisselq
+               if(GET_CODE(XEXP(x,0)) != REG) {
2306 102 dgisselq
+                       if (dbg) fprintf(stderr, "ZIP-VALID-MOVE-OPERAND -> No (No reg in +%s)\n",
2307
+                       (GET_CODE(XEXP(x,1))==REG)?", reg in op[1]":"");
2308
+                       return false;
2309 111 dgisselq
+               } if ((strict)&&
2310
+                       ((!is_ZIP_REG(REGNO(XEXP(x,0))))
2311
+                       ||(REGNO(XEXP(x,0)) == zip_CC))) {
2312 102 dgisselq
+                       if (dbg) fprintf(stderr, "ZIP-VALID-MOVE-OPERAND -> No (Wrong reg in +, %d)\n", REGNO(XEXP(x,0)));
2313
+                       return false;
2314
+               } if ((GET_CODE(XEXP(x, 1)) == CONST_INT)
2315
+                       &&(INTVAL(XEXP(x, 1)) <= zip_max_mov_offset)
2316
+                       &&(INTVAL(XEXP(x, 1)) >= zip_min_mov_offset)) {
2317
+                       if (dbg) fprintf(stderr, "ZIP-VALID-MOVE-OPERAND -> YES! (reg+int)\n");
2318
+                       return true;
2319
+               }
2320
+       }
2321
+
2322
+       if (dbg) fprintf(stderr, "ZIP-VALID-MOVE-OPERAND -> No\n");
2323
+       if (dbg) zip_debug_rtx(x);
2324
+       return false;
2325
+}
2326
+
2327
+int
2328
+zip_pd_mov_operand(rtx op)
2329
+{
2330
+       const bool      dbg = ((ALL_DEBUG_ON)||(false))&&(!ALL_DEBUG_OFF);
2331
+
2332
+       if (dbg) fprintf(stderr, "ZIP-VALID-MOV(predicate) for OPERAND\n");
2333
+       return zip_legitimate_move_operand_p(VOIDmode, op, !can_create_pseudo_p());
2334
+}
2335
+
2336
+int
2337 111 dgisselq
+zip_pd_mvimm_operand(rtx op)
2338
+{
2339
+       const bool      dbg = ((ALL_DEBUG_ON)||(false))&&(!ALL_DEBUG_OFF);
2340
+
2341
+       if (dbg) fprintf(stderr, "ZIP-VALID-MVIMM(predicate) for OPERAND\n");
2342
+       if (!CONST_INT_P(op))
2343
+               return false;
2344
+       if (INTVAL(op) > zip_max_mov_offset)
2345
+               return false;
2346
+       if (INTVAL(op) < zip_min_mov_offset)
2347
+               return false;
2348
+       return true;
2349
+}
2350
+
2351
+int
2352
+zip_pd_imm_operand(rtx op)
2353
+{
2354
+       const bool      dbg = ((ALL_DEBUG_ON)||(false))&&(!ALL_DEBUG_OFF);
2355
+
2356
+       if (dbg) fprintf(stderr, "ZIP-VALID-IMM(predicate) for OPERAND\n");
2357
+       if (!CONST_INT_P(op))
2358
+               return false;
2359
+       if (INTVAL(op) > zip_max_anchor_offset)
2360
+               return false;
2361
+       if (INTVAL(op) < zip_min_anchor_offset)
2362
+               return false;
2363
+       return true;
2364
+}
2365
+
2366
+int
2367 102 dgisselq
+zip_address_operand(rtx op)
2368
+{
2369
+       const bool      dbg = ((ALL_DEBUG_ON)||(false))&&(!ALL_DEBUG_OFF);
2370
+
2371
+       if (dbg) fprintf(stderr, "ZIP-ADDRESS for OPERAND\n");
2372 111 dgisselq
+       if ((REG_P(op))&&(REGNO(op)==zip_CC))
2373
+               return false;
2374
+       else if ((GET_CODE(op) == PLUS)&&(REG_P(XEXP(op,0)))
2375
+                       &&(REGNO(XEXP(op,0))==zip_CC))
2376
+               return false;
2377
+       else
2378
+               return zip_legitimate_opb(op, !can_create_pseudo_p());
2379 102 dgisselq
+}
2380
+
2381
+int
2382 111 dgisselq
+zip_pd_opb_operand(rtx op)
2383 102 dgisselq
+{
2384
+       const bool      dbg = ((ALL_DEBUG_ON)||(false))&&(!ALL_DEBUG_OFF);
2385
+
2386 111 dgisselq
+       if (dbg) fprintf(stderr, "ZIP-OPB(predicate) for OPERAND\n");
2387
+       return zip_legitimate_opb(op, !can_create_pseudo_p());
2388 102 dgisselq
+}
2389
+
2390
+int
2391
+zip_ct_address_operand(rtx op)
2392
+{
2393
+       const bool      dbg = ((ALL_DEBUG_ON)||(false))&&(!ALL_DEBUG_OFF);
2394
+
2395
+       if (dbg) fprintf(stderr, "ZIP-ADDRESS(constraint) for OPERAND\n");
2396 111 dgisselq
+       return zip_legitimate_opb(op, !can_create_pseudo_p());
2397 102 dgisselq
+}
2398
+
2399
+int
2400
+zip_const_address_operand(rtx x) {
2401
+       const bool      dbg = ((ALL_DEBUG_ON)||(false))&&(!ALL_DEBUG_OFF);
2402
+
2403
+       if (dbg) fprintf(stderr, "is ZIP-CONST-ADDRESS?\n");
2404
+       if (dbg) zip_debug_rtx(x);
2405
+       if ((GET_MODE(x) != SImode)&&(GET_MODE(x) != VOIDmode))
2406
+               return false;
2407
+       if ((GET_CODE(x) == LABEL_REF)
2408
+                       ||(GET_CODE(x) == CODE_LABEL)
2409
+                       ||(GET_CODE(x) == SYMBOL_REF)) {
2410
+               if (dbg) fprintf(stderr, "is ZIP-CONST-ADDRESS? -> YES!\n");
2411
+               return true;
2412
+       } else if (CONST_INT_P(x)) {
2413
+               if (dbg) fprintf(stderr, "is ZIP-CONST-ADDRESS? -> YES!\n");
2414
+               return true;
2415
+       } else if (GET_CODE(x) == PLUS) {
2416
+               if (dbg) fprintf(stderr, "is ZIP-CONST-ADDRESS(PLUS)\n");
2417
+               return ((zip_const_address_operand(XEXP(x,0)))
2418
+                       &&(CONST_INT_P(XEXP(x,1))));
2419
+       } else if (GET_CODE(x) == MINUS) {
2420
+               if (dbg) fprintf(stderr, "is ZIP-CONST-ADDRESS(MINUS)\n");
2421
+               return ((zip_const_address_operand(XEXP(x,0)))
2422
+                       &&(zip_const_address_operand(XEXP(x,1))));
2423
+       }
2424
+
2425
+       if (dbg) fprintf(stderr, "is ZIP-CONST-ADDRESS? -> No\n");
2426
+       if (dbg) zip_debug_rtx(x);
2427
+       return false;
2428
+}
2429
+
2430
+int
2431
+zip_ct_const_address_operand(rtx x) {
2432
+       const bool      dbg = ((ALL_DEBUG_ON)||(false))&&(!ALL_DEBUG_OFF);
2433
+
2434
+       if (dbg) fprintf(stderr, "ZIP-CONST-ADDRESS(constraint)\n");
2435
+       return zip_const_address_operand(x);
2436
+}
2437
+
2438
+int
2439
+zip_pd_const_address_operand(rtx x) {
2440
+       const bool      dbg = ((ALL_DEBUG_ON)||(false))&&(!ALL_DEBUG_OFF);
2441
+
2442
+       if (dbg) fprintf(stderr, "ZIP-CONST-ADDRESS(predicate)\n");
2443
+       return zip_const_address_operand(x);
2444
+}
2445
+
2446
+
2447
+static bool
2448
+zip_legitimate_address_p(machine_mode mode ATTRIBUTE_UNUSED, rtx x, bool strict)
2449
+{
2450
+       const bool      dbg = ((ALL_DEBUG_ON)||(false))&&(!ALL_DEBUG_OFF);
2451
+
2452
+       if (dbg) fprintf(stderr, "Zip-LEGITIMATE-ADDRESS-P\n");
2453
+       if (dbg) zip_debug_rtx(x);
2454
+
2455
+       // Only insist the register be a valid register if strict is true
2456 111 dgisselq
+       if (zip_legitimate_opb(x, strict))
2457 102 dgisselq
+               return true;
2458 111 dgisselq
+       // else if (zip_const_address_operand(x))
2459
+               // return true;
2460 102 dgisselq
+
2461
+       return false;
2462
+}
2463
+
2464 111 dgisselq
+static rtx
2465
+zip_legitimize_address(rtx x, rtx oldx ATTRIBUTE_UNUSED, machine_mode mode ATTRIBUTE_UNUSED) {
2466
+       const bool      dbg = ((ALL_DEBUG_ON)||(false))&&(!ALL_DEBUG_OFF);
2467
+
2468
+       if (dbg) zip_debug_rtx_pfx("LEGITIMIZE: ", x);
2469
+       if (zip_legitimate_address_p(mode, x, !can_create_pseudo_p()))
2470
+               return x;
2471
+
2472
+       if (GET_CODE(x)==PLUS) {
2473
+               if (!REG_P(XEXP(x,0)))
2474
+                       XEXP(x,0) = force_reg(GET_MODE(x),XEXP(x,0));
2475
+               if ((!zip_legitimate_address_p(mode, x, !can_create_pseudo_p()))
2476
+                       &&(!CONST_INT_P(XEXP(x,1))))
2477
+                       x = force_reg(GET_MODE(x),x);
2478
+       } else if (MEM_P(x))
2479
+               x = force_reg(GET_MODE(x),x);
2480
+
2481
+       if (dbg) zip_debug_rtx_pfx("LEGITIMATE: ", x);
2482
+       return x;
2483
+}
2484
+
2485 102 dgisselq
+void
2486
+zip_asm_output_def(FILE *stream, const char *name, const char *value)
2487
+{
2488
+       assemble_name(stream, name);
2489
+       fprintf(stream, "\t.equ ");
2490
+       assemble_name(stream, value);
2491
+       fputc('\n', stream);
2492
+}
2493
+
2494
+/*
2495
+bool   zip_load_address_lod(rtx regrx, rtx memrx) {
2496
+       fprintf(stderr, "ZIP-LOAD-ADDRESS-LOD\n");
2497
+       if (!MEM_P(memrx))
2498
+               return false;
2499
+       if (GET_CODE(regrx) != REG)
2500
+               return false;
2501
+       enum    rtx_code ic = GET_CODE(memrx);
2502
+       if ((ic == SYMBOL_REF)
2503
+               ||(ic == CODE_LABEL)
2504
+               ||(ic == LABEL_REF)) {
2505
+               if (can_create_pseudo_p()) {
2506
+                       rtx scratch_reg;
2507
+                       scratch_reg = gen_rtx_SCRATCH(SImode);
2508
+                       emit_insn(gen_movsi_ldi(scratch_reg, XEXP(memrx, 0)));
2509
+                       emit_insn(gen_movsi_lod(regrx, scratch_reg));
2510
+                       return true;
2511
+               } else return false;
2512
+       } else return false;
2513
+}
2514
+
2515
+bool   zip_load_address_sto(rtx memrx, rtx regrx) {
2516
+       fprintf(stderr,  "CHECKING-IN-W/ZIP_LOAD_ADDRESS_STORE\n");
2517
+       if (!MEM_P(memrx))
2518
+               return false;
2519
+       if (GET_CODE(regrx) != REG)
2520
+               return false;
2521
+       enum    rtx_code ic = GET_CODE(memrx);
2522
+       if ((ic == SYMBOL_REF)
2523
+               ||(ic == CODE_LABEL)
2524
+               ||(ic == LABEL_REF)) {
2525
+               if (can_create_pseudo_p()) {
2526
+                       rtx scratch_reg;
2527
+                       scratch_reg = gen_rtx_SCRATCH(SImode);
2528
+                       emit_insn(gen_movsi_ldi(scratch_reg, XEXP(memrx, 0)));
2529
+                       emit_insn(gen_movsi_sto(scratch_reg, regrx));
2530
+                       return true;
2531
+               } else return false;
2532
+       } return false;
2533
+}
2534
+*/
2535
+
2536 111 dgisselq
+#define        USE_SUBREG
2537
+#ifdef USE_SUBREG
2538
+#define        SREG_P(RTX) ((SUBREG_P(RTX))&&(REG_P(XEXP(RTX,0))))
2539
+#define        SMEM_P(RTX) ((SUBREG_P(RTX))&&(MEM_P(XEXP(RTX,0))))
2540
+#else
2541
+#define        SREG_P(RTX)     false
2542
+#define        SMEM_P(RTX)     false
2543
+#endif
2544 102 dgisselq
+
2545
+bool   zip_gen_move_rtl(rtx dst, rtx src) {
2546 103 dgisselq
+       const bool      dbg = ((ALL_DEBUG_ON)||(false))&&(!ALL_DEBUG_OFF);
2547 102 dgisselq
+
2548
+       if (dbg) fprintf(stderr, "ZIP-GEN-MOVE\n");
2549
+       if (dbg) zip_debug_rtx_pfx("FROM: ", src);
2550
+       if (dbg) zip_debug_rtx_pfx("TO  : ", dst);
2551
+       if (dbg) fprintf(stderr, "PSEUDOs: %s\n", can_create_pseudo_p()?"true":"false");
2552 111 dgisselq
+       if (((REG_P(dst))||(SREG_P(dst)))
2553
+                       &&((REG_P(src))||(SREG_P(src)))) {
2554 102 dgisselq
+               // First type of move... register to register
2555
+               if (dbg) fprintf(stderr, "ZIP-GEN-MOVE/REG -- EMIT\n");
2556 111 dgisselq
+               // if (SREG_P(dst)) dst = gen_raw_REG(SImode,REGNO(XEXP(dst,0))+SUBREG_BYTE(dst));
2557
+               // if (SREG_P(src)) src = gen_raw_REG(SImode,REGNO(XEXP(src,0))+SUBREG_BYTE(src));
2558 102 dgisselq
+               emit_insn(gen_movsi_reg(dst, src));
2559
+       } else if ((MEM_P(dst))&&(MEM_P(XEXP(dst,0)))) {
2560 111 dgisselq
+               // An indirect store, (mem (mem (addr .))) = whatever ...
2561 102 dgisselq
+               if (can_create_pseudo_p()) {
2562
+                       rtx     tmp = gen_reg_rtx(Pmode);
2563
+                       zip_gen_move_rtl(tmp, XEXP(dst,0));
2564 103 dgisselq
+                       // mark_reg_pointer(tmp,0);
2565 102 dgisselq
+                       zip_gen_move_rtl(gen_rtx_MEM(GET_MODE(src), tmp), src);
2566
+               } else {
2567
+                       fprintf(stderr, "ZIP:Cannot move into mem w/o pseudo\n");
2568
+                       return false;
2569
+               }
2570
+       } else if ((MEM_P(src))&&(MEM_P(XEXP(src,0)))) {
2571 111 dgisselq
+               // If this is an indirect load, Rx = (mem (mem (addr)))
2572 102 dgisselq
+               if (can_create_pseudo_p()) {
2573
+                       rtx     tmp = gen_reg_rtx(Pmode);
2574
+                       zip_gen_move_rtl(tmp, XEXP(src,0));
2575 103 dgisselq
+                       // mark_reg_pointer(tmp,0);
2576 102 dgisselq
+                       zip_gen_move_rtl(dst, gen_rtx_MEM(GET_MODE(src), tmp));
2577
+               } else {
2578
+                       fprintf(stderr, "ZIP: Cannot move from mem(mem(ptr)) w/o pseudo\n");
2579
+                       return false;
2580
+               }
2581 111 dgisselq
+       } else if (((REG_P(dst))||(SREG_P(dst)))&&(GET_CODE(src)==PLUS)
2582 102 dgisselq
+                       &&(REG_P(XEXP(src,0)))
2583
+                       &&(CONST_INT_P(XEXP(src,1)))) {
2584 111 dgisselq
+               // if (SREG_P(dst)) dst = gen_raw_REG(SImode,REGNO(XEXP(dst,0))+SUBREG_BYTE(dst));
2585 102 dgisselq
+               // Second type of move... register plus offset to register
2586
+               if ((INTVAL(XEXP(src, 1)) <= zip_max_mov_offset)
2587
+                       &&(INTVAL(XEXP(src, 1)) >= zip_min_mov_offset)) {
2588
+                       // The offset is within bounds
2589
+                       if (dbg) fprintf(stderr, "ZIP-GEN-MOVE/REG+OFF -- EMIT\n");
2590
+                       emit_insn(gen_movsi_reg_off(dst, XEXP(src,0),XEXP(src,1)));
2591
+               } else if (can_create_pseudo_p()) {
2592
+                       // The offset is out of bounds, get a new register and
2593
+                       // generate an add instruction to split this up.
2594
+                       rtx     tmp = gen_reg_rtx(GET_MODE(XEXP(src,0)));
2595
+
2596
+                       if (dbg) fprintf(stderr, "ZIP-GEN-MOVE/LDI\n");
2597
+                       emit_insn(gen_movsi_ldi(tmp, XEXP(src,1)));
2598
+                       if (dbg) fprintf(stderr, "ZIP-GEN-MOVE/ADD\n");
2599
+                       emit_insn(gen_addsi3(tmp, tmp, XEXP(src,0)));
2600
+                       if (dbg) fprintf(stderr, "ZIP-GEN-MOVE/DST\n");
2601
+                       emit_insn(gen_movsi_reg(dst, tmp));
2602
+               } else {
2603
+                       fprintf(stderr, "ZIP: Cannot move a(r),b w/o pseudo for out of bounds a\n");
2604
+                       return false;
2605
+               }
2606
+       } else if ((MEM_P(dst))&&(MEM_P(src))) {
2607
+               rtx     tmp;
2608
+               if (dbg) fprintf(stderr, "ZIP-GEN-MOVE/MEM/MEM\n");
2609
+               if (can_create_pseudo_p()) {
2610
+                       tmp = gen_reg_rtx(GET_MODE(src));
2611
+                       emit_insn(gen_movsi(tmp, src));
2612
+                       emit_insn(gen_movsi(dst, tmp));
2613
+               } else {
2614
+                       fprintf(stderr, "ZIP: Cannot move mem(A) to mem(B) w/o pseudo\n");
2615
+                       return false;
2616
+               }
2617 111 dgisselq
+       } else if (((REG_P(dst))||(SREG_P(dst)))&&(MEM_P(src))) {
2618 102 dgisselq
+               // Memory load
2619 111 dgisselq
+               // if (SREG_P(dst)) dst = gen_raw_REG(SImode,REGNO(XEXP(dst,0))+SUBREG_BYTE(dst));
2620 102 dgisselq
+               if (dbg) fprintf(stderr, "ZIP-GEN-MOVE/LOD\n");
2621 111 dgisselq
+               if (zip_legitimate_opb(XEXP(src, 0), false)) {
2622 102 dgisselq
+                       if (dbg) fprintf(stderr, "ZIP-GEN-MOVE/SIMPLE-LOD(ADDR)\n");
2623
+                       if (dbg) zip_debug_rtx_pfx("Smple-Addr: ", src);
2624
+                       emit_insn(gen_movsi_lod(dst, src));
2625
+               } else if (zip_const_address_operand(XEXP(src,0))) {
2626
+                       if (can_create_pseudo_p()) {
2627
+                               rtx     tmp;
2628
+                               if (dbg) fprintf(stderr, "ZIP-GEN-MOVE/LOD(CONST-ADDR)\n");
2629
+                               tmp = gen_reg_rtx(Pmode);
2630
+                               emit_insn(gen_movsi_ldi(tmp, XEXP(src,0)));
2631
+                               emit_insn(gen_movsi_lod(dst, gen_rtx_MEM(GET_MODE(src),tmp)));
2632
+                       } else {
2633
+                               if (dbg) fprintf(stderr, "ZIP-GEN-MOVE/LOD(CONST-ADDR,SELF)\n");
2634
+                               emit_insn(gen_movsi_ldi(dst, XEXP(src,0)));
2635
+                               emit_insn(gen_movsi_lod(dst, gen_rtx_MEM(GET_MODE(src),dst)));
2636
+                       }
2637
+               } else {
2638
+                       internal_error("%s", "ZIP/No usable load\n");
2639
+               }
2640 111 dgisselq
+       } else if ((MEM_P(dst))&&((REG_P(src))||(SREG_P(src)))) {
2641 102 dgisselq
+               // Memory store
2642 111 dgisselq
+               // if (SREG_P(src)) src = gen_raw_REG(SImode,REGNO(XEXP(src,0))+SUBREG_BYTE(src));
2643 102 dgisselq
+               if (dbg) fprintf(stderr, "ZIP-GEN-MOVE/STO\n");
2644 111 dgisselq
+               if (zip_legitimate_opb(XEXP(dst, 0), false)) {
2645 102 dgisselq
+                       // If it's a legitimate address already, do nothing mor
2646
+                       if (dbg) fprintf(stderr, "ZIP-GEN-MOVE/STO(Legit Addr)--EMIT\n");
2647 103 dgisselq
+                       // if (REG_P(XEXP(dst,0)))
2648
+                               // mark_reg_pointer(XEXP(dst,0),0);
2649
+                       // else if ((GET_CODE(XEXP(dst,0))==PLUS)
2650
+                                       // &&(REG_P(XEXP(XEXP(dst,0),0))))
2651
+                               // mark_reg_pointer(XEXP(XEXP(dst,0),0),0);
2652 102 dgisselq
+                       emit_insn(gen_movsi_sto(dst, src));
2653
+               } else if (zip_const_address_operand(XEXP(dst,0))) {
2654
+                       rtx     tmp;
2655
+
2656
+                       if (can_create_pseudo_p()) {
2657
+                               if (dbg) fprintf(stderr, "ZIP-GEN-MOVE/STO(Const Addr,Reg) -- EMIT\n");
2658
+                               // Otherwise we need to load the memory address
2659
+                               // into a register
2660
+                               tmp = gen_reg_rtx(Pmode);
2661 103 dgisselq
+                               // mark_reg_pointer(tmp,0);
2662 102 dgisselq
+                               emit_insn(gen_movsi_ldi(tmp, XEXP(dst,0)));
2663
+                               //
2664
+                               // Then we can do our load
2665
+                               if (dbg) fprintf(stderr, "ZIP-GEN-MOVE/STO -- emit\n");
2666
+                               emit_insn(gen_movsi_sto(gen_rtx_MEM(GET_MODE(src), tmp), src));
2667
+                       } else {
2668
+                               fprintf(stderr, "Cannot move src -> mem(dst) w/o pseudo\n");
2669
+                               return false;
2670
+                       }
2671
+               } else if (can_create_pseudo_p())
2672
+                       internal_error("%s", "ZIP/No usable store\n");
2673
+               else {
2674
+                       fprintf(stderr, "ZIP/Unanticipated store problem\n");
2675
+                       return false;
2676
+               }
2677
+               if (dbg) fprintf(stderr, "ZIP-GEN-MOVE/STO -- DONE\n");
2678
+       } else if ((MEM_P(dst))&&((CONST_INT_P(src))||(GET_CODE(src)==SYMBOL_REF))) {
2679
+               // Store a constant into memory
2680
+               rtx     tmp;
2681
+
2682
+               if (can_create_pseudo_p()) {
2683
+                       if (dbg) fprintf(stderr, "ZIP-GEN-MOVE/CONST->MEM\n");
2684
+                       // Load the source constant into a register first
2685
+                       tmp = gen_reg_rtx((GET_MODE(src)==VOIDmode)?GET_MODE(dst):GET_MODE(src));
2686
+                       emit_insn(gen_movsi_ldi(tmp,src));
2687
+                       if (dbg) fprintf(stderr, "ZIP-GEN-MOVE/CONST->REG->MEM -- RECURSE\n");
2688
+
2689
+                       // Then do a normal move, recursing to handle memory
2690
+                       // properly
2691
+                       zip_gen_move_rtl(dst, tmp);
2692
+                       if (dbg) fprintf(stderr, "ZIP-GEN-MOVE/CONST->MEM -- DONE\n");
2693
+               } else {
2694
+                       fprintf(stderr, "ZIP/Cannot store constant into mem w/o pseudo\n");
2695
+                       return false;
2696
+               }
2697 111 dgisselq
+       } else if (((REG_P(dst))||(SREG_P(dst)))&&(CONST_INT_P(src))) {
2698
+               // if (SREG_P(dst)) dst = gen_raw_REG(SImode,REGNO(XEXP(dst,0))+SUBREG_BYTE(dst));
2699 102 dgisselq
+               // Load a constant into a register
2700
+               // The assembler really takes care of all of this, since
2701
+               // the assembler will split the constant if it doesn't fit
2702
+               // into a single instruction.
2703
+               if (dbg) fprintf(stderr, "ZIP-GEN-MOVE/CONST->REG\n");
2704
+               // if ((GET_MODE(dst)==VOIDmode)&&(GET_MODE(src)==VOIDmode))
2705
+                       // PUT_MODE(dst,SImode);
2706
+               emit_insn(gen_movsi_ldi(dst, src));
2707
+       } else if ((REG_P(dst))&&
2708
+                       ((LABEL_P(src))
2709
+                       ||(GET_CODE(src)==SYMBOL_REF)
2710
+                       ||(GET_CODE(src)==LABEL_REF))) {
2711
+               // Load a constant into a register
2712
+               // The assembler really takes care of all of this, since
2713
+               // the assembler will split the constant if it doesn't fit
2714
+               // into a single instruction.
2715
+               if (dbg) fprintf(stderr, "ZIP-GEN-MOVE/LABEL->REG\n");
2716
+               emit_insn(gen_movsi_ldi(dst, src));
2717 111 dgisselq
+       } else if ((REG_P(dst))&&
2718
+                       ((GET_CODE(src)==PLUS)
2719
+                       &&((GET_CODE(XEXP(src,0))==SYMBOL_REF)
2720
+                               ||(GET_CODE(XEXP(src,0))==LABEL_REF))
2721
+                       &&(CONST_INT_P(XEXP(src,1))))) {
2722
+               if (dbg) fprintf(stderr, "ZIP-GEN-MOVE/LABEL+OFFSET->REG\n");
2723
+               if ((INTVAL(XEXP(src,1))>=zip_min_mov_offset)
2724
+                       &&(INTVAL(XEXP(src,1))<=zip_max_mov_offset)) {
2725
+                       emit_insn(gen_movsi_ldi(dst, XEXP(src,1)));
2726
+                       emit_insn(gen_movsi_reg_off(dst, dst, XEXP(src,1)));
2727
+               } else if (can_create_pseudo_p()) {
2728
+                       rtx tmp = gen_reg_rtx(Pmode);
2729
+                       emit_insn(gen_movsi_ldi(tmp, XEXP(src,1)));
2730
+                       emit_insn(gen_movsi_ldi(dst, src));
2731
+                       emit_insn(gen_addsi3(dst,dst,tmp));
2732
+                       return true;
2733
+               } else {
2734
+                       fprintf(stderr, "Cannot move LABEL+OFFSET -> dst w/o pseudo\n");
2735
+                       return false;
2736
+               }
2737
+       } else if (((REG_P(dst))||(SREG_P(dst)))&&(GET_CODE(src) == CONST)) {
2738
+               // if (SREG_P(dst)) dst = gen_raw_REG(SImode,REGNO(XEXP(dst,0))+SUBREG_BYTE(dst));
2739
+               zip_gen_move_rtl(dst, XEXP(src,0));
2740
+       } else if (SMEM_P(dst)) {
2741
+               rtx     addr = XEXP(XEXP(dst,0),0);
2742
+               if (REG_P(addr)) {
2743
+                       zip_gen_move_rtl(
2744
+                               gen_rtx_MEM(SImode, plus_constant(Pmode,addr,
2745
+                                       SUBREG_BYTE(dst),false)),src);
2746
+               } else if ((GET_CODE(addr)==PLUS)
2747
+                               &&(REG_P(XEXP(addr,0)))
2748
+                               &&(CONST_INT_P(XEXP(addr,1)))) {
2749
+                       rtx addreg = XEXP(addr,0);
2750
+                       zip_gen_move_rtl(
2751
+                               gen_rtx_MEM(SImode, plus_constant(Pmode,addreg,
2752
+                                       INTVAL(XEXP(addr,1))+SUBREG_BYTE(dst),
2753
+                                       false)),src);
2754
+               } else fprintf(stderr, "ZIP/Cannot understand SUBREG\n");
2755
+       } else if (SMEM_P(src)) {
2756
+               rtx     addr = XEXP(XEXP(src,0),0);
2757
+               if (REG_P(addr)) {
2758
+                       zip_gen_move_rtl(dst,
2759
+                               gen_rtx_MEM(SImode, plus_constant(Pmode,addr,
2760
+                                       SUBREG_BYTE(src),false)));
2761
+               } else if ((GET_CODE(addr)==PLUS)
2762
+                               &&(REG_P(XEXP(addr,0)))
2763
+                               &&(CONST_INT_P(XEXP(addr,1)))) {
2764
+                       rtx addreg = XEXP(addr,0);
2765
+                       zip_gen_move_rtl(dst,
2766
+                               gen_rtx_MEM(SImode, plus_constant(Pmode,addreg,
2767
+                                       INTVAL(XEXP(addr,1))+SUBREG_BYTE(src),
2768
+                                       false)));
2769
+               } else fprintf(stderr, "ZIP/Cannot understand SUBREG\n");
2770 102 dgisselq
+       } else {
2771
+               fprintf(stderr, "ZIP/No usable move\n");
2772
+               zip_debug_rtx_pfx("TO  : ", dst);
2773
+               zip_debug_rtx_pfx("FROM: ", src);
2774
+               debug_rtx(dst);
2775
+               debug_rtx(src);
2776
+               return false;
2777
+       }
2778
+       if (dbg) fprintf(stderr, "ZIP-GEN-MOVE -- DONE\n");
2779
+       return true;
2780
+}
2781
+
2782
+const char *zip_set_zero_or_one(rtx condition, rtx dst) {
2783 103 dgisselq
+       const bool      dbg = ((ALL_DEBUG_ON)||(false))&&(!ALL_DEBUG_OFF);
2784 102 dgisselq
+       if (dbg) fprintf(stderr, "ZIP::SET-ZERO-OR-ONE\n");
2785
+       if (dbg) zip_debug_rtx_pfx("CND", condition);
2786
+       if (dbg) zip_debug_rtx_pfx("REG", dst);
2787
+       switch(GET_CODE(condition)) {
2788
+       case EQ:        return "LDI\t0,%0\n\tLDILO.Z\t1,%0";
2789
+       case NE:        return "LDI\t0,%0\n\tLDILO.NZ\t1,%0";
2790
+       case LT:        return "LDI\t0,%0\n\tLDILO.LT\t1,%0";
2791
+       case GT:        return "LDI\t0,%0\n\tLDILO.GT\t1,%0";
2792
+       case LE:        return "LDI\t1,%0\n\tLDILO.GT\t0,%0";
2793
+       case GE:        return "LDI\t0,%0\n\tLDILO.GE\t1,%0";
2794
+       case LTU:       return "LDI\t0,%0\n\tLDILO.C\t1,%0";
2795
+       case GTU:       return "LDI\t1,%0\n\tLDILO.C\t0,%0\n\tLDILO.Z\t0,%0";
2796
+       case LEU:       return "LDI\t0,%0\n\tLDILO.C\t1,%0\n\tLDILO.Z\t1,%0";
2797
+       case GEU:       return "LDI\t1,%0\n\tLDILO.C\t0,%0";
2798
+       default:
2799
+               zip_debug_rtx(condition);
2800
+               internal_error("CSTORE Unsupported condition");
2801
+               return NULL;
2802
+       }
2803
+}
2804
+
2805
+const char *zip_binary_movsicc(rtx_code condition, const char *op, const int opno) {
2806
+       static char     result[64] = "";
2807
+       switch(condition) {
2808
+               //
2809
+               // Result already exists in the iffalse register
2810
+               // Can't change it.  Therefore, on the
2811
+               // condition ... move true register to the
2812
+               // destination
2813
+               //
2814
+               case EQ:        sprintf(result, "%s.Z\t%%%d,%%0", op, opno); break;
2815
+               case NE:        sprintf(result, "%s.NZ\t%%%d,%%0", op, opno); break;
2816
+               case LT:        sprintf(result, "%s.LT\t%%%d,%%0", op, opno); break;
2817
+               case GT:        sprintf(result, "%s.GT\t%%%d,%%0", op, opno); break;
2818
+               // .LE doesn't exist on Zip CPU--turn this into two instructions
2819
+               case LE:        sprintf(result, "%s.LT\t%%%d,%%0\n\t%s.Z\t%%%d,%%0", op, opno, op, opno); break;
2820
+               case GE:        sprintf(result, "%s.GE\t%%%d,%%0", op, opno); break;
2821
+               case LTU:       sprintf(result, "%s.C\t%%%d,%%0", op, opno); break;
2822
+               //
2823
+               // .GTU doesn't exist on the Zip CPU either. We also note that
2824
+               // .C will never be set on an equal condition.  Therefore, we
2825
+               // turn this into a XOR.NZ 2,CC, which will set the .C condition
2826
+               // as long as .Z wasn't true.  We then undo this when we're
2827
+               // done.  This is possible since none of these instructions
2828
+               // (LDI/MOV/Lod conditional, nor Xor conditional) will ever set
2829
+               // the condition codes.
2830
+               //
2831
+               // This is obviously not very optimal.  Avoid this by all means
2832
+               // if you can
2833
+               case GTU:       sprintf(result, "XOR.NZ\t2,CC\n%s.C\t%%%d,%%0\n\tXOR.NZ\t2,CC", op, opno); break;
2834
+               // .LEU doesn't exist on Zip CPU either--turn this into another
2835
+               // two instructions
2836
+               case LEU:       sprintf(result, "%s.C\t%%%d,%%0\n\t%s.Z\t%%%d,%%0", op, opno, op, opno); break;
2837
+               //
2838
+               // .GEU doesn't exist on Zip CPU.  Implementing it her is
2839
+               // painful.  We can change the condition codes to make it so,
2840
+               // but the instruction requires the condition codes not be
2841
+               // changed.  Hence, we must change them back if we do so.
2842
+               //
2843
+               // .C will be set on less than but not equal.  Hence !.C will
2844
+               // be true on greater than or equal.
2845
+               case GEU:       sprintf(result, "XOR\t2,CC\n%s.C\t%%%d,%%0\n\tXOR\t2,CC", op, opno); break;
2846
+               default:
2847
+                       internal_error("MOVSICC(BINARY) Unsupported condition");
2848
+                       return NULL;
2849
+       } return result;
2850
+}
2851
+
2852
+const char *zip_tertiary_movsicc(rtx condition, const char *optrue, const char *opfalse) {
2853
+       static  char    result[64] = "";
2854
+       switch(GET_CODE(condition)) {
2855
+               case EQ:        sprintf(result,"%s\t%%3,%%0\n\t%s.Z\t%%2,%%0", opfalse, optrue); break;
2856
+               case NE:        sprintf(result,"%s\t%%3,%%0\n\t%s.NZ\t%%2,%%0", opfalse, optrue); break;
2857
+               case LT:        sprintf(result,"%s\t%%3,%%0\n\t%s.LT\t%%2,%%0", opfalse, optrue); break;
2858
+               case GT:        sprintf(result,"%s\t%%3,%%0\n\t%s.GT\t%%2,%%0", opfalse, optrue); break;
2859
+               // LE doesn't exist on a Zip CPU.  Accomplish this by
2860
+               // reversing the condition: i.e., load the false value into
2861
+               // the register, and the on condition load the true value.
2862
+               case LE:        sprintf(result,"%s\t%%2,%%0\n\t%s.GT\t%%3,%%0", optrue, opfalse); break;
2863
+               case GE:        sprintf(result,"%s\t%%3,%%0\n\t%s.GE\t%%2,%%0", opfalse, optrue); break;
2864
+               case LTU:       sprintf(result,"%s\t%%3,%%0\n\t%s.C\t%%2,%%0", opfalse, optrue); break;
2865
+               //
2866
+               case GTU:       sprintf(result,"%s\t%%2,%%0\n\t%s.C\t%%3,%%0\n\t%s.Z\t%%3,%%0", optrue, opfalse, opfalse); break;
2867
+               case LEU:       sprintf(result,"%s\t%%3,%%0\n\t%s.C\t%%2,%%0\n\t%s.Z\t%%2,%%0", opfalse, optrue, optrue); break;
2868
+               case GEU:       sprintf(result,"%s\t%%2,%%0\n\t%s.C\t%%3,%%0\n", optrue, opfalse); break;
2869
+               default:
2870
+                       internal_error("MOVSICC Unsupported condition");
2871
+                       return NULL;
2872
+       } return result;
2873
+}
2874
+
2875
+const char *zip_movsicc(rtx dst, rtx condition, rtx iftrue, rtx iffalse) {
2876 103 dgisselq
+       const bool      dbg = ((ALL_DEBUG_ON)||(false))&&(!ALL_DEBUG_OFF);
2877 102 dgisselq
+       if (dbg) fprintf(stderr, "ZIP::MOVSICC\n");
2878
+       if (dbg) zip_debug_rtx_pfx("DST", dst);
2879
+       if (dbg) zip_debug_rtx_pfx("CND", condition);
2880
+       if (dbg) zip_debug_rtx_pfx("TRU", iftrue);
2881
+       if (dbg) zip_debug_rtx_pfx("FAL", iffalse);
2882
+       if ((REG_P(iftrue))&&(REGNO(dst)==REGNO(iftrue))) {
2883
+               if (dbg) fprintf(stderr, "ZIP::MOVSICC -- CASE if(X) -> R\n");
2884
+               if (zip_legitimate_move_operand_p(SImode, iffalse, true))
2885
+                       return zip_binary_movsicc(reverse_condition(GET_CODE(condition)), "MOV", 3);
2886
+               else if (zip_const_address_operand(iffalse))
2887
+                       return zip_binary_movsicc(reverse_condition(GET_CODE(condition)), "LDI", 3);
2888
+               else if (zip_const_address_operand(iffalse))
2889
+                       return zip_binary_movsicc(reverse_condition(GET_CODE(condition)), "LDI", 3);
2890 111 dgisselq
+               else if ((MEM_P(iffalse))&&(zip_legitimate_opb(XEXP(iffalse,0), true)))
2891 102 dgisselq
+                       return zip_binary_movsicc(reverse_condition(GET_CODE(condition)), "LOD", 3);
2892
+               else {
2893
+                       internal_error("MOVSICC Unsupported mode");
2894
+                       return NULL;
2895
+               }
2896
+       } if ((REG_P(iftrue))&&(REGNO(dst)==REGNO(iftrue))) {
2897
+               if (dbg) fprintf(stderr, "ZIP::MOVSICC -- CASE if(!X) -> R\n");
2898
+               if (zip_legitimate_move_operand_p(SImode, iftrue, true))
2899
+                       return zip_binary_movsicc(GET_CODE(condition), "MOV",2);
2900
+               else if (zip_const_address_operand(iffalse))
2901
+                       return zip_binary_movsicc(GET_CODE(condition), "LDI",2);
2902
+               else if (zip_const_address_operand(iffalse))
2903
+                       return zip_binary_movsicc(GET_CODE(condition), "LDI",2);
2904 111 dgisselq
+               else if ((MEM_P(iffalse))&&(zip_legitimate_opb(XEXP(iffalse,0), true)))
2905 102 dgisselq
+                       return zip_binary_movsicc(GET_CODE(condition), "LOD",2);
2906
+               else {
2907
+                       internal_error("MOVSICC Unsupported mode");
2908
+                       return NULL;
2909
+               }
2910
+       } if ((zip_const_address_operand(iftrue))&&(zip_const_address_operand(iffalse))) {
2911
+               if (dbg) fprintf(stderr, "ZIP::MOVSICC -- IF(X) #1 ELSE #2\n");
2912
+               return zip_tertiary_movsicc(condition, "LDI", "LDI");
2913
+       } if ((zip_const_address_operand(iftrue))&&(zip_legitimate_move_operand_p(SImode, iffalse, true))) {
2914
+               if (dbg) fprintf(stderr, "ZIP::MOVSICC -- IF(X) #1 ELSE A+B\n");
2915
+               return zip_tertiary_movsicc(condition, "LDI", "MOV");
2916
+       } if ((zip_legitimate_move_operand_p(SImode, iftrue, true))&&(zip_const_address_operand(iffalse))) {
2917
+               if (dbg) fprintf(stderr, "ZIP::MOVSICC -- IF(X) A+B ELSE #x\n");
2918
+               return zip_tertiary_movsicc(condition, "MOV", "LDI");
2919
+       } if ((zip_legitimate_move_operand_p(SImode, iftrue, true))
2920
+                       &&(zip_legitimate_move_operand_p(SImode, iffalse, true))) {
2921
+               if (dbg) fprintf(stderr, "ZIP::MOVSICC -- IF(X) A+B ELSE C+D\n");
2922
+               return zip_tertiary_movsicc(condition, "MOV", "MOV");
2923
+       }
2924
+       if ((MEM_P(iftrue))
2925 111 dgisselq
+               &&(zip_legitimate_opb(XEXP(iftrue,0), true))
2926 102 dgisselq
+               &&(zip_legitimate_move_operand_p(SImode, iffalse, true))) {
2927
+               if (dbg) fprintf(stderr, "ZIP::MOVSICC -- IF(X) A[B] ELSE C+D\n");
2928
+               return zip_tertiary_movsicc(condition, "LOD", "MOV");
2929
+       } if ((zip_legitimate_move_operand_p(SImode, iftrue, true))
2930 111 dgisselq
+               &&(MEM_P(iffalse))&&(zip_legitimate_opb(XEXP(iffalse,0), true))) {
2931 102 dgisselq
+               if (dbg) fprintf(stderr, "ZIP::MOVSICC -- IF(X) A+B ELSE C[D]\n");
2932
+               return zip_tertiary_movsicc(condition, "MOV", "LOD");
2933 111 dgisselq
+       } if ((MEM_P(iftrue))&&(zip_legitimate_opb(XEXP(iftrue,0), true))
2934
+               &&(MEM_P(iffalse))&&(zip_legitimate_opb(XEXP(iffalse,0), true))) {
2935 102 dgisselq
+               if (dbg) fprintf(stderr, "ZIP::MOVSICC -- IF(X) A[B] ELSE C[D]\n");
2936
+               return zip_tertiary_movsicc(condition, "LOD", "LOD");
2937 111 dgisselq
+       } if ((MEM_P(iftrue))
2938
+               &&(zip_legitimate_opb(XEXP(iftrue,0),true))
2939
+               &&(zip_const_address_operand(iffalse))) {
2940
+               if (dbg) fprintf(stderr, "ZIP::MOVSICC -- IF(X) A[B] ELSE #x\n");
2941
+               return zip_tertiary_movsicc(condition, "LOD", "LDI");
2942
+       } if ((MEM_P(iffalse))
2943
+               &&(zip_legitimate_opb(XEXP(iffalse,0),true))
2944
+               &&(zip_const_address_operand(iftrue))) {
2945
+               if (dbg) fprintf(stderr, "ZIP::MOVSICC -- IF(X) #x ELSE A[B]\n");
2946
+               return zip_tertiary_movsicc(condition, "LDI", "LOD");
2947 102 dgisselq
+       }
2948
+
2949
+       internal_error("MOVSICC Operands not supported");
2950
+}
2951
+
2952
+const char *zip_addsicc(rtx dst, rtx condition, rtx ifsrc, rtx addv ATTRIBUTE_UNUSED) {
2953
+       // We know upon entry that REG_P(dst) must be true
2954
+       if (!REG_P(dst))
2955
+               internal_error("%s","ADDSICC into something other than register");
2956
+       if ((REG_P(ifsrc))&&(REGNO(dst)==REGNO(ifsrc))) {
2957
+               switch (GET_CODE(condition)) {
2958
+               case EQ: return "ADD.Z\t%3,%0";
2959
+               case NE: return "ADD.NZ\t%3,%0";
2960
+               case LT: return "ADD.LT\t%3,%0";
2961
+               case GT: return "ADD.GT\t%3,%0";
2962
+               case LE: return "ADD.LT\t%3,%0\n\tADD.Z\t%3,%0";
2963
+               case GE: return "ADD.GE\t%3,%0";
2964
+               case LTU: return "ADD.C\t%3,%0";
2965
+               case LEU: return "ADD.C\t%3,%0\n\tADD.Z\t%3,%0";
2966
+               case GEU: return "XOR\t2,CC\n\tADD.C\t%3,%0\n\tXOR\t2,CC";
2967
+               // Can do a GEU comparison, and then undo on the Zero condition
2968
+               case GTU: return "XOR\t2,CC\n\tADD.C\t%3,%0\n\tSUB.Z\t%3,%0\n\tXOR\t2,CC";
2969
+               default:
2970
+                       internal_error("%s", "Zip/No usable addsi expansion");
2971
+                       break;
2972
+               }
2973
+       } else {
2974
+               // MOV A+REG,REG
2975
+               switch (GET_CODE(condition)) {
2976
+               case EQ: return "MOV.Z\t%3+%2,%0";
2977
+               case NE: return "MOV.NZ\t%3+%2,%0";
2978
+               case LT: return "MOV.LT\t%3+%2,%0";
2979
+               case GT: return "MOV.GT\t%3+%2,%0";
2980
+               case LE: return "MOV.LT\t%3+%2,%0\n\tMOV.Z\t%3+%2,%0";
2981
+               case GE: return "MOV.GE\t%3+%2,%0";
2982
+               case LTU: return "MOV.C\t%3+%2,%0";
2983
+               case LEU: return "MOV.C\t%3+%2,%0\n\tMOV.Z\t%3+%2,%0";
2984
+               case GEU: return "XOR\t2,CC\n\tMOV.C\t%3+%2,%0\n\tXOR\t2,CC";
2985
+               // Can do a GEU comparison, and then undo on the Zero condition
2986
+               // EXCEPT: with a move instruction, what's there to undo?  We
2987
+               // just clobbered our register!
2988
+               // case GTU: return "XOR\t2,CC\n\tMOV.C\t%3,%0\n\tSUB.Z\t%3,%0XOR\t2,CC";
2989
+               default:
2990
+                       internal_error("%s", "Zip/No usable addsi(reg,reg) expansion");
2991
+                       break;
2992
+               }
2993
+       }
2994
+
2995
+       return "BREAK";
2996
+}
2997
+
2998 103 dgisselq
+static int     zip_memory_move_cost(machine_mode mode, reg_class_t ATTRIBUTE_UNUSED, bool in ATTRIBUTE_UNUSED) {
2999 102 dgisselq
+       int     rv = 14;
3000
+       if ((mode == DImode)||(mode == DFmode))
3001
+               rv += 2;
3002
+       return rv;
3003
+}
3004
+
3005 103 dgisselq
+// #warning "How do we tell the compiler LDI label is expensive as 2 ops"?
3006 102 dgisselq
+
3007
diff -Naur '--exclude=*.swp' gcc-5.3.0-original/gcc/config/zip/zip.h gcc-5.3.0-zip/gcc/config/zip/zip.h
3008
--- gcc-5.3.0-original/gcc/config/zip/zip.h     1969-12-31 19:00:00.000000000 -0500
3009 111 dgisselq
+++ gcc-5.3.0-zip/gcc/config/zip/zip.h  2016-03-19 12:03:33.888255495 -0400
3010
@@ -0,0 +1,3889 @@
3011 102 dgisselq
+////////////////////////////////////////////////////////////////////////////////
3012
+//
3013
+// Filename:   gcc/config/zip/zip.h
3014
+//
3015
+// Project:    Zip CPU backend for the GNU Compiler Collection
3016
+//
3017
+// Purpose:
3018
+//
3019
+// Creator:    Dan Gisselquist, Ph.D.
3020
+//             Gisselquist Technology, LLC
3021
+//
3022
+////////////////////////////////////////////////////////////////////////////////
3023
+//
3024
+// Copyright (C) 2016, Gisselquist Technology, LLC
3025
+//
3026
+// This program is free software (firmware): you can redistribute it and/or
3027
+// modify it under the terms of  the GNU General Public License as published
3028
+// by the Free Software Foundation, either version 3 of the License, or (at
3029
+// your option) any later version.
3030
+//
3031
+// This program is distributed in the hope that it will be useful, but WITHOUT
3032
+// ANY WARRANTY; without even the implied warranty of MERCHANTIBILITY or
3033
+// FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
3034
+// for more details.
3035
+//
3036
+// You should have received a copy of the GNU General Public License along
3037
+// with this program.  (It's in the $(ROOT)/doc directory, run make with no
3038
+// target there if the PDF file isn't present.)  If not, see
3039
+// <http://www.gnu.org/licenses/> for a copy.
3040
+//
3041
+// License:    GPL, v3, as defined and found on www.gnu.org,
3042
+//             http://www.gnu.org/licenses/gpl.html
3043
+//
3044
+//
3045
+////////////////////////////////////////////////////////////////////////////////
3046
+#ifndef        GCC_ZIP_H
3047
+#define        GCC_ZIP_H
3048
+
3049
+
3050
+//
3051
+//
3052
+// Zip CPU configuration registers
3053
+//
3054
+//
3055
+#define        ZIP_USER        0        // Assume we are in supervisor mode
3056
+#define        ZIP_MULTIPLY    1       // Assume we have multiply instructions
3057
+#define        ZIP_DIVIDE      1       // Assume we have divide instructions
3058
+#define        ZIP_FPU         0        // Assume we have no floating point instructions
3059
+#define        ZIP_PIPELINED   1       // Assume our instructions are pipelined
3060
+#define        ZIP_VLIW        1       // Assume we have the VLIW feature
3061
+#define        ZIP_ATOMIC      ((ZIP_PIPELINED)&&(ZIP_VLIW))
3062
+#define        ZIP_PIC         0        // Attempting to produce PIC code, with GOT
3063
+#define        ZIP_HAS_DI      1
3064
+
3065
+// Zip has 16 registers in each user mode.
3066
+//     Register 15 is the program counter (PC)
3067
+//     Register 14 is the condition codes (CC)
3068
+//     Register 13 is the stack pointer   (SP)
3069
+//     Register 12 (may be) the Global Offset Table pointer (GOT)
3070
+//     Register  0 (may be) the return address pointer
3071
+// Registers 16-31 may only be used in supervisor mode.
3072
+#define        is_ZIP_GENERAL_REG(REGNO)       ((REGNO)<13)
3073
+#define        is_ZIP_REG(REGNO)               ((REGNO)<16)
3074
+
3075 103 dgisselq
+// #define     zip_FP_PSEUDO   16
3076
+#define        zip_PC          15
3077
+#define        zip_CC          14
3078
+#define        zip_SP          13
3079
+#define        zip_FP          12
3080
+#define        zip_GOT         11
3081
+#define        zip_AP          10
3082
+#define        zip_R1          1
3083
+#define        zip_R0          0
3084 102 dgisselq
+
3085
+#define        ZIP_FIRST_ARG_REGNO     1
3086
+#define        ZIP_LAST_ARG_REGNO      5
3087 111 dgisselq
+#define        NUM_ARG_REGS            (ZIP_LAST_ARG_REGNO-ZIP_FIRST_ARG_REGNO+1)
3088
+#define        MAX_PARM_REGS           (ZIP_LAST_ARG_REGNO-ZIP_FIRST_ARG_REGNO+1)
3089 102 dgisselq
+
3090
+/* The overall framework of an assembler file */
3091
+
3092
+#define        ASM_COMMENT_START       ";"
3093
+#define        ASM_APP_ON              ""
3094
+#define        ASM_APP_OFF             ""
3095
+
3096
+#define        FILE_ASM_OP             "\t.file\n"
3097
+
3098
+/* Output and Generation of Labels */
3099
+#define        GLOBAL_ASM_OP           "\t.global\t"
3100
+
3101
+#undef BITS_PER_UNIT
3102
+#define        BITS_PER_UNIT   (32)
3103
+
3104
+/* Assembler Commands for Alignment */
3105
+#define        ASM_OUTPUT_ALIGN(STREAM,POWER)  \
3106
+               { int pwr = POWER; fprintf(STREAM, "\t.p2align %d\n", (pwr<2)?2:pwr); }
3107
+
3108
+
3109
+/* A C compound statement to output to stdio stream STREAM the assembler syntax
3110
+ * for an instruction operand X. */
3111
+#define        PRINT_OPERAND(STREAM, X, CODE)  zip_print_operand(STREAM, X, CODE)
3112
+#define        PRINT_OPERAND_ADDRESS(STREAM, X) zip_print_operand_address(STREAM, X)
3113
+
3114
+/* Passing arguments in registers */
3115
+#define        FUNCTION_VALUE_REGNO_P(REGNO)   ((REGNO)==zip_R1)
3116
+
3117
+/* Define how to find the value returned by a function.  VALTYPE is the data
3118
+ * type of the value (as a tree).  If the precise function being called is known
3119
+ * FUNC is its FUNCTION_DECL; otherwise, FUNC is 0. */
3120
+#define        FUNCTION_VALUE(VALTYPE, FUNC) gen_rtx_REG(TYPE_MODE(VALTYPE), zip_R1)
3121
+
3122
+/* Define how to find the value returned by a library function assuming the
3123
+ * value has mode MODE.
3124
+ */
3125
+#define        LIBCALL_VALUE(MODE)     gen_rtx_REG(MODE, zip_R1)
3126
+
3127
+
3128
+/* STACK AND CALLING */
3129
+
3130
+
3131
+/* Define this macro as a C expression that is nonzero for registers that are
3132
+ * used by the epilogue or the return pattern.  The stack and frame pointer
3133
+ * registers are already assumed to be used as needed.
3134
+ */
3135
+#define        EPILOGUE_USES(R)        (R == RETURN_ADDRESS_REGNUM)
3136
+
3137
+
3138
+/* Normal alignment required for function parameters on the stack, in bits.  All
3139
+ * stack parameters receive at leaswt this much alignment regardless of data
3140
+ * type. */
3141
+#define        PARM_BOUNDARY   32
3142
+
3143
+/* Alignment of field after 'int : 0' in a structure. */
3144
+#define        EMPTY_FIELD_BOUNDARY    32
3145
+
3146
+/* No data type wants to be aligned rounder than this. */
3147
+#define        BIGGEST_ALIGNMENT       32
3148
+
3149
+/* The best alignment to use in cases where we have a choice. */
3150
+#define        FASTEST_ALIGNMENT       32
3151
+
3152
+/* Every structures size must be a multiple of 32-bits. */
3153
+#define        STRUCTURE_SIZE_BOUNDARY 32
3154
+
3155
+/* PCC_BITFIELD_TYPE_MATTERS -- define this if you wish to imitate the the way
3156
+ * other C compilers handle alignment of bit-fields and the structures that
3157
+ * contain them.
3158
+ *
3159
+ * The behavior is that the type written for a named bit-field (int, short, or
3160
+ * other integer type) imposes an alignment for the entire structure, as if the
3161
+ * structure really did contain an ordinary field of that type.  In addition,
3162
+ * the bit-field is placed within the structure so that it would fit within
3163
+ * such a field, not crossing a boundary for it.
3164
+ *
3165
+ * Thus, no most machines, a named bit-field whose type is written as int would
3166
+ * not cross a four-byte boundary, and would force four-byte alignment for the
3167
+ * whole structure.  (The alignment used may not be four bytes; it is controlled
3168
+ * by other alignment parameters.)
3169
+ *
3170
+ * An unnamed bit-field will not affect the alignment of the containing
3171
+ * structure.
3172
+ *
3173
+ * If thhe macro is defined, its definition should be a C expression, a non
3174
+ * zero value for the expression enables this behavior.
3175
+ * Look at the fundamental type that is used for a bit-field and use that to
3176
+ * impose alignment on the enclosing structure.  struct s{int a:8}; should
3177
+ * have the same alignment as 'int', not 'char'.
3178
+ */
3179
+#undef PCC_BITFIELD_TYPE_MATTERS
3180
+#define        PCC_BITFIELD_TYPE_MATTERS       0
3181
+
3182
+/* MAX_FIXED_MODE_SIZE -- An integer expression for the size in bits of the
3183
+ * largest integer machine mode that should actually be used.  All integer
3184
+ * machine modes of this size and smaller can be used for structures and unions
3185
+ * with the appropriate sizes.  If this macro is undefined,
3186
+ * GET_MODE_BITSIZE(DImode) is assumed.
3187
+ *
3188
+ * ZipCPU -- The default looks good enough for us.
3189
+ */
3190
+
3191
+/* Make strings word-aligned so strcpy from constants will be faster. */
3192
+#define        CONSTANT_ALIGNMENT(EXP, ALIGN)  (((TREE_CODE(EXP)==STRING_CST)  \
3193
+       && ((ALIGN) < FASTEST_ALIGNMENT)) ? FASTEST_ALIGNMENT : (ALIGN))
3194
+
3195
+/* Make arrays of chars word-aligned for the same reasons. */
3196
+#define        DATA_ALIGNMENT(TYPE, ALIGN)     ((TREE_CODE(TYPE) == ARRAY_TYPE) \
3197
+       && (TYPE_MODE(TREE_TYPE(TYPE)) == QImode)               \
3198
+       && ((ALIGN < FASTEST_ALIGNMENT) ? FASTEST_ALIGNMENT : (ALIGN)))
3199
+
3200
+/* Generate Code for Profiling
3201
+ */
3202
+#define        FUNCTION_PROFILER(FILE,LABELNO)         (abort(), 0)
3203
+
3204
+
3205
+/* A C expression which is nonzero if register number NUM is suitable for use
3206
+ * as an index register in operand addresses.
3207
+ */
3208
+#define        REGNO_OK_FOR_INDEX_P(NUM)       0
3209
+
3210
+
3211
+/* A C compound statement with a conditional 'goto LABEL;' executed if X
3212
+ * (an RTX) is a legitimate memory address on the target machine for a memory
3213
+ * operand of mode MODE.
3214
+ */
3215 111 dgisselq
+/* 17.03 Controlling the Compilation Driver, 'gcc' */
3216
+// DRIVER_SELF_SPECS
3217
+// OPTION_DEFAULT_SPECS
3218
+// CPP_SPEC
3219
+// CPLUSPLUS_CPP_SPEC
3220
+// CC1_SPEC
3221
+// CC1PLUS_SPEC
3222
+/* ASM_SPEC ... A C string constant that tells the GCC driver program options
3223
+ * to pass to the assembler.  It can also specify how to translate options you
3224
+ * give to GCC into options for GCC to pass to the assembler.  See the file
3225
+ * 'sun3.h' for an example of this.
3226
+ *
3227
+ * Do not define thismacro if it does not need to do anything.
3228
+ */
3229
+// #undef      ASM_SPEC
3230
+// ASM_FINAL_SPEC
3231
+// ASM_NEEDS_DASH_FOR_PIPED_INPUT
3232
+
3233
+/* LINK_SPEC ... A C string constant that tells the GCC driver program options
3234
+ * to pass to the linker.  It can also specify how to translate options you give
3235
+ * to GCC into options for GCC to pass to the linker.
3236
+ *
3237
+ * Do not define this macro if it does not need to do anything.
3238
+ */
3239
+
3240
+/* LIB_SPEC ... Another C string constant very much like LINK_SPEC.  The
3241
+ * difference between the two is that LIB_SPEC is used at the end of the
3242
+ * command given to the linker.
3243
+ *
3244
+ * If this macro is not defined, a default is provided that loads the standard
3245
+ * C library from the usual place.  See 'gcc.c'.
3246
+ */
3247
+#undef LIB_SPEC
3248
+// #define     LIB_SPEC        "%{!g:-lc} %{g:-lg} -lzip"
3249
+#define        LIB_SPEC        ""
3250
+
3251
+/* LIBGCC_SPEC ... Another C string constant that tells the GCC driver program
3252
+ * hoow and when to place a reference to 'libgcc.a' into the linker command
3253
+ * line.  This constant is placed both before and after the value of LIB_SPEC.
3254
+ *
3255
+ * If this macro is not defined, the GCC driver provides a default that passes
3256
+ * the string '-lgcc' to the linker.
3257
+ */
3258
+#undef LIBGCC_SPEC
3259
+#define        LIBGCC_SPEC     ""
3260
+
3261
+/* REAL_LIBGCC_SPEC ... By default, if ENABLE_SHARED_LIBGCC is defined, the
3262
+ * LIBGCC_SPEC is not directly used by the driver program but is instead
3263
+ * modified to refer to different versions of 'libgcc.a' depending on the
3264
+ * values of the command line flags '-static', '-shared', '-static-libgcc',
3265
+ * and '-shared-libgcc'.  On targets where these modifications are
3266
+ * inappropriate, define REAL_LIBGCC_SPEC instead.  REAL_LIBGCC_SPEC tells the
3267
+ * driver how to place a reference to 'libgcc' on the link command line, but
3268
+ * unlike LIBGCC_SPEC, it is used unmodified.
3269
+ */
3270
+#define        REAL_LIBGCC_SPEC        ""
3271
+
3272
+// USE_LD_AS_NEEDED
3273
+// LINK_EH_SPEC
3274
+
3275
+/* STARTFILE_SPEC ... Another C string constant used much like LINK_SPEC.  The
3276
+ * difference between the two is that STARTFILE_SPEC is used at the very
3277
+ * beginning of the command given to the linker.
3278
+ *
3279
+ * If this macro is not defined, a default is provided that loads the standard
3280
+ * C startup file from the usual place.  See 'gcc.c'
3281
+ */
3282
+#undef STARTFILE_SPEC
3283
+#define        STARTFILE_SPEC  ""
3284
+
3285
+/* ENDFILE_SPEC ... Another C string constant used much like LINK_SPEC.  The
3286
+ * difference between the two is that ENDFILE_SPEC is used at the very end
3287
+ * of the command given to the linker.
3288
+ *
3289
+ * Do not define this macro if it does not do anything.
3290
+ */
3291
+// #undef      ENDFILE_SPEC
3292
+// #define     ENDFILE_SPEC    ""
3293
+
3294
+// THREAD_MODEL_SPEC
3295
+// SYSROOT_SUFFIX_SPEC
3296
+// SYSROOT_HEADERS_SUFFIX_SPEC
3297
+// EXTRA_SPECS
3298
+// LINK_LIBGCC_SPECIAL_1
3299
+// LINK_GCC_C_SEQUENCE_SPEC
3300
+// LINK_COMMAND_SPEC
3301
+// TARGET_ALWAYS_STRIP_DOTDOT
3302
+// MULTILIB_DEFAULTS
3303
+// RELATIVE_PREFIX_NOT_LINKDIR
3304
+// MD_EXEC_PREFIX
3305
+// STANDARD_STARTFILE_PREFIX
3306
+// STANDARD_STARTFILE_PREFIX_1
3307
+// STANDARD_STARTFILE_PREFIX_2
3308
+// MD_STARTFILE_PREFIX
3309
+// MD_STARTFILE_PREFIX_1
3310
+// INIT_ENVIRONMENT
3311
+// LOCAL_INCLUDE_DIR
3312
+#undef LOCAL_INCLUDE_DIR
3313
+
3314
+// NATIVE_SYSTEM_HEADER_COMPONENT
3315
+// INCLUDE_DEFAULTS
3316
+
3317 102 dgisselq
+/* 17.03 Run-time Target Specification */
3318
+
3319
+/* TARGET_CPU_CPP_BUILTINS() ... This function-like macro expands to a block of
3320
+ * code that defines built-in preprocessor macros and assertions for the target
3321
+ * CPU, using the functions builtin_define, builtin_define_std, and
3322
+ * builtin_assert.  When the front end calls this macro it provides a trailing
3323
+ * semicolon, and since it has finished command line option proccessing your
3324
+ * code can use those results freely.
3325
+ *
3326
+ * ZipCPU --- We should probably capture in this macro what capabilities the
3327
+ * command line parameters we've been given indicate that our CPU has.  That
3328
+ * way, code can be adjusted depending upon the CPU's capabilities.
3329
+ */
3330
+#define        TARGET_CPU_CPP_BUILTINS()                       \
3331
+       { builtin_define("__ZIPCPU__");                 \
3332
+       if (ZIP_FPU) builtin_define("__ZIPFPU__");      \
3333
+       if (ZIP_ATOMIC) builtin_define("__ZIPATOMIC__");        \
3334
+       }
3335
+       // If (zip_param_has_fpu)  builtin_define("__ZIPFPU__");
3336
+       // If (zip_param_has_div)  builtin_define("__ZIPDIV__");
3337
+       // If (zip_param_has_mpy)  builtin_define("__ZIPMPY__");
3338
+       // If (zip_param_has_lock) builtin_define("__ZIPLOCK__");
3339
+       // If (zip_param_supervisor) builtin_define("__ZIPUREGS__");
3340
+       // If (we support int64s) builtin_define("___int64_t_defined");
3341
+
3342
+/* TARGET_OS_CPP_BUILTINS() ... Similarly to TARGET_CPU_CPP_BUILTINS but this
3343
+ * macro is optional and is used for the target operating system instead.
3344
+ */
3345
+
3346
+/* Option macros: (we need to define these eventually ... )
3347
+ *
3348
+ *     TARGET_HANDLE_OPTION
3349
+ *     TARGET_HANDLE_C_OPTION
3350
+ *     TARGET_OBJ_CONSTRUCT_STRING_OBJECT
3351
+ *     TARGET_OBJ_DECLARE_UNRESOLVED_CLASS_REFERENCE
3352
+ *     TARGET_OBJ_DECLARE_CLASS_DEFINITION
3353
+ *     TARGET_STRING_OBJECT_REF_TYPE_P
3354
+ *     TARGET_CHECK_STRING_OBJECT_FORMAT_ARG
3355
+ *     TARGET_OVERRIDE_OPTIONS_AFTER_CHANGE(VOID)
3356
+ *     C_COMMON_OVERRIDE_OTPTIONS
3357
+ *     TARGET_OPTION_OPTIMIZATION_TABLE
3358
+ *     TARGET_OPTION_INIT_STRUCT
3359
+ *     TARGET_OPTION_DEFAULT_PARAMS
3360
+ */
3361
+
3362
+/* SWITCHABLE_TARGET
3363
+ *
3364
+ * Zip CPU doesn't need this, so it defaults to zero.  No need to change it
3365
+ * here.
3366
+ */
3367
+
3368
+/* TARGET_FLOAT_EXCEPTIONS_ROUNDING_SUPPORTED_P(VOID) ... Returns true if the
3369
+ * target supports IEEE 754 floating-point exceptions and rounding modes, false
3370
+ * otherwise.  This is intended to relate to the float and double types, but not
3371
+ * necessarily "long double".  By default, returns true if the adddf3
3372
+ * instruction pattern is available and false otherwise, on the assumption that
3373
+ * hardware floating point supports exceptions and rounding modes but software
3374
+ * floating point does not.
3375
+ *
3376
+ * ZipCPU floating point is barely going to be functional, I doubt it will
3377
+ * support all of these bells and whistles when full functionality is even
3378
+ * achieved.  Therefore, we won't support these modes.  However, we can't just
3379
+ * set this to zero, so let's come back to this.
3380
+ */
3381
+// #warning "Wrong answer encoded to date"
3382 103 dgisselq
+// #undef      TARGET_FLOAT_EXCEPTIONS_ROUNDING_SUPPORTED_P
3383 102 dgisselq
+// #define     TARGET_FLOAT_EXCEPTIONS_ROUNDING_SUPPORTED_P(X) 0
3384
+
3385
+/* 17.04 Defining data structures for per-function information */
3386
+
3387
+/* INIT_EXPANDERS ... Macro called to initialize any target specific
3388
+ * information.  This macro is called once per function, before generation of
3389
+ * any RTL has begun.  The intention is to allow the initialization of the
3390
+ * function pointer init_machine_status.
3391
+ */
3392
+// #warning "I may need to define this to handle function return addresses ..."
3393
+
3394
+/* 17.05 Storage Layout */
3395
+
3396
+/* Storage Layout */
3397
+#define        BITS_BIG_ENDIAN         0        // MSB has highest number
3398
+#define        BYTES_BIG_ENDIAN        1       // 1 if MSB is lowest number
3399
+#define        WORDS_BIG_ENDIAN        1       // 1 if MSW is lowest number
3400
+#define        FLOAT_WORDS_BIG_ENDIAN  1
3401
+#define        BITS_PER_WORD           32
3402
+// #define     MAX_BITS_PER_WORD       // defaults to BITS_PER_WORD
3403
+#define        UNITS_PER_WORD          1       // Storage units in a word, pwr of 2:1-8
3404
+#define        MIN_UNITS_PER_WORD      1       // Default is UNITS_PER_WORD
3405
+/* POINTER_SIZE ... Width of a pointer in bits.  You must specify a value no
3406
+ * wider than the width of Pmode.  If it is not equal to the width of Pmode,
3407
+ * you must define POINTERS_EXTEND_UNSIGNED. If you do not specify a value the
3408
+ * default is BITS_PER_WORD.
3409
+ *
3410
+ * ZipCPU --- All of our pointers are 32-bits, the width of our address bus.
3411
+ */
3412
+#define        POINTER_SIZE            32      // Ptr width in bits
3413
+/* POINTERS_EXTEND_UNSIGNED ... A C expression that determines how pointers
3414
+ * should be extended from ptr_mode to either Pmode or word_mode.  It is greater
3415
+ * than zero if pointers should be zero-extended, zero if they should be sign
3416
+ * extended, and negative if some other conversion is needed.  In the last case,
3417
+ * the extension is done by the target's ptr_extend instruction.
3418
+ *
3419
+ * You need not define this macro if the ptr_mode, Pmode, and word_mode are all
3420
+ * the same width.
3421
+ *
3422
+ * ZipCPU --- While we shouldn't need this, QImode and HImode have the same
3423
+ * number of bits as SImode.  Therefore, one might wish to convert between the
3424
+ * two.  Hence, we specify how we would do that here.
3425
+ */
3426
+#define        POINTERS_EXTEND_UNSIGNED        0
3427
+
3428
+/* PROMOTE_MODE(m,unsignedp,type) ... A macro to update m and unsignedp when an
3429
+ * object whose type is type and which has he specified mode and signedness is
3430
+ * to be stored in a register.  This macro is only called when type is a scalar
3431
+ * type.
3432
+ *
3433
+ * On most RISC machines, which only have operations that operate on a full
3434
+ * register, define this macro to set m to word_mode if m is an integer mode
3435
+ * narrower than BITS_PER_WORD.  In most cases, only integer modes should be
3436
+ * widened because wider precision floating-point operations are usually more
3437
+ * expensive than their narrower counterparts.
3438
+ *
3439
+ * For most machines, the macro definition does not change unsigndep.  However,
3440
+ * some machines, have instructions that preferentially handle either signed or
3441
+ * unsigned quantities of certain modes.  For example, on the DEC Alpha, 32-bit
3442
+ * loads from memory and 32-bit add instructions sign-extend the result to
3443
+ * 64-bits. On such machines, set unsignedp according to which kind of extension
3444
+ * is more efficient.
3445
+ *
3446
+ * Do not define this macro if it would never modify m.
3447
+ *
3448
+ * ZipCPU --- We need to always (if possible) promote everything to SImode where
3449
+ * we can handle things.  HImode and QImode just don't make sense on this CPU.
3450
+ */
3451
+#define        PROMOTE_MODE(M,U,T)     if ((GET_MODE_CLASS(M)==MODE_INT)&&(GET_MODE_SIZE(M)<2)) (M)=SImode;
3452
+
3453
+// TARGET_PROMOTE_FUNCTION_MODE
3454
+/* PARM_BOUNDARY ... Normal alignment required for function parameters on the
3455
+ * stack, in bits.  All stack parameters receive at least this much alignment
3456
+ * regardless of data type.  On most machines, this is the same as the size of
3457
+ * an integer.
3458
+ */
3459
+#define        PARM_BOUNDARY   32
3460
+
3461
+/* STACK_BOUNDARY ... Define this macro to the minimum alignment enforced by
3462
+ * hardware for the stack pointer on this machine.  The definition is a C
3463
+ * expression for the desired alignment (measured in bits).  This value is used
3464
+ * as a default if PREFERRED_STACK_BOUNDARY is not defined.  On most machines,
3465
+ * this should be the same as PARM_BOUNDARY.
3466
+ */
3467
+#define        STACK_BOUNDARY  PARM_BOUNDARY
3468
+
3469
+/* PREFERRED_STACK_BOUNDARY ... Define this ... */
3470
+
3471
+/* INCOMING_STACK_BOUNDARY
3472
+ */
3473
+
3474
+/* FUNCTION_BOUNDARY ... Alignment required for a function entry point, in bits.
3475
+ */
3476
+#define        FUNCTION_BOUNDARY       32
3477
+
3478
+/* BIGGEST_ALIGNMENT ... Biggest alignment that any data type can require on
3479
+ * this machine, in bits.  Note that this is not the biggest alignment that is
3480
+ * supported, just the biggest alignment that, when violated, may cause a fault.
3481
+ */
3482
+#define BIGGEST_ALIGNMENT      32
3483
+
3484
+/* MINIMUM_ATOMIC_ALIGNMENT ... If defined, the smallest alignment, that can be
3485
+ * given to an object that can be referenced in one operation, without
3486
+ * disturbing any nearby object.  Normally, this is BITS_PER_UNIT, but may be
3487
+ * larger on machines that don't have byte or halfword store operations.
3488
+ */
3489
+#define        MINIMUM_ATOMIC_ALIGNMENT        BITS_PER_UNIT
3490
+
3491
+/* STRICT_ALIGNMENT ... Set this nonzero if move instructions will actually
3492
+ * fail to work when given unaligned data.  If instructions will merely go
3493
+ * slower in that case, define this macro as 0.
3494
+ */
3495
+#define        STRICT_ALIGNMENT        1
3496
+
3497
+/* MAX_FIXED_MODE_SIZE ... An integer expression for the size in bits of the
3498
+ * largest integer machine mode that should actually be used.  All integer
3499
+ * machine modes of this size or smaller can be used for structures and unions
3500
+ * with the appropriate sizes.  If this macro is undefined,
3501
+ * GET_MODE_BITSIZE(DImode) is assumed.
3502
+ *
3503
+ * ZipCPU ... Get_MOD_BITSIZE(DImode) will be 64, and this is really not the
3504
+ * size on bits of the largest integer machine mode.  However, that's the case
3505
+ * with most DI implementations: A long is two words, spliced together.  We'd
3506
+ * like to support that eventually, but we need to get there.  Hence, let's use
3507
+ * compile time flag (ZIP_HAS_DI) that we can enable when we're ready.
3508
+ */
3509
+#if (ZIP_HAS_DI != 0)
3510
+#define        MAX_FIXED_MODE_SIZE     64
3511
+#else
3512
+#define        MAX_FIXED_MODE_SIZE     32
3513
+#endif
3514
+
3515
+
3516
+/* 17.06 Layout of Source Language Data Types */
3517
+
3518
+#undef CHAR_TYPE_SIZE
3519
+#undef SHORT_TYPE_SIZE
3520
+#undef INT_TYPE_SIZE
3521
+#undef LONG_TYPE_SIZE
3522
+#undef LONG_LONG_TYPE_SIZE
3523
+//
3524
+#define        CHAR_TYPE_SIZE  32
3525
+#define        SHORT_TYPE_SIZE 32
3526
+#define        INT_TYPE_SIZE   32
3527
+#define        LONG_TYPE_SIZE  32
3528
+#define        LONG_LONG_TYPE_SIZE     64
3529
+// BOOL_TYPE_SIZE defaults to CHAR_TYPE_SIZE
3530
+#undef FLOAT_TYPE_SIZE
3531
+#undef DOUBLE_TYPE_SIZE
3532
+#undef LONG_DOUBLE_TYPE_SIZE
3533
+#define        FLOAT_TYPE_SIZE         32
3534
+#define        DOUBLE_TYPE_SIZE        FLOAT_TYPE_SIZE // Zip CPU doesn't support dbls
3535
+#define        LONG_DOUBLE_TYPE_SIZE   64      // This'll need to be done via emulation
3536
+// SHORT_FRAC_TYPE_SIZE
3537
+// LONG_FFRACT_TYPE_SIZE
3538
+// LONG_LONG_FRACT_TIME_SIZE
3539
+#undef SHORT_ACCUM_TYPE_SIZE
3540
+#undef ACCUM_TYPE_SIZE
3541
+#undef LONG_ACCUM_TYPE_SIZE
3542
+#define        SHORT_ACCUM_TYPE_SIZE   SHORT_TYPE_SIZE
3543
+#define        ACCUM_TYPE_SIZE         INT_TYPE_SIZE
3544
+#define        LONG_ACCUM_TYPE_SIZE    LONG_TYPE_SIZE
3545
+
3546
+/* LIBGCC2_GNU_PREFIX ... This macro corresponds to the TARGET_GNU_PREFIX target
3547
+ * hook and should be defined if that hook is overriden to be true.  It causes
3548
+ * function names in libgcc to be changed to use a __gnu_ prefix for their name
3549
+ * rather than the default __.  A port which uses this macro should also arrange
3550
+ * to use t-gnu-prefix in the libgcc config.host.
3551
+ *
3552
+ * ZipCPU -- I see no reason to define and therefore change this behavior.
3553
+ */
3554
+
3555
+/* TARGET_FLT_EVAL_METHOD ... A C expression for the value for FLT_EVAL_METHOD
3556
+ * in float.h,, assuming, if applicable, that the floating-point control word
3557
+ * is in its default state.  If you do not define this macro the value of
3558
+ * FLT_EVAL_METHOD will be zero.
3559
+ *
3560
+ * ZipCPU --- ???
3561
+ */
3562
+
3563
+/* WIDEST_HARDWARE_FP_SIZE ... A C expression for the size in bits of the widest
3564
+ * floating-point format supported by the hardware.  If you define this macro,
3565
+ * you must specify a value less than or equal to the value of LONG_DOUBLE_...
3566
+ * If you do not define this macro, the value of LONG_DOUBLE_TYPE_SIZE is the
3567
+ * default.
3568
+ *
3569
+ * ZipCPU supports 32-bit IEEE floats--IF THE SUPPORT IS COMPILED IN!  This
3570
+ * really needs to be determined, then, based upon a compile time parameter
3571
+ * where the one compiling the code states whether or not the H/W even has
3572
+ * floating point support.
3573
+ *
3574
+ * For now, we'll assume it does--but once we implement GCC parameters, we'll
3575
+ * need to change this.
3576
+ */
3577
+#undef WIDEST_HARDWARE_FP_SIZE
3578
+// #warning "Definition needs to change if no FPU present"
3579
+#define        WIDEST_HARDWARE_FP_SIZE FLOAT_TYPE_SIZE
3580
+
3581
+/* DEFAULT_SIGNED_CHAR ... An expression whose value is 1 or 0, according to
3582
+ * whether the type char should be signed or unsigned by default.  The user
3583
+ * can always override this default with the options -fsigned-char and
3584
+ * -funsigned-char.
3585
+ *
3586
+ * ZipCPU--let's go with the default behavior.
3587
+ */
3588
+#define        DEFAULT_SIGNED_CHAR     1
3589
+
3590
+/* TARGET_DEFAULT_SHORT_ENUMS(VOID) ... This target hook should return true if
3591 103 dgisselq
+ * the compiler should give an enum type only as many bytes as it takes to
3592 102 dgisselq
+ * represent the range of possible values of that type.  It should return
3593
+ * false if all enum types should be allocated like int.
3594
+ *
3595
+ * The default is to return false.  This is what the ZipCPU needs, so we won't
3596
+ * override it.
3597
+ */
3598
+
3599
+/* SIZE_TYPE ... A C expression for a string describing the name of the data
3600
+ * type to use for size values.  The typedef name size_t is defined using the
3601
+ * contents of the string.
3602
+ *
3603
+ * If you don't define this macro, the default is "long unsigned int".  Since
3604
+ * on the ZipCPU this is a 32-bit number, and all ZipCPU values are 32-bits,
3605
+ * the default seems perfect for us.
3606
+ */
3607
+#define        SIZE_TYPE       "unsigned int"
3608
+
3609
+/* SIZETYPE ... GCC defines internal types () for expressions dealing with size.
3610
+ * This macro is a C expression for a string describing the name of the data
3611
+ * type from which the precision of sizetype is extracted.  The string has the
3612
+ * same restrictions as SIZE_TYPE string.  If you don't define this macro, the
3613
+ * default is SIZE_TYPE --- which seems good enough for us.
3614
+ */
3615
+
3616
+/* PTRDIFF_TYPE ... A C expression for a string describing the name of the data
3617
+ * type to use fo rthe result of subtracting two pointers.  The typedef name
3618
+ * ptrdiff_t is defined using the contents of the string.  See SIZE_TYPE for
3619
+ * more information.
3620
+ *
3621
+ * The default is "long int" which for the ZipCPU is 32-bits---still good enough
3622
+ * for us.
3623
+ */
3624
+#define        PTRDIFF_TYPE    "int"
3625
+
3626
+/* WCHAR_TYPE ... A C expression for a string describing the name of the data
3627
+ * type to use for wide characters.  The typedef name wchar_t is defined using
3628
+ * the contents of  the string.  If you don't define this macro, the default is
3629
+ * 'int'--good enough for ZipCPU.
3630
+ */
3631
+
3632
+/* WCHAR_TYPE_SIZE ... A C expression for the size in bits of the data type for
3633
+ * wide characters.  This is used in cpp, which cannot make use of WCHAR_TYPE.
3634
+ */
3635
+#undef WCHAR_TYPE_SIZE
3636
+#define        WCHAR_TYPE_SIZE 32
3637
+
3638
+/* WINT_TYPE ... A C expression for a string describing the name of the data
3639
+ * type to use for wide characters passed to printf and returned from getwc.
3640
+ * The typedef name wint_t is defined using the contents of the string.  See
3641
+ *
3642 103 dgisselq
+ * ZipCPU -- If you don't define this macro, the default is "unsigned int"--also
3643
+ * best for us again.
3644 102 dgisselq
+ */
3645
+
3646
+/* INTMAX_TYPE ... A C expression for a string describing the name of the
3647
+ * data type that can represent any value of any standard or extended signed
3648
+ * integer type.  The typedef name intmax_t is defined using the contents of
3649
+ * the string.
3650
+ *
3651
+ * If you don't define this macro, the default is the first of "int", "long int"
3652
+ * or "long long int" that has as much precision as "long long int".
3653
+ */
3654
+
3655
+/* UINTMAX_TYPE ... same as INTMAX_TYPE, but for unsigned
3656
+ */
3657
+
3658
+#undef SIG_ATOMIC_TYPE
3659
+#if (ZIP_ATOMIC != 0)
3660
+#define        SIG_ATOMIC_TYPE "int"
3661
+#else
3662
+#define        SIG_ATOMIC_TYPE NULL    // We have no atomic types, but registers
3663
+#endif
3664
+#undef INT8_TYPE
3665
+#define        INT8_TYPE               NULL    // We have no 8-bit integer type
3666
+#undef INT16_TYPE
3667
+#define        INT16_TYPE              NULL
3668
+#undef INT32_TYPE
3669
+#define        INT32_TYPE              "int"
3670
+#undef UINT8_TYPE
3671
+#define        UINT8_TYPE              NULL
3672
+#undef UINT16_TYPE
3673
+#define        UINT16_TYPE             NULL
3674
+#undef UINT32_TYPE
3675
+#define        UINT32_TYPE             "unsigned int"
3676
+#undef INT_LEAST8_TYPE
3677
+#define        INT_LEAST8_TYPE         "int"
3678
+#undef INT_LEAST16_TYPE
3679
+#define        INT_LEAST16_TYPE        "int"
3680
+#undef INT_LEAST32_TYPE
3681
+#define        INT_LEAST32_TYPE        "int"
3682
+#undef UINT_LEAST8_TYPE
3683
+#define        UINT_LEAST8_TYPE        "unsigned int"
3684
+#undef UINT_LEAST16_TYPE
3685
+#define        UINT_LEAST16_TYPE       "unsigned int"
3686
+#undef UINT_LEAST32_TYPE
3687
+#define        UINT_LEAST32_TYPE       "unsigned int"
3688
+#undef INT_FAST8_TYPE
3689
+#define        INT_FAST8_TYPE          "int"
3690
+#undef INT_FAST16_TYPE
3691
+#define        INT_FAST16_TYPE         "int"
3692
+#undef INT_FAST32_TYPE
3693
+#define        INT_FAST32_TYPE         "int"
3694
+#undef UINT_FAST8_TYPE
3695
+#define        UINT_FAST8_TYPE         "unsigned int"
3696
+#undef UINT_FAST16_TYPE
3697
+#define        UINT_FAST16_TYPE        "unsigned int"
3698
+#undef UINT_FAST32_TYPE
3699
+#define        UINT_FAST32_TYPE        "unsigned int"
3700
+#undef INTPTR_TYPE
3701
+#define        INTPTR_TYPE             "unsigned int"
3702
+#undef UINTPTR_TYPE
3703
+#define        UINTPTR_TYPE            "unsigned int"
3704
+
3705
+#undef INT64_TYPE
3706
+#undef UINT64_TYPE
3707
+#undef INT_LEAST64_TYPE
3708
+#undef UINT_LEAST64_TYPE
3709
+#undef INT_FAST64_TYPE
3710
+#undef UINT_FAST64_TYPE
3711
+
3712
+#if (ZIP_HAS_DI != 0)
3713
+#define        INT64_TYPE              "long int"
3714
+#define        UINT64_TYPE             "long unsigned int"
3715
+#define        INT_LEAST64_TYPE        "long int"
3716
+#define        UINT_LEAST64_TYPE       "long unsigned int"
3717
+#define        INT_FAST64_TYPE         "long int"
3718
+#define        UINT_FAST64_TYPE        "long unsigned int"
3719
+#else
3720
+#define        INT64_TYPE              NULL
3721
+#define        UINT64_TYPE             NULL
3722
+#define        INT_LEAST64_TYPE        NULL
3723
+#define        UINT_LEAST64_TYPE       NULL
3724
+#define        INT_FAST64_TYPE         NULL
3725
+#define        UINT_FAST64_TYPE        NULL
3726
+#endif
3727
+
3728
+#define        TARGET_PTRMEMFUNC_VBI_LOCATION  ptrmemfunc_vbit_in_pfn
3729
+
3730
+
3731
+/* 17.07 Register Usage / Register definitions */
3732
+
3733
+/* FIRST_PSEUDO_REGISTER ... Number of hardware registers known to the compiler.
3734
+ * They receive numbers 0 through FIRST_PSEUDO_REGISTER-1; thus the first
3735
+ * pseudo register's numbrer really is assigned the number
3736
+ * FIRST_PSEUDO_REGISTER.
3737
+ *
3738
+ * ZipCPU---There are 16 registers in the ZipCPU, numbered 0-15 with the CC
3739
+ * and PC register being numbered 14 and 15 respectively.  Therefore, the
3740
+ * compiler can take register number 16 and above and do whatever it wants
3741
+ * with it.
3742
+ */
3743
+#ifdef DEFINE_USER_REGS
3744 103 dgisselq
+#  define      FIRST_PSEUDO_REGISTER   32
3745 102 dgisselq
+#else
3746 103 dgisselq
+#  ifdef       zip_FP_PSEUDO
3747
+#    define    FIRST_PSEUDO_REGISTER   (zip_FP_PSEUDO+1)
3748
+#  else
3749
+#    define    FIRST_PSEUDO_REGISTER   16
3750
+#  endif
3751 102 dgisselq
+#endif
3752
+
3753
+/* FIXED_REGISTERS ... An initializer that says which registers are used for
3754
+ * fixed purposes all throughout the compiled code and are therefore not
3755
+ * available for general allocation.  These would include the stack pointer, the
3756
+ * frame pointer (except on machines where that can be used as a general
3757
+ * register when no frame pointer is needed), the program counter on machines
3758
+ * where that is considered one of the addressable registers, and any other
3759
+ * numbered register with a standard use.
3760
+ *
3761
+ * This information is expressed as a sequence of numbers, separated by commas,
3762
+ * and surrounded by braces.  The nth number is 1 if register n is fixed, 0
3763
+ * otherwise.
3764
+ *
3765
+ * For the Zip CPU, we have three fixed registers that are not available for
3766
+ * general allocation:
3767
+ *
3768
+ *     SP      The stack pointer
3769
+ *     CC      The condition codes and CPU state register
3770
+ *     PC      The program counter
3771
+ *
3772
+ * Other registers, such as FP (the frame pointer) or GBL (the global offset
3773
+ * table pointer) are registers that we hope will not be so fixed.
3774
+ */
3775 103 dgisselq
+#ifdef zip_FP_PSEUDO
3776
+#  define      FIXED_REGISTERS         { 0,0,0,0,0,0,0,0,0,0,0,0,0,1,1,1,1 }
3777
+#else
3778
+#  define      FIXED_REGISTERS         { 0,0,0,0,0,0,0,0,0,0,0,0,0,1,1,1 }
3779
+#endif
3780 102 dgisselq
+
3781
+/* CALL_USED_REGISTERS ... like FIXED_REGISTERS but has 1 for each register
3782
+ * that is clobbered (in general) by function calls as well as for fixed
3783
+ * registers.  This macro therefore identifies the registers that are not
3784
+ * available for general allocation of values that must live across function
3785
+ * calls.
3786
+ *
3787
+ * If a register has 0 in CALL_USED_REGISTERS, the compiler automatically saves
3788
+ * it on function entry and restores it on function exit, if the register is
3789
+ * used within the function.
3790
+ *
3791
+ * On the Zip CPU, we must save R0 (the return address), and (let's pick) any
3792
+ * register above R5.
3793
+ */
3794 103 dgisselq
+#ifdef zip_FP_PSEUDO
3795
+#  define      CALL_USED_REGISTERS     { 0,1,1,1,1,0,0,0,0,0,0,0,0,1,1,1,1 }
3796
+#else
3797
+#  define      CALL_USED_REGISTERS     { 0,1,1,1,1,0,0,0,0,0,0,0,0,1,1,1 }
3798
+#endif
3799 102 dgisselq
+
3800
+/* CALL_REALLY_USED_REGISTERS ...  optional macro that, if not defined, defaults
3801
+ * to the value of CALL_USED_REGISTERS.
3802
+ */
3803
+
3804
+/* HARD_REGNO_CALL_PART_CLOBBERED(REGNO,MODE) ... A C expression that is nonzero
3805
+ * if it is not permissible to store a value of mode MODE in hard register REGNO
3806
+ * across a call without some part of it being clobbbered.  For most machines,
3807
+ * this macro need not be defined.  It is only required for machines that do
3808 103 dgisselq
+ * not preserve the entire contents of a register across a call.
3809 102 dgisselq
+ *
3810
+ * In the Zip CPU, we clobber R0 with our return address during a call, so let's
3811
+ * make sure this gets included here.
3812
+ */
3813
+#define        HARD_REGNO_CALL_PART_CLOBBERED(REGNO,MODE)      (REGNO==0)
3814
+
3815
+/* TARGET_CONDITIONAL_REGISTER_USAGE(VOID) ... This hook may conditionally
3816
+ * modify five variables fixed_regs, call_used_regs, global_regs, reg_names, and
3817
+ * reg_class_contents, to take into account any dependence of these register
3818
+ * sets on target flags.  The first three of these are of type char[]
3819
+ * (interpreted as Boolean vectors).  global_regs is a const char *[] and
3820
+ * reg_class_contents is a HARD_REG_SET.  Before the macro is called,
3821
+ * fixed_regs, call_used_regs, reg_class_contents, and reg_names have been
3822
+ * initialized from FIXED_REGISTERS, CALL_USED_REGISTERS, REG_CLASS_CONTENTS,
3823
+ * and REGISTER_NAMES, respectively.  global_regs has been cleared, and any
3824
+ * -ffixed-reg, -fcall-used-reg, and -fcall-saved-reg command options have been
3825
+ * applied.
3826
+ *
3827
+ * ZipCPU -- I may need to return and define this depending upon how FP and
3828
+ * GBL register allocation go.  But for now, we'll leave this at its default
3829
+ * value.
3830
+ */
3831
+// #warning "Revisit me after FP and GBL allocation"
3832
+
3833
+/* INCOMING_REGNO(out) ... Define this macro if the target machine has register
3834
+ * windows. ...
3835
+ *
3836
+ * Zip CPU has no register windows.
3837
+ */
3838
+
3839
+/* OUTGOING_REGNO ... same thing.
3840
+ */
3841
+
3842
+/* LOCAL_REGNO ... same thing.
3843
+ */
3844
+
3845
+/* PC_REGNUM ... If the program counter has a register number, define this as
3846
+ * that register number.  Otherwise do not define it.
3847
+ */
3848
+#define        PC_REGNUM       zip_PC
3849
+
3850
+
3851
+/* REG_ALLOC_ORDER ... If defined, an initializer for a vector of integers,
3852
+ * containing the number of hard registers in the order in which GCC should
3853
+ * prefer to use them (from most preferred to least.
3854
+ *
3855 103 dgisselq
+ * If this macro is not defined, registers are used lowest numbered first (all
3856 102 dgisselq
+ * else being equal).
3857
+ *
3858
+ * Since the default is the ZipCPU desired case, we won't define this here.
3859
+ */
3860
+
3861
+/* ADJUST_REG_ALLOC_ORDER ... on most machines it is not necessary to define
3862
+ * this macro, so we won't either.
3863
+ */
3864
+
3865
+/* HONOR_REG_ALLOC_ORDER ...
3866
+ */
3867
+
3868
+/* HONOR_REG_ALLOC_ORDER ... on most machines it is not necessary to define
3869
+ * this macro, so we won't either.
3870
+ */
3871
+
3872
+/* HARD_REGNO_NREGS(REGNO, MODE) ... A C expression for the number of
3873
+ * consecutive hard registers, starting at register number REGNO, required to
3874
+ * hold a value of mode MODE.
3875
+ *
3876
+ * On a machine where all registers are exactly one word, a suitable definition
3877
+ * is given of ((GET_MODE_SIZE(MODE)+UNITS_PER_WORD-1)/UNITS_PER_WORD.
3878
+ *
3879
+ * On ZipCPU, we might do
3880
+ *     ((((MODE)==DImode)||((MODE)==DFmode))?2:1)
3881
+ * but I think the default (above) code should work as well.  Hence, let's stick
3882
+ * with the default, lest someone try to create larger modes (TImode, OImode,
3883
+ * XImode) and expect us to follow them properly some how.
3884
+ *
3885
+ * Okay, now in hind sight, we know that the default doesn't work for our
3886
+ * architecture, since GET_MODE_SIZE(SImode)=4, not 1.  Thus, let's rearrange
3887
+ * this expression to work in bits rather than in bytes and we'll know more
3888
+ * of what we are doing.
3889
+ */
3890
+#undef HARD_REGNO_NREGS
3891
+#define        HARD_REGNO_NREGS(REGNO, MODE)   ((GET_MODE_SIZE(MODE)+UNITS_PER_WORD-1)\
3892
+               / (UNITS_PER_WORD))
3893
+
3894
+/* HARD_REGNO_NREGS_HAS_PADDING(REGNO,MODE) ... A C expression that is nonzero
3895
+ * if a value of mode MODE, stored in memory, ends with padding that causes it
3896
+ * to take up more space than in registers starting at register number REGNO
3897
+ * (as determined by multiplying GCC's notion of the size of the register when
3898
+ * containing this mode by the number of registers returned by HARD_REGNO_NREGS)
3899
+ * By default this is zero.
3900
+ *
3901
+ * Zip CPU --- The default looks good enough to me.
3902
+ */
3903
+
3904
+/* HARD_REGNO_NREGS_WITH_PADDING(REGNO, MODE)
3905
+ *
3906
+ * ZipCPU ---
3907
+ */
3908
+
3909
+/* REGMODE_NATURAL_SIZE(MODE) -- Define this macro if the natural size of
3910
+ * registers that hold values of mode mode is not the word size.  It is a C
3911
+ * expression that should give the natural size in bytes for the specified mode.
3912
+ * It is used by the register allocator to try to optimize its results.
3913
+ *
3914
+ * ZipCPU ---
3915
+ */
3916
+// #define     REGMODE_NATURAL_SIZE(MODE)      (((MODE)==DImode)?2:1)
3917
+
3918
+/* HARD_REGNO_MODE_OK ... A C expression that is nonzero if it is permissible
3919 103 dgisselq
+ * to store a value of mode MODE in a hard register number REGNO (or in several
3920 102 dgisselq
+ * registers starting with that one).  For a machine where all registers are
3921
+ * equivalent, a suitable definition is '1'.  You need not include code to check
3922
+ * for the numbers of fixed registers, because the allocation mechanism
3923
+ * considered them to be always occupied.
3924
+ *
3925
+ * ZipCPU --- As long as you are already avoiding the fixed registers, the
3926
+ * suitable default definition mentioned above should be sufficient.
3927
+ */
3928
+#undef HARD_REGNO_MODE_OK
3929 103 dgisselq
+#define        HARD_REGNO_MODE_OK(R,M) (R<zip_CC)
3930 102 dgisselq
+
3931
+/* HARD_REGNO_RENAME_OK(FROM,TO) ... A C expression that is nonzero if it is
3932
+ * okay to rename a hard register FROM to another hard register TO.  One common
3933
+ * use of this macro is to prevernt renaming of a register to another register
3934
+ * that is not saved by a prologue in an interrupt handler.  The default is
3935
+ * always nonzero.
3936
+ *
3937
+ * ZipCPU --- The default looks good enough to us.
3938
+ */
3939
+#undef HARD_REGNO_RENAME_OK
3940
+#define        HARD_REGNO_RENAME_OK(FROM,TO)   ((is_ZIP_GENERAL_REG(FROM))&&(is_ZIP_GENERAL_REG(TO)))
3941
+
3942
+
3943
+/* MODES_TIABLE_P(M1, M2) ... A C expression that is nonzero if a value of mode
3944
+ * M1 is accessible in mode M2 without copying.
3945
+ *
3946
+ * ZipCPU --- well, that's true for us (although we support scant few modes) ...
3947
+ * so lets' set to one.
3948
+ */
3949
+#define        MODES_TIEABLE_P(M1,M2)  1
3950
+
3951
+/* TARGET_HARD_REGNO_SCRATCH_OK(REGNO)
3952
+ * This target hook should return true if it is OK to use a hard register
3953
+ * REGNO has a scratch register in peephole2.  One common use of this macro is
3954
+ * to prevent using of a register that is not saved by a prologue in an
3955
+ * interrupt handler.  The default version of this hook always returns true.
3956
+ *
3957
+ * ZipCPU --- the default works for us as well.  If you are in an interrupt
3958
+ * context, you have an entirely new set of registers (the supervisor set), so
3959
+ * this is a non-issue.
3960
+ */
3961
+
3962
+/* AVOID_CCMODE_COPIES ... define this macro if the compiler should avoid
3963
+ * copies to/from CCmode register(s).  You should only define this macro if
3964
+ * support for copying to/from CCmode is incomplete.
3965
+ *
3966
+ * ZipCPU --- CCmode register copies work like any other, so we'll keep with the
3967
+ * default definition.
3968
+ */
3969
+
3970
+/* STACK_REGS ... Define this if the machine has any stack-like registers.
3971
+ *
3972
+ * Zip CPU has no stack-like registers, as their definition is different from
3973
+ * the ZipCPU stack pointer register.
3974
+ */
3975
+
3976
+#define        ZIP_REG_BYTE_SIZE       1
3977
+
3978
+/* 17.08 Register Classes */
3979
+
3980
+/* enum reg_class ... An enumerate type that must be defined with all the
3981
+ * register class names as enumerated values.  NO_REGS must be first.  ALL_REGS
3982
+ * must be the last register class, followed by one more enumerated value,
3983
+ * LIM_REG_CLASSES, which is not a register class but rather tells how many
3984
+ * classes there are.
3985
+ *
3986
+ * ZipCPU --- We'll defined register 0-13 as general registers, 14-15 in
3987
+ * all_regs, and go from there.
3988
+ */
3989
+enum   reg_class {
3990
+       NO_REGS, GENERAL_REGS,
3991
+#ifdef DEFINE_USER_REGS
3992
+       USER_REGS,
3993
+#endif
3994
+       ALL_REGS, LIM_REG_CLASSES
3995
+};
3996
+
3997
+/* N_REG_CLASSES ... the number of distinct register classes, defined as follows
3998
+ */
3999
+#define        N_REG_CLASSES   (int)LIM_REG_CLASSES
4000
+
4001
+/* REG_CLASS_NAMES ... An initializer containing the names of the register
4002
+ * classes as C string constants.  These names are used in writing some of the
4003
+ * debugging dumps.
4004
+ */
4005
+#define        REG_CLASS_NAMES { "NO_REGS", "GENERAL_REGS", "ALL_REGS" }
4006
+
4007
+/* REG_CLASS_CONTENTS ... An initializer containing the contents of the register
4008
+ * classes, as integerss which are bit masks.  The nth integer specifies the
4009
+ * contents of class n.  That way the integer mask is interpreted as that
4010
+ * register r is in the class if (mask&(1<<r)) is 1.
4011
+ *
4012
+ * When the machine has more than 32 registers ... that's not us.
4013
+ *
4014
+ * ZipCPU --- This is straight forward, three register classes, etc.
4015
+ */
4016 103 dgisselq
+#ifdef zip_FP_PSEUDO
4017
+#define        REG_CLASS_CONTENTS { { 0x00000}, {0x13fff}, {0x1ffff} }
4018
+#else
4019 102 dgisselq
+#define        REG_CLASS_CONTENTS { { 0x00000}, {0x03fff}, {0x0ffff} }
4020 103 dgisselq
+#endif
4021 102 dgisselq
+
4022
+#ifdef DEFINE_USER_REGS
4023
+#define        REG_CLASS_NAMES { "NO_REGS", "GENERAL_REGS", "USER_REGS", "ALL_REGS" }
4024
+#define        REG_CLASS_CONTENTS { { 0x00000},{0x03fff},{0x0ffff0000},{0x0ffffffff} }
4025
+#define        FIXED_REGISTERS         { 0,0,0,0,0,0,0,0,0,0,0,0,0,1,1,1,  1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1 }
4026
+#define        CALL_USED_REGISTERS     { 0,1,1,1,1,0,0,0,0,0,0,0,0,1,1,1,  1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1 }
4027
+#endif
4028
+
4029
+/* REGNO_REG_CLASS ... A C expression whose value is a register class
4030
+ * containing hard register REGNO.  In general there is more than one such
4031
+ * class;  Choose a class which is minimal, meaning that no smaller class also
4032
+ * contains the register.
4033
+ */
4034
+#undef REGNO_REG_CLASS
4035 103 dgisselq
+#ifdef zip_FP_PSEUDO
4036
+#define        REGNO_REG_CLASS(R)      (is_ZIP_REG(R)?((((R)<=13)||((R)==zip_FP_PSEUDO))?GENERAL_REGS:ALL_REGS):NO_REGS)
4037
+#else
4038 102 dgisselq
+#define        REGNO_REG_CLASS(R)      (is_ZIP_REG(R)?((R<=13)?GENERAL_REGS:ALL_REGS):NO_REGS)
4039 103 dgisselq
+#endif
4040 102 dgisselq
+
4041
+/* BASE_REG_CLASS ... A macro whose definition is the name of the class to which
4042
+ * a valid base register must belong.  A base register is one used in an address
4043
+ * which is the register value plus a displacement.
4044
+ */
4045
+#undef BASE_REG_CLASS
4046
+#define        BASE_REG_CLASS  GENERAL_REGS
4047
+
4048
+/* MODE_BASE_CLASS(MODE) ... This is a variation of the BASE_REG_CLASS macro
4049
+ * which allows the selection of a bse register in a mode dependent manner.  If
4050
+ * mode is VOIDmode then it should return the same value as BASE_REG_CLASS.
4051
+ */
4052
+#undef MODE_BASE_CLASS
4053
+#define        MODE_BASE_CLASS(MODE)   GENERAL_REGS
4054
+
4055
+/* MODE_BASE_REG_REG_CLASS(MODE) ... A C expression whose value is the register
4056
+ * class to which a valid base register must belong in order to be used in a
4057
+ * base plus index register address.  You should define this macro if base plus
4058
+ * index addresses have different requirements than other base register uses.
4059
+ *
4060
+ * Zip CPU does not support the base plus index addressing mode, thus ...
4061
+ */
4062 111 dgisselq
+// #undef      MODE_BASE_REG_REG_CLASS
4063
+// #define     MODE_BASE_REG_REG_CLASS(MODE)   NO_REGS
4064 102 dgisselq
+
4065
+/* INDEX_REG_CLASS ... A macro whose definition is the name of the class to
4066
+ * which a valid index register must belong.  An index register is one used in
4067
+ * an address where its value is either multiplied by a scale factor or added
4068
+ * to another register (as well as added to a displacement).
4069
+ *
4070
+ * ZipCPU -- Has no index registers.
4071
+ */
4072
+#undef INDEX_REG_CLASS
4073
+#define        INDEX_REG_CLASS NO_REGS
4074
+
4075
+/* REGNO_OK_FOR_BASE_P(NUM) ... A C expression which is nonzero if register
4076
+ * number num is suitable for use as a base register in operand addresses.
4077
+ */
4078
+#undef REGNO_OK_FOR_BASE_P
4079
+#ifdef DEFINE_USER_REGS
4080
+# define REGNO_OK_FOR_BASE_P(NUM)      ((NUM != zip_CC)&&(NUM < 16))
4081
+#else
4082
+# define REGNO_OK_FOR_BASE_P(NUM)      (NUM != zip_CC)
4083
+#endif
4084
+
4085
+/* REGNO_MODE_OK_FOR_BASE_P ... A C expressison that is just like
4086
+ * REGNO_OK_FOR_BASE_P, except that that expression may examine the mode of the
4087 111 dgisselq
+ * memory reference in MODE.  You should define this macro if the mode of the
4088 102 dgisselq
+ * memory reference affects whether a register may be used as a base register.
4089
+ *
4090
+ * ZipCPU --- the mode doesn't affect anything, so we don't define this.
4091
+ */
4092
+
4093
+/* REGNO_MODE_OK_FOR_REG_BASE_P(NUM, MODE) ... base plus index operand
4094
+ * addresses, accessing memory in mode mode.
4095
+ *
4096
+ * Use of this macro is deprecated.
4097
+ */
4098
+
4099 111 dgisselq
+/* REGNO_MODE_CODE_OK_FOR_BASE_P(N,M,AS,OC,IC) ... A C expression which is
4100 102 dgisselq
+ * nonzero if a register number N is suitable for use as a base register in
4101
+ * operand addresses, accessing memory in mode M in address space AS.  This is
4102
+ * similar to REGNO_MODE_OK_FOR_BASE_P, except that the expression may examine
4103
+ * the context in which the register appears in the memory reference.
4104
+ *
4105
+ * ZipCPU---We aren't specific in how we use our registers.
4106
+ */
4107
+#define        REGNO_MODE_CODE_OK_FOR_BASE_P(N,M,AS,OC,IC) REGNO_OK_FOR_BASE_P(N)
4108
+
4109
+/* REGNO_OK_FOR_INDEX_P(REGNO) ... A C expression which is nonzero if register
4110
+ * num is suitable for use as an index register in opernad addressess.  It may
4111
+ * be either a suitable hard register or a pseudo register that has been
4112 111 dgisselq
+ * allocated such as a hard register.
4113 102 dgisselq
+ *
4114
+ * ZipCPU has no index registers, therefore we declare this to be zero.
4115
+ */
4116
+#undef REGNO_OK_FOR_INDEX_P
4117
+#define        REGNO_OK_FOR_INDEX_P(REGNO)     0
4118
+
4119
+/* TARGET_PREFERRED_RENAME_CLASS(RCLASS) ... A target hook that places
4120
+ * additional preference on the register class to use when it is necessary to
4121
+ * rename a register in class RCLASS to another class, or perhaps NO_REGS, if no
4122
+ * preferred register class is found or hook preferred_rename_class is not
4123
+ * implemented.  SOmething returning a more restrictive class makes better code.
4124
+ * For example, on ARM, thumb-2 instructions using LO_REGS may be smaller than
4125
+ * instructions using GENERIC_REGS.  By returning LO_REGS from
4126
+ * preferred_rename_class, code size can be reduced.
4127
+ */
4128
+// #undef TARGET_PREFERRED_RENAME_CLASS
4129
+// #define     TARGET_PREFERRED_RENAME_CLASS(RCLASS)   RCLASS
4130
+
4131
+/* TARGET_PREFERRED_RELOAD_CLASS(X,RC) ... A target hook that places additional
4132
+ * restri tions on the register class to use when it is necessary to copy value
4133
+ * X into a register in class RC.  The value is a register class; rehaps RC, or
4134
+ * perhaps a smaller class.
4135
+ *
4136
+ * The default fversion of this hook always returns value of RC argument, which
4137
+ * sounds quite appropriate for the ZipCPU.
4138
+ */
4139
+
4140
+/* PREFERRED_RELOAD_CLASS(X,CLASS) ... A C expression that places additional
4141
+ * restrictions on the register class to use when it is necessary to copy
4142
+ * value X into a register in class CLASS.  On many machines, the following
4143
+ * definition is safe: PREFERRED_RELOAD_CLASS(X,CLASS) (CLASS)
4144
+ * Sometimes returning a more restrictive class makes better code.  For example,
4145
+ * on the 68k, when x is an integer constant that is in range for a moveq
4146
+ * instruction, the value of this macro is always DATA_REGS as long as CLASS
4147 111 dgisselq
+ * includes the data registers.  Requiring a data register guarantees that a
4148 102 dgisselq
+ * 'moveq' will be used.
4149
+ *
4150
+ * ZipCPU --- you can't load certain values into all members of ALL_REGS.  For
4151
+ * example, loading (sleep and !gie) into the CC register could halt the CPU.
4152
+ * Hence, we only allow loads into the GENERAL_REG class.
4153
+ */
4154
+#define        PREFERRED_RELOAD_CLASS(X, CLASS)        GENERAL_REGS
4155
+
4156
+/* TARGET_PREFERRED_OUTPUT_RELOAD_CLASS(RTX,RCLASS) ... Like TARGET_PREFERRED_..
4157
+ * RELOAD_CLASS, but for output instead of input reloads.
4158
+ *
4159
+ * ZipCPU --- there's gotta be a valid default behaviour for this.
4160
+ */
4161
+
4162
+/* LIMIT_RELOAD_CLASS(MODE, CL) ...
4163
+ *
4164
+ * Don't define this macro unless the target machine has limitations which
4165
+ * require the macro to do something nontrivial.  ZipCPU doesn't, so we won't.
4166
+ */
4167
+
4168
+/* TARGET_SECONDARY_RELOAD
4169
+ * SECONDARY_ ...
4170
+ * Don't think we need these ...
4171
+ */
4172
+
4173
+/* CLASS_MAX_NREGS(CLASS,MODE) ... A C expression for the maximum number of
4174
+ * consecutive registers of class CLASS needed to hold a value of mode MODE.
4175
+ *
4176
+ * This is closely related to the macro HARD_REGNO_NREGS.  In fact, the value
4177
+ * of the macro CLASS_MAX_REGS(CL,M) should be the maximum value of
4178
+ * HARD_REGNO_NREGS(REGNO,MODE) for all REGNO values in the class CLASS.
4179
+ *
4180
+ * This macro helps control the handling of multiple word values in the reload
4181
+ * pass.
4182
+ *
4183
+ * ZipCPU --- We'll just use HARDNO_REGNO_NREGS, since CLASS is independent for
4184
+ * us.  We'll also choose register R0, since ... well, since it simply doesn't
4185
+ * matter.  (HARD_REGNO_NREGS ignores this anyway)
4186
+ */
4187
+#define        CLASS_MAX_NREGS(CLASS, MODE)    HARD_REGNO_NREGS(0,MODE)
4188
+
4189
+/* CANNOT_CHANGE_MODE_CLASS
4190
+ * ???
4191
+ */
4192
+
4193
+/* TARGET_IRA_CHANGE_PSEUDO_ALLOCNO_CLASS
4194
+ */
4195
+
4196
+/* TARRGET_LRA_P
4197
+ * Default looks good.
4198
+ */
4199
+
4200
+/* TARGET_REGISTER_PRIORITY(INT) ... A target hook which returns the register
4201 111 dgisselq
+ * priority number to which the register HARD_REGNO belongs to.  The bigger the
4202 102 dgisselq
+ * number
4203
+ *
4204
+ * The default version of this target hook returns always zero---good enough for
4205
+ * the ZipCPU.
4206
+ */
4207
+
4208
+/* TARGET_REGISTER_USAGE_LEVELING_P(VOID) ... A target hook which returns true
4209
+ * if we need register usage leveling.  That means if a few hard registers are
4210
+ * equally good for the assignment, we choose the least used hard register.  The
4211
+ * register usage leveling may be profitable for some targets.  Don't use usage
4212
+ * leveling for targets with conditional execution or targets with big register
4213
+ * files as it hurts if-conversion and cross-jumping optimizations.  The default
4214
+ * version of this target hook returns always false.
4215
+ *
4216
+ * ZipCPU --- Default is the right answer.
4217
+ */
4218
+
4219
+/* TARGET_DIFFERENT_ADDR_DISPLACEMENT_P ...
4220
+ * Default looks good.
4221
+ */
4222
+
4223
+/* TARGET_CANNOT_SUBSTITUTE_MEM_EQUIV_P ...
4224
+ * Default looks good.
4225
+ */
4226
+
4227
+/* TARGET_LEGITIMIZE_ADDRESS_DISPLACEMENT ....
4228
+ */
4229
+
4230
+/* TARGET_SPILL_CLASS
4231
+ *
4232
+ * ZipCPU --- If we were running in supervisor mode only, this might be the
4233
+ * user set of registers.  However, we're not building for that mode (now),
4234
+ * so we'll leave this at the default of NO_REGS.
4235
+ */
4236
+
4237
+/* TARGET_CSTORE_MODE(ICODE) ... Defines the machine mode to use for the
4238
+ * boolean result of conditional store patterns.  The OCIDE argument is the
4239
+ * instruction code for the cstore being performed.  Not defining this hook is
4240
+ * the same as accepting the mode encoded into operand 0 of the cstore expander
4241
+ * patterns.
4242
+ *
4243
+ * ??? ZipCPU --- I don't follow this documentation.  We'll leave this at the
4244
+ * default therefore.
4245
+ */
4246
+
4247
+/* 17.09 Stack Layout and Calling Conventions */
4248
+
4249
+
4250
+/* STACK_GROWS_DOWNWARD ... Define this macro if pushing a word onto the stack
4251
+ * moves the stack pointer to a smaller address, and false otherwise.
4252
+ *
4253
+ * ZipCPU ... well, our stack does grow downward, but it doesn't do so auto-
4254
+ * magically.  We have to move the stack pointer ourselves.  However, since this
4255
+ * is our convention, we'll define it as such.
4256
+ */
4257
+#undef STACK_GROWS_DOWNWARD
4258
+#define        STACK_GROWS_DOWNWARD    1
4259
+
4260
+/* STACK_PUSH_CODE ... This macro defines the operation used when something is
4261
+ * pushed on the stack.  In RTL, a push operation will be
4262
+ * (set (mem( STACK_PUSH_CODE(reg sp))) ...) The choiecs are PRE_DEC, POST_DEC,
4263
+ * PRE_INC, and POST_INC.  Which of these is correct depends on the stack
4264
+ * direction and on whether the stack pointer points to the last item on the
4265
+ * stack or whether it points to the space for the next item on the stack.
4266
+ * The default is PRE_DECC when STACK_GROWS_DOWNWARD is true, which is almost
4267
+ * always right, and PRE_INC otherwise, which is often wrong.
4268
+ *
4269
+ * ZipCPU --- None of these is right, so let's leave this at the default and
4270
+ * see how badly we get mangled.  In particular, ZipCPU doesn't have any of the
4271
+ * PRE_DEC, POST_DEC, PRE_INC, or POST_INC addressing modes used here.
4272
+ */
4273
+
4274
+/* FRAME_GROWS_DOWNWARD ... Define this macro to nonzero if the addresses of
4275
+ * local variable slots are at negative offsets from the frame pointer.
4276
+ *
4277
+ * ZipCPU --- If the frame pointer is defined as the stack pointer upon the
4278 103 dgisselq
+ * start of function execution, and that stack pointer grows downward, then
4279 102 dgisselq
+ * this should be the case as well.
4280
+ */
4281
+#undef FRAME_GROWS_DOWNWARD
4282
+#define        FRAME_GROWS_DOWNWARD    1
4283
+// #define     FRAME_GROWS_DOWNWARD    0        // This was ECO32's value
4284
+
4285
+
4286
+/* ARGS_GROW_DOWNWARD ... Define this macro if successive arguments to a
4287
+ * function occupy decreasing addresses on the stack.
4288
+ *
4289
+ * ZipCPU -- we can leave this up to the compiler's preferred implementation,
4290
+ * it is of no consequence to the hardware.
4291
+ */
4292
+
4293
+/* STARTING_FRAME_OFFSET ... Offset from the frame pointer to the first local
4294
+ * variable slot to be allocated.  If FRAME_GROWS_DOWNWARD, find the next slot's
4295
+ * offset by subtracting the firstt slot's length from STARTING_FRAME_OFFSET.
4296
+ * Otherwise it is found by adding the length of the first slot to the value
4297
+ * START_FRAME_OFFSET.
4298
+ *
4299
+ * ZipCPU --- I'm not certain on this, let's come back after we look at how
4300
+ * the code is getting generated.  However, the ECO32 code I am copying from
4301
+ * suggests that 0 is the right value, so we'll use that here.
4302
+ */
4303
+// #warning "Re-evaluate me"
4304
+#define        STARTING_FRAME_OFFSET   0
4305
+
4306
+/* STACK_ALIGNMENT_NEEDED ... Define to zero to disable final alignment of the
4307
+ * stack during reload.  The nonzero default for this macro is suitable for most
4308
+ * ports.
4309
+ *
4310
+ * ZipCPU --- we'll leave this at the default, although if any alignment code
4311
+ * shows up on the stack we may need to adjust it.
4312
+ */
4313
+
4314
+/* STACK_POINTER_OFFSET ... Offset from the SP register to the first location at
4315
+ * which outgoing arguments are placed.  If not specified, the default value
4316
+ * of zero is used.  This is the proper value for most machines.
4317
+ */
4318
+#define        STACK_POINTER_OFFSET    0
4319
+
4320
+/* FIRST_PARM_OFFSET ... Offset from the argument pointer register to the first
4321
+ * argument's address.  On some machines it may depend on the data type of the
4322
+ * function.
4323
+ */
4324
+#define        FIRST_PARM_OFFSET(F)    0
4325
+
4326
+/* STACK_DYNAMIC_OFFSET(F) ... Offset from the stack pointer register to an item
4327
+ * dynamically allocated on the stack, e.g., by alloca.  The default value for
4328
+ * this macro is STACK_POINTER_OFFSET plus the length of the outgoing arguments.
4329
+ * The default is correct for most machines, ...
4330
+ *
4331
+ * ZipCPU --- so we'll use it for the ZipCPU.
4332
+ */
4333
+
4334
+/* INITIAL_FRAME_ADDRESS_RTX ... A C expression whose value is RTL representing
4335
+ * the address of the initial stack frame.  This address is passed to
4336
+ * RETURN_ADDR_RTX and DYNAMIC_CHAIN_ADDRESS.  If you don't define this macro,
4337
+ * a reasonable default value will be used.  Define this macro in order to make
4338
+ * frame pointer elimination work in the presence of __builtin_frame_address(C)
4339
+ * and __builtin_return_address(C) for (C) not equal to zero.
4340
+ *
4341
+ * ZipCPU --- Let's try the reasonable default and see what happens.
4342
+ */
4343
+
4344
+/* SETUP_FRAME_ADDRESSES ... A C expression that produces the machine-specific
4345
+ * code to setup the stack so that arbitrary frames can be accessed.  For
4346
+ * example, on the SPARC, we must flush all of the register windows to the stack
4347
+ * before we can access arbitrary stack frames.  You will seldom need to define
4348
+ * this macro.  The default is to do nothing.
4349
+ *
4350
+ * ZipCPU --- which is what we shall do here.
4351
+ */
4352
+
4353
+/* TARGET_BUILTIN_SETJMP_FRAME_VALUE(VOID) ... This target hook should return
4354
+ * an RTX that is used to store the address of the current frame into the
4355
+ * builtin setjmp buffer.  The default value, virtual_stack_vars_rtx, is correct
4356
+ * for most machines.  One reason you may need to define this target hook is if
4357
+ * hard_frame_pointer_rtx is the appropriate value on your machine.
4358
+ *
4359
+ * ZipCPU --- leave this undefined, since the default value should be correct
4360
+ * for "most" machines.
4361
+ */
4362
+
4363
+/* FRAME_ADDR_RTX ... most machines do not need to define it.
4364
+ */
4365
+
4366
+/* RETURN_ADDR_RTX(COUNT,FRAMEADDR) ... A C expression whose value is RTL
4367
+ * representing the value of the return address for the frame COUNT steps up
4368
+ * from the current frame, after the prologue.  FRAMEADDR is the frame pointer
4369
+ * of the COUNT frame, or the frame pointer of the COUNT-1 frame if
4370
+ * RETURN_ADDR_IN_PREVIOUS_FRAME is nonzero.  The value of the expression must
4371
+ * always be the correct address when COUNT is nonzero, but may be NULL_RTX if
4372
+ * there is no way to determine the return address of other frames.
4373
+ *
4374
+ * ZipCPU --- I have no idea how we'd do this, so let's just return NULL_RTX.
4375
+ */
4376
+#undef RETURN_ADDR_RTX
4377
+#define        RETURN_ADDR_RTX(COUNT,FRAMEADDR)        NULL_RTX
4378
+
4379
+/* RETURN_ADDR_IN_PREVIOUS_FRAME ... Define this macro to nonzero value if the
4380
+ * return address of a particular stack frame is accessed from the frame pointer
4381
+ * of the previous stack frame.  The zero default for this macro is suitable
4382
+ * for most ports.
4383
+ *
4384
+ * ZipCPU---Default works here as well.
4385
+ */
4386
+
4387
+/* INCOMING_RETURN_ADDR_RTX ... A C expression whose value is RTL representing
4388
+ * the location of the incoming return address at the beginning of any function,
4389
+ * before the prologue.  This RTL is either a REG, indicating that the return
4390
+ * value is saved in 'REG', or a MEM representing the location in the stack.
4391
+ * If this RTL is a REG, you should define DWARF_RETURN_COLUMN to
4392
+ * DWARF_FRAME_REGNUM(REGNO).
4393
+ *
4394
+ * ZipCPU --- While our incoming return address could theoretically be in any
4395
+ * register, our machine description file is going to place it into register
4396
+ * R0, so that's what we return here.
4397
+ */
4398
+#undef INCOMING_RETURN_ADDR_RTX
4399
+#define        INCOMING_RETURN_ADDR_RTX        gen_rtx_REG(SImode, zip_R0)
4400
+
4401
+
4402
+/* DWARF_ALT_FRAME_RETURN_COLUMN
4403
+ */
4404
+
4405
+/* DWARF_ZERO_REG ... A C exrpession whose value is an integer giving a DWARF2
4406
+ * register number that is considered to always have the value zero.  This
4407
+ * should only be defined if the target has an architected zero register (ZipCPU
4408
+ * does not), and someone decided it was a good idea to use that register number
4409
+ * to terminate the stack backtrace.  New ports should avoid this (so the
4410
+ * ZipCPU port will avoid it as well).
4411
+ *
4412
+ */
4413
+
4414
+/* TARGET_DWARF_HANDLE_FRAME_UNSPEC
4415
+ */
4416
+
4417
+/* INCOMING_FRAME_SP_OFFSET
4418
+ */
4419
+#define        INCOMING_FRAME_SP_OFFSET        0
4420
+
4421
+/* ARG_POINTER_CFA_OFFSET
4422
+ */
4423
+
4424
+/* FRAME_POINTER_CFA_OFFSET
4425
+ */
4426
+
4427
+/* CFA_FRAME_BASE_OFFSET
4428
+ */
4429
+
4430
+/* 17.09.02 Exception handling support */
4431
+
4432
+/* EH_RETURN_DATA_REGNO(N) ... A C expression whose value is the Nth register
4433
+ * number used for data by exception handlers, or INVALID_REGNUM if fewer than
4434
+ * N registers are usable.  The exception handling library routines communicate
4435
+ * with the exception handlers via a set of agreed upon registers.  Ideally
4436
+ * these registers should be call clobbered; it is possible to use call-saved
4437
+ * registers, but may negatively impact code size.  The target must support at
4438
+ * least 2 data registers, but should define 4 if their are enough free
4439
+ * registers.
4440
+ *
4441
+ * You must define this macro if you want to support call frame exception
4442
+ * handling like that provided by DWARF 2.
4443
+ */
4444
+#define        EH_RETURN_DATA_REGNO(N) (((N<ZIP_FIRST_ARG_REGNO)||(N>ZIP_LAST_ARG_REGNO))?(N-1):INVALID_REGNUM)
4445
+
4446
+/* EH_RETURN_STACKADJ_RTX ... A C expression whose value is RTL representing
4447
+ * a location in which to store a stack adjustment to be applied before function
4448
+ * return.  This is used to unwind the stack to an exception handler's call
4449
+ * frame.  It will be assigned zero on code paths that return normally.
4450
+ *
4451
+ * Do not define this macro if the stack pointer is saved and restored by the
4452
+ * regular prolog and epilog code in the call frame itself (which it is for the
4453
+ * ZipCPU); in this case, the exception handling library routines will update
4454
+ * the stack location to be restored in place.  Otherwise, you must define this
4455
+ * macro if you want to support call frame exception handling like that provided
4456
+ * by DWARF 2.
4457
+ *
4458
+ */
4459
+
4460
+/* EH_RETURN_HANDLER_RTX ... A C expression whose value is RTL representing a
4461
+ * location in which to store the address of an exception handler to which we
4462
+ * should return.  It will not be assigned on code paths that return normally.
4463
+ *
4464
+ * Typcally this is the location in the call frame at which the normal return
4465
+ * address is stored.  For targets that return by popping an address of the
4466
+ * stack, this might be a memory address just below the target callf rame
4467
+ * rather than inside the current call frame.  If defined,
4468
+ * EH_RETURN_STACKADJ_RTX will have already been assigned, so it may be used
4469
+ * to calculate the location of the target call frame.
4470
+ *
4471
+ * If you want to support call frame exception handling, you must define either
4472
+ * this macro or the eh_return instruction pattern.
4473
+ */
4474
+// #warning "I don't know what to do here."
4475
+
4476
+/*
4477
+ *
4478
+ *
4479
+ *
4480
+ *   REST OF SECTION SKIPPED ...
4481
+ *
4482
+ *
4483
+ *
4484
+ */
4485
+
4486
+/* 17.09.03 Specifying how stack checking is done */
4487
+
4488
+/* STACK_CHECK_BUILTIN ... a non-zero value if stack checking is done by the
4489
+ * configuration files in a machine-dependent manner.  You should define this
4490
+ * macro if stack checking is required by the ABI of your machine or if you
4491
+ * would like to do stack checking in some more efficient way than the generic
4492
+ * appraoch.  The default value of this macro is zero.
4493
+ *
4494
+ * ZipCPU --- The default makes sense for us.
4495
+ */
4496
+// #define STACK_CHECK_BUILTIN 0
4497
+
4498
+/* STACK_CHECK_STATIC_BUILTIN ... A nonzero value if static stack checking is
4499
+ * done by the configuration files in a machine-dependent manner.  You should
4500
+ * define this macro if you would like to do static stack checking in some more
4501
+ * efficient way than the generic approach.  The default value of this macro
4502
+ * is zero.
4503
+ *
4504
+ * ZipCPU --- The default makes sense for us.
4505
+ */
4506
+
4507
+/* STACK_CHECK_PROBE_INTERVAL_EXP ...  An integer specifying the interval at
4508
+ * which GCC must generate stack probe instructions, defined as 2 raised to this
4509
+ * interval.  You will normally define this macro so that the interval is no
4510
+ * larger than the size of the "guard pages" at the end of a stack area.  The
4511
+ * default value of 12 (4096-byte interval) is suitable for most systems.
4512
+ *
4513
+ * ZipCPU --- Default.
4514
+ */
4515
+
4516
+/* STACK_CHECK_MOVING_SP ... An integer which is non-zero if GCC should move
4517
+ * the stack pointer page by page when doing probes.  This can be necessary
4518
+ * on systems where the stack pointer contains the bottom address of the memory
4519
+ * area accessible to the executing thread at any point in time.  In this
4520
+ * situation, an alternate signal stack is required in order to be able to
4521
+ * recover from a stack overflow.  The default value of this macro is zero.
4522
+ *
4523
+ * ZipCPU -- Default.
4524
+ */
4525
+
4526
+/* STACK_CHECK_PROTECT
4527
+ */
4528
+/* STACK_CHECK_MAX_FRAME_SIZE
4529
+ * ... you should normally not change the default value of this macro.
4530
+ */
4531
+/* STACK_CHECK_FIXED_FRAME_SIZE
4532
+ * ... you ... will normally use the default of four words.
4533
+ */
4534
+
4535
+/* STACK_CHECK_MAX_VAR_SIZE
4536
+ * ... you will normally not need to override that default.
4537
+ */
4538
+
4539
+/* 17.09.04 Registers that Address the Stack Frame*/
4540
+
4541
+/* STACK_POINTER_REGNUM ... The register number of the stack pointer register,
4542
+ * which must also be a fixed register according to FIXED_REGISTERS.  On most
4543
+ * machines, the hardware determines which register this is.
4544
+ */
4545
+#undef STACK_POINTER_REGNUM
4546
+#define        STACK_POINTER_REGNUM    zip_SP
4547
+
4548
+/* FRAME_POINTER_REGNUM ... The register number of the frame pointer register,
4549
+ * which is used to access certain automatic variables in the stack frame.  On
4550
+ * some machines, the hardware determines which register this is.  On other
4551
+ * machines you can choose any register you wish for this purpose.
4552
+ *
4553
+ * ZipCPU --- While I'd like to dump this pointer, since I don't really see
4554
+ * a need for it, alloca() requires it.  Therefore let's assine a register to
4555
+ * this purpose and watch what the compiler does with it.
4556
+ */
4557 103 dgisselq
+#ifdef zip_FP_PSEUDO
4558
+#define        FRAME_POINTER_REGNUM    zip_FP_PSEUDO
4559
+#else
4560 102 dgisselq
+#define        FRAME_POINTER_REGNUM    zip_FP
4561 103 dgisselq
+#endif
4562 102 dgisselq
+
4563
+/* HARD_FRAME_POINTER_REGNUM ... On some machines the offset between the frame
4564
+ * pointer and starting offset of the automatic variables is not known until
4565
+ * after register allocation has been done (for example, because the saved