OpenCores
URL https://opencores.org/ocsvn/zipcpu/zipcpu/trunk

Subversion Repositories zipcpu

[/] [zipcpu/] [trunk/] [sw/] [gcc-zippatch.patch] - Blame information for rev 117

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Line No. Rev Author Line
1 102 dgisselq
diff -Naur '--exclude=*.swp' gcc-5.3.0-original/config.sub gcc-5.3.0-zip/config.sub
2
--- gcc-5.3.0-original/config.sub       2015-01-02 04:30:21.000000000 -0500
3
+++ gcc-5.3.0-zip/config.sub    2016-01-30 12:27:56.023073747 -0500
4
@@ -316,7 +316,7 @@
5
        | visium \
6
        | we32k \
7
        | x86 | xc16x | xstormy16 | xtensa \
8
-       | z8k | z80)
9
+       | z8k | z80 | zip)
10
                basic_machine=$basic_machine-unknown
11
                ;;
12
        c54x)
13
@@ -1547,6 +1547,9 @@
14
 # system, and we'll never get to this point.
15
 
16
 case $basic_machine in
17
+       zip-*)
18
+               os=-elf
19
+               ;;
20
        score-*)
21
                os=-elf
22
                ;;
23
diff -Naur '--exclude=*.swp' gcc-5.3.0-original/configure gcc-5.3.0-zip/configure
24
--- gcc-5.3.0-original/configure        2015-05-03 13:29:57.000000000 -0400
25
+++ gcc-5.3.0-zip/configure     2016-01-30 16:19:48.264867231 -0500
26
@@ -3927,6 +3927,8 @@
27
   vax-*-*)
28
     noconfigdirs="$noconfigdirs target-newlib target-libgloss"
29
     ;;
30
+  zip*)
31
+    noconfigdirs="$noconfigdirs target-libffi target-boehm-gc gdb gprof"
32
 esac
33
 
34
 # If we aren't building newlib, then don't build libgloss, since libgloss
35
diff -Naur '--exclude=*.swp' gcc-5.3.0-original/configure.ac gcc-5.3.0-zip/configure.ac
36
--- gcc-5.3.0-original/configure.ac     2015-05-03 13:29:57.000000000 -0400
37
+++ gcc-5.3.0-zip/configure.ac  2016-02-12 10:47:23.847194843 -0500
38
@@ -1274,6 +1274,10 @@
39
   vax-*-*)
40
     noconfigdirs="$noconfigdirs target-newlib target-libgloss"
41
     ;;
42
+  zip*)
43
+    noconfigdirs="$noconfigdirs target-libffi target-boehm-gc gdb gprof"
44
+    unsupported_languages="$unsupported_languages fortran java"
45
+    ;;
46
 esac
47
 
48
 # If we aren't building newlib, then don't build libgloss, since libgloss
49 117 dgisselq
diff -Naur '--exclude=*.swp' gcc-5.3.0-original/gcc/cfgexpand.c gcc-5.3.0-zip/gcc/cfgexpand.c
50
--- gcc-5.3.0-original/gcc/cfgexpand.c  2015-07-23 06:39:26.000000000 -0400
51
+++ gcc-5.3.0-zip/gcc/cfgexpand.c       2016-04-01 06:40:17.288326711 -0400
52
@@ -108,6 +108,14 @@
53
 #include "tree-chkp.h"
54
 #include "rtl-chkp.h"
55
 
56
+#ifdef DO_ZIP_DEBUGS
57
+#include <stdio.h>
58
+#define ZIP_DEBUG_LINE(STR,RTX) do{fprintf(stderr,"%s:%d/%s\n",__FILE__,__LINE__,STR); zip_debug_rtx(RTX);} while(0)
59
+extern void    zip_debug_rtx(const_rtx);
60
+#else
61
+#define        ZIP_DEBUG_LINE(STR,RTX)
62
+#endif
63
+
64
 /* Some systems use __main in a way incompatible with its use in gcc, in these
65
    cases use the macros NAME__MAIN to give a quoted symbol and SYMBOL__MAIN to
66
    give the same symbol without quotes for an alternative entry point.  You
67 111 dgisselq
diff -Naur '--exclude=*.swp' gcc-5.3.0-original/gcc/cgraphbuild.c gcc-5.3.0-zip/gcc/cgraphbuild.c
68
--- gcc-5.3.0-original/gcc/cgraphbuild.c        2015-01-09 15:18:42.000000000 -0500
69
+++ gcc-5.3.0-zip/gcc/cgraphbuild.c     2016-03-24 22:13:24.815287808 -0400
70
@@ -62,6 +62,13 @@
71
 #include "ipa-prop.h"
72
 #include "ipa-inline.h"
73
 
74
+#ifdef DO_ZIP_DEBUGS
75
+extern void zip_debug_rtx(const_rtx);
76
+#define        ZIP_DEBUG_LINE(STR,RTX) do { fprintf(stderr, "%s:%d/%s\n", __FILE__,__LINE__,STR); zip_debug_rtx(RTX); } while(0)
77
+#else
78
+#define        ZIP_DEBUG_LINE(STR,RTX)
79
+#endif
80
+
81
 /* Context of record_reference.  */
82
 struct record_reference_ctx
83
 {
84 102 dgisselq
diff -Naur '--exclude=*.swp' gcc-5.3.0-original/gcc/common/config/zip/zip-common.c gcc-5.3.0-zip/gcc/common/config/zip/zip-common.c
85
--- gcc-5.3.0-original/gcc/common/config/zip/zip-common.c       1969-12-31 19:00:00.000000000 -0500
86
+++ gcc-5.3.0-zip/gcc/common/config/zip/zip-common.c    2016-02-14 00:54:31.821055716 -0500
87
@@ -0,0 +1,52 @@
88
+////////////////////////////////////////////////////////////////////////////////
89
+//
90
+// Filename:   common/config/zip/zip-common.c
91
+//
92
+// Project:    Zip CPU backend for the GNU Compiler Collection
93
+//
94
+// Purpose:    To eliminate the frame register automatically.
95
+//
96
+// Creator:    Dan Gisselquist, Ph.D.
97
+//             Gisselquist Technology, LLC
98
+//
99
+////////////////////////////////////////////////////////////////////////////////
100
+//
101
+// Copyright (C) 2016, Gisselquist Technology, LLC
102
+//
103
+// This program is free software (firmware): you can redistribute it and/or
104
+// modify it under the terms of  the GNU General Public License as published
105
+// by the Free Software Foundation, either version 3 of the License, or (at
106
+// your option) any later version.
107
+//
108
+// This program is distributed in the hope that it will be useful, but WITHOUT
109
+// ANY WARRANTY; without even the implied warranty of MERCHANTIBILITY or
110
+// FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
111
+// for more details.
112
+//
113
+// You should have received a copy of the GNU General Public License along
114
+// with this program.  (It's in the $(ROOT)/doc directory, run make with no
115
+// target there if the PDF file isn't present.)  If not, see
116
+// <http://www.gnu.org/licenses/> for a copy.
117
+//
118
+// License:    GPL, v3, as defined and found on www.gnu.org,
119
+//             http://www.gnu.org/licenses/gpl.html
120
+//
121
+//
122
+////////////////////////////////////////////////////////////////////////////////
123
+#include "config.h"
124
+#include "system.h"
125
+#include "coretypes.h"
126
+#include "tm.h"
127
+#include "common/common-target.h"
128
+#include "common/common-target-def.h"
129
+
130
+static const struct default_options zip_option_optimization_table[] =
131
+  {
132
+    { OPT_LEVELS_1_PLUS, OPT_fomit_frame_pointer, NULL, 1 },
133
+    { OPT_LEVELS_NONE, 0, NULL, 0 }
134
+  };
135
+
136
+#undef TARGET_OPTION_OPTIMIZATION_TABLE
137
+#define        TARGET_OPTION_OPTIMIZATION_TABLE        zip_option_optimization_table
138
+
139
+struct gcc_targetm_common      targetm_common = TARGETM_COMMON_INITIALIZER;
140
diff -Naur '--exclude=*.swp' gcc-5.3.0-original/gcc/config/aarch64/aarch64-linux.h gcc-5.3.0-zip/gcc/config/aarch64/aarch64-linux.h
141 117 dgisselq
--- gcc-5.3.0-original/gcc/config/aarch64/aarch64-linux.h       2016-04-02 11:53:47.213604913 -0400
142 102 dgisselq
+++ gcc-5.3.0-zip/gcc/config/aarch64/aarch64-linux.h    2015-07-24 12:00:26.000000000 -0400
143
@@ -21,7 +21,7 @@
144
 #ifndef GCC_AARCH64_LINUX_H
145
 #define GCC_AARCH64_LINUX_H
146
 
147
-#define GLIBC_DYNAMIC_LINKER "/tools/lib/ld-linux-aarch64%{mbig-endian:_be}%{mabi=ilp32:_ilp32}.so.1"
148
+#define GLIBC_DYNAMIC_LINKER "/lib/ld-linux-aarch64%{mbig-endian:_be}%{mabi=ilp32:_ilp32}.so.1"
149
 
150
 #undef  ASAN_CC1_SPEC
151
 #define ASAN_CC1_SPEC "%{%:sanitize(address):-funwind-tables}"
152
diff -Naur '--exclude=*.swp' gcc-5.3.0-original/gcc/config/alpha/linux-elf.h gcc-5.3.0-zip/gcc/config/alpha/linux-elf.h
153 117 dgisselq
--- gcc-5.3.0-original/gcc/config/alpha/linux-elf.h     2016-04-02 11:53:47.213604913 -0400
154 102 dgisselq
+++ gcc-5.3.0-zip/gcc/config/alpha/linux-elf.h  2015-01-05 07:33:28.000000000 -0500
155
@@ -23,8 +23,8 @@
156
 #define EXTRA_SPECS \
157
 { "elf_dynamic_linker", ELF_DYNAMIC_LINKER },
158
 
159
-#define GLIBC_DYNAMIC_LINKER   "/tools/lib/ld-linux.so.2"
160
-#define UCLIBC_DYNAMIC_LINKER "/tools/lib/ld-uClibc.so.0"
161
+#define GLIBC_DYNAMIC_LINKER   "/lib/ld-linux.so.2"
162
+#define UCLIBC_DYNAMIC_LINKER "/lib/ld-uClibc.so.0"
163
 #if DEFAULT_LIBC == LIBC_UCLIBC
164
 #define CHOOSE_DYNAMIC_LINKER(G, U) "%{mglibc:" G ";:" U "}"
165
 #elif DEFAULT_LIBC == LIBC_GLIBC
166
diff -Naur '--exclude=*.swp' gcc-5.3.0-original/gcc/config/arm/linux-eabi.h gcc-5.3.0-zip/gcc/config/arm/linux-eabi.h
167 117 dgisselq
--- gcc-5.3.0-original/gcc/config/arm/linux-eabi.h      2016-04-02 11:53:47.213604913 -0400
168 102 dgisselq
+++ gcc-5.3.0-zip/gcc/config/arm/linux-eabi.h   2015-01-05 07:33:28.000000000 -0500
169
@@ -68,8 +68,8 @@
170
    GLIBC_DYNAMIC_LINKER_DEFAULT and TARGET_DEFAULT_FLOAT_ABI.  */
171
 
172
 #undef  GLIBC_DYNAMIC_LINKER
173
-#define GLIBC_DYNAMIC_LINKER_SOFT_FLOAT "/tools/lib/ld-linux.so.3"
174
-#define GLIBC_DYNAMIC_LINKER_HARD_FLOAT "/tools/lib/ld-linux-armhf.so.3"
175
+#define GLIBC_DYNAMIC_LINKER_SOFT_FLOAT "/lib/ld-linux.so.3"
176
+#define GLIBC_DYNAMIC_LINKER_HARD_FLOAT "/lib/ld-linux-armhf.so.3"
177
 #define GLIBC_DYNAMIC_LINKER_DEFAULT GLIBC_DYNAMIC_LINKER_SOFT_FLOAT
178
 
179
 #define GLIBC_DYNAMIC_LINKER \
180
diff -Naur '--exclude=*.swp' gcc-5.3.0-original/gcc/config/arm/linux-elf.h gcc-5.3.0-zip/gcc/config/arm/linux-elf.h
181 117 dgisselq
--- gcc-5.3.0-original/gcc/config/arm/linux-elf.h       2016-04-02 11:53:47.213604913 -0400
182 102 dgisselq
+++ gcc-5.3.0-zip/gcc/config/arm/linux-elf.h    2015-06-23 05:26:54.000000000 -0400
183
@@ -62,7 +62,7 @@
184
 
185
 #define LIBGCC_SPEC "%{mfloat-abi=soft*:-lfloat} -lgcc"
186
 
187
-#define GLIBC_DYNAMIC_LINKER "/tools/lib/ld-linux.so.2"
188
+#define GLIBC_DYNAMIC_LINKER "/lib/ld-linux.so.2"
189
 
190
 #define LINUX_TARGET_LINK_SPEC  "%{h*} \
191
    %{static:-Bstatic} \
192
diff -Naur '--exclude=*.swp' gcc-5.3.0-original/gcc/config/bfin/linux.h gcc-5.3.0-zip/gcc/config/bfin/linux.h
193 117 dgisselq
--- gcc-5.3.0-original/gcc/config/bfin/linux.h  2016-04-02 11:53:47.213604913 -0400
194 102 dgisselq
+++ gcc-5.3.0-zip/gcc/config/bfin/linux.h       2015-01-05 07:33:28.000000000 -0500
195
@@ -45,7 +45,7 @@
196
   %{shared:-G -Bdynamic} \
197
   %{!shared: %{!static: \
198
    %{rdynamic:-export-dynamic} \
199
-   -dynamic-linker /tools/lib/ld-uClibc.so.0} \
200
+   -dynamic-linker /lib/ld-uClibc.so.0} \
201
    %{static}} -init __init -fini __fini"
202
 
203
 #undef TARGET_SUPPORTS_SYNC_CALLS
204
diff -Naur '--exclude=*.swp' gcc-5.3.0-original/gcc/config/cris/linux.h gcc-5.3.0-zip/gcc/config/cris/linux.h
205 117 dgisselq
--- gcc-5.3.0-original/gcc/config/cris/linux.h  2016-04-02 11:53:47.213604913 -0400
206 102 dgisselq
+++ gcc-5.3.0-zip/gcc/config/cris/linux.h       2015-01-05 07:33:28.000000000 -0500
207
@@ -102,7 +102,7 @@
208
 #undef CRIS_DEFAULT_CPU_VERSION
209
 #define CRIS_DEFAULT_CPU_VERSION CRIS_CPU_NG
210
 
211
-#define GLIBC_DYNAMIC_LINKER "/tools/lib/ld.so.1"
212
+#define GLIBC_DYNAMIC_LINKER "/lib/ld.so.1"
213
 
214
 #undef CRIS_LINK_SUBTARGET_SPEC
215
 #define CRIS_LINK_SUBTARGET_SPEC \
216
diff -Naur '--exclude=*.swp' gcc-5.3.0-original/gcc/config/freebsd-spec.h gcc-5.3.0-zip/gcc/config/freebsd-spec.h
217 117 dgisselq
--- gcc-5.3.0-original/gcc/config/freebsd-spec.h        2016-04-02 11:53:47.213604913 -0400
218 102 dgisselq
+++ gcc-5.3.0-zip/gcc/config/freebsd-spec.h     2015-06-25 13:53:14.000000000 -0400
219
@@ -129,9 +129,9 @@
220
 #endif
221
 
222
 #if FBSD_MAJOR < 6
223
-#define FBSD_DYNAMIC_LINKER "/tools/libexec/ld-elf.so.1"
224
+#define FBSD_DYNAMIC_LINKER "/usr/libexec/ld-elf.so.1"
225
 #else
226
-#define FBSD_DYNAMIC_LINKER "/tools/libexec/ld-elf.so.1"
227
+#define FBSD_DYNAMIC_LINKER "/libexec/ld-elf.so.1"
228
 #endif
229
 
230
 /* NOTE: The freebsd-spec.h header is included also for various
231
diff -Naur '--exclude=*.swp' gcc-5.3.0-original/gcc/config/frv/linux.h gcc-5.3.0-zip/gcc/config/frv/linux.h
232 117 dgisselq
--- gcc-5.3.0-original/gcc/config/frv/linux.h   2016-04-02 11:53:47.213604913 -0400
233 102 dgisselq
+++ gcc-5.3.0-zip/gcc/config/frv/linux.h        2015-01-05 07:33:28.000000000 -0500
234
@@ -34,7 +34,7 @@
235
 #define ENDFILE_SPEC \
236
   "%{shared|pie:crtendS.o%s;:crtend.o%s} crtn.o%s"
237
 
238
-#define GLIBC_DYNAMIC_LINKER "/tools/lib/ld.so.1"
239
+#define GLIBC_DYNAMIC_LINKER "/lib/ld.so.1"
240
 
241
 #undef LINK_SPEC
242
 #define LINK_SPEC "\
243
diff -Naur '--exclude=*.swp' gcc-5.3.0-original/gcc/config/i386/gnu.h gcc-5.3.0-zip/gcc/config/i386/gnu.h
244 117 dgisselq
--- gcc-5.3.0-original/gcc/config/i386/gnu.h    2016-04-02 11:53:47.213604913 -0400
245 102 dgisselq
+++ gcc-5.3.0-zip/gcc/config/i386/gnu.h 2015-01-05 07:33:28.000000000 -0500
246
@@ -22,7 +22,7 @@
247
 #define GNU_USER_LINK_EMULATION "elf_i386"
248
 
249
 #undef GNU_USER_DYNAMIC_LINKER
250
-#define GNU_USER_DYNAMIC_LINKER "/tools/lib/ld.so"
251
+#define GNU_USER_DYNAMIC_LINKER "/lib/ld.so"
252
 
253
 #undef STARTFILE_SPEC
254
 #if defined HAVE_LD_PIE
255
diff -Naur '--exclude=*.swp' gcc-5.3.0-original/gcc/config/i386/kfreebsd-gnu64.h gcc-5.3.0-zip/gcc/config/i386/kfreebsd-gnu64.h
256 117 dgisselq
--- gcc-5.3.0-original/gcc/config/i386/kfreebsd-gnu64.h 2016-04-02 11:53:47.213604913 -0400
257 102 dgisselq
+++ gcc-5.3.0-zip/gcc/config/i386/kfreebsd-gnu64.h      2015-01-05 07:33:28.000000000 -0500
258
@@ -22,6 +22,6 @@
259
 #define GNU_USER_LINK_EMULATION64 "elf_x86_64_fbsd"
260
 #define GNU_USER_LINK_EMULATIONX32 "elf32_x86_64_fbsd"
261
 
262
-#define GLIBC_DYNAMIC_LINKER32 "/tools/lib/ld.so.1"
263
-#define GLIBC_DYNAMIC_LINKER64 "/tools/lib/ld-kfreebsd-x86-64.so.1"
264
-#define GLIBC_DYNAMIC_LINKERX32 "/tools/lib/ld-kfreebsd-x32.so.1"
265
+#define GLIBC_DYNAMIC_LINKER32 "/lib/ld.so.1"
266
+#define GLIBC_DYNAMIC_LINKER64 "/lib/ld-kfreebsd-x86-64.so.1"
267
+#define GLIBC_DYNAMIC_LINKERX32 "/lib/ld-kfreebsd-x32.so.1"
268
diff -Naur '--exclude=*.swp' gcc-5.3.0-original/gcc/config/i386/kfreebsd-gnu.h gcc-5.3.0-zip/gcc/config/i386/kfreebsd-gnu.h
269 117 dgisselq
--- gcc-5.3.0-original/gcc/config/i386/kfreebsd-gnu.h   2016-04-02 11:53:47.213604913 -0400
270 102 dgisselq
+++ gcc-5.3.0-zip/gcc/config/i386/kfreebsd-gnu.h        2015-01-05 07:33:28.000000000 -0500
271
@@ -19,4 +19,4 @@
272
 <http://www.gnu.org/licenses/>.  */
273
 
274
 #define GNU_USER_LINK_EMULATION "elf_i386_fbsd"
275
-#define GLIBC_DYNAMIC_LINKER "/tools/lib/ld.so.1"
276
+#define GLIBC_DYNAMIC_LINKER "/lib/ld.so.1"
277
diff -Naur '--exclude=*.swp' gcc-5.3.0-original/gcc/config/i386/linux64.h gcc-5.3.0-zip/gcc/config/i386/linux64.h
278 117 dgisselq
--- gcc-5.3.0-original/gcc/config/i386/linux64.h        2016-04-02 11:53:47.213604913 -0400
279 102 dgisselq
+++ gcc-5.3.0-zip/gcc/config/i386/linux64.h     2015-01-05 07:33:28.000000000 -0500
280
@@ -27,6 +27,6 @@
281
 #define GNU_USER_LINK_EMULATION64 "elf_x86_64"
282
 #define GNU_USER_LINK_EMULATIONX32 "elf32_x86_64"
283
 
284
-#define GLIBC_DYNAMIC_LINKER32 "/tools/lib/ld-linux.so.2"
285
-#define GLIBC_DYNAMIC_LINKER64 "/tools/lib64/ld-linux-x86-64.so.2"
286
-#define GLIBC_DYNAMIC_LINKERX32 "/tools/libx32/ld-linux-x32.so.2"
287
+#define GLIBC_DYNAMIC_LINKER32 "/lib/ld-linux.so.2"
288
+#define GLIBC_DYNAMIC_LINKER64 "/lib64/ld-linux-x86-64.so.2"
289
+#define GLIBC_DYNAMIC_LINKERX32 "/libx32/ld-linux-x32.so.2"
290
diff -Naur '--exclude=*.swp' gcc-5.3.0-original/gcc/config/i386/linux.h gcc-5.3.0-zip/gcc/config/i386/linux.h
291 117 dgisselq
--- gcc-5.3.0-original/gcc/config/i386/linux.h  2016-04-02 11:53:47.213604913 -0400
292 102 dgisselq
+++ gcc-5.3.0-zip/gcc/config/i386/linux.h       2015-01-05 07:33:28.000000000 -0500
293
@@ -20,4 +20,4 @@
294
 <http://www.gnu.org/licenses/>.  */
295
 
296
 #define GNU_USER_LINK_EMULATION "elf_i386"
297
-#define GLIBC_DYNAMIC_LINKER "/tools/lib/ld-linux.so.2"
298
+#define GLIBC_DYNAMIC_LINKER "/lib/ld-linux.so.2"
299
diff -Naur '--exclude=*.swp' gcc-5.3.0-original/gcc/config/ia64/linux.h gcc-5.3.0-zip/gcc/config/ia64/linux.h
300 117 dgisselq
--- gcc-5.3.0-original/gcc/config/ia64/linux.h  2016-04-02 11:53:47.213604913 -0400
301 102 dgisselq
+++ gcc-5.3.0-zip/gcc/config/ia64/linux.h       2015-01-05 07:33:28.000000000 -0500
302
@@ -55,7 +55,7 @@
303
 /* Define this for shared library support because it isn't in the main
304
    linux.h file.  */
305
 
306
-#define GLIBC_DYNAMIC_LINKER "/tools/lib/ld-linux-ia64.so.2"
307
+#define GLIBC_DYNAMIC_LINKER "/lib/ld-linux-ia64.so.2"
308
 
309
 #undef LINK_SPEC
310
 #define LINK_SPEC "\
311
diff -Naur '--exclude=*.swp' gcc-5.3.0-original/gcc/config/knetbsd-gnu.h gcc-5.3.0-zip/gcc/config/knetbsd-gnu.h
312 117 dgisselq
--- gcc-5.3.0-original/gcc/config/knetbsd-gnu.h 2016-04-02 11:53:47.213604913 -0400
313 102 dgisselq
+++ gcc-5.3.0-zip/gcc/config/knetbsd-gnu.h      2015-01-05 07:33:28.000000000 -0500
314
@@ -32,4 +32,4 @@
315
 
316
 
317
 #undef GNU_USER_DYNAMIC_LINKER
318
-#define GNU_USER_DYNAMIC_LINKER "/tools/lib/ld.so.1"
319
+#define GNU_USER_DYNAMIC_LINKER "/lib/ld.so.1"
320
diff -Naur '--exclude=*.swp' gcc-5.3.0-original/gcc/config/kopensolaris-gnu.h gcc-5.3.0-zip/gcc/config/kopensolaris-gnu.h
321 117 dgisselq
--- gcc-5.3.0-original/gcc/config/kopensolaris-gnu.h    2016-04-02 11:53:47.213604913 -0400
322 102 dgisselq
+++ gcc-5.3.0-zip/gcc/config/kopensolaris-gnu.h 2015-01-05 07:33:28.000000000 -0500
323
@@ -31,5 +31,4 @@
324
   while (0)
325
 
326
 #undef GNU_USER_DYNAMIC_LINKER
327
-#define GNU_USER_DYNAMIC_LINKER "/tools/lib/ld.so.1"
328
-
329
+#define GNU_USER_DYNAMIC_LINKER "/lib/ld.so.1"
330
diff -Naur '--exclude=*.swp' gcc-5.3.0-original/gcc/config/linux.h gcc-5.3.0-zip/gcc/config/linux.h
331 117 dgisselq
--- gcc-5.3.0-original/gcc/config/linux.h       2016-04-02 11:53:47.213604913 -0400
332 102 dgisselq
+++ gcc-5.3.0-zip/gcc/config/linux.h    2015-01-05 07:33:28.000000000 -0500
333
@@ -73,10 +73,10 @@
334
    GLIBC_DYNAMIC_LINKER must be defined for each target using them, or
335
    GLIBC_DYNAMIC_LINKER32 and GLIBC_DYNAMIC_LINKER64 for targets
336
    supporting both 32-bit and 64-bit compilation.  */
337
-#define UCLIBC_DYNAMIC_LINKER "/tools/lib/ld-uClibc.so.0"
338
-#define UCLIBC_DYNAMIC_LINKER32 "/tools/lib/ld-uClibc.so.0"
339
-#define UCLIBC_DYNAMIC_LINKER64 "/tools/lib/ld64-uClibc.so.0"
340
-#define UCLIBC_DYNAMIC_LINKERX32 "/tools/lib/ldx32-uClibc.so.0"
341
+#define UCLIBC_DYNAMIC_LINKER "/lib/ld-uClibc.so.0"
342
+#define UCLIBC_DYNAMIC_LINKER32 "/lib/ld-uClibc.so.0"
343
+#define UCLIBC_DYNAMIC_LINKER64 "/lib/ld64-uClibc.so.0"
344
+#define UCLIBC_DYNAMIC_LINKERX32 "/lib/ldx32-uClibc.so.0"
345
 #define BIONIC_DYNAMIC_LINKER "/system/bin/linker"
346
 #define BIONIC_DYNAMIC_LINKER32 "/system/bin/linker"
347
 #define BIONIC_DYNAMIC_LINKER64 "/system/bin/linker64"
348
diff -Naur '--exclude=*.swp' gcc-5.3.0-original/gcc/config/lm32/uclinux-elf.h gcc-5.3.0-zip/gcc/config/lm32/uclinux-elf.h
349 117 dgisselq
--- gcc-5.3.0-original/gcc/config/lm32/uclinux-elf.h    2016-04-02 11:53:47.213604913 -0400
350 102 dgisselq
+++ gcc-5.3.0-zip/gcc/config/lm32/uclinux-elf.h 2015-01-05 07:33:28.000000000 -0500
351
@@ -67,7 +67,7 @@
352
    %{shared:-shared} \
353
    %{symbolic:-Bsymbolic} \
354
    %{rdynamic:-export-dynamic} \
355
-   -dynamic-linker /tools/lib/ld-linux.so.2"
356
+   -dynamic-linker /lib/ld-linux.so.2"
357
 
358
 #define TARGET_OS_CPP_BUILTINS() GNU_USER_TARGET_OS_CPP_BUILTINS()
359
 
360
diff -Naur '--exclude=*.swp' gcc-5.3.0-original/gcc/config/m68k/linux.h gcc-5.3.0-zip/gcc/config/m68k/linux.h
361 117 dgisselq
--- gcc-5.3.0-original/gcc/config/m68k/linux.h  2016-04-02 11:53:47.213604913 -0400
362 102 dgisselq
+++ gcc-5.3.0-zip/gcc/config/m68k/linux.h       2015-01-05 07:33:28.000000000 -0500
363
@@ -71,7 +71,7 @@
364
    When the -shared link option is used a final link is not being
365
    done.  */
366
 
367
-#define GLIBC_DYNAMIC_LINKER "/tools/lib/ld.so.1"
368
+#define GLIBC_DYNAMIC_LINKER "/lib/ld.so.1"
369
 
370
 #undef LINK_SPEC
371
 #define LINK_SPEC "-m m68kelf %{shared} \
372
diff -Naur '--exclude=*.swp' gcc-5.3.0-original/gcc/config/microblaze/linux.h gcc-5.3.0-zip/gcc/config/microblaze/linux.h
373 117 dgisselq
--- gcc-5.3.0-original/gcc/config/microblaze/linux.h    2016-04-02 11:53:47.213604913 -0400
374 102 dgisselq
+++ gcc-5.3.0-zip/gcc/config/microblaze/linux.h 2015-05-28 10:08:19.000000000 -0400
375
@@ -28,7 +28,7 @@
376
 #undef TLS_NEEDS_GOT
377
 #define TLS_NEEDS_GOT 1
378
 
379
-#define DYNAMIC_LINKER "/tools/lib/ld.so.1"
380
+#define DYNAMIC_LINKER "/lib/ld.so.1"
381
 #undef  SUBTARGET_EXTRA_SPECS
382
 #define SUBTARGET_EXTRA_SPECS \
383
   { "dynamic_linker", DYNAMIC_LINKER }
384
diff -Naur '--exclude=*.swp' gcc-5.3.0-original/gcc/config/mips/linux.h gcc-5.3.0-zip/gcc/config/mips/linux.h
385 117 dgisselq
--- gcc-5.3.0-original/gcc/config/mips/linux.h  2016-04-02 11:53:47.213604913 -0400
386 102 dgisselq
+++ gcc-5.3.0-zip/gcc/config/mips/linux.h       2015-01-05 07:33:28.000000000 -0500
387
@@ -22,20 +22,20 @@
388
 #define GNU_USER_LINK_EMULATIONN32 "elf32%{EB:b}%{EL:l}tsmipn32"
389
 
390
 #define GLIBC_DYNAMIC_LINKER32 \
391
-  "%{mnan=2008:/tools/lib/ld-linux-mipsn8.so.1;:/tools/lib/ld.so.1}"
392
+  "%{mnan=2008:/lib/ld-linux-mipsn8.so.1;:/lib/ld.so.1}"
393
 #define GLIBC_DYNAMIC_LINKER64 \
394
-  "%{mnan=2008:/tools/lib64/ld-linux-mipsn8.so.1;:/tools/lib64/ld.so.1}"
395
+  "%{mnan=2008:/lib64/ld-linux-mipsn8.so.1;:/lib64/ld.so.1}"
396
 #define GLIBC_DYNAMIC_LINKERN32 \
397
-  "%{mnan=2008:/tools/lib32/ld-linux-mipsn8.so.1;:/tools/lib32/ld.so.1}"
398
+  "%{mnan=2008:/lib32/ld-linux-mipsn8.so.1;:/lib32/ld.so.1}"
399
 
400
 #undef UCLIBC_DYNAMIC_LINKER32
401
 #define UCLIBC_DYNAMIC_LINKER32 \
402
-  "%{mnan=2008:/tools/lib/ld-uClibc-mipsn8.so.0;:/tools/lib/ld-uClibc.so.0}"
403
+  "%{mnan=2008:/lib/ld-uClibc-mipsn8.so.0;:/lib/ld-uClibc.so.0}"
404
 #undef UCLIBC_DYNAMIC_LINKER64
405
 #define UCLIBC_DYNAMIC_LINKER64 \
406
-  "%{mnan=2008:/tools/lib/ld64-uClibc-mipsn8.so.0;:/tools/lib/ld64-uClibc.so.0}"
407
+  "%{mnan=2008:/lib/ld64-uClibc-mipsn8.so.0;:/lib/ld64-uClibc.so.0}"
408
 #define UCLIBC_DYNAMIC_LINKERN32 \
409
-  "%{mnan=2008:/tools/lib32/ld-uClibc-mipsn8.so.0;:/tools/lib32/ld-uClibc.so.0}"
410
+  "%{mnan=2008:/lib32/ld-uClibc-mipsn8.so.0;:/lib32/ld-uClibc.so.0}"
411
 
412
 #define BIONIC_DYNAMIC_LINKERN32 "/system/bin/linker32"
413
 #define GNU_USER_DYNAMIC_LINKERN32 \
414
diff -Naur '--exclude=*.swp' gcc-5.3.0-original/gcc/config/mn10300/linux.h gcc-5.3.0-zip/gcc/config/mn10300/linux.h
415 117 dgisselq
--- gcc-5.3.0-original/gcc/config/mn10300/linux.h       2016-04-02 11:53:47.213604913 -0400
416 102 dgisselq
+++ gcc-5.3.0-zip/gcc/config/mn10300/linux.h    2015-01-05 07:33:28.000000000 -0500
417
@@ -32,7 +32,7 @@
418
 #undef  ASM_SPEC
419
 #define ASM_SPEC ""
420
 
421
-#define GLIBC_DYNAMIC_LINKER "/tools/lib/ld.so.1"
422
+#define GLIBC_DYNAMIC_LINKER "/lib/ld.so.1"
423
 
424
 #undef  LINK_SPEC
425
 #define LINK_SPEC "%{mrelax:--relax} %{shared:-shared} \
426
diff -Naur '--exclude=*.swp' gcc-5.3.0-original/gcc/config/pa/pa-linux.h gcc-5.3.0-zip/gcc/config/pa/pa-linux.h
427 117 dgisselq
--- gcc-5.3.0-original/gcc/config/pa/pa-linux.h 2016-04-02 11:53:47.217604879 -0400
428 102 dgisselq
+++ gcc-5.3.0-zip/gcc/config/pa/pa-linux.h      2015-09-24 20:04:26.000000000 -0400
429
@@ -37,7 +37,7 @@
430
 /* Define this for shared library support because it isn't in the main
431
    linux.h file.  */
432
 
433
-#define GLIBC_DYNAMIC_LINKER "/tools/lib/ld.so.1"
434
+#define GLIBC_DYNAMIC_LINKER "/lib/ld.so.1"
435
 
436
 #undef LINK_SPEC
437
 #define LINK_SPEC "\
438
diff -Naur '--exclude=*.swp' gcc-5.3.0-original/gcc/config/rs6000/linux64.h gcc-5.3.0-zip/gcc/config/rs6000/linux64.h
439 117 dgisselq
--- gcc-5.3.0-original/gcc/config/rs6000/linux64.h      2016-04-02 11:53:47.217604879 -0400
440 102 dgisselq
+++ gcc-5.3.0-zip/gcc/config/rs6000/linux64.h   2015-03-09 19:18:57.000000000 -0400
441
@@ -357,14 +357,14 @@
442
 #undef LINK_OS_DEFAULT_SPEC
443
 #define LINK_OS_DEFAULT_SPEC "%(link_os_linux)"
444
 
445
-#define GLIBC_DYNAMIC_LINKER32 "/tools/lib/ld.so.1"
446
+#define GLIBC_DYNAMIC_LINKER32 "/lib/ld.so.1"
447
 #ifdef LINUX64_DEFAULT_ABI_ELFv2
448
-#define GLIBC_DYNAMIC_LINKER64 "%{mabi=elfv1:/tools/lib64/ld64.so.1;:/tools/lib64/ld64.so.2}"
449
+#define GLIBC_DYNAMIC_LINKER64 "%{mabi=elfv1:/lib64/ld64.so.1;:/lib64/ld64.so.2}"
450
 #else
451
-#define GLIBC_DYNAMIC_LINKER64 "%{mabi=elfv2:/tools/lib64/ld64.so.2;:/tools/lib64/ld64.so.1}"
452
+#define GLIBC_DYNAMIC_LINKER64 "%{mabi=elfv2:/lib64/ld64.so.2;:/lib64/ld64.so.1}"
453
 #endif
454
-#define UCLIBC_DYNAMIC_LINKER32 "/tools/lib/ld-uClibc.so.0"
455
-#define UCLIBC_DYNAMIC_LINKER64 "/tools/lib/ld64-uClibc.so.0"
456
+#define UCLIBC_DYNAMIC_LINKER32 "/lib/ld-uClibc.so.0"
457
+#define UCLIBC_DYNAMIC_LINKER64 "/lib/ld64-uClibc.so.0"
458
 #if DEFAULT_LIBC == LIBC_UCLIBC
459
 #define CHOOSE_DYNAMIC_LINKER(G, U) "%{mglibc:" G ";:" U "}"
460
 #elif DEFAULT_LIBC == LIBC_GLIBC
461
diff -Naur '--exclude=*.swp' gcc-5.3.0-original/gcc/config/rs6000/sysv4.h gcc-5.3.0-zip/gcc/config/rs6000/sysv4.h
462 117 dgisselq
--- gcc-5.3.0-original/gcc/config/rs6000/sysv4.h        2016-04-02 11:53:47.217604879 -0400
463 102 dgisselq
+++ gcc-5.3.0-zip/gcc/config/rs6000/sysv4.h     2015-09-24 09:46:45.000000000 -0400
464
@@ -757,8 +757,8 @@
465
 
466
 #define LINK_START_LINUX_SPEC ""
467
 
468
-#define GLIBC_DYNAMIC_LINKER "/tools/lib/ld.so.1"
469
-#define UCLIBC_DYNAMIC_LINKER "/tools/lib/ld-uClibc.so.0"
470
+#define GLIBC_DYNAMIC_LINKER "/lib/ld.so.1"
471
+#define UCLIBC_DYNAMIC_LINKER "/lib/ld-uClibc.so.0"
472
 #if DEFAULT_LIBC == LIBC_UCLIBC
473
 #define CHOOSE_DYNAMIC_LINKER(G, U) "%{mglibc:" G ";:" U "}"
474
 #elif !defined (DEFAULT_LIBC) || DEFAULT_LIBC == LIBC_GLIBC
475
diff -Naur '--exclude=*.swp' gcc-5.3.0-original/gcc/config/s390/linux.h gcc-5.3.0-zip/gcc/config/s390/linux.h
476 117 dgisselq
--- gcc-5.3.0-original/gcc/config/s390/linux.h  2016-04-02 11:53:47.217604879 -0400
477 102 dgisselq
+++ gcc-5.3.0-zip/gcc/config/s390/linux.h       2015-05-11 03:14:10.000000000 -0400
478
@@ -60,8 +60,8 @@
479
 #define MULTILIB_DEFAULTS { "m31" }
480
 #endif
481
 
482
-#define GLIBC_DYNAMIC_LINKER32 "/tools/lib/ld.so.1"
483
-#define GLIBC_DYNAMIC_LINKER64 "/tools/lib/ld64.so.1"
484
+#define GLIBC_DYNAMIC_LINKER32 "/lib/ld.so.1"
485
+#define GLIBC_DYNAMIC_LINKER64 "/lib/ld64.so.1"
486
 
487
 #undef  LINK_SPEC
488
 #define LINK_SPEC \
489
diff -Naur '--exclude=*.swp' gcc-5.3.0-original/gcc/config/sh/linux.h gcc-5.3.0-zip/gcc/config/sh/linux.h
490 117 dgisselq
--- gcc-5.3.0-original/gcc/config/sh/linux.h    2016-04-02 11:53:47.217604879 -0400
491 102 dgisselq
+++ gcc-5.3.0-zip/gcc/config/sh/linux.h 2015-01-05 07:33:28.000000000 -0500
492
@@ -43,7 +43,7 @@
493
 
494
 #define TARGET_ASM_FILE_END file_end_indicate_exec_stack
495
 
496
-#define GLIBC_DYNAMIC_LINKER "/tools/lib/ld-linux.so.2"
497
+#define GLIBC_DYNAMIC_LINKER "/lib/ld-linux.so.2"
498
 
499
 #undef SUBTARGET_LINK_EMUL_SUFFIX
500
 #define SUBTARGET_LINK_EMUL_SUFFIX "_linux"
501
diff -Naur '--exclude=*.swp' gcc-5.3.0-original/gcc/config/sparc/linux64.h gcc-5.3.0-zip/gcc/config/sparc/linux64.h
502 117 dgisselq
--- gcc-5.3.0-original/gcc/config/sparc/linux64.h       2016-04-02 11:53:47.217604879 -0400
503 102 dgisselq
+++ gcc-5.3.0-zip/gcc/config/sparc/linux64.h    2015-01-05 07:33:28.000000000 -0500
504
@@ -84,8 +84,8 @@
505
    When the -shared link option is used a final link is not being
506
    done.  */
507
 
508
-#define GLIBC_DYNAMIC_LINKER32 "/tools/lib/ld-linux.so.2"
509
-#define GLIBC_DYNAMIC_LINKER64 "/tools/lib64/ld-linux.so.2"
510
+#define GLIBC_DYNAMIC_LINKER32 "/lib/ld-linux.so.2"
511
+#define GLIBC_DYNAMIC_LINKER64 "/lib64/ld-linux.so.2"
512
 
513
 #ifdef SPARC_BI_ARCH
514
 
515
@@ -193,7 +193,7 @@
516
 #else /* !SPARC_BI_ARCH */
517
 
518
 #undef LINK_SPEC
519
-#define LINK_SPEC "-m elf64_sparc -Y P,%R/tools/lib64 %{shared:-shared} \
520
+#define LINK_SPEC "-m elf64_sparc -Y P,%R/usr/lib64 %{shared:-shared} \
521
   %{!shared: \
522
     %{!static: \
523
       %{rdynamic:-export-dynamic} \
524
diff -Naur '--exclude=*.swp' gcc-5.3.0-original/gcc/config/sparc/linux.h gcc-5.3.0-zip/gcc/config/sparc/linux.h
525 117 dgisselq
--- gcc-5.3.0-original/gcc/config/sparc/linux.h 2016-04-02 11:53:47.217604879 -0400
526 102 dgisselq
+++ gcc-5.3.0-zip/gcc/config/sparc/linux.h      2015-01-05 07:33:28.000000000 -0500
527
@@ -83,7 +83,7 @@
528
    When the -shared link option is used a final link is not being
529
    done.  */
530
 
531
-#define GLIBC_DYNAMIC_LINKER "/tools/lib/ld-linux.so.2"
532
+#define GLIBC_DYNAMIC_LINKER "/lib/ld-linux.so.2"
533
 
534
 #undef  LINK_SPEC
535
 #define LINK_SPEC "-m elf32_sparc %{shared:-shared} \
536
diff -Naur '--exclude=*.swp' gcc-5.3.0-original/gcc/config/vax/linux.h gcc-5.3.0-zip/gcc/config/vax/linux.h
537 117 dgisselq
--- gcc-5.3.0-original/gcc/config/vax/linux.h   2016-04-02 11:53:47.217604879 -0400
538 102 dgisselq
+++ gcc-5.3.0-zip/gcc/config/vax/linux.h        2015-01-05 07:33:28.000000000 -0500
539
@@ -41,7 +41,7 @@
540
   %{!shared: \
541
     %{!static: \
542
       %{rdynamic:-export-dynamic} \
543
-      -dynamic-linker /tools/lib/ld.so.1} \
544
+      -dynamic-linker /lib/ld.so.1} \
545
     %{static:-static}}"
546
 
547
 #undef  WCHAR_TYPE
548
diff -Naur '--exclude=*.swp' gcc-5.3.0-original/gcc/config/xtensa/linux.h gcc-5.3.0-zip/gcc/config/xtensa/linux.h
549 117 dgisselq
--- gcc-5.3.0-original/gcc/config/xtensa/linux.h        2016-04-02 11:53:47.217604879 -0400
550 102 dgisselq
+++ gcc-5.3.0-zip/gcc/config/xtensa/linux.h     2015-01-05 07:33:28.000000000 -0500
551
@@ -44,7 +44,7 @@
552
   %{mlongcalls:--longcalls} \
553
   %{mno-longcalls:--no-longcalls}"
554
 
555
-#define GLIBC_DYNAMIC_LINKER "/tools/lib/ld.so.1"
556
+#define GLIBC_DYNAMIC_LINKER "/lib/ld.so.1"
557
 
558
 #undef LINK_SPEC
559
 #define LINK_SPEC \
560
diff -Naur '--exclude=*.swp' gcc-5.3.0-original/gcc/config/zip/netbsd.h gcc-5.3.0-zip/gcc/config/zip/netbsd.h
561
--- gcc-5.3.0-original/gcc/config/zip/netbsd.h  1969-12-31 19:00:00.000000000 -0500
562
+++ gcc-5.3.0-zip/gcc/config/zip/netbsd.h       2016-01-30 15:04:14.796899050 -0500
563
@@ -0,0 +1,82 @@
564
+////////////////////////////////////////////////////////////////////////////////
565
+//
566
+// Filename:   netbsd.h
567
+//
568
+// Project:    Zip CPU backend for the GNU Compiler Collection
569
+//
570
+// Purpose:
571
+//
572
+// Creator:    Dan Gisselquist, Ph.D.
573
+//             Gisselquist Technology, LLC
574
+//
575
+////////////////////////////////////////////////////////////////////////////////
576
+//
577
+// Copyright (C) 2016, Gisselquist Technology, LLC
578
+//
579
+// This program is free software (firmware): you can redistribute it and/or
580
+// modify it under the terms of  the GNU General Public License as published
581
+// by the Free Software Foundation, either version 3 of the License, or (at
582
+// your option) any later version.
583
+//
584
+// This program is distributed in the hope that it will be useful, but WITHOUT
585
+// ANY WARRANTY; without even the implied warranty of MERCHANTIBILITY or
586
+// FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
587
+// for more details.
588
+//
589
+// You should have received a copy of the GNU General Public License along
590
+// with this program.  (It's in the $(ROOT)/doc directory, run make with no
591
+// target there if the PDF file isn't present.)  If not, see
592
+// <http://www.gnu.org/licenses/> for a copy.
593
+//
594
+// License:    GPL, v3, as defined and found on www.gnu.org,
595
+//             http://www.gnu.org/licenses/gpl.html
596
+//
597
+//
598
+////////////////////////////////////////////////////////////////////////////////
599
+#ifndef        ZIP_NETBSD_H
600
+#define        ZIP_NETBSD_H
601
+
602
+/* Define default target values. */
603
+
604
+#undef MACHINE_TYPE
605
+#define        MACHINE_TYPE    "NetBSD/Zip ELF"
606
+
607
+#undef TARGET_OS_CPP_BUILTINS
608
+#define        TARGET_OS_CPP_BUILTINS()        \
609
+       do { NETBSD_OS_CPP_BUILTINS_ELF();              \
610
+       builtin_define("__ZIPCPU__");                   \
611
+       builtin_assert("cpu=zip");                      \
612
+       builtin_assert("machine=zip");                  \
613
+       } while(0);
614
+
615
+#undef CPP_SPEC
616
+#define        CPP_SPEC        NETBSD_CPP_SPEC
617
+
618
+#undef STARTFILE_SPEC
619
+#define        STARTFILE_SPEC  NETBSD_STARTFILE_SPEC
620
+
621
+#undef ENDFILE_SPEC
622
+#define        ENDFILE_SPEC    NETBSD_ENDFILE_SPEC
623
+
624
+#undef LIB_SPEC
625
+#define        LIB_SPEC        NETBSD_LIB_SPEC
626
+
627
+#undef TARGET_VERSION
628
+#define        TARGET_VERSION  fprintf(stderr, " (%s)", MACHINE_TYPE);
629
+
630
+/* Make gcc agree with <machine/ansi.h> */
631
+
632
+#undef WCHAR_TYPE
633
+#define        WCHAR_TYPE      "int"
634
+
635
+#undef WCHAR_TYPE_SIZE
636
+#define        WCHAR_TYPE_SIZE 32
637
+
638
+#undef WINT_TYPE
639
+#define        WINT_TYPE       "int"
640
+
641
+/* Clean up after the generic Zip/ELF configuration. */
642
+#undef MD_EXEC_PREFIX
643
+#undef MD_STARTFILE_PREFIX
644
+
645
+#endif /* ZIP_NETBSD_H */
646
diff -Naur '--exclude=*.swp' gcc-5.3.0-original/gcc/config/zip/t-zip gcc-5.3.0-zip/gcc/config/zip/t-zip
647
--- gcc-5.3.0-original/gcc/config/zip/t-zip     1969-12-31 19:00:00.000000000 -0500
648
+++ gcc-5.3.0-zip/gcc/config/zip/t-zip  2016-02-04 19:00:59.939652587 -0500
649
@@ -0,0 +1,47 @@
650
+################################################################################
651
+##
652
+## Filename:   t-zip
653
+##
654
+## Project:    Zip CPU backend for the GNU Compiler Collection
655
+##
656
+## Purpose:
657
+##
658
+## Creator:    Dan Gisselquist, Ph.D.
659
+##             Gisselquist Technology, LLC
660
+##
661
+################################################################################
662
+##
663
+## Copyright (C) 2016, Gisselquist Technology, LLC
664
+##
665
+## This program is free software (firmware): you can redistribute it and/or
666
+## modify it under the terms of  the GNU General Public License as published
667
+## by the Free Software Foundation, either version 3 of the License, or (at
668
+## your option) any later version.
669
+##
670
+## This program is distributed in the hope that it will be useful, but WITHOUT
671
+## ANY WARRANTY; without even the implied warranty of MERCHANTIBILITY or
672
+## FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
673
+## for more details.
674
+##
675
+## You should have received a copy of the GNU General Public License along
676
+## with this program.  (It's in the $(ROOT)/doc directory, run make with no
677
+## target there if the PDF file isn't present.)  If not, see
678
+## <http://www.gnu.org/licenses/> for a copy.
679
+##
680
+## License:    GPL, v3, as defined and found on www.gnu.org,
681
+##             http://www.gnu.org/licenses/gpl.html
682
+##
683
+##
684
+################################################################################
685
+
686
+FPBIT = fp-bit.c
687
+DPBIT = dp-bit.c
688
+
689
+# dp-bit.c: $(srcdir)/config/fp-bit.c
690
+       # cat $(srcdir)/config/fp-bit.c > dp-bit.c
691
+#
692
+# fp-bit.c: $(srcdir)/config/fp-bit.c
693
+       # echo '#define FLOAT" > fp-bit.c
694
+       # cat $(srcdir)/config/fp-bit.c >> fp-bit.c
695
+
696
+
697
diff -Naur '--exclude=*.swp' gcc-5.3.0-original/gcc/config/zip/zip.c gcc-5.3.0-zip/gcc/config/zip/zip.c
698
--- gcc-5.3.0-original/gcc/config/zip/zip.c     1969-12-31 19:00:00.000000000 -0500
699 117 dgisselq
+++ gcc-5.3.0-zip/gcc/config/zip/zip.c  2016-04-01 06:26:30.217272207 -0400
700
@@ -0,0 +1,2341 @@
701 102 dgisselq
+////////////////////////////////////////////////////////////////////////////////
702
+//
703
+// Filename:   zip.c
704
+//
705
+// Project:    Zip CPU backend for the GNU Compiler Collection
706
+//
707
+// Purpose:
708
+//
709
+// Creator:    Dan Gisselquist, Ph.D.
710
+//             Gisselquist Technology, LLC
711
+//
712
+////////////////////////////////////////////////////////////////////////////////
713
+//
714
+// Copyright (C) 2016, Gisselquist Technology, LLC
715
+//
716
+// This program is free software (firmware): you can redistribute it and/or
717
+// modify it under the terms of  the GNU General Public License as published
718
+// by the Free Software Foundation, either version 3 of the License, or (at
719
+// your option) any later version.
720
+//
721
+// This program is distributed in the hope that it will be useful, but WITHOUT
722
+// ANY WARRANTY; without even the implied warranty of MERCHANTIBILITY or
723
+// FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
724
+// for more details.
725
+//
726
+// You should have received a copy of the GNU General Public License along
727
+// with this program.  (It's in the $(ROOT)/doc directory, run make with no
728
+// target there if the PDF file isn't present.)  If not, see
729
+// <http://www.gnu.org/licenses/> for a copy.
730
+//
731
+// License:    GPL, v3, as defined and found on www.gnu.org,
732
+//             http://www.gnu.org/licenses/gpl.html
733
+//
734
+//
735
+////////////////////////////////////////////////////////////////////////////////
736
+#include "config.h"
737
+#include "system.h"
738
+#include "coretypes.h"
739
+#include "tm.h"
740
+#include "rtl.h"
741
+#include "dominance.h"
742
+#include "cfg.h"
743
+#include "cfgrtl.h"
744
+#include "cfganal.h"
745
+#include "lcm.h"
746
+#include "cfgbuild.h"
747
+#include "cfgcleanup.h"
748
+#include "predict.h"
749
+#include "basic-block.h"
750
+#include "df.h"
751
+#include "hashtab.h"
752
+#include "hash-set.h"
753
+#include "machmode.h"
754
+#include "symtab.h"
755
+#include "rtlhash.h"
756
+#include "tree.h"
757
+#include "regs.h"
758
+#include "hard-reg-set.h"
759
+#include "real.h"
760
+#include "insn-config.h"
761
+#include "conditions.h"
762
+#include "output.h"
763
+#include "insn-attr.h"
764
+#include "flags.h"
765
+#include "expr.h"
766
+#include "function.h"
767
+#include "recog.h"
768
+#include "toplev.h"
769
+#include "ggc.h"
770
+#include "builtins.h"
771
+#include "calls.h"
772
+#include "langhooks.h"
773
+#include "optabs.h"
774
+#include "explow.h"
775
+#include "emit-rtl.h"
776
+
777
+// #include "tmp_p.h"
778
+#include "target.h"
779
+#include "target-def.h"
780
+// #include "tm-constrs.h"
781
+// #include "tm-preds.h"
782
+
783
+#include "diagnostic.h"
784
+// #include "integrate.h"
785
+
786
+// static int  zip_arg_partial_bytes(CUMULATIVE_ARGS *, enum machine_mode, tree, bool);
787
+// static      bool    zip_pass_by_reference(CUMULATIVE_ARGS *, enum machine_mode, const_tree, bool);
788
+static bool    zip_return_in_memory(const_tree, const_tree);
789
+static bool    zip_frame_pointer_required(void);
790
+// static      bool    zip_must_pass_in_stack(enum machine_mode, const_tree);
791
+
792
+// static      void    zip_setup_incoming_varargs(CUMULATIVE_ARGS *, enum machine_mode, tree, int *, int);
793
+static void zip_function_arg_advance(cumulative_args_t ca, enum machine_mode mode,
794
+               const_tree type, bool named);
795
+static rtx zip_function_arg(cumulative_args_t ca, enum machine_mode mode, const_tree type, bool named);
796
+
797
+static void    zip_asm_trampoline_template(FILE *);
798
+static void    zip_trampoline_init(rtx, tree, rtx);
799
+static void    zip_init_builtins(void);
800
+static tree zip_builtin_decl(unsigned, bool);
801
+// static void zip_asm_output_anchor(rtx x);
802
+       void    zip_asm_output_def(FILE *s, const char *n, const char *v);
803
+       void    zip_update_cc_notice(rtx exp, rtx_insn *insn);
804
+static rtx     zip_expand_builtin(tree exp, rtx target, rtx subtarget,
805
+                       enum machine_mode tmode, int    ignore);
806
+static bool    zip_scalar_mode_supported_p(enum machine_mode mode);
807
+static bool    zip_libgcc_floating_mode_supported_p(enum machine_mode mode);
808
+static int     zip_address_cost(rtx addr, enum machine_mode mode, addr_space_t as, bool spd);
809
+static bool    zip_mode_dependent_address_p(const_rtx addr, addr_space_t);
810
+static unsigned HOST_WIDE_INT  zip_const_anchor = 0x20000;
811 111 dgisselq
+static          HOST_WIDE_INT  zip_min_opb_imm = -0x200000;
812
+static          HOST_WIDE_INT  zip_max_opb_imm =  0x1fffff;
813 102 dgisselq
+static          HOST_WIDE_INT  zip_min_anchor_offset = -0x20000;
814
+static          HOST_WIDE_INT  zip_max_anchor_offset =  0x1ffff;
815
+static          HOST_WIDE_INT  zip_min_mov_offset = -0x1000;
816
+static          HOST_WIDE_INT  zip_max_mov_offset =  0x0fff;
817
+static int     zip_sched_issue_rate(void) { return 1; }
818
+static bool    zip_legitimate_address_p(machine_mode, rtx, bool);
819
+static bool    zip_legitimate_move_operand_p(machine_mode, rtx, bool);
820
+       void    zip_debug_rtx_pfx(const char *, const_rtx x);
821
+       void    zip_debug_rtx(const_rtx x);
822
+static void    zip_override_options(void);
823
+static bool    zip_can_eliminate(int from ATTRIBUTE_UNUSED, int to);
824
+static int     zip_memory_move_cost(machine_mode, reg_class_t, bool);
825 111 dgisselq
+static rtx     zip_legitimize_address(rtx x, rtx oldx, machine_mode mode);
826 117 dgisselq
+static bool    zip_cannot_modify_jumps_p(void);
827 102 dgisselq
+
828
+
829 103 dgisselq
+#define        ALL_DEBUG_OFF   false
830 102 dgisselq
+#define        ALL_DEBUG_ON    false
831
+
832
+enum ZIP_BUILTIN_ID_CODE {
833
+       ZIP_BUILTIN_RTU,
834
+       ZIP_BUILTIN_HALT,
835
+       ZIP_BUILTIN_IDLE,
836
+       ZIP_BUILTIN_SYSCALL,
837
+       ZIP_BUILTIN_SAVE_CONTEXT,
838
+       ZIP_BUILTIN_RESTORE_CONTEXT,
839
+       ZIP_BUILTIN_BITREV,
840
+       ZIP_BUILTIN_CC,
841 117 dgisselq
+       ZIP_BUILTIN_UCC,
842 102 dgisselq
+       ZIP_BUILTIN_MAX
843
+};
844
+
845
+static GTY (()) tree   zip_builtins[(int)ZIP_BUILTIN_MAX];
846
+static enum insn_code  zip_builtins_icode[(int)ZIP_BUILTIN_MAX];
847
+
848
+
849
+#include "gt-zip.h"
850
+
851
+/* The Global 'targetm' Variable. */
852
+struct gcc_target      targetm = TARGET_INITIALIZER;
853
+
854
+
855
+enum   reg_class zip_reg_class(int);
856
+
857
+#define        LOSE_AND_RETURN(msgid, x)               \
858
+       do {                                    \
859
+               zip_operand_lossage(msgid, x);  \
860
+               return;                         \
861
+       } while(0)
862
+
863
+/* Per-function machine data. */
864
+struct GTY(()) machine_function
865
+{
866
+       /* number of pretented arguments for varargs */
867
+       int     pretend_size;
868
+
869
+       /* Number of bytes saved on the stack for local variables. */
870
+       int     local_vars_size;
871
+
872
+       /* Number of bytes saved on stack for register save area */
873
+       int     saved_reg_size;
874
+       int     save_ret;
875
+
876
+       int     sp_fp_offset;
877
+       bool    fp_needed;
878
+       int     size_for_adjusting_sp;
879
+};
880
+
881
+/* Allocate a chunk of memory for per-function machine-dependent data. */
882
+
883
+static struct machine_function *
884
+zip_init_machine_status(void) {
885
+       return ggc_cleared_alloc<machine_function>();
886
+}
887
+
888
+static void
889
+zip_override_options(void)
890
+{
891
+       init_machine_status = zip_init_machine_status;
892
+}
893
+
894
+enum   reg_class
895
+zip_reg_class(int regno)
896
+{
897
+       if (is_ZIP_GENERAL_REG(regno)) {
898
+               return GENERAL_REGS;
899
+       } else if (is_ZIP_REG(regno)) {
900
+               return ALL_REGS;
901
+       } return NO_REGS;
902
+}
903
+
904
+/* Worker function for TARGET_RETURN_IN_MEMORY. */
905
+static bool
906
+zip_return_in_memory(const_tree type, const_tree fntype ATTRIBUTE_UNUSED) {
907
+       const   HOST_WIDE_INT size = int_size_in_bytes(type);
908
+       return (size == -1)||(size > UNITS_PER_WORD);
909
+}
910
+
911
+/* Emit an error emssage when we're in an asm, and a fatal error for "normal"
912
+ * insn.  Formatted output isn't easily implemented, since we use output operand
913
+ * lossage to output the actual message and handle the categorization of the
914
+ * error.  */
915
+
916
+static void
917
+zip_operand_lossage(const char *msgid, rtx op) {
918
+       fprintf(stderr, "Operand lossage??\n");
919
+       debug_rtx(op);
920
+       zip_debug_rtx(op);
921
+       output_operand_lossage("%s", msgid);
922
+}
923
+
924
+/* The PRINT_OPERAND_ADDRESS worker.   */
925
+void
926
+zip_print_operand_address(FILE *file, rtx x) {
927
+       const bool      dbg = ((ALL_DEBUG_ON)||(false))&&(!ALL_DEBUG_OFF);
928
+
929
+       if (dbg) zip_debug_rtx(x);
930
+       switch(GET_CODE(x)) {
931
+               case REG:
932
+                       fprintf(file, "(%s)", reg_names[REGNO(x)]);
933
+                       break;
934
+               case SYMBOL_REF:
935
+                       fprintf(file, "%s", XSTR(x,0));
936
+                       break;
937
+               case LABEL_REF:
938
+                       x = LABEL_REF_LABEL(x);
939
+               case CODE_LABEL:
940
+                       { char buf[256];
941
+                       ASM_GENERATE_INTERNAL_LABEL(buf, "L", CODE_LABEL_NUMBER(x));
942
+#ifdef ASM_OUTPUT_LABEL_REF
943
+                       ASM_OUTPUT_LABEL_REF(file, buf);
944
+#else
945
+                       assemble_name(file, buf);
946
+#endif
947
+                       }
948
+                       break;
949
+               case PLUS:
950 111 dgisselq
+                       if (!REG_P(XEXP(x, 0))) {
951
+                               fprintf(stderr, "Unsupported address construct\n");
952
+                               zip_debug_rtx(x);
953 102 dgisselq
+                               abort();
954 111 dgisselq
+                       } if (CONST_INT_P(XEXP(x, 1))) {
955 102 dgisselq
+                               if (INTVAL(XEXP(x,1))!=0) {
956
+                                       fprintf(file, "%ld(%s)",
957
+                                       INTVAL(XEXP(x, 1)),
958
+                                       reg_names[REGNO(XEXP(x, 0))]);
959
+                               } else {
960
+                                       fprintf(file, "(%s)",
961
+                                       reg_names[REGNO(XEXP(x, 0))]);
962
+                               }
963
+                       } else if (GET_CODE(XEXP(x,1)) == SYMBOL_REF) {
964
+                               fprintf(file, "%s(%s)", XSTR(x,0),
965
+                                       reg_names[REGNO(XEXP(x, 0))]);
966
+                       } else if ((GET_CODE(XEXP(x, 1)) == MINUS)
967
+                               && (GET_CODE(XEXP(XEXP(x, 1), 0))==SYMBOL_REF)
968
+                               && (GET_CODE(XEXP(XEXP(x, 1), 1))==SYMBOL_REF)) {
969
+                               fprintf(file, "%s-%s(%s)",
970
+                                       XSTR(XEXP(XEXP(x, 1),0),0),
971
+                                       XSTR(XEXP(XEXP(x, 1),1),0),
972
+                                       reg_names[REGNO(XEXP(x, 0))]);
973
+                       } else
974
+                               fprintf(file, "#INVALID(%s)",
975
+                                       reg_names[REGNO(XEXP(x, 0))]);
976
+                       /*
977
+                       else if (GET_CODE(XEXP(addr, 1)) == LABEL)
978
+                               fprintf(file, "%s(%s)",
979
+                                       GET_CODE(XEXP(addr, 1)),
980
+                                       reg_names[REGNO(GET_CODE(XEXP(addr, 0)))]);
981
+                       else if ((GET_CODE(XEXP(addr, 1)) == MINUS)
982
+                               && (GET_CODE(XEXP(GET_CODE(XEXP(addr, 1)), 0))==LABEL)
983
+                               && (GET_CODE(XEXP(GET_CODE(XEXP(addr, 1)), 1))==LABEL)) {
984
+                               fprintf(file, "%s-%s(%s)",
985
+                                       reg_names[REGNO(GET_CODE(XEXP(addr, 0)))]);
986
+                                       reg_names[REGNO(GET_CODE(XEXP(addr, 0)))]);
987
+                                       reg_names[REGNO(GET_CODE(XEXP(addr, 0)))]);
988
+                       }
989
+                       */
990
+                       break;
991
+               // We don't support direct memory addressing within our
992
+               // instruction set, even though the instructions themselves
993
+               // would support direct memory addressing of the lower 18 bits
994
+               // of memory space.
995
+               case MEM:
996
+                       if (dbg) zip_debug_rtx(x);
997
+                       zip_print_operand_address(file, XEXP(x, 0));
998
+                       break;
999 111 dgisselq
+               case CONST_INT:
1000
+                       fprintf(file, "%ld",INTVAL(x));
1001
+                       break;
1002 102 dgisselq
+               default:
1003 111 dgisselq
+                       fprintf(stderr, "Unknown address format\n");
1004
+                       zip_debug_rtx(x);
1005 102 dgisselq
+                       abort(); break;
1006
+                       // output_addr_const(file, x);
1007
+               break;
1008
+       }
1009
+}
1010
+
1011
+/* The PRINT_OPERAND worker. */
1012
+
1013
+void
1014
+zip_print_operand(FILE *file, rtx x, int code)
1015
+{
1016
+       rtx operand = x;
1017
+       int     rgoff = 0;
1018
+
1019
+       // fprintf(file, "Print Operand!\n");
1020
+
1021
+       /* New code entries should just be added to the switch below.  If
1022
+        * handling is finished, just return.  If handling was just a
1023
+        * modification of the operand, the modified operand should be put in
1024
+        * "operand", and then do a break to let default handling
1025
+        * (zero-modifier) output the operand.
1026
+        */
1027
+       switch(code) {
1028
+               case 0:
1029
+                       /* No code, print as usual. */
1030
+                       break;
1031
+               case 'L':
1032
+                       /* Lower of two registers, print one up */
1033
+                       rgoff = 1;
1034
+                       break;
1035
+               case 'R':
1036
+               case 'H':
1037
+                       /* Higher of a register pair, print normal */
1038
+                       break;
1039
+
1040
+               default:
1041
+                       LOSE_AND_RETURN("invalid operand modifier letter", x);
1042
+       }
1043
+
1044
+       /* Print an operand as without a modifier letter. */
1045
+       switch (GET_CODE(operand)) {
1046
+       case REG:
1047
+               if (REGNO(operand)+rgoff >= FIRST_PSEUDO_REGISTER)
1048
+                       internal_error("internal error: bad register: %d", REGNO(operand));
1049
+               fprintf(file, "%s", reg_names[REGNO(operand)+rgoff]);
1050
+               return;
1051
+       case SCRATCH:
1052
+               LOSE_AND_RETURN("Need a scratch register", x);
1053
+               return;
1054
+
1055
+       case CODE_LABEL:
1056
+       case LABEL_REF:
1057
+       case SYMBOL_REF:
1058
+       case PLUS:
1059
+               PRINT_OPERAND_ADDRESS(file, operand);
1060
+               return;
1061
+       case MEM:
1062
+               PRINT_OPERAND_ADDRESS(file, XEXP(operand, 0));
1063
+               return;
1064
+
1065
+       default:
1066
+               /* No need to handle all strange variants, let
1067
+                * output_addr_const do it for us.
1068
+                */
1069
+               if (CONSTANT_P(operand)) {
1070
+                       output_addr_const(file, operand);
1071
+                       return;
1072
+               }
1073
+
1074
+               LOSE_AND_RETURN("unexpected operand", x);
1075
+       }
1076
+}
1077
+
1078
+static bool
1079
+zip_frame_pointer_required(void)
1080
+{
1081
+       // This should really depend upon whether we have variable sized
1082
+       // arguments in our frame or not.  Once this fails, let's look
1083
+       // at what the problem was and then whether or not we can detect
1084
+       // it.
1085
+       //
1086
+       // Use a GCC global to determine our answer
1087 103 dgisselq
+       if (cfun->calls_alloca)
1088
+               return true;
1089 102 dgisselq
+       return (frame_pointer_needed);
1090
+/*
1091
+       fprintf(stderr, "ZIP_FRAME_POINTER_REQUIRED()\n");
1092
+       if (frame_pointer_needed) {
1093
+               fprintf(stderr, "FRAME_POINTER_NEEDED is true\n");
1094
+               zip_debug_rtx(frame_pointer_rtx);
1095
+               if (frame_pointer_rtx == NULL_RTX)
1096
+                       return true;
1097
+               if (GET_CODE(frame_pointer_rtx)==PLUS) {
1098
+                       if ((REG_P(XEXP(frame_pointer_rtx,0)))
1099
+                               &&(REGNO(XEXP(frame_pointer_rtx, 0))==zip_SP)
1100
+                               &&(CONST_INT_P(XEXP(frame_pointer_rtx,1))))
1101
+                               return false;
1102
+                       if ((REG_P(XEXP(frame_pointer_rtx,1)))
1103
+                               &&(REGNO(XEXP(frame_pointer_rtx, 1))==zip_SP)
1104
+                               &&(CONST_INT_P(XEXP(frame_pointer_rtx,0))))
1105
+                               return false;
1106
+                       return true;
1107
+               } else if ((REG_P(frame_pointer_rtx))
1108
+                               &&(REGNO(frame_pointer_rtx) == zip_SP))
1109
+                       return false;
1110
+               return true;
1111
+       } else return false;
1112
+*/
1113
+}
1114
+
1115
+/* Determine whether or not a register needs to be saved on the stack or not.
1116
+ */
1117
+static bool
1118
+zip_save_reg(int regno) {
1119
+       if (regno == 0)
1120
+               return ((!crtl->is_leaf)
1121
+                       ||((df_regs_ever_live_p(0))&&(!call_used_regs[0])));
1122
+       else if ((regno == zip_GOT)&&(!ZIP_PIC))
1123
+               return  ((df_regs_ever_live_p(regno))
1124
+                               &&(!call_used_regs[regno]));
1125
+       else if (regno == zip_FP)
1126
+               return((zip_frame_pointer_required())||((df_regs_ever_live_p(regno))
1127
+                               &&(!call_used_regs[regno])));
1128
+       else if (regno < zip_FP)
1129
+               return  ((df_regs_ever_live_p(regno))
1130
+                               &&(!call_used_regs[regno]));
1131
+       return false;
1132
+}
1133
+
1134
+/* Compute the size of the local area and the size to be adjusted by the
1135
+ * prologue and epilogue.
1136
+ *
1137
+ * Here's what we are looking at (top is the current, bottom is the last ...)
1138
+ *
1139
+ *     Stack Pointer ->
1140
+ *                     Local variables (could be variable size)
1141
+ *     Frame Pointer ->        (= Stack Pointer + sp_fp_offset)
1142
+ *                     Saved return address, if saved
1143
+ *                     Other Saved registers
1144
+ *                     Saved frame pointer (if used)
1145
+ *                     Saved R12, if used
1146
+ *                     (Stack pointer is not saved)
1147
+ *     Original stack pointer ->       (= Stack_Pointer +size_for_adjusting_sp)
1148
+ *                     Called arguments (not passed in registers)
1149
+ *                     Return arguments (not R1, args.pretend_args_size)
1150
+ *             (Prior function's stack frame ... )
1151
+ *
1152
+ */
1153
+static void
1154
+zip_compute_frame(void) {
1155
+       int     regno;
1156
+       int     args_size;
1157
+
1158
+       // gcc_assert(crtl);
1159
+       gcc_assert(cfun);
1160
+       gcc_assert(cfun->machine);
1161
+
1162
+       args_size=(ACCUMULATE_OUTGOING_ARGS ? crtl->outgoing_args_size : 0);
1163
+
1164
+       if(crtl->args.pretend_args_size > 0) {
1165
+               args_size += crtl->args.pretend_args_size;
1166
+               // printf("%s pretend_args_size : %d\n", current_function_name(),
1167
+                       // crtl->args.pretend_args_size);
1168
+               cfun->machine->pretend_size = crtl->args.pretend_args_size;
1169
+       }
1170
+
1171
+       cfun->machine->local_vars_size = get_frame_size();
1172
+
1173
+       // Save callee-saved registers.
1174
+       cfun->machine->saved_reg_size = 0;
1175
+       for(regno=0; regno < FIRST_PSEUDO_REGISTER; regno++) {
1176
+               if (zip_save_reg(regno))
1177
+                       cfun->machine->saved_reg_size ++;
1178
+       }
1179
+
1180
+       cfun->machine->fp_needed = (zip_frame_pointer_required());
1181
+
1182
+       if ((cfun->machine->fp_needed)&&
1183
+                       (!df_regs_ever_live_p(zip_FP))) {
1184
+               cfun->machine->saved_reg_size ++;
1185
+       }
1186
+
1187
+       cfun->machine->sp_fp_offset = args_size + cfun->machine->local_vars_size;
1188
+       cfun->machine->size_for_adjusting_sp = cfun->machine->local_vars_size
1189
+                       + cfun->machine->saved_reg_size
1190
+                       + args_size;
1191
+
1192
+       /*
1193
+       if (cfun->machine->fp_needed)
1194
+               frame_pointer_rtx = gen_rtx_REG(Pmode, zip_FP);
1195
+       else
1196
+               frame_pointer_rtx = plus_constant(Pmode, gen_rtx_REG(Pmode, zip_SP),
1197
+                       cfun->machine->sp_fp_offset);
1198
+       */
1199
+}
1200
+
1201
+void
1202
+zip_expand_prologue(void) {
1203
+       rtx     insn;
1204
+
1205
+       const bool      dbg = ((ALL_DEBUG_ON)||(false))&&(!ALL_DEBUG_OFF);
1206
+       zip_compute_frame();
1207
+
1208 103 dgisselq
+       if (dbg)  fprintf(stderr, "Computing Prologue instructions\n");
1209 102 dgisselq
+       if (cfun->machine->size_for_adjusting_sp != 0) {
1210
+               insn = emit_insn(gen_subsi3(stack_pointer_rtx,
1211
+                               stack_pointer_rtx,
1212
+                       gen_int_mode(cfun->machine->size_for_adjusting_sp,
1213
+                               SImode)));
1214
+                       // cfun->machine->sp_fp_offset
1215
+
1216
+               RTX_FRAME_RELATED_P(insn) = 1;
1217
+       }
1218
+
1219
+       {
1220
+               int offset = 0, regno;
1221
+               for(regno=0; regno < FIRST_PSEUDO_REGISTER; regno++) {
1222
+                       if (zip_save_reg(regno)) {
1223
+                               insn=emit_insn(gen_movsi_sto(
1224
+                                       gen_rtx_MEM(SImode, plus_constant(
1225
+                                               Pmode, stack_pointer_rtx,
1226
+                                               cfun->machine->sp_fp_offset
1227
+                                               +offset++, true)),
1228
+                                       gen_rtx_REG(SImode, regno)));
1229
+                               RTX_FRAME_RELATED_P(insn) = 1;
1230
+                       }
1231
+               }
1232 103 dgisselq
+               if (dbg)  fprintf(stderr, "%d registers saved%s\n", offset,
1233
+                       (crtl->saves_all_registers)?", should be all of them":", less than all");
1234 102 dgisselq
+       }
1235
+
1236
+       if (cfun->machine->fp_needed) {
1237
+               if (dbg) zip_debug_rtx(stack_pointer_rtx);
1238
+               if (dbg) zip_debug_rtx(frame_pointer_rtx);
1239
+               insn = emit_insn(gen_movsi_reg_off(frame_pointer_rtx,
1240
+                               stack_pointer_rtx, gen_int_mode(
1241
+                                               cfun->machine->sp_fp_offset,
1242
+                                               SImode)));
1243
+               RTX_FRAME_RELATED_P(insn) = 1;
1244 103 dgisselq
+               if (dbg)  fprintf(stderr, "sp_fp_offset is %d\n", cfun->machine->sp_fp_offset);
1245 102 dgisselq
+       }
1246
+}
1247
+
1248
+bool
1249
+zip_use_return_insn(void)
1250
+{
1251
+       if ((!reload_completed)||(cfun->machine->fp_needed)
1252
+                       ||(get_frame_size()!=0)) {
1253
+               // If R0 ever gets pushed to the stack, then we cannot
1254
+               // use a master return from anywhere.  We need to clean up the
1255
+               // stack first.
1256
+               if ((!crtl->is_leaf)||((df_regs_ever_live_p(0))
1257
+                                               &&(!call_used_regs[0]))) {
1258
+                       return false;
1259
+               }
1260
+       }
1261
+       zip_compute_frame();
1262
+       return (cfun->machine->size_for_adjusting_sp == 0);
1263
+}
1264
+
1265
+/* As per the notes in M68k.c, quote the function epilogue should not depend
1266
+ * upon the current stack pointer.  It should use the frame poitner only,
1267
+ * if there is a frame pointer.  This is mandatory because of alloca; we also
1268
+ * take advantage of it to omit stack adjustments before returning ...
1269
+ *
1270
+ * Let's see if we can use their approach here.
1271
+ *
1272
+ * We can't.  Consider our choices:
1273
+ *     LOD (FP),R0
1274
+ *     LOD 1(FP),R4
1275
+ *     LOD 2(FP),R5
1276
+ *     LOD 3(FP),R6
1277
+ *     LOD 4(FP),FP
1278
+ *     ... Then what is the stack pointer?
1279
+ * or
1280
+ *     LOD (FP),R0
1281
+ *     LOD 1(FP),R4
1282
+ *     LOD 2(FP),R5
1283
+ *     LOD 3(FP),R6
1284
+ *     MOV FP,SP
1285
+ *     LOD 4(SP),FP
1286
+ *     ... Which suffers unnecessary pipeline stalls, and certainly doesn't
1287
+ *     exploit our pipeline memory function
1288
+ * or
1289
+ *     MOV FP,SP
1290
+ *     LOD (SP),R0
1291
+ *     LOD 1(SP),R4
1292
+ *     LOD 2(SP),R5
1293
+ *     LOD 3(SP),R6
1294
+ *     LOD 4(SP),FP
1295
+ * Which will be our choice.  Note that we do use the stack pointer, eventually.
1296
+ *
1297
+ */
1298
+void
1299
+zip_expand_epilogue(void) {
1300
+       int     regno, offset;
1301
+       const bool      dbg = ((ALL_DEBUG_ON)||(false))&&(!ALL_DEBUG_OFF);
1302
+
1303
+       zip_compute_frame();
1304
+
1305
+       if (dbg) fprintf(stderr, "EPILOG::\n");
1306
+       if (cfun->machine->fp_needed) {
1307
+               if (dbg) fprintf(stderr, "EPILOG::Moving frame pointer to stack register\n");
1308
+               emit_insn(gen_movsi_reg(stack_pointer_rtx, frame_pointer_rtx));
1309
+       }
1310
+
1311
+       if (cfun->machine->saved_reg_size != 0) {
1312
+               offset =  (cfun->machine->size_for_adjusting_sp -
1313
+                               cfun->machine->sp_fp_offset
1314
+                       - cfun->machine->saved_reg_size);
1315
+               if (dbg) fprintf(stderr, "EPILOG::Saved_REG_Size = %d\n", cfun->machine->saved_reg_size);
1316
+               for(regno=0; regno < FIRST_PSEUDO_REGISTER; regno++) {
1317
+                       if (zip_save_reg(regno)) {
1318
+                               if (dbg) fprintf(stderr, "EPILOG::RESTORING R%d\n", regno);
1319
+                               emit_insn(gen_movsi_lod(
1320
+                                               gen_rtx_REG(SImode, regno),
1321
+                                       gen_rtx_MEM(SImode, plus_constant( SImode,
1322
+                                               stack_pointer_rtx, offset++, true))));
1323
+                       }
1324
+               }
1325
+       }
1326
+
1327
+       if (cfun->machine->size_for_adjusting_sp != 0) {
1328
+               if (dbg) fprintf(stderr, "EPILOG::ADDSI3(StackPtr, %d)\n",
1329
+                               cfun->machine->size_for_adjusting_sp);
1330
+               emit_insn(gen_addsi3(stack_pointer_rtx, stack_pointer_rtx,
1331
+                       gen_int_mode(
1332
+                               cfun->machine->size_for_adjusting_sp
1333
+                               -cfun->machine->sp_fp_offset, SImode)));
1334
+       }
1335
+       if (dbg) fprintf(stderr, "EPILOG::EMITTING-RETURN\n");
1336
+
1337
+       emit_jump_insn(ret_rtx);
1338
+}
1339
+
1340
+/* Implement RETURN_ADDR_RTX(COUNT, FRAMEADDR).
1341
+ *
1342
+ * We currently only support calculating the return address for the current
1343
+ * frame.
1344
+ */
1345
+
1346
+/*
1347
+rtx
1348
+zip_return_addr_rtx(int count, rtx frame ATTRIBUTE_UNUSED)
1349
+{
1350
+       if (count)
1351
+               return NULL_RTX;
1352
+
1353
+       zip_compute_frame();
1354
+
1355
+       // saved return address for current function is at fp - 1
1356
+       if (cfun->machine->save_ret)
1357
+               return gen_rtx_MEM(Pmode, plus_constant(frame_pointer_rtx,
1358
+                               -UNITS_PER_WORD));
1359
+       return get_hard_reg_initial_val(Pmode, RETURN_ADDRESS_REGNUM);
1360
+}
1361
+*/
1362
+
1363
+/* Implements the macro INITIAL_ELIMINATION_OFFSET,
1364
+ * return the OFFSET.
1365
+ */
1366
+int
1367
+zip_initial_elimination_offset(int from, int to) {
1368
+       int     ret = 0;
1369
+       zip_compute_frame();
1370
+
1371
+       if (((from) == FRAME_POINTER_REGNUM)&&((to) == STACK_POINTER_REGNUM)) {
1372
+               ret = cfun->machine->sp_fp_offset;
1373 117 dgisselq
+       } else if (((from)=ARG_POINTER_REGNUM)&&((to)==STACK_POINTER_REGNUM)) {
1374
+               ret = cfun->machine->sp_fp_offset;
1375 102 dgisselq
+       } else if (((from)=ARG_POINTER_REGNUM)&&((to)==FRAME_POINTER_REGNUM)) {
1376 117 dgisselq
+               // ret = cfun->machine->local_vars_size;
1377
+               ret = 0;
1378 102 dgisselq
+       } else {
1379
+               abort();
1380
+       }
1381
+
1382
+       return ret;
1383
+}
1384
+
1385
+/* Return non-zero if the function argument described by TYPE is to be passed
1386
+ * by reference.
1387
+ */
1388
+/*
1389
+static bool
1390
+zip_pass_by_reference(CUMULATIVE_ARGS *cum ATTRIBUTE_UNUSED,
1391
+               enum machine_mode mode, const_tree type,
1392
+               bool name ATTRIBUTE_UNUSED) {
1393
+       unsigned        HOST_WIDE_INT   size;
1394
+
1395
+       if (type) {
1396
+               if (AGGREGATE_TYPE_P(type)) {
1397
+                       return TRUE;
1398
+               } size = int_size_in_bytes(type);
1399
+       } else
1400
+               size = GET_MODE_SIZE(mode);
1401
+
1402
+       return (size > GET_MODE_SIZE(SImode)); // > 1 word : is this okay?
1403
+       // The idea is to pass everything larger than an int by reference (or
1404
+       // on the stack)
1405
+}
1406
+*/
1407
+
1408
+/*
1409
+ * Code taken from m68k ...
1410
+ */
1411
+static bool
1412
+zip_can_eliminate(int from, int to)
1413
+{
1414
+       // fprintf(stderr, "CAN_ELIMINATE::QUERYING(%d,%d)\n", from, to);
1415
+       if ((from == zip_FP)&&(to == zip_SP))
1416
+               return !cfun->machine->fp_needed;
1417
+       return true;
1418
+}
1419
+
1420
+/*
1421
+static bool
1422
+zip_must_pass_in_stack(enum machine_mode mode, const_tree type)
1423
+{
1424
+       if (mode == BLKmode) {
1425
+               return true;
1426
+       } if (type == NULL) {
1427
+               return false;
1428
+       } return AGGREGATE_TYPE_P(type);
1429
+}
1430
+*/
1431
+
1432
+/*
1433
+static void
1434
+zip_basic_check(void)
1435
+{
1436
+       gcc_assert(mode_base_align[SImode]==4);
1437
+       if ((BITS_PER_UNIT != 32)
1438
+                       ||(GET_MODE_SIZE(SImode)!=1)
1439
+                       ||(GET_MODE_SIZE(DImode)!=1)
1440
+                       ||(HARD_REGNO_NREGS(0,SImode)!=1)) {
1441
+               printf("SIZEOF(SIMode) == %d\n", GET_MODE_SIZE(SImode));
1442
+               printf("BITS_PER_UNIT  == %d\n", BITS_PER_UNIT);
1443
+               gcc_assert(BITS_PER_UNIT==32);
1444
+               gcc_assert(GET_MODE_SIZE(SImode)==1);
1445
+               gcc_assert(HARD_REGNO_NREGS(0,SImode)==1);
1446
+       }
1447
+}
1448
+*/
1449
+
1450
+#define        zip_basic_check()
1451
+
1452
+/* Compute the number of word sized regiters needed to hold a function
1453
+ * argument of mode INT_MODE and tree type TYPE.
1454
+ */
1455
+int
1456
+zip_num_arg_regs(enum machine_mode mode, const_tree type) {
1457
+       int     size;
1458
+
1459
+       zip_basic_check();
1460
+
1461
+       if (targetm.calls.must_pass_in_stack(mode, type))
1462
+               return 0;
1463
+
1464
+       if ((type)&&(mode == BLKmode))
1465
+               size = int_size_in_bytes(type);
1466
+       else
1467
+               size = GET_MODE_SIZE(mode);
1468
+
1469
+       return (size + UNITS_PER_WORD - 1)/UNITS_PER_WORD;
1470
+}
1471
+
1472
+/* pushed in function prologue */
1473
+/*
1474
+static void
1475
+zip_setup_incoming_varargs(CUMULATIVE_ARGS *cum, enum machine_mode mode,
1476
+               tree type, int *pretend_size, int no_rtl) {
1477
+       if (no_rtl)
1478
+               return;
1479
+
1480
+       gcc_assert(mode != BLKmode);
1481
+
1482
+       if (*cum < (ZIP_LAST_ARG_REGNO+1)) {
1483
+               int size = ZIP_FIRST_ARG_REGNO + ZIP_NUM_ARGS_REGS - *cum;
1484
+               rtx     regblock;
1485
+               int     offset = (*cum - ZIP_FIRST_ARG_REGNO) * UNITS_PER_WORD;
1486
+               regblock = gen_rtx_MEM(BLKmode,
1487
+                       plus_constant(arg_pointer_rtx, offset));
1488
+               move_block_from_reg(*cum, regblock, size);
1489
+               *pretend_size = size * UNITS_PER_WORD;
1490
+       }
1491
+
1492
+       if (targetm.calls.strict_argument_naming(cum))
1493
+               *cum = *cum + zip_num_arg_regs(mode, type);
1494
+}
1495
+*/
1496
+
1497
+/*
1498
+static int
1499
+zip_arg_partial_bytes(CUMULATIVE_ARGS *cum, enum machine_mode mode,
1500
+               tree type, bool name ATTRIBUTE_UNUSED) {
1501
+       int     words;
1502
+       unsigned int    regs = zip_num_arg_regs(mode, type);
1503
+
1504
+       if (*cum >= ZIP_LAST_ARG_REGNO + 1)
1505
+               words = 0;
1506
+       else if ((*cum + regs) > ZIP_LAST_ARG_REGNO + 1)
1507
+               words = (*cum + regs) - ZIP_LAST_ARG_REGNO + 1;
1508
+       else
1509
+               words = 0;
1510
+
1511
+       return words * UNITS_PER_WORD;
1512
+}
1513
+*/
1514
+
1515
+static void
1516
+zip_function_arg_advance(cumulative_args_t ca, machine_mode mode,
1517
+               const_tree type, bool named ATTRIBUTE_UNUSED) {
1518
+       CUMULATIVE_ARGS *cum;
1519
+       int     nreg;
1520
+
1521
+       zip_basic_check();
1522
+
1523
+       cum = get_cumulative_args(ca);
1524
+       nreg = zip_num_arg_regs(mode, type);
1525
+       if (((*cum)+nreg) > NUM_ARG_REGS)
1526
+               (*cum) = NUM_ARG_REGS;
1527
+       else
1528
+               (*cum) += nreg;
1529
+}
1530
+
1531
+static rtx
1532
+zip_function_arg(cumulative_args_t ca, machine_mode mode,
1533
+               const_tree type ATTRIBUTE_UNUSED, bool named) {
1534
+       CUMULATIVE_ARGS *cum;
1535
+
1536
+       zip_basic_check();
1537
+
1538
+
1539
+       if (!named)
1540
+               return NULL_RTX;
1541
+       //if (targetm.calls.must_pass_in_stack(mode, type))
1542
+               //return NULL_RTX;
1543
+       cum = get_cumulative_args(ca);
1544
+
1545
+       if ((*cum) >= NUM_ARG_REGS)
1546
+               return NULL_RTX;
1547
+       return
1548
+               gen_rtx_REG(mode, (*cum)+1);
1549
+}
1550
+
1551
+/* NOTICE_UPDATE_CC sends us here
1552
+ */
1553
+void
1554
+zip_update_cc_notice(rtx exp, rtx_insn *insn)
1555
+{
1556
+       const bool      dbg = ((ALL_DEBUG_ON)||(false))&&(!ALL_DEBUG_OFF);
1557
+       enum    attr_ccresult  ccr;
1558
+       enum    attr_conditional  conditionally_executed;
1559
+
1560
+       // The default is that nothing has changed.
1561
+       // cc_status = cc_status_prev;
1562
+       rtx     src, dest;
1563
+
1564
+       if (dbg) fprintf(stderr, "CC-NOTICE ...\n");
1565
+       if (dbg) zip_debug_rtx_pfx("CC :", exp);
1566
+       if (dbg) debug_rtx(exp);
1567
+
1568
+       ccr = get_attr_ccresult(insn);
1569
+       if (ccr == CCRESULT_UNKNOWN) {
1570
+               CC_STATUS_INIT;
1571
+               if (dbg) fprintf(stderr, "\tINIT-CC\n");
1572
+               return;
1573
+       }
1574
+
1575
+       if ((GET_CODE(exp) == PARALLEL)&&(GET_CODE(XVECEXP(exp, 0, 0))==SET)) {
1576
+               // This works up and until we add cc0 parallel instructions
1577
+               // to our instruction set.
1578
+               dest = SET_DEST(XVECEXP(exp, 0, 0));
1579
+               src  = SET_SRC (XVECEXP(exp, 0, 0));
1580
+       } else if (GET_CODE(exp) == SET) {
1581
+               dest = SET_DEST(exp);
1582
+               src  = SET_SRC (exp);
1583
+       } else {
1584
+               // First, do nothing if we haven't touched the condition codes.
1585
+               // Condition codes can only be changed as a result of a set
1586
+               // expression ...?
1587
+               if (dbg) fprintf(stderr, "Non-set expression, doesn\'t touch condition codes\n");
1588
+               return;
1589
+       }
1590
+
1591 111 dgisselq
+
1592
+       if (ccr == CCRESULT_UNCHANGED) {
1593
+               if (dbg) fprintf(stderr, "\tUnchanged CC\n");
1594
+
1595
+               // We can't just run away here ... even though the CC result
1596
+               // hasn't changed, GCC's ability to recognize it as a valid
1597
+               // result has changed.  In other words, if we just 'set' a
1598
+               // value contained within either value1 or value2, then we'll
1599
+               // need to update those values so that they are no longer looked
1600
+               // upon as potentially containing the current CC values.
1601
+
1602
+               if (dest) {
1603
+                       if (dest == cc0_rtx)
1604
+                               CC_STATUS_INIT;
1605
+                       else if ((REG_P(dest))&&(dest != pc_rtx)) {
1606
+                               // An example here might be a load instruction
1607
+                               if (reg_mentioned_p(dest, cc_status.value1))
1608
+                                       cc_status.value1 = NULL_RTX;
1609
+                               if (reg_mentioned_p(dest, cc_status.value2))
1610
+                                       cc_status.value2 = NULL_RTX;
1611
+                       }
1612
+               }
1613
+               return;
1614
+       }
1615
+
1616 102 dgisselq
+       // Gotta wait on this test, until we know whether or not the
1617
+       // conditionally executed instruction was designed to set the
1618
+       // CC0 register.
1619
+       conditionally_executed = get_attr_conditional(insn);
1620
+       if ((conditionally_executed == CONDITIONAL_YES)&&(dest != cc0_rtx)) {
1621
+               // cc_status is unchanged
1622 111 dgisselq
+               // However, GCC's vision of it may have changed
1623
+               //
1624
+               // Initialize CC_STATUS
1625 102 dgisselq
+               if (dbg) fprintf(stderr, "\tCC -- unchanged (conditional exec)\n");
1626 111 dgisselq
+               CC_STATUS_INIT;
1627 102 dgisselq
+               return;
1628 111 dgisselq
+       } else if (GET_CODE(src)==IF_THEN_ELSE) {
1629
+               // Same thing as above
1630
+               CC_STATUS_INIT;
1631
+               return;
1632 102 dgisselq
+       }
1633
+
1634
+       if (ccr == CCRESULT_VALIDZN)
1635
+               cc_status.flags = CC_NO_OVERFLOW;
1636
+       else
1637
+               cc_status.flags = 0;
1638
+       cc_status.value1 = dest;
1639
+       if (dest == cc0_rtx)
1640
+               cc_status.value2 = src;
1641
+       else if((REG_P(dest))&&(!reg_mentioned_p(dest, src)))
1642
+               cc_status.value2 = src;
1643
+       else if((SUBREG_P(dest))&&(!reg_mentioned_p(XEXP(dest,0), src)))
1644
+               cc_status.value2 = src;
1645
+       else
1646
+               cc_status.value2 = 0;
1647
+       if (dbg) fprintf(stderr, "\tCC -- Set flags for\n");
1648
+       if (dbg) zip_debug_rtx_pfx("V1: ", dest);
1649
+       if ((dbg)&&(cc_status.value2)) zip_debug_rtx_pfx("V2: ", src);
1650
+       else if (dbg)   fprintf(stderr, "V2: (No SRC)\n");
1651
+       if ((dbg)&&(REG_P(dest))) fprintf(stderr, "src refers to dest ?? %s\n",
1652
+               refers_to_regno_p(REGNO(dest),REGNO(dest),src,NULL)?"Yes":"No");
1653
+       if ((dbg)&&(REG_P(dest))) fprintf(stderr, "Occurrs %d times\n",
1654
+               count_occurrences(dest,src,0));
1655
+       if ((dbg)&&(REG_P(dest))) fprintf(stderr, "%s mentioned\n",
1656
+               reg_mentioned_p(dest,src)?"Is":"Is not");
1657
+       if ((dbg)&&(REG_P(dest))) fprintf(stderr, "%s referenced\n",
1658
+               reg_referenced_p(dest,src)?"Is":"Is not");
1659
+
1660
+//
1661
+// These results are only used in final.c, where they are used to remove
1662
+// compare instructions if the optimizer is on.  If I produce nothing, no
1663
+// compare instructions will be removed.  If I produce something, a smart
1664
+// decision may be made to remove compare instructions.
1665
+//
1666
+// cc_status will be compared  with subsequent
1667
+//     (set (cc0) (something)) (i.e. compare only) instructions
1668
+//
1669
+//     (set (cc0) (compare (x) (y)))
1670
+//     dst = cc0 -- the destination of the set is ignored, save that it must be
1671
+//             cc0
1672
+//     src1 = (compare (x) (y))
1673
+//     if (src1 == compare)&&(y == (const_int 0))
1674
+//             src2 = (x)
1675
+//     else
1676
+//             src2 = null
1677
+//
1678
+//     Four conditions:
1679
+//     1. if (val1)&&(src1 == val1)
1680
+//             This would be true if I had seen a (set (val1) (src1)) insn
1681
+//             If I have seen a (set (val1) (src1))
1682
+//                     or equivalently a (set (val1) (compare (x) (y)))
1683
+//     or
1684
+//     2. if (val2)&&(src1 == val2)
1685
+//             This would be true if I had seen a (set (val1) (src1)) insn,
1686
+//             and only if val2 was still valid.
1687
+//     or
1688
+//     3. if (src2)&&(value1)&&(src2 == value1)
1689
+//             This would be true if we are comparing against zero, and the
1690
+//             number we are comparing against zero is value 1
1691
+//     or
1692
+//     4. if (src2)&&(value2)&&(src2 == value2)
1693
+//             ... or value2.  This is the common ZipCPU case.
1694
+//
1695
+//             then delete the compare.
1696
+//
1697
+}
1698
+
1699
+
1700
+/* totally buggy - we can't return pointers to nested functions */
1701
+static void
1702
+zip_asm_trampoline_template(FILE *f) {
1703
+       // Whereas at one time I thought I wouldn't need it, now I know I
1704
+       // need this trampoline function, although it is for a completely
1705
+       // different purpose than the one I was familiar with.
1706
+       fprintf(f, "\tldihi 0,r1\n");
1707
+       fprintf(f, "\tldilo 0,r1\n");
1708
+       fprintf(f, "\tjmp r1\n");
1709
+}
1710
+
1711
+/* Worker function for TARGET_TRAMPOLINE_INIT. */
1712
+static void
1713
+zip_trampoline_init(rtx m_tramp ATTRIBUTE_UNUSED,
1714
+       tree fndecl ATTRIBUTE_UNUSED,
1715
+       rtx chain_value ATTRIBUTE_UNUSED) {
1716
+// #warning "This needs to be filled out"
1717
+       abort();
1718
+}
1719
+
1720
+static tree
1721
+def_builtin(const char *name, enum insn_code icode, enum ZIP_BUILTIN_ID_CODE code,
1722
+       tree type)
1723
+{
1724
+       tree t = add_builtin_function(name,type,code,BUILT_IN_MD, NULL, NULL_TREE);
1725
+       zip_basic_check();
1726
+
1727
+       if(t) {
1728
+               zip_builtins[code] = t;
1729
+               zip_builtins_icode[code] = icode;
1730
+       }
1731
+
1732
+       return t;
1733
+
1734
+}
1735
+
1736
+void   zip_init_builtins(void) {
1737
+       zip_basic_check();
1738
+
1739
+  tree void_ftype_void = build_function_type_list(void_type_node, NULL_TREE);
1740
+#ifdef HAVE_zip_rtu
1741
+  def_builtin("zip_rtu", CODE_FOR_zip_rtu, ZIP_BUILTIN_RTU, void_ftype_void);
1742
+#endif
1743
+#ifdef HAVE_zip_halt
1744
+  def_builtin("zip_halt",  CODE_FOR_zip_halt,  ZIP_BUILTIN_HALT, void_ftype_void);
1745
+#endif
1746
+#ifdef HAVE_zip_idle
1747
+  def_builtin("zip_idle", CODE_FOR_zip_idle, ZIP_BUILTIN_IDLE, void_ftype_void);
1748
+#endif
1749
+
1750
+#ifdef HAVE_zip_syscall
1751
+// Support int SYSCALL(callID, int a, int b, int c);
1752
+  def_builtin("zip_syscall", CODE_FOR_zip_syscall, ZIP_BUILTIN_SYSCALL,
1753
+                       build_function_type_list(void_type_node, NULL_TREE));
1754
+#endif
1755
+
1756
+#ifdef HAVE_zip_save_context
1757
+  def_builtin("zip_save_context", CODE_FOR_zip_save_context, ZIP_BUILTIN_SAVE_CONTEXT,
1758
+               build_function_type_list(void_type_node, ptr_type_node, 0));
1759
+#endif
1760
+
1761
+#ifdef HAVE_zip_restore_context
1762
+  def_builtin("zip_restore_context", CODE_FOR_zip_restore_context, ZIP_BUILTIN_RESTORE_CONTEXT,
1763
+       build_function_type_list(void_type_node, ptr_type_node, 0));
1764
+#endif
1765
+
1766
+#ifdef HAVE_zip_bitrev
1767
+  def_builtin("zip_bitrev", CODE_FOR_zip_bitrev, ZIP_BUILTIN_BITREV,
1768
+       build_function_type_list(unsigned_type_node, unsigned_type_node,
1769
+               NULL_TREE));
1770
+#endif
1771
+
1772
+#ifdef HAVE_zip_cc
1773
+  def_builtin("zip_cc", CODE_FOR_zip_cc, ZIP_BUILTIN_CC,
1774
+       build_function_type_list(unsigned_type_node, NULL_TREE));
1775
+#endif
1776
+
1777 117 dgisselq
+#ifdef HAVE_zip_ucc
1778
+  def_builtin("zip_ucc", CODE_FOR_zip_ucc, ZIP_BUILTIN_UCC,
1779
+       build_function_type_list(unsigned_type_node, NULL_TREE));
1780
+#endif
1781
+
1782 102 dgisselq
+}
1783
+
1784
+static tree
1785
+zip_builtin_decl(unsigned zip_builtin_code, bool initialize_p ATTRIBUTE_UNUSED)
1786
+{
1787
+  if (zip_builtin_code >= ZIP_BUILTIN_MAX)
1788
+    return error_mark_node;
1789
+
1790
+  return zip_builtins[zip_builtin_code];
1791
+}
1792
+
1793
+static rtx
1794
+zip_expand_builtin(tree exp, rtx target,
1795
+               rtx subtarget ATTRIBUTE_UNUSED,
1796
+               machine_mode tmode ATTRIBUTE_UNUSED,
1797
+               int     ignore ATTRIBUTE_UNUSED) {
1798
+
1799
+       tree    fndecl = TREE_OPERAND(CALL_EXPR_FN(exp), 0);
1800
+       bool    nonvoid = (TREE_TYPE(TREE_TYPE(fndecl)) != void_type_node);
1801
+       enum    ZIP_BUILTIN_ID_CODE code=(enum ZIP_BUILTIN_ID_CODE)DECL_FUNCTION_CODE(fndecl);
1802
+       enum    insn_code icode = zip_builtins_icode[code];
1803
+       rtx     pat, op[5];
1804
+       call_expr_arg_iterator  iter;
1805
+       tree    arg;
1806
+
1807
+       if ((code == ZIP_BUILTIN_SAVE_CONTEXT)
1808
+                       ||(code == ZIP_BUILTIN_RESTORE_CONTEXT)) {
1809
+               arg = first_call_expr_arg(exp, &iter);
1810
+               if (arg == error_mark_node)
1811
+                       return NULL_RTX;
1812
+               op[0] = expand_normal(arg);
1813
+               if (GET_CODE(op[0]) != REG)
1814
+                       op[0] = force_reg(Pmode, op[0]);
1815
+               pat = GEN_FCN(icode)(op[0]);
1816
+       } else if (code == ZIP_BUILTIN_BITREV) {
1817
+               arg = first_call_expr_arg(exp, &iter);
1818
+               if (arg == error_mark_node) {
1819
+                       return NULL_RTX;
1820
+               }
1821
+               op[0] = expand_normal(arg);
1822
+               if (!target)
1823
+                       target = gen_reg_rtx(SImode);
1824
+               pat = GEN_FCN(icode)(target, op[0]);
1825 117 dgisselq
+       } else if ((code == ZIP_BUILTIN_CC)||(code == ZIP_BUILTIN_UCC)) {
1826 102 dgisselq
+               if (!target)
1827
+                       target = gen_reg_rtx(SImode);
1828
+               pat = GEN_FCN(icode)(target);
1829
+       } else // RTU, HALT, IDLE
1830
+               pat = GEN_FCN(icode)();
1831
+       if (!pat)
1832
+               return NULL_RTX;
1833
+       emit_insn(pat);
1834
+       return (nonvoid ? target : const0_rtx);
1835
+}
1836
+
1837
+static bool
1838
+zip_scalar_mode_supported_p(enum machine_mode mode) {
1839
+       zip_basic_check();
1840
+
1841
+       return ((mode)==SImode)||((mode)==DImode); // ||((mode)==SFmode);
1842
+}
1843
+
1844
+static bool
1845
+zip_libgcc_floating_mode_supported_p(enum machine_mode mode) {
1846
+       return ((mode)==SFmode)||((mode)==DFmode);
1847
+}
1848
+
1849
+static int
1850
+zip_address_cost(rtx addr ATTRIBUTE_UNUSED,
1851
+       enum machine_mode mode ATTRIBUTE_UNUSED,
1852
+       addr_space_t as ATTRIBUTE_UNUSED, bool spd ATTRIBUTE_UNUSED) {
1853
+       return 1;
1854
+}
1855
+
1856
+static bool
1857
+zip_mode_dependent_address_p(const_rtx addr ATTRIBUTE_UNUSED,
1858
+       addr_space_t as ATTRIBUTE_UNUSED) {
1859
+       return false;
1860
+}
1861
+
1862
+/*
1863
+static void
1864
+zip_asm_output_anchor(rtx x) {
1865
+       printf("ANCHOR: OP(%d)\n", GET_CODE(x));
1866
+}
1867
+*/
1868
+
1869
+static void
1870
+zip_debug_print(const char *pfx, int lvl, const char *str) {
1871
+       int     i;
1872
+       i = lvl;
1873
+       if ((true)||(lvl == 0))
1874
+               fprintf(stderr, "%s", pfx);
1875
+       else
1876
+               i += strlen(pfx);
1877
+       while(i-->0)
1878
+               fprintf(stderr, "  ");
1879
+       fprintf(stderr, "%s\n", str);
1880
+}
1881
+
1882
+static void
1883
+zip_debug_print_m(const char *pfx, int lvl, const char *str, enum machine_mode m) {
1884
+       int     i;
1885
+
1886
+       i = lvl;
1887
+       if ((true)||(lvl == 0))
1888
+               fprintf(stderr, "%s", pfx);
1889
+       else
1890
+               i = lvl+strlen(pfx);
1891
+       while(i-->0)
1892
+               fprintf(stderr, "  ");
1893
+       switch(m) {
1894
+               case VOIDmode:
1895
+                       fprintf(stderr, "%s:V\n", str);
1896
+                       break;
1897
+               case BLKmode:
1898
+                       fprintf(stderr, "%s:BLK\n", str);
1899
+                       break;
1900
+               case BImode:
1901
+                       fprintf(stderr, "%s:BI\n", str);
1902
+                       break;
1903
+#ifdef HAVE_QImode
1904
+               case QImode:
1905
+                       fprintf(stderr, "%s:QI\n", str);
1906
+                       break;
1907
+#endif
1908
+#ifdef HAVE_HImode
1909
+               case HImode:
1910
+                       fprintf(stderr, "%s:HI\n", str);
1911
+                       break;
1912
+#endif
1913
+               case SImode:
1914
+                       fprintf(stderr, "%s:SI\n", str);
1915
+                       break;
1916
+               case DImode:
1917
+                       fprintf(stderr, "%s:DI\n", str);
1918
+                       break;
1919
+               default:
1920
+                       fprintf(stderr, "%s:?\n", str);
1921
+       }
1922
+}
1923
+
1924
+static void
1925
+zip_debug_rtx_1(const char *pfx, const_rtx x, int lvl) {
1926
+       if (x == NULL_RTX) {
1927
+               zip_debug_print(pfx, lvl, "(NULL-RTX)");
1928
+               return;
1929
+       } else if (GET_CODE(x) > NUM_RTX_CODE) {
1930
+               char    buf[64];
1931
+               sprintf(buf, "(BAD-RTX-CODE %d)", GET_CODE(x));
1932
+               zip_debug_print(pfx, lvl, buf);
1933 117 dgisselq
+               gcc_assert(0 && "Bad RTX Code");
1934 102 dgisselq
+               return;
1935
+       } switch(GET_CODE(x)) { // rtl.def
1936
+       case PARALLEL: zip_debug_print(pfx, lvl, "(PARALLEL");
1937
+               debug_rtx(x); break;
1938
+       case INT_LIST: zip_debug_print(pfx, lvl, "(INT-LIST"); break;
1939
+       case SEQUENCE: zip_debug_print(pfx, lvl, "(SEQUENCE"); break;
1940
+       case ADDRESS: zip_debug_print(pfx, lvl, "(ADDRESS"); break;
1941
+       case DEBUG_INSN: zip_debug_print(pfx, lvl, "(DEBUG-INSN"); break;
1942
+       case INSN:
1943
+               zip_debug_print(pfx, lvl, "(INSN");
1944
+               /*
1945
+               { const rtx_insn *tmp_rtx;
1946
+               for(tmp_rtx = as_a <const rtx_insn *>(x); tmp_rtx != 0; tmp_rtx = NEXT_INSN(tmp_rtx)) {
1947
+                       zip_debug_rtx_1(tmp_rtx, lvl+1);
1948
+               }}
1949
+               */
1950
+               zip_debug_rtx_1(pfx, PATTERN(x), lvl+1);
1951
+               zip_debug_print(pfx, lvl, ")");
1952 117 dgisselq
+               debug_rtx(x);
1953 102 dgisselq
+               break;
1954
+       case JUMP_INSN: zip_debug_print(pfx, lvl, "(JUMP-INSN");
1955 111 dgisselq
+               zip_debug_rtx_1(pfx, PATTERN(x), lvl+1);
1956
+               zip_debug_print(pfx, lvl, ")");
1957
+               /*
1958 102 dgisselq
+               if (JUMP_LABEL(x)) {
1959 111 dgisselq
+                       if (GET_CODE(JUMP_LABEL(x)) == LABEL_REF) {
1960
+                               char    buf[64];
1961
+                               sprintf(buf, "(LABEL *.L%d))", CODE_LABEL_NUMBER(LABEL_REF_LABEL(JUMP_LABEL(x))));
1962
+                               zip_debug_print(pfx, lvl+1, buf);
1963
+                       } else if (GET_CODE(JUMP_LABEL(x))==CODE_LABEL) {
1964
+                               char    buf[64];
1965
+                               sprintf(buf, "(CODE_LABEL *.L%d))", CODE_LABEL_NUMBER(JUMP_LABEL(x)));
1966
+                               zip_debug_print(pfx, lvl+1, buf);
1967
+                       } else
1968
+                       zip_debug_print(pfx, lvl+1, "(w/Label))");
1969 102 dgisselq
+               } else
1970 111 dgisselq
+                       zip_debug_print(pfx, lvl+1, "(NO label))");
1971
+               debug_rtx(x);
1972
+               */
1973 102 dgisselq
+               break;
1974
+       case CALL:
1975
+               zip_debug_print(pfx, lvl, "(CALL (Adr) (Args)");
1976
+               zip_debug_rtx_1(pfx, XEXP(x,0), lvl+1);
1977
+               zip_debug_rtx_1(pfx, XEXP(x,1), lvl+1);
1978
+               zip_debug_print(pfx, lvl, ")");
1979
+               break;
1980
+       case CALL_INSN: zip_debug_print(pfx, lvl, "(CALL-INSN");
1981
+               debug_rtx(x);
1982
+               break;
1983
+       case BARRIER: zip_debug_print(pfx, lvl, "(BARRIER)"); break;
1984
+       case RETURN: zip_debug_print(pfx, lvl, "(RETURN)"); break;
1985
+       case NOTE:
1986
+               {       char buf[128];
1987
+                       sprintf(buf, "(NOTE %s)", GET_REG_NOTE_NAME(GET_MODE(x)));
1988
+                       zip_debug_print(pfx, lvl, buf);
1989
+               }break;
1990
+       case COND_EXEC: zip_debug_print(pfx, lvl, "(COND_EXEC)");
1991
+               debug_rtx(x);
1992
+               break;
1993
+       case ASM_INPUT: zip_debug_print(pfx, lvl, "(ASM INPUT)"); break;
1994
+       case ASM_OPERANDS: zip_debug_print(pfx, lvl, "(ASM OPERANDS)"); break;
1995
+       case UNSPEC: zip_debug_print(pfx, lvl, "(UNSPEC)"); break;
1996
+       case UNSPEC_VOLATILE: zip_debug_print(pfx, lvl, "(UNSPEC_VOLATILE)"); break;
1997
+       case CODE_LABEL:
1998
+               {
1999
+                       char    buf[64];
2000 111 dgisselq
+                       sprintf(buf, "(CODE_LABEL *.L%d)", CODE_LABEL_NUMBER(x));
2001 102 dgisselq
+                       zip_debug_print_m(pfx, lvl, buf, GET_MODE(x));
2002
+               } break;
2003
+       case SET:
2004
+               zip_debug_print_m(pfx, lvl, "(SET", GET_MODE(x));
2005 117 dgisselq
+               zip_debug_rtx_1(pfx, SET_DEST(x),lvl+1);
2006
+               zip_debug_rtx_1(pfx, SET_SRC(x),lvl+1);
2007 102 dgisselq
+               zip_debug_print(pfx, lvl, ")");
2008 117 dgisselq
+               debug_rtx(x);
2009 102 dgisselq
+               break;
2010
+       case REG:
2011
+               if (REGNO(x) == zip_PC)
2012
+                       zip_debug_print(pfx, lvl, "(PC)");
2013
+               else if (REGNO(x) == zip_CC)
2014
+                       zip_debug_print(pfx, lvl, "(CC0)");
2015
+               else if (REGNO(x) == zip_SP)
2016
+                       zip_debug_print(pfx, lvl, "(SP)");
2017
+               else if (REGNO(x) == zip_FP)
2018
+                       zip_debug_print(pfx, lvl, "(REG FP)");
2019
+               else if (REGNO(x) == zip_GOT)
2020
+                       zip_debug_print(pfx, lvl, "(REG GBL)");
2021
+               else if (FUNCTION_VALUE_REGNO_P(REGNO(x)))
2022
+                       zip_debug_print(pfx, lvl, "(REG RTN-VL)");
2023
+               else if (REGNO(x) == RETURN_ADDRESS_REGNUM)
2024
+                       zip_debug_print(pfx, lvl, "(REG RTN-AD)");
2025
+               else { char buf[25];
2026
+               sprintf(buf, "(REG %d)", REGNO(x));
2027
+               zip_debug_print_m(pfx, lvl, buf, GET_MODE(x));
2028
+               } break;
2029
+       case IF_THEN_ELSE: // 51
2030
+               zip_debug_print(pfx, lvl, "(IF-THEN-ELSE");
2031
+               zip_debug_rtx_1(pfx, XEXP(x,0),lvl+1);
2032
+               zip_debug_rtx_1(pfx, XEXP(x,1),lvl+1);
2033
+               zip_debug_rtx_1(pfx, XEXP(x,2),lvl+1);
2034
+               zip_debug_print(pfx, lvl, ")");
2035
+               break;
2036
+       case PC:
2037
+               zip_debug_print(pfx, lvl, "(PC)");
2038
+               break;
2039
+       case CC0:
2040
+               zip_debug_print(pfx, lvl, "(CC0)");
2041
+               break;
2042
+       case COMPARE:
2043
+               zip_debug_print(pfx, lvl, "(COMPARE");
2044
+               zip_debug_rtx_1(pfx, XEXP(x,0),lvl+1);
2045
+               zip_debug_rtx_1(pfx, XEXP(x,1),lvl+1);
2046
+               zip_debug_print(pfx, lvl, ")");
2047
+               break;
2048 111 dgisselq
+       case CONST:
2049
+               zip_debug_print_m(pfx, lvl, "(CONST", GET_MODE(x));
2050
+               zip_debug_rtx_1(pfx, XEXP(x,0),lvl+1);
2051
+               zip_debug_print(pfx, lvl, ")");
2052
+               break;
2053 102 dgisselq
+       case CONST_INT:
2054
+               { char buf[25];
2055
+               if (GET_MODE(x)==SImode)
2056 111 dgisselq
+                       sprintf(buf, "(CONST_INT:SI %ld)", INTVAL(x));
2057 102 dgisselq
+               else if (GET_MODE(x)==VOIDmode)
2058 111 dgisselq
+                       sprintf(buf, "(CONST_INT:V %ld)", INTVAL(x));
2059 102 dgisselq
+               else
2060 111 dgisselq
+                       sprintf(buf, "(CONST_INT:? %ld)", INTVAL(x));
2061 102 dgisselq
+               zip_debug_print(pfx, lvl, buf);
2062
+               } break;
2063
+       case LABEL_REF:
2064 111 dgisselq
+               { char buf[256], *bp;
2065
+               sprintf(buf, "(LABEL *.L%d)", CODE_LABEL_NUMBER(LABEL_REF_LABEL(x)));
2066
+               zip_debug_print(pfx, lvl, buf);
2067
+               }
2068 102 dgisselq
+               break;
2069
+       case SYMBOL_REF:
2070
+               {
2071
+                       char buf[64];
2072
+                       sprintf(buf, "(SYMBOL: %s)", XSTR(x,0));
2073
+                       // fprintf(file, "%s", XSTR(x,0));
2074
+                       zip_debug_print(pfx, lvl, buf);
2075
+               }
2076
+               break;
2077
+       case MEM:
2078
+               zip_debug_print_m(pfx, lvl, "(MEM", GET_MODE(x));
2079
+               zip_debug_rtx_1(pfx, XEXP(x,0),lvl+1);
2080
+               zip_debug_print(pfx, lvl, ")");
2081
+               break;
2082
+       /*
2083
+       case VALUE:
2084
+               {
2085
+                       char buf[64];
2086
+                       sprintf(buf, "(VALUE: %d)", INTVAL(XEXP,0));
2087
+                       zip_debug_print_m(pfx, lvl, "buf", GET_MODE(x));
2088
+               }
2089
+               break;
2090
+       */
2091
+       case PLUS:
2092
+               zip_debug_print_m(pfx, lvl, "(PLUS", GET_MODE(x));
2093
+               zip_debug_rtx_1(pfx, XEXP(x,0),lvl+1);
2094
+               zip_debug_rtx_1(pfx, XEXP(x,1),lvl+1);
2095
+               zip_debug_print(pfx, lvl, ")");
2096
+               break;
2097
+       case MINUS:
2098
+               zip_debug_print_m(pfx, lvl, "(MINUS", GET_MODE(x));
2099
+               zip_debug_rtx_1(pfx, XEXP(x,0),lvl+1);
2100
+               zip_debug_rtx_1(pfx, XEXP(x,1),lvl+1);
2101
+               zip_debug_print(pfx, lvl, ")");
2102
+               break;
2103
+       case AND:
2104
+               zip_debug_print_m(pfx, lvl, "(AND", GET_MODE(x));
2105
+               zip_debug_rtx_1(pfx, XEXP(x,0),lvl+1);
2106
+               zip_debug_rtx_1(pfx, XEXP(x,1),lvl+1);
2107
+               zip_debug_print(pfx, lvl, ")");
2108
+               break;
2109
+       case IOR:
2110
+               zip_debug_print_m(pfx, lvl, "(OR", GET_MODE(x));
2111
+               zip_debug_rtx_1(pfx, XEXP(x,0),lvl+1);
2112
+               zip_debug_rtx_1(pfx, XEXP(x,1),lvl+1);
2113
+               zip_debug_print(pfx, lvl, ")");
2114
+               break;
2115
+       case XOR:
2116
+               zip_debug_print_m(pfx, lvl, "(XOR", GET_MODE(x));
2117
+               zip_debug_rtx_1(pfx, XEXP(x,0),lvl+1);
2118
+               zip_debug_rtx_1(pfx, XEXP(x,1),lvl+1);
2119
+               zip_debug_print(pfx, lvl, ")");
2120
+               break;
2121
+       case MULT:
2122
+               zip_debug_print_m(pfx, lvl, "(MULT", GET_MODE(x));
2123
+               zip_debug_rtx_1(pfx, XEXP(x,0),lvl+1);
2124
+               zip_debug_rtx_1(pfx, XEXP(x,1),lvl+1);
2125
+               zip_debug_print(pfx, lvl, ")");
2126
+               break;
2127
+       case EQ:        //
2128
+               zip_debug_print_m(pfx, lvl, "(EQ", GET_MODE(x));
2129
+               zip_debug_rtx_1(pfx, XEXP(x,0),lvl+1);
2130
+               zip_debug_rtx_1(pfx, XEXP(x,1),lvl+1);
2131
+               zip_debug_print(pfx, lvl, ")");
2132
+               break;
2133
+       case NE:        //
2134
+               zip_debug_print_m(pfx, lvl, "(NE", GET_MODE(x));
2135
+               zip_debug_rtx_1(pfx, XEXP(x,0),lvl+1);
2136
+               zip_debug_rtx_1(pfx, XEXP(x,1),lvl+1);
2137
+               zip_debug_print(pfx, lvl, ")");
2138
+               break;
2139
+       case GE:        //
2140
+               zip_debug_print_m(pfx, lvl, "(GE", GET_MODE(x));
2141
+               zip_debug_rtx_1(pfx, XEXP(x,0),lvl+1);
2142
+               zip_debug_rtx_1(pfx, XEXP(x,1),lvl+1);
2143
+               zip_debug_print(pfx, lvl, ")");
2144
+               break;
2145
+       case GT:        //
2146
+               zip_debug_print_m(pfx, lvl, "(GT", GET_MODE(x));
2147
+               zip_debug_rtx_1(pfx, XEXP(x,0),lvl+1);
2148
+               zip_debug_rtx_1(pfx, XEXP(x,1),lvl+1);
2149
+               zip_debug_print(pfx, lvl, ")");
2150
+               break;
2151
+       case LE:        //
2152
+               zip_debug_print_m(pfx, lvl, "(LE", GET_MODE(x));
2153
+               zip_debug_rtx_1(pfx, XEXP(x,0),lvl+1);
2154
+               zip_debug_rtx_1(pfx, XEXP(x,1),lvl+1);
2155
+               zip_debug_print(pfx, lvl, ")");
2156
+               break;
2157
+       case LT:        //
2158
+               zip_debug_print_m(pfx, lvl, "(LT", GET_MODE(x));
2159
+               zip_debug_rtx_1(pfx, XEXP(x,0),lvl+1);
2160
+               zip_debug_rtx_1(pfx, XEXP(x,1),lvl+1);
2161
+               zip_debug_print(pfx, lvl, ")");
2162
+               break;
2163
+       case GEU:       //
2164
+               zip_debug_print_m(pfx, lvl, "(GEU", GET_MODE(x));
2165
+               zip_debug_rtx_1(pfx, XEXP(x,0),lvl+1);
2166
+               zip_debug_rtx_1(pfx, XEXP(x,1),lvl+1);
2167
+               zip_debug_print(pfx, lvl, ")");
2168
+               break;
2169
+       case GTU:       //
2170
+               zip_debug_print_m(pfx, lvl, "(GTU", GET_MODE(x));
2171
+               zip_debug_rtx_1(pfx, XEXP(x,0),lvl+1);
2172
+               zip_debug_rtx_1(pfx, XEXP(x,1),lvl+1);
2173
+               zip_debug_print(pfx, lvl, ")");
2174
+               break;
2175
+       case LEU:       //
2176
+               zip_debug_print_m(pfx, lvl, "(LEU", GET_MODE(x));
2177
+               zip_debug_rtx_1(pfx, XEXP(x,0),lvl+1);
2178
+               zip_debug_rtx_1(pfx, XEXP(x,1),lvl+1);
2179
+               zip_debug_print(pfx, lvl, ")");
2180
+               break;
2181
+       case LTU:       //
2182
+               zip_debug_print_m(pfx, lvl, "(LTU", GET_MODE(x));
2183
+               zip_debug_rtx_1(pfx, XEXP(x,0),lvl+1);
2184
+               zip_debug_rtx_1(pfx, XEXP(x,1),lvl+1);
2185
+               zip_debug_print(pfx, lvl, ")");
2186
+               break;
2187
+       case SCRATCH:   //
2188
+               zip_debug_print_m(pfx, lvl, "(SCRATCH)", GET_MODE(x));
2189
+               break;
2190
+       case SUBREG:
2191
+               { char buf[25];
2192 111 dgisselq
+               if (REG_P(XEXP(x,0))) {
2193
+                       sprintf(buf, "(SUBREG %d/%d)", REGNO(XEXP(x,0)),
2194
+                               SUBREG_BYTE(x));
2195
+                       zip_debug_print(pfx, lvl, buf);
2196
+               } else if (MEM_P(XEXP(x,0))) {
2197
+                       sprintf(buf, "(SUBREG /%d", SUBREG_BYTE(x));
2198
+                       zip_debug_print(pfx, lvl, buf);
2199
+                       zip_debug_rtx_1(pfx, XEXP(x,0),lvl+1);
2200
+                       zip_debug_print(pfx, lvl, ")");
2201
+               } else {
2202
+                       sprintf(buf, "(SUBREG UNK /%d", SUBREG_BYTE(x));
2203
+                       zip_debug_print(pfx, lvl, buf);
2204
+                       zip_debug_rtx_1(pfx, XEXP(x,0),lvl+1);
2205
+                       zip_debug_print(pfx, lvl, ")");
2206
+               }}
2207
+               break;
2208 102 dgisselq
+       default:
2209 111 dgisselq
+               { char buf[128];
2210 102 dgisselq
+               sprintf(buf, "(? = %d) -- calling DEBUG-RTX", GET_CODE(x));
2211
+               zip_debug_print(pfx, lvl, buf);
2212
+               debug_rtx(x);
2213
+               } break;
2214
+       }
2215
+}
2216
+
2217
+void
2218
+zip_debug_rtx_pfx(const char *pfx, const_rtx x) {
2219
+       zip_debug_rtx_1(pfx, x, 0);
2220
+}
2221
+
2222
+void
2223
+zip_debug_rtx(const_rtx x) {
2224
+       zip_debug_rtx_pfx("", x);
2225
+}
2226
+
2227
+void
2228
+zip_debug_insn(rtx_insn *insn ATTRIBUTE_UNUSED) {
2229
+}
2230
+
2231
+void
2232
+zip_debug_bb(basic_block bb) {
2233
+       rtx_insn        *insn;
2234
+
2235
+       fprintf(stderr, "************ BASIC-BLOCK ***************\n");
2236
+       FOR_BB_INSNS(bb, insn)
2237
+       {
2238
+               zip_debug_rtx(insn);
2239
+       }
2240
+}
2241
+
2242
+
2243
+static bool
2244 111 dgisselq
+zip_legitimate_opb(const_rtx x, bool strict)
2245 102 dgisselq
+{
2246 103 dgisselq
+       const bool      dbg = ((ALL_DEBUG_ON)||(false))&&(!ALL_DEBUG_OFF);
2247 102 dgisselq
+
2248 111 dgisselq
+       if (dbg) fprintf(stderr, "ZIP-LEGITIMATE-OPB\n");
2249 102 dgisselq
+       if (dbg) zip_debug_rtx_pfx("Test: ", x);
2250
+
2251
+       if (NULL_RTX == x)
2252
+               return false;
2253
+       else if ((GET_MODE(x) != SImode)&&(GET_MODE(x) != VOIDmode))
2254
+               return false;
2255
+       else if (REG_P(x)) {
2256 111 dgisselq
+               bool    res;
2257 102 dgisselq
+               // Only insist the register b a valid register if strict is true
2258 111 dgisselq
+               res = (!strict)||((is_ZIP_REG(REGNO(x)))&&(REGNO(x) != zip_CC));
2259
+               if (dbg) fprintf(stderr, "ZIP-LEGITIMATE-OPB -> %s (Reg)\n",
2260
+                       (res)?"YES!":"No");
2261
+               return res;
2262
+       } else if ((!strict)&&(SUBREG_P(x))) {
2263
+               // Only insist the register b a valid register if strict is true
2264
+               if (dbg) fprintf(stderr, "ZIP-LEGITIMATE-OPB -> (Subreg(Reg),recurse)\n");
2265
+               return zip_legitimate_opb(XEXP(x,0), strict);
2266
+       } else if ((CONST_INT_P(x))
2267
+               &&(INTVAL(x) >= zip_min_opb_imm)
2268
+               &&(INTVAL(x) <= zip_max_opb_imm)) {
2269
+               if (dbg) fprintf(stderr, "ZIP-LEGITIMATE-OPB -> YES! (Const)\n");
2270
+               return true;
2271 102 dgisselq
+       } else if (GET_CODE(x) == PLUS) {
2272
+               // Is it a valid register?
2273
+               if(!REG_P(XEXP(x,0))) {
2274 111 dgisselq
+                       if (dbg) fprintf(stderr, "ZIP-LEGITIMATE-OPB -> No (No reg in +%s)\n",
2275 102 dgisselq
+                       (GET_CODE(XEXP(x,1))==REG)?", reg in op[1]":"");
2276
+                       return false;
2277 111 dgisselq
+               } if ((strict)&&((!is_ZIP_REG(REGNO(XEXP(x,0))))||(REGNO(XEXP(x,0)) == zip_CC))) {
2278
+                       if (dbg) fprintf(stderr, "ZIP-LEGITIMATE-OPB -> No (Wrong reg in +, %d)\n", REGNO(XEXP(x,0)));
2279 102 dgisselq
+                       return false;
2280
+               } if ((GET_CODE(XEXP(x, 1)) == CONST_INT)
2281
+                       &&(INTVAL(XEXP(x, 1)) <= zip_max_anchor_offset)
2282
+                       &&(INTVAL(XEXP(x, 1)) >= zip_min_anchor_offset)) {
2283 111 dgisselq
+                       if (dbg) fprintf(stderr, "ZIP-LEGITIMATE-OPB -> YES! (reg+int)\n");
2284 103 dgisselq
+                       // if((INTVAL(XEXP(x,1))<0)&&(REGNO(XEXP(x,0))==zip_SP))
2285
+                               // gcc_unreachable();
2286 102 dgisselq
+                       return true;
2287
+               } if ((GET_CODE(XEXP(x, 1)) == LABEL_REF)
2288
+                       ||(GET_CODE(XEXP(x, 1)) == SYMBOL_REF)) {
2289
+                       // While we can technically support this, the problem
2290
+                       // is that the symbol address could be anywhere, and we
2291
+                       // have no way of recovering if it's outside of our
2292
+                       // 14 allowable bits.
2293 111 dgisselq
+                       if (dbg) fprintf(stderr, "ZIP-LEGITIMATE-OPB -> No. (reg+lbl)\n");
2294 102 dgisselq
+                       return false;
2295
+               }
2296 111 dgisselq
+               // if ((GET_CODE(XEXP(x, 1)) == MINUS)
2297
+               //      &&((GET_CODE(XEXP(XEXP(x,1),0)) == LABEL_REF)
2298
+               //              ||(GET_CODE(XEXP(XEXP(x,1),0)) == CONST_INT)
2299
+               //              ||(GET_CODE(XEXP(XEXP(x,1),0)) == SYMBOL_REF))
2300
+               //      &&((GET_CODE(XEXP(XEXP(x,1),1)) == LABEL_REF)
2301
+               //              ||(GET_CODE(XEXP(XEXP(x,1),0)) == CONST_INT)
2302
+               //              ||(GET_CODE(XEXP(XEXP(x,1),1)) == SYMBOL_REF))
2303
+               //      &&((GET_CODE(XEXP(XEXP(x,1),0)))
2304
+               //              == (GET_CODE(XEXP(XEXP(x,1),1))))) {
2305
+               //      if (dbg) fprintf(stderr, "ZIP-LEGITIMATE-OPERAND-ADDRESS -> YES! (lbl-lbl+reg)\n");
2306
+               //      return true;
2307
+               //}
2308 102 dgisselq
+       }
2309
+
2310 111 dgisselq
+       if (dbg) fprintf(stderr, "ZIP-LEGITIMATE-OPB -> No\n");
2311 102 dgisselq
+       if (dbg) zip_debug_rtx(x);
2312
+       return false;
2313
+}
2314
+
2315
+static bool
2316
+zip_legitimate_move_operand_p(machine_mode mode ATTRIBUTE_UNUSED, rtx x, bool strict) {
2317
+       const bool      dbg = ((ALL_DEBUG_ON)||(false))&&(!ALL_DEBUG_OFF);
2318
+
2319
+       if (dbg) fprintf(stderr, "ZIP-VALID-MOVE-OPERAND\n");
2320
+       if (dbg) zip_debug_rtx_pfx("VMov?: ", x);
2321
+
2322
+       if (NULL_RTX == x)
2323
+               return false;
2324
+       else if (REG_P(x)) {
2325
+               // Only insist the register b a valid register if strict is true
2326
+               if (dbg) fprintf(stderr, "ZIP-VALID-MOVE-OPERAND -> YES! (Reg)\n");
2327 111 dgisselq
+               return (!strict)||((is_ZIP_REG(REGNO(x)))&&(REGNO(x) !=zip_CC));
2328 102 dgisselq
+       } else if (GET_CODE(x) == PLUS) {
2329 111 dgisselq
+               // if (GET_CODE(XEXP(x,0))==PLUS) {
2330
+               // return (zip_legitimate_opb(XEXP(x,0), strict))
2331
+               // &&(zip_const_address_operand(XEXP(x,0)));
2332
+               // }
2333 102 dgisselq
+               // Is it a valid register?
2334 111 dgisselq
+               if(GET_CODE(XEXP(x,0)) != REG) {
2335 102 dgisselq
+                       if (dbg) fprintf(stderr, "ZIP-VALID-MOVE-OPERAND -> No (No reg in +%s)\n",
2336
+                       (GET_CODE(XEXP(x,1))==REG)?", reg in op[1]":"");
2337
+                       return false;
2338 111 dgisselq
+               } if ((strict)&&
2339
+                       ((!is_ZIP_REG(REGNO(XEXP(x,0))))
2340
+                       ||(REGNO(XEXP(x,0)) == zip_CC))) {
2341 102 dgisselq
+                       if (dbg) fprintf(stderr, "ZIP-VALID-MOVE-OPERAND -> No (Wrong reg in +, %d)\n", REGNO(XEXP(x,0)));
2342
+                       return false;
2343
+               } if ((GET_CODE(XEXP(x, 1)) == CONST_INT)
2344
+                       &&(INTVAL(XEXP(x, 1)) <= zip_max_mov_offset)
2345
+                       &&(INTVAL(XEXP(x, 1)) >= zip_min_mov_offset)) {
2346
+                       if (dbg) fprintf(stderr, "ZIP-VALID-MOVE-OPERAND -> YES! (reg+int)\n");
2347
+                       return true;
2348
+               }
2349
+       }
2350
+
2351
+       if (dbg) fprintf(stderr, "ZIP-VALID-MOVE-OPERAND -> No\n");
2352
+       if (dbg) zip_debug_rtx(x);
2353
+       return false;
2354
+}
2355
+
2356
+int
2357
+zip_pd_mov_operand(rtx op)
2358
+{
2359
+       const bool      dbg = ((ALL_DEBUG_ON)||(false))&&(!ALL_DEBUG_OFF);
2360
+
2361
+       if (dbg) fprintf(stderr, "ZIP-VALID-MOV(predicate) for OPERAND\n");
2362
+       return zip_legitimate_move_operand_p(VOIDmode, op, !can_create_pseudo_p());
2363
+}
2364
+
2365
+int
2366 111 dgisselq
+zip_pd_mvimm_operand(rtx op)
2367
+{
2368
+       const bool      dbg = ((ALL_DEBUG_ON)||(false))&&(!ALL_DEBUG_OFF);
2369
+
2370
+       if (dbg) fprintf(stderr, "ZIP-VALID-MVIMM(predicate) for OPERAND\n");
2371
+       if (!CONST_INT_P(op))
2372
+               return false;
2373
+       if (INTVAL(op) > zip_max_mov_offset)
2374
+               return false;
2375
+       if (INTVAL(op) < zip_min_mov_offset)
2376
+               return false;
2377
+       return true;
2378
+}
2379
+
2380
+int
2381
+zip_pd_imm_operand(rtx op)
2382
+{
2383
+       const bool      dbg = ((ALL_DEBUG_ON)||(false))&&(!ALL_DEBUG_OFF);
2384
+
2385
+       if (dbg) fprintf(stderr, "ZIP-VALID-IMM(predicate) for OPERAND\n");
2386
+       if (!CONST_INT_P(op))
2387
+               return false;
2388
+       if (INTVAL(op) > zip_max_anchor_offset)
2389
+               return false;
2390
+       if (INTVAL(op) < zip_min_anchor_offset)
2391
+               return false;
2392
+       return true;
2393
+}
2394
+
2395
+int
2396 102 dgisselq
+zip_address_operand(rtx op)
2397
+{
2398
+       const bool      dbg = ((ALL_DEBUG_ON)||(false))&&(!ALL_DEBUG_OFF);
2399
+
2400
+       if (dbg) fprintf(stderr, "ZIP-ADDRESS for OPERAND\n");
2401 111 dgisselq
+       if ((REG_P(op))&&(REGNO(op)==zip_CC))
2402
+               return false;
2403
+       else if ((GET_CODE(op) == PLUS)&&(REG_P(XEXP(op,0)))
2404
+                       &&(REGNO(XEXP(op,0))==zip_CC))
2405
+               return false;
2406
+       else
2407
+               return zip_legitimate_opb(op, !can_create_pseudo_p());
2408 102 dgisselq
+}
2409
+
2410
+int
2411 111 dgisselq
+zip_pd_opb_operand(rtx op)
2412 102 dgisselq
+{
2413
+       const bool      dbg = ((ALL_DEBUG_ON)||(false))&&(!ALL_DEBUG_OFF);
2414
+
2415 111 dgisselq
+       if (dbg) fprintf(stderr, "ZIP-OPB(predicate) for OPERAND\n");
2416
+       return zip_legitimate_opb(op, !can_create_pseudo_p());
2417 102 dgisselq
+}
2418
+
2419
+int
2420
+zip_ct_address_operand(rtx op)
2421
+{
2422
+       const bool      dbg = ((ALL_DEBUG_ON)||(false))&&(!ALL_DEBUG_OFF);
2423
+
2424
+       if (dbg) fprintf(stderr, "ZIP-ADDRESS(constraint) for OPERAND\n");
2425 111 dgisselq
+       return zip_legitimate_opb(op, !can_create_pseudo_p());
2426 102 dgisselq
+}
2427
+
2428
+int
2429
+zip_const_address_operand(rtx x) {
2430
+       const bool      dbg = ((ALL_DEBUG_ON)||(false))&&(!ALL_DEBUG_OFF);
2431
+
2432
+       if (dbg) fprintf(stderr, "is ZIP-CONST-ADDRESS?\n");
2433
+       if (dbg) zip_debug_rtx(x);
2434
+       if ((GET_MODE(x) != SImode)&&(GET_MODE(x) != VOIDmode))
2435
+               return false;
2436
+       if ((GET_CODE(x) == LABEL_REF)
2437
+                       ||(GET_CODE(x) == CODE_LABEL)
2438
+                       ||(GET_CODE(x) == SYMBOL_REF)) {
2439
+               if (dbg) fprintf(stderr, "is ZIP-CONST-ADDRESS? -> YES!\n");
2440
+               return true;
2441
+       } else if (CONST_INT_P(x)) {
2442
+               if (dbg) fprintf(stderr, "is ZIP-CONST-ADDRESS? -> YES!\n");
2443
+               return true;
2444
+       } else if (GET_CODE(x) == PLUS) {
2445
+               if (dbg) fprintf(stderr, "is ZIP-CONST-ADDRESS(PLUS)\n");
2446
+               return ((zip_const_address_operand(XEXP(x,0)))
2447
+                       &&(CONST_INT_P(XEXP(x,1))));
2448
+       } else if (GET_CODE(x) == MINUS) {
2449
+               if (dbg) fprintf(stderr, "is ZIP-CONST-ADDRESS(MINUS)\n");
2450
+               return ((zip_const_address_operand(XEXP(x,0)))
2451
+                       &&(zip_const_address_operand(XEXP(x,1))));
2452
+       }
2453
+
2454
+       if (dbg) fprintf(stderr, "is ZIP-CONST-ADDRESS? -> No\n");
2455
+       if (dbg) zip_debug_rtx(x);
2456
+       return false;
2457
+}
2458
+
2459
+int
2460
+zip_ct_const_address_operand(rtx x) {
2461
+       const bool      dbg = ((ALL_DEBUG_ON)||(false))&&(!ALL_DEBUG_OFF);
2462
+
2463
+       if (dbg) fprintf(stderr, "ZIP-CONST-ADDRESS(constraint)\n");
2464
+       return zip_const_address_operand(x);
2465
+}
2466
+
2467
+int
2468
+zip_pd_const_address_operand(rtx x) {
2469
+       const bool      dbg = ((ALL_DEBUG_ON)||(false))&&(!ALL_DEBUG_OFF);
2470
+
2471
+       if (dbg) fprintf(stderr, "ZIP-CONST-ADDRESS(predicate)\n");
2472
+       return zip_const_address_operand(x);
2473
+}
2474
+
2475
+
2476
+static bool
2477
+zip_legitimate_address_p(machine_mode mode ATTRIBUTE_UNUSED, rtx x, bool strict)
2478
+{
2479
+       const bool      dbg = ((ALL_DEBUG_ON)||(false))&&(!ALL_DEBUG_OFF);
2480
+
2481
+       if (dbg) fprintf(stderr, "Zip-LEGITIMATE-ADDRESS-P\n");
2482
+       if (dbg) zip_debug_rtx(x);
2483
+
2484
+       // Only insist the register be a valid register if strict is true
2485 111 dgisselq
+       if (zip_legitimate_opb(x, strict))
2486 102 dgisselq
+               return true;
2487 111 dgisselq
+       // else if (zip_const_address_operand(x))
2488
+               // return true;
2489 102 dgisselq
+
2490
+       return false;
2491
+}
2492
+
2493 111 dgisselq
+static rtx
2494
+zip_legitimize_address(rtx x, rtx oldx ATTRIBUTE_UNUSED, machine_mode mode ATTRIBUTE_UNUSED) {
2495
+       const bool      dbg = ((ALL_DEBUG_ON)||(false))&&(!ALL_DEBUG_OFF);
2496
+
2497
+       if (dbg) zip_debug_rtx_pfx("LEGITIMIZE: ", x);
2498
+       if (zip_legitimate_address_p(mode, x, !can_create_pseudo_p()))
2499
+               return x;
2500
+
2501
+       if (GET_CODE(x)==PLUS) {
2502
+               if (!REG_P(XEXP(x,0)))
2503
+                       XEXP(x,0) = force_reg(GET_MODE(x),XEXP(x,0));
2504
+               if ((!zip_legitimate_address_p(mode, x, !can_create_pseudo_p()))
2505
+                       &&(!CONST_INT_P(XEXP(x,1))))
2506
+                       x = force_reg(GET_MODE(x),x);
2507
+       } else if (MEM_P(x))
2508
+               x = force_reg(GET_MODE(x),x);
2509
+
2510
+       if (dbg) zip_debug_rtx_pfx("LEGITIMATE: ", x);
2511
+       return x;
2512
+}
2513
+
2514 102 dgisselq
+void
2515
+zip_asm_output_def(FILE *stream, const char *name, const char *value)
2516
+{
2517
+       assemble_name(stream, name);
2518
+       fprintf(stream, "\t.equ ");
2519
+       assemble_name(stream, value);
2520
+       fputc('\n', stream);
2521
+}
2522
+
2523
+/*
2524
+bool   zip_load_address_lod(rtx regrx, rtx memrx) {
2525
+       fprintf(stderr, "ZIP-LOAD-ADDRESS-LOD\n");
2526
+       if (!MEM_P(memrx))
2527
+               return false;
2528
+       if (GET_CODE(regrx) != REG)
2529
+               return false;
2530
+       enum    rtx_code ic = GET_CODE(memrx);
2531
+       if ((ic == SYMBOL_REF)
2532
+               ||(ic == CODE_LABEL)
2533
+               ||(ic == LABEL_REF)) {
2534
+               if (can_create_pseudo_p()) {
2535
+                       rtx scratch_reg;
2536
+                       scratch_reg = gen_rtx_SCRATCH(SImode);
2537
+                       emit_insn(gen_movsi_ldi(scratch_reg, XEXP(memrx, 0)));
2538
+                       emit_insn(gen_movsi_lod(regrx, scratch_reg));
2539
+                       return true;
2540
+               } else return false;
2541
+       } else return false;
2542
+}
2543
+
2544
+bool   zip_load_address_sto(rtx memrx, rtx regrx) {
2545
+       fprintf(stderr,  "CHECKING-IN-W/ZIP_LOAD_ADDRESS_STORE\n");
2546
+       if (!MEM_P(memrx))
2547
+               return false;
2548
+       if (GET_CODE(regrx) != REG)
2549
+               return false;
2550
+       enum    rtx_code ic = GET_CODE(memrx);
2551
+       if ((ic == SYMBOL_REF)
2552
+               ||(ic == CODE_LABEL)
2553
+               ||(ic == LABEL_REF)) {
2554
+               if (can_create_pseudo_p()) {
2555
+                       rtx scratch_reg;
2556
+                       scratch_reg = gen_rtx_SCRATCH(SImode);
2557
+                       emit_insn(gen_movsi_ldi(scratch_reg, XEXP(memrx, 0)));
2558
+                       emit_insn(gen_movsi_sto(scratch_reg, regrx));
2559
+                       return true;
2560
+               } else return false;
2561
+       } return false;
2562
+}
2563
+*/
2564
+
2565 111 dgisselq
+#define        USE_SUBREG
2566
+#ifdef USE_SUBREG
2567
+#define        SREG_P(RTX) ((SUBREG_P(RTX))&&(REG_P(XEXP(RTX,0))))
2568
+#define        SMEM_P(RTX) ((SUBREG_P(RTX))&&(MEM_P(XEXP(RTX,0))))
2569
+#else
2570
+#define        SREG_P(RTX)     false
2571
+#define        SMEM_P(RTX)     false
2572
+#endif
2573 102 dgisselq
+
2574
+bool   zip_gen_move_rtl(rtx dst, rtx src) {
2575 103 dgisselq
+       const bool      dbg = ((ALL_DEBUG_ON)||(false))&&(!ALL_DEBUG_OFF);
2576 102 dgisselq
+
2577
+       if (dbg) fprintf(stderr, "ZIP-GEN-MOVE\n");
2578
+       if (dbg) zip_debug_rtx_pfx("FROM: ", src);
2579
+       if (dbg) zip_debug_rtx_pfx("TO  : ", dst);
2580
+       if (dbg) fprintf(stderr, "PSEUDOs: %s\n", can_create_pseudo_p()?"true":"false");
2581 111 dgisselq
+       if (((REG_P(dst))||(SREG_P(dst)))
2582
+                       &&((REG_P(src))||(SREG_P(src)))) {
2583 102 dgisselq
+               // First type of move... register to register
2584
+               if (dbg) fprintf(stderr, "ZIP-GEN-MOVE/REG -- EMIT\n");
2585 111 dgisselq
+               // if (SREG_P(dst)) dst = gen_raw_REG(SImode,REGNO(XEXP(dst,0))+SUBREG_BYTE(dst));
2586
+               // if (SREG_P(src)) src = gen_raw_REG(SImode,REGNO(XEXP(src,0))+SUBREG_BYTE(src));
2587 102 dgisselq
+               emit_insn(gen_movsi_reg(dst, src));
2588
+       } else if ((MEM_P(dst))&&(MEM_P(XEXP(dst,0)))) {
2589 111 dgisselq
+               // An indirect store, (mem (mem (addr .))) = whatever ...
2590 102 dgisselq
+               if (can_create_pseudo_p()) {
2591
+                       rtx     tmp = gen_reg_rtx(Pmode);
2592
+                       zip_gen_move_rtl(tmp, XEXP(dst,0));
2593 103 dgisselq
+                       // mark_reg_pointer(tmp,0);
2594 102 dgisselq
+                       zip_gen_move_rtl(gen_rtx_MEM(GET_MODE(src), tmp), src);
2595
+               } else {
2596
+                       fprintf(stderr, "ZIP:Cannot move into mem w/o pseudo\n");
2597
+                       return false;
2598
+               }
2599
+       } else if ((MEM_P(src))&&(MEM_P(XEXP(src,0)))) {
2600 111 dgisselq
+               // If this is an indirect load, Rx = (mem (mem (addr)))
2601 102 dgisselq
+               if (can_create_pseudo_p()) {
2602
+                       rtx     tmp = gen_reg_rtx(Pmode);
2603
+                       zip_gen_move_rtl(tmp, XEXP(src,0));
2604 103 dgisselq
+                       // mark_reg_pointer(tmp,0);
2605 102 dgisselq
+                       zip_gen_move_rtl(dst, gen_rtx_MEM(GET_MODE(src), tmp));
2606
+               } else {
2607
+                       fprintf(stderr, "ZIP: Cannot move from mem(mem(ptr)) w/o pseudo\n");
2608
+                       return false;
2609
+               }
2610 111 dgisselq
+       } else if (((REG_P(dst))||(SREG_P(dst)))&&(GET_CODE(src)==PLUS)
2611 102 dgisselq
+                       &&(REG_P(XEXP(src,0)))
2612
+                       &&(CONST_INT_P(XEXP(src,1)))) {
2613 111 dgisselq
+               // if (SREG_P(dst)) dst = gen_raw_REG(SImode,REGNO(XEXP(dst,0))+SUBREG_BYTE(dst));
2614 102 dgisselq
+               // Second type of move... register plus offset to register
2615
+               if ((INTVAL(XEXP(src, 1)) <= zip_max_mov_offset)
2616
+                       &&(INTVAL(XEXP(src, 1)) >= zip_min_mov_offset)) {
2617
+                       // The offset is within bounds
2618
+                       if (dbg) fprintf(stderr, "ZIP-GEN-MOVE/REG+OFF -- EMIT\n");
2619
+                       emit_insn(gen_movsi_reg_off(dst, XEXP(src,0),XEXP(src,1)));
2620
+               } else if (can_create_pseudo_p()) {
2621
+                       // The offset is out of bounds, get a new register and
2622
+                       // generate an add instruction to split this up.
2623
+                       rtx     tmp = gen_reg_rtx(GET_MODE(XEXP(src,0)));
2624
+
2625
+                       if (dbg) fprintf(stderr, "ZIP-GEN-MOVE/LDI\n");
2626
+                       emit_insn(gen_movsi_ldi(tmp, XEXP(src,1)));
2627
+                       if (dbg) fprintf(stderr, "ZIP-GEN-MOVE/ADD\n");
2628
+                       emit_insn(gen_addsi3(tmp, tmp, XEXP(src,0)));
2629
+                       if (dbg) fprintf(stderr, "ZIP-GEN-MOVE/DST\n");
2630
+                       emit_insn(gen_movsi_reg(dst, tmp));
2631
+               } else {
2632
+                       fprintf(stderr, "ZIP: Cannot move a(r),b w/o pseudo for out of bounds a\n");
2633
+                       return false;
2634
+               }
2635
+       } else if ((MEM_P(dst))&&(MEM_P(src))) {
2636
+               rtx     tmp;
2637
+               if (dbg) fprintf(stderr, "ZIP-GEN-MOVE/MEM/MEM\n");
2638
+               if (can_create_pseudo_p()) {
2639
+                       tmp = gen_reg_rtx(GET_MODE(src));
2640
+                       emit_insn(gen_movsi(tmp, src));
2641
+                       emit_insn(gen_movsi(dst, tmp));
2642
+               } else {
2643
+                       fprintf(stderr, "ZIP: Cannot move mem(A) to mem(B) w/o pseudo\n");
2644
+                       return false;
2645
+               }
2646 111 dgisselq
+       } else if (((REG_P(dst))||(SREG_P(dst)))&&(MEM_P(src))) {
2647 102 dgisselq
+               // Memory load
2648 111 dgisselq
+               // if (SREG_P(dst)) dst = gen_raw_REG(SImode,REGNO(XEXP(dst,0))+SUBREG_BYTE(dst));
2649 102 dgisselq
+               if (dbg) fprintf(stderr, "ZIP-GEN-MOVE/LOD\n");
2650 111 dgisselq
+               if (zip_legitimate_opb(XEXP(src, 0), false)) {
2651 102 dgisselq
+                       if (dbg) fprintf(stderr, "ZIP-GEN-MOVE/SIMPLE-LOD(ADDR)\n");
2652
+                       if (dbg) zip_debug_rtx_pfx("Smple-Addr: ", src);
2653
+                       emit_insn(gen_movsi_lod(dst, src));
2654
+               } else if (zip_const_address_operand(XEXP(src,0))) {
2655
+                       if (can_create_pseudo_p()) {
2656
+                               rtx     tmp;
2657
+                               if (dbg) fprintf(stderr, "ZIP-GEN-MOVE/LOD(CONST-ADDR)\n");
2658
+                               tmp = gen_reg_rtx(Pmode);
2659
+                               emit_insn(gen_movsi_ldi(tmp, XEXP(src,0)));
2660
+                               emit_insn(gen_movsi_lod(dst, gen_rtx_MEM(GET_MODE(src),tmp)));
2661
+                       } else {
2662
+                               if (dbg) fprintf(stderr, "ZIP-GEN-MOVE/LOD(CONST-ADDR,SELF)\n");
2663
+                               emit_insn(gen_movsi_ldi(dst, XEXP(src,0)));
2664
+                               emit_insn(gen_movsi_lod(dst, gen_rtx_MEM(GET_MODE(src),dst)));
2665
+                       }
2666
+               } else {
2667
+                       internal_error("%s", "ZIP/No usable load\n");
2668
+               }
2669 111 dgisselq
+       } else if ((MEM_P(dst))&&((REG_P(src))||(SREG_P(src)))) {
2670 102 dgisselq
+               // Memory store
2671 111 dgisselq
+               // if (SREG_P(src)) src = gen_raw_REG(SImode,REGNO(XEXP(src,0))+SUBREG_BYTE(src));
2672 102 dgisselq
+               if (dbg) fprintf(stderr, "ZIP-GEN-MOVE/STO\n");
2673 111 dgisselq
+               if (zip_legitimate_opb(XEXP(dst, 0), false)) {
2674 102 dgisselq
+                       // If it's a legitimate address already, do nothing mor
2675
+                       if (dbg) fprintf(stderr, "ZIP-GEN-MOVE/STO(Legit Addr)--EMIT\n");
2676 103 dgisselq
+                       // if (REG_P(XEXP(dst,0)))
2677
+                               // mark_reg_pointer(XEXP(dst,0),0);
2678
+                       // else if ((GET_CODE(XEXP(dst,0))==PLUS)
2679
+                                       // &&(REG_P(XEXP(XEXP(dst,0),0))))
2680
+                               // mark_reg_pointer(XEXP(XEXP(dst,0),0),0);
2681 102 dgisselq
+                       emit_insn(gen_movsi_sto(dst, src));
2682
+               } else if (zip_const_address_operand(XEXP(dst,0))) {
2683
+                       rtx     tmp;
2684
+
2685
+                       if (can_create_pseudo_p()) {
2686
+                               if (dbg) fprintf(stderr, "ZIP-GEN-MOVE/STO(Const Addr,Reg) -- EMIT\n");
2687
+                               // Otherwise we need to load the memory address
2688
+                               // into a register
2689
+                               tmp = gen_reg_rtx(Pmode);
2690 103 dgisselq
+                               // mark_reg_pointer(tmp,0);
2691 102 dgisselq
+                               emit_insn(gen_movsi_ldi(tmp, XEXP(dst,0)));
2692
+                               //
2693
+                               // Then we can do our load
2694
+                               if (dbg) fprintf(stderr, "ZIP-GEN-MOVE/STO -- emit\n");
2695
+                               emit_insn(gen_movsi_sto(gen_rtx_MEM(GET_MODE(src), tmp), src));
2696
+                       } else {
2697
+                               fprintf(stderr, "Cannot move src -> mem(dst) w/o pseudo\n");
2698
+                               return false;
2699
+                       }
2700
+               } else if (can_create_pseudo_p())
2701
+                       internal_error("%s", "ZIP/No usable store\n");
2702
+               else {
2703
+                       fprintf(stderr, "ZIP/Unanticipated store problem\n");
2704
+                       return false;
2705
+               }
2706
+               if (dbg) fprintf(stderr, "ZIP-GEN-MOVE/STO -- DONE\n");
2707
+       } else if ((MEM_P(dst))&&((CONST_INT_P(src))||(GET_CODE(src)==SYMBOL_REF))) {
2708
+               // Store a constant into memory
2709
+               rtx     tmp;
2710
+
2711
+               if (can_create_pseudo_p()) {
2712
+                       if (dbg) fprintf(stderr, "ZIP-GEN-MOVE/CONST->MEM\n");
2713
+                       // Load the source constant into a register first
2714
+                       tmp = gen_reg_rtx((GET_MODE(src)==VOIDmode)?GET_MODE(dst):GET_MODE(src));
2715
+                       emit_insn(gen_movsi_ldi(tmp,src));
2716
+                       if (dbg) fprintf(stderr, "ZIP-GEN-MOVE/CONST->REG->MEM -- RECURSE\n");
2717
+
2718
+                       // Then do a normal move, recursing to handle memory
2719
+                       // properly
2720
+                       zip_gen_move_rtl(dst, tmp);
2721
+                       if (dbg) fprintf(stderr, "ZIP-GEN-MOVE/CONST->MEM -- DONE\n");
2722
+               } else {
2723
+                       fprintf(stderr, "ZIP/Cannot store constant into mem w/o pseudo\n");
2724
+                       return false;
2725
+               }
2726 111 dgisselq
+       } else if (((REG_P(dst))||(SREG_P(dst)))&&(CONST_INT_P(src))) {
2727
+               // if (SREG_P(dst)) dst = gen_raw_REG(SImode,REGNO(XEXP(dst,0))+SUBREG_BYTE(dst));
2728 102 dgisselq
+               // Load a constant into a register
2729
+               // The assembler really takes care of all of this, since
2730
+               // the assembler will split the constant if it doesn't fit
2731
+               // into a single instruction.
2732
+               if (dbg) fprintf(stderr, "ZIP-GEN-MOVE/CONST->REG\n");
2733
+               // if ((GET_MODE(dst)==VOIDmode)&&(GET_MODE(src)==VOIDmode))
2734
+                       // PUT_MODE(dst,SImode);
2735
+               emit_insn(gen_movsi_ldi(dst, src));
2736
+       } else if ((REG_P(dst))&&
2737
+                       ((LABEL_P(src))
2738
+                       ||(GET_CODE(src)==SYMBOL_REF)
2739
+                       ||(GET_CODE(src)==LABEL_REF))) {
2740
+               // Load a constant into a register
2741
+               // The assembler really takes care of all of this, since
2742
+               // the assembler will split the constant if it doesn't fit
2743
+               // into a single instruction.
2744
+               if (dbg) fprintf(stderr, "ZIP-GEN-MOVE/LABEL->REG\n");
2745
+               emit_insn(gen_movsi_ldi(dst, src));
2746 111 dgisselq
+       } else if ((REG_P(dst))&&
2747
+                       ((GET_CODE(src)==PLUS)
2748
+                       &&((GET_CODE(XEXP(src,0))==SYMBOL_REF)
2749
+                               ||(GET_CODE(XEXP(src,0))==LABEL_REF))
2750
+                       &&(CONST_INT_P(XEXP(src,1))))) {
2751
+               if (dbg) fprintf(stderr, "ZIP-GEN-MOVE/LABEL+OFFSET->REG\n");
2752
+               if ((INTVAL(XEXP(src,1))>=zip_min_mov_offset)
2753
+                       &&(INTVAL(XEXP(src,1))<=zip_max_mov_offset)) {
2754
+                       emit_insn(gen_movsi_ldi(dst, XEXP(src,1)));
2755
+                       emit_insn(gen_movsi_reg_off(dst, dst, XEXP(src,1)));
2756
+               } else if (can_create_pseudo_p()) {
2757
+                       rtx tmp = gen_reg_rtx(Pmode);
2758
+                       emit_insn(gen_movsi_ldi(tmp, XEXP(src,1)));
2759
+                       emit_insn(gen_movsi_ldi(dst, src));
2760
+                       emit_insn(gen_addsi3(dst,dst,tmp));
2761
+                       return true;
2762
+               } else {
2763
+                       fprintf(stderr, "Cannot move LABEL+OFFSET -> dst w/o pseudo\n");
2764
+                       return false;
2765
+               }
2766
+       } else if (((REG_P(dst))||(SREG_P(dst)))&&(GET_CODE(src) == CONST)) {
2767
+               // if (SREG_P(dst)) dst = gen_raw_REG(SImode,REGNO(XEXP(dst,0))+SUBREG_BYTE(dst));
2768
+               zip_gen_move_rtl(dst, XEXP(src,0));
2769
+       } else if (SMEM_P(dst)) {
2770
+               rtx     addr = XEXP(XEXP(dst,0),0);
2771
+               if (REG_P(addr)) {
2772
+                       zip_gen_move_rtl(
2773
+                               gen_rtx_MEM(SImode, plus_constant(Pmode,addr,
2774
+                                       SUBREG_BYTE(dst),false)),src);
2775
+               } else if ((GET_CODE(addr)==PLUS)
2776
+                               &&(REG_P(XEXP(addr,0)))
2777
+                               &&(CONST_INT_P(XEXP(addr,1)))) {
2778
+                       rtx addreg = XEXP(addr,0);
2779
+                       zip_gen_move_rtl(
2780
+                               gen_rtx_MEM(SImode, plus_constant(Pmode,addreg,
2781
+                                       INTVAL(XEXP(addr,1))+SUBREG_BYTE(dst),
2782
+                                       false)),src);
2783
+               } else fprintf(stderr, "ZIP/Cannot understand SUBREG\n");
2784
+       } else if (SMEM_P(src)) {
2785
+               rtx     addr = XEXP(XEXP(src,0),0);
2786
+               if (REG_P(addr)) {
2787
+                       zip_gen_move_rtl(dst,
2788
+                               gen_rtx_MEM(SImode, plus_constant(Pmode,addr,
2789
+                                       SUBREG_BYTE(src),false)));
2790
+               } else if ((GET_CODE(addr)==PLUS)
2791
+                               &&(REG_P(XEXP(addr,0)))
2792
+                               &&(CONST_INT_P(XEXP(addr,1)))) {
2793
+                       rtx addreg = XEXP(addr,0);
2794
+                       zip_gen_move_rtl(dst,
2795
+                               gen_rtx_MEM(SImode, plus_constant(Pmode,addreg,
2796
+                                       INTVAL(XEXP(addr,1))+SUBREG_BYTE(src),
2797
+                                       false)));
2798
+               } else fprintf(stderr, "ZIP/Cannot understand SUBREG\n");
2799 102 dgisselq
+       } else {
2800
+               fprintf(stderr, "ZIP/No usable move\n");
2801
+               zip_debug_rtx_pfx("TO  : ", dst);
2802
+               zip_debug_rtx_pfx("FROM: ", src);
2803
+               debug_rtx(dst);
2804
+               debug_rtx(src);
2805
+               return false;
2806
+       }
2807
+       if (dbg) fprintf(stderr, "ZIP-GEN-MOVE -- DONE\n");
2808
+       return true;
2809
+}
2810
+
2811
+const char *zip_set_zero_or_one(rtx condition, rtx dst) {
2812 103 dgisselq
+       const bool      dbg = ((ALL_DEBUG_ON)||(false))&&(!ALL_DEBUG_OFF);
2813 102 dgisselq
+       if (dbg) fprintf(stderr, "ZIP::SET-ZERO-OR-ONE\n");
2814
+       if (dbg) zip_debug_rtx_pfx("CND", condition);
2815
+       if (dbg) zip_debug_rtx_pfx("REG", dst);
2816
+       switch(GET_CODE(condition)) {
2817
+       case EQ:        return "LDI\t0,%0\n\tLDILO.Z\t1,%0";
2818
+       case NE:        return "LDI\t0,%0\n\tLDILO.NZ\t1,%0";
2819
+       case LT:        return "LDI\t0,%0\n\tLDILO.LT\t1,%0";
2820
+       case GT:        return "LDI\t0,%0\n\tLDILO.GT\t1,%0";
2821
+       case LE:        return "LDI\t1,%0\n\tLDILO.GT\t0,%0";
2822
+       case GE:        return "LDI\t0,%0\n\tLDILO.GE\t1,%0";
2823
+       case LTU:       return "LDI\t0,%0\n\tLDILO.C\t1,%0";
2824
+       case GTU:       return "LDI\t1,%0\n\tLDILO.C\t0,%0\n\tLDILO.Z\t0,%0";
2825
+       case LEU:       return "LDI\t0,%0\n\tLDILO.C\t1,%0\n\tLDILO.Z\t1,%0";
2826
+       case GEU:       return "LDI\t1,%0\n\tLDILO.C\t0,%0";
2827
+       default:
2828
+               zip_debug_rtx(condition);
2829
+               internal_error("CSTORE Unsupported condition");
2830
+               return NULL;
2831
+       }
2832
+}
2833
+
2834
+const char *zip_binary_movsicc(rtx_code condition, const char *op, const int opno) {
2835
+       static char     result[64] = "";
2836
+       switch(condition) {
2837
+               //
2838
+               // Result already exists in the iffalse register
2839
+               // Can't change it.  Therefore, on the
2840
+               // condition ... move true register to the
2841
+               // destination
2842
+               //
2843
+               case EQ:        sprintf(result, "%s.Z\t%%%d,%%0", op, opno); break;
2844
+               case NE:        sprintf(result, "%s.NZ\t%%%d,%%0", op, opno); break;
2845
+               case LT:        sprintf(result, "%s.LT\t%%%d,%%0", op, opno); break;
2846
+               case GT:        sprintf(result, "%s.GT\t%%%d,%%0", op, opno); break;
2847
+               // .LE doesn't exist on Zip CPU--turn this into two instructions
2848
+               case LE:        sprintf(result, "%s.LT\t%%%d,%%0\n\t%s.Z\t%%%d,%%0", op, opno, op, opno); break;
2849
+               case GE:        sprintf(result, "%s.GE\t%%%d,%%0", op, opno); break;
2850
+               case LTU:       sprintf(result, "%s.C\t%%%d,%%0", op, opno); break;
2851
+               //
2852
+               // .GTU doesn't exist on the Zip CPU either. We also note that
2853
+               // .C will never be set on an equal condition.  Therefore, we
2854
+               // turn this into a XOR.NZ 2,CC, which will set the .C condition
2855
+               // as long as .Z wasn't true.  We then undo this when we're
2856
+               // done.  This is possible since none of these instructions
2857
+               // (LDI/MOV/Lod conditional, nor Xor conditional) will ever set
2858
+               // the condition codes.
2859
+               //
2860
+               // This is obviously not very optimal.  Avoid this by all means
2861
+               // if you can
2862
+               case GTU:       sprintf(result, "XOR.NZ\t2,CC\n%s.C\t%%%d,%%0\n\tXOR.NZ\t2,CC", op, opno); break;
2863
+               // .LEU doesn't exist on Zip CPU either--turn this into another
2864
+               // two instructions
2865
+               case LEU:       sprintf(result, "%s.C\t%%%d,%%0\n\t%s.Z\t%%%d,%%0", op, opno, op, opno); break;
2866
+               //
2867
+               // .GEU doesn't exist on Zip CPU.  Implementing it her is
2868
+               // painful.  We can change the condition codes to make it so,
2869
+               // but the instruction requires the condition codes not be
2870
+               // changed.  Hence, we must change them back if we do so.
2871
+               //
2872
+               // .C will be set on less than but not equal.  Hence !.C will
2873
+               // be true on greater than or equal.
2874
+               case GEU:       sprintf(result, "XOR\t2,CC\n%s.C\t%%%d,%%0\n\tXOR\t2,CC", op, opno); break;
2875
+               default:
2876
+                       internal_error("MOVSICC(BINARY) Unsupported condition");
2877
+                       return NULL;
2878
+       } return result;
2879
+}
2880
+
2881
+const char *zip_tertiary_movsicc(rtx condition, const char *optrue, const char *opfalse) {
2882
+       static  char    result[64] = "";
2883
+       switch(GET_CODE(condition)) {
2884
+               case EQ:        sprintf(result,"%s\t%%3,%%0\n\t%s.Z\t%%2,%%0", opfalse, optrue); break;
2885
+               case NE:        sprintf(result,"%s\t%%3,%%0\n\t%s.NZ\t%%2,%%0", opfalse, optrue); break;
2886
+               case LT:        sprintf(result,"%s\t%%3,%%0\n\t%s.LT\t%%2,%%0", opfalse, optrue); break;
2887
+               case GT:        sprintf(result,"%s\t%%3,%%0\n\t%s.GT\t%%2,%%0", opfalse, optrue); break;
2888
+               // LE doesn't exist on a Zip CPU.  Accomplish this by
2889
+               // reversing the condition: i.e., load the false value into
2890
+               // the register, and the on condition load the true value.
2891
+               case LE:        sprintf(result,"%s\t%%2,%%0\n\t%s.GT\t%%3,%%0", optrue, opfalse); break;
2892
+               case GE:        sprintf(result,"%s\t%%3,%%0\n\t%s.GE\t%%2,%%0", opfalse, optrue); break;
2893
+               case LTU:       sprintf(result,"%s\t%%3,%%0\n\t%s.C\t%%2,%%0", opfalse, optrue); break;
2894
+               //
2895
+               case GTU:       sprintf(result,"%s\t%%2,%%0\n\t%s.C\t%%3,%%0\n\t%s.Z\t%%3,%%0", optrue, opfalse, opfalse); break;
2896
+               case LEU:       sprintf(result,"%s\t%%3,%%0\n\t%s.C\t%%2,%%0\n\t%s.Z\t%%2,%%0", opfalse, optrue, optrue); break;
2897
+               case GEU:       sprintf(result,"%s\t%%2,%%0\n\t%s.C\t%%3,%%0\n", optrue, opfalse); break;
2898
+               default:
2899
+                       internal_error("MOVSICC Unsupported condition");
2900
+                       return NULL;
2901
+       } return result;
2902
+}
2903
+
2904
+const char *zip_movsicc(rtx dst, rtx condition, rtx iftrue, rtx iffalse) {
2905 103 dgisselq
+       const bool      dbg = ((ALL_DEBUG_ON)||(false))&&(!ALL_DEBUG_OFF);
2906 102 dgisselq
+       if (dbg) fprintf(stderr, "ZIP::MOVSICC\n");
2907
+       if (dbg) zip_debug_rtx_pfx("DST", dst);
2908
+       if (dbg) zip_debug_rtx_pfx("CND", condition);
2909
+       if (dbg) zip_debug_rtx_pfx("TRU", iftrue);
2910
+       if (dbg) zip_debug_rtx_pfx("FAL", iffalse);
2911
+       if ((REG_P(iftrue))&&(REGNO(dst)==REGNO(iftrue))) {
2912
+               if (dbg) fprintf(stderr, "ZIP::MOVSICC -- CASE if(X) -> R\n");
2913
+               if (zip_legitimate_move_operand_p(SImode, iffalse, true))
2914
+                       return zip_binary_movsicc(reverse_condition(GET_CODE(condition)), "MOV", 3);
2915
+               else if (zip_const_address_operand(iffalse))
2916
+                       return zip_binary_movsicc(reverse_condition(GET_CODE(condition)), "LDI", 3);
2917
+               else if (zip_const_address_operand(iffalse))
2918
+                       return zip_binary_movsicc(reverse_condition(GET_CODE(condition)), "LDI", 3);
2919 111 dgisselq
+               else if ((MEM_P(iffalse))&&(zip_legitimate_opb(XEXP(iffalse,0), true)))
2920 102 dgisselq
+                       return zip_binary_movsicc(reverse_condition(GET_CODE(condition)), "LOD", 3);
2921
+               else {
2922
+                       internal_error("MOVSICC Unsupported mode");
2923
+                       return NULL;
2924
+               }
2925
+       } if ((REG_P(iftrue))&&(REGNO(dst)==REGNO(iftrue))) {
2926
+               if (dbg) fprintf(stderr, "ZIP::MOVSICC -- CASE if(!X) -> R\n");
2927
+               if (zip_legitimate_move_operand_p(SImode, iftrue, true))
2928
+                       return zip_binary_movsicc(GET_CODE(condition), "MOV",2);
2929
+               else if (zip_const_address_operand(iffalse))
2930
+                       return zip_binary_movsicc(GET_CODE(condition), "LDI",2);
2931
+               else if (zip_const_address_operand(iffalse))
2932
+                       return zip_binary_movsicc(GET_CODE(condition), "LDI",2);
2933 111 dgisselq
+               else if ((MEM_P(iffalse))&&(zip_legitimate_opb(XEXP(iffalse,0), true)))
2934 102 dgisselq
+                       return zip_binary_movsicc(GET_CODE(condition), "LOD",2);
2935
+               else {
2936
+                       internal_error("MOVSICC Unsupported mode");
2937
+                       return NULL;
2938
+               }
2939
+       } if ((zip_const_address_operand(iftrue))&&(zip_const_address_operand(iffalse))) {
2940
+               if (dbg) fprintf(stderr, "ZIP::MOVSICC -- IF(X) #1 ELSE #2\n");
2941
+               return zip_tertiary_movsicc(condition, "LDI", "LDI");
2942
+       } if ((zip_const_address_operand(iftrue))&&(zip_legitimate_move_operand_p(SImode, iffalse, true))) {
2943
+               if (dbg) fprintf(stderr, "ZIP::MOVSICC -- IF(X) #1 ELSE A+B\n");
2944
+               return zip_tertiary_movsicc(condition, "LDI", "MOV");
2945
+       } if ((zip_legitimate_move_operand_p(SImode, iftrue, true))&&(zip_const_address_operand(iffalse))) {
2946
+               if (dbg) fprintf(stderr, "ZIP::MOVSICC -- IF(X) A+B ELSE #x\n");
2947
+               return zip_tertiary_movsicc(condition, "MOV", "LDI");
2948
+       } if ((zip_legitimate_move_operand_p(SImode, iftrue, true))
2949
+                       &&(zip_legitimate_move_operand_p(SImode, iffalse, true))) {
2950
+               if (dbg) fprintf(stderr, "ZIP::MOVSICC -- IF(X) A+B ELSE C+D\n");
2951
+               return zip_tertiary_movsicc(condition, "MOV", "MOV");
2952
+       }
2953
+       if ((MEM_P(iftrue))
2954 111 dgisselq
+               &&(zip_legitimate_opb(XEXP(iftrue,0), true))
2955 102 dgisselq
+               &&(zip_legitimate_move_operand_p(SImode, iffalse, true))) {
2956
+               if (dbg) fprintf(stderr, "ZIP::MOVSICC -- IF(X) A[B] ELSE C+D\n");
2957
+               return zip_tertiary_movsicc(condition, "LOD", "MOV");
2958
+       } if ((zip_legitimate_move_operand_p(SImode, iftrue, true))
2959 111 dgisselq
+               &&(MEM_P(iffalse))&&(zip_legitimate_opb(XEXP(iffalse,0), true))) {
2960 102 dgisselq
+               if (dbg) fprintf(stderr, "ZIP::MOVSICC -- IF(X) A+B ELSE C[D]\n");
2961
+               return zip_tertiary_movsicc(condition, "MOV", "LOD");
2962 111 dgisselq
+       } if ((MEM_P(iftrue))&&(zip_legitimate_opb(XEXP(iftrue,0), true))
2963
+               &&(MEM_P(iffalse))&&(zip_legitimate_opb(XEXP(iffalse,0), true))) {
2964 102 dgisselq
+               if (dbg) fprintf(stderr, "ZIP::MOVSICC -- IF(X) A[B] ELSE C[D]\n");
2965
+               return zip_tertiary_movsicc(condition, "LOD", "LOD");
2966 111 dgisselq
+       } if ((MEM_P(iftrue))
2967
+               &&(zip_legitimate_opb(XEXP(iftrue,0),true))
2968
+               &&(zip_const_address_operand(iffalse))) {
2969
+               if (dbg) fprintf(stderr, "ZIP::MOVSICC -- IF(X) A[B] ELSE #x\n");
2970
+               return zip_tertiary_movsicc(condition, "LOD", "LDI");
2971
+       } if ((MEM_P(iffalse))
2972
+               &&(zip_legitimate_opb(XEXP(iffalse,0),true))
2973
+               &&(zip_const_address_operand(iftrue))) {
2974
+               if (dbg) fprintf(stderr, "ZIP::MOVSICC -- IF(X) #x ELSE A[B]\n");
2975
+               return zip_tertiary_movsicc(condition, "LDI", "LOD");
2976 102 dgisselq
+       }
2977
+
2978
+       internal_error("MOVSICC Operands not supported");
2979
+}
2980
+
2981
+const char *zip_addsicc(rtx dst, rtx condition, rtx ifsrc, rtx addv ATTRIBUTE_UNUSED) {
2982
+       // We know upon entry that REG_P(dst) must be true
2983
+       if (!REG_P(dst))
2984
+               internal_error("%s","ADDSICC into something other than register");
2985
+       if ((REG_P(ifsrc))&&(REGNO(dst)==REGNO(ifsrc))) {
2986
+               switch (GET_CODE(condition)) {
2987
+               case EQ: return "ADD.Z\t%3,%0";
2988
+               case NE: return "ADD.NZ\t%3,%0";
2989
+               case LT: return "ADD.LT\t%3,%0";
2990
+               case GT: return "ADD.GT\t%3,%0";
2991
+               case LE: return "ADD.LT\t%3,%0\n\tADD.Z\t%3,%0";
2992
+               case GE: return "ADD.GE\t%3,%0";
2993
+               case LTU: return "ADD.C\t%3,%0";
2994
+               case LEU: return "ADD.C\t%3,%0\n\tADD.Z\t%3,%0";
2995
+               case GEU: return "XOR\t2,CC\n\tADD.C\t%3,%0\n\tXOR\t2,CC";
2996
+               // Can do a GEU comparison, and then undo on the Zero condition
2997
+               case GTU: return "XOR\t2,CC\n\tADD.C\t%3,%0\n\tSUB.Z\t%3,%0\n\tXOR\t2,CC";
2998
+               default:
2999
+                       internal_error("%s", "Zip/No usable addsi expansion");
3000
+                       break;
3001
+               }
3002
+       } else {
3003
+               // MOV A+REG,REG
3004
+               switch (GET_CODE(condition)) {
3005
+               case EQ: return "MOV.Z\t%3+%2,%0";
3006
+               case NE: return "MOV.NZ\t%3+%2,%0";
3007
+               case LT: return "MOV.LT\t%3+%2,%0";
3008
+               case GT: return "MOV.GT\t%3+%2,%0";
3009
+               case LE: return "MOV.LT\t%3+%2,%0\n\tMOV.Z\t%3+%2,%0";
3010
+               case GE: return "MOV.GE\t%3+%2,%0";
3011
+               case LTU: return "MOV.C\t%3+%2,%0";
3012
+               case LEU: return "MOV.C\t%3+%2,%0\n\tMOV.Z\t%3+%2,%0";
3013
+               case GEU: return "XOR\t2,CC\n\tMOV.C\t%3+%2,%0\n\tXOR\t2,CC";
3014
+               // Can do a GEU comparison, and then undo on the Zero condition
3015
+               // EXCEPT: with a move instruction, what's there to undo?  We
3016
+               // just clobbered our register!
3017
+               // case GTU: return "XOR\t2,CC\n\tMOV.C\t%3,%0\n\tSUB.Z\t%3,%0XOR\t2,CC";
3018
+               default:
3019
+                       internal_error("%s", "Zip/No usable addsi(reg,reg) expansion");
3020
+                       break;
3021
+               }
3022
+       }
3023
+
3024
+       return "BREAK";
3025
+}
3026
+
3027 103 dgisselq
+static int     zip_memory_move_cost(machine_mode mode, reg_class_t ATTRIBUTE_UNUSED, bool in ATTRIBUTE_UNUSED) {
3028 102 dgisselq
+       int     rv = 14;
3029
+       if ((mode == DImode)||(mode == DFmode))
3030
+               rv += 2;
3031
+       return rv;
3032
+}
3033
+
3034 103 dgisselq
+// #warning "How do we tell the compiler LDI label is expensive as 2 ops"?
3035 102 dgisselq
+
3036 117 dgisselq
+static bool    zip_cannot_modify_jumps_p(void) {
3037
+       // Let's try their suggested approach, keeping us from modifying jumps
3038
+       // after reload.  This should also allow our peephole2 optimizations
3039
+       // to adjust things back to what they need to be if necessary.
3040
+       return (reload_completed || reload_in_progress);
3041
+}
3042 102 dgisselq
diff -Naur '--exclude=*.swp' gcc-5.3.0-original/gcc/config/zip/zip.h gcc-5.3.0-zip/gcc/config/zip/zip.h
3043
--- gcc-5.3.0-original/gcc/config/zip/zip.h     1969-12-31 19:00:00.000000000 -0500
3044 117 dgisselq
+++ gcc-5.3.0-zip/gcc/config/zip/zip.h  2016-04-01 06:33:55.090614401 -0400
3045
@@ -0,0 +1,3898 @@
3046 102 dgisselq
+////////////////////////////////////////////////////////////////////////////////
3047
+//
3048
+// Filename:   gcc/config/zip/zip.h
3049
+//
3050
+// Project:    Zip CPU backend for the GNU Compiler Collection
3051
+//
3052
+// Purpose:
3053
+//
3054
+// Creator:    Dan Gisselquist, Ph.D.
3055
+//             Gisselquist Technology, LLC
3056
+//
3057
+////////////////////////////////////////////////////////////////////////////////
3058
+//
3059
+// Copyright (C) 2016, Gisselquist Technology, LLC
3060
+//
3061
+// This program is free software (firmware): you can redistribute it and/or
3062
+// modify it under the terms of  the GNU General Public License as published
3063
+// by the Free Software Foundation, either version 3 of the License, or (at
3064
+// your option) any later version.
3065
+//
3066
+// This program is distributed in the hope that it will be useful, but WITHOUT
3067
+// ANY WARRANTY; without even the implied warranty of MERCHANTIBILITY or
3068
+// FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
3069
+// for more details.
3070
+//
3071
+// You should have received a copy of the GNU General Public License along
3072
+// with this program.  (It's in the $(ROOT)/doc directory, run make with no
3073
+// target there if the PDF file isn't present.)  If not, see
3074
+// <http://www.gnu.org/licenses/> for a copy.
3075
+//
3076
+// License:    GPL, v3, as defined and found on www.gnu.org,
3077
+//             http://www.gnu.org/licenses/gpl.html
3078
+//
3079
+//
3080
+////////////////////////////////////////////////////////////////////////////////
3081
+#ifndef        GCC_ZIP_H
3082
+#define        GCC_ZIP_H
3083
+
3084
+
3085
+//
3086
+//
3087
+// Zip CPU configuration registers
3088
+//
3089
+//
3090
+#define        ZIP_USER        0        // Assume we are in supervisor mode
3091
+#define        ZIP_MULTIPLY    1       // Assume we have multiply instructions
3092
+#define        ZIP_DIVIDE      1       // Assume we have divide instructions
3093
+#define        ZIP_FPU         0        // Assume we have no floating point instructions
3094
+#define        ZIP_PIPELINED   1       // Assume our instructions are pipelined
3095
+#define        ZIP_VLIW        1       // Assume we have the VLIW feature
3096
+#define        ZIP_ATOMIC      ((ZIP_PIPELINED)&&(ZIP_VLIW))
3097
+#define        ZIP_PIC         0        // Attempting to produce PIC code, with GOT
3098
+#define        ZIP_HAS_DI      1
3099
+
3100
+// Zip has 16 registers in each user mode.
3101
+//     Register 15 is the program counter (PC)
3102
+//     Register 14 is the condition codes (CC)
3103
+//     Register 13 is the stack pointer   (SP)
3104
+//     Register 12 (may be) the Global Offset Table pointer (GOT)
3105
+//     Register  0 (may be) the return address pointer
3106
+// Registers 16-31 may only be used in supervisor mode.
3107
+#define        is_ZIP_GENERAL_REG(REGNO)       ((REGNO)<13)
3108
+#define        is_ZIP_REG(REGNO)               ((REGNO)<16)
3109
+
3110 103 dgisselq
+// #define     zip_FP_PSEUDO   16
3111
+#define        zip_PC          15
3112
+#define        zip_CC          14
3113
+#define        zip_SP          13
3114
+#define        zip_FP          12
3115
+#define        zip_GOT         11
3116
+#define        zip_AP          10
3117
+#define        zip_R1          1
3118
+#define        zip_R0          0
3119 102 dgisselq
+
3120
+#define        ZIP_FIRST_ARG_REGNO     1
3121
+#define        ZIP_LAST_ARG_REGNO      5
3122 111 dgisselq
+#define        NUM_ARG_REGS            (ZIP_LAST_ARG_REGNO-ZIP_FIRST_ARG_REGNO+1)
3123
+#define        MAX_PARM_REGS           (ZIP_LAST_ARG_REGNO-ZIP_FIRST_ARG_REGNO+1)
3124 102 dgisselq
+
3125
+/* The overall framework of an assembler file */
3126
+
3127
+#define        ASM_COMMENT_START       ";"
3128
+#define        ASM_APP_ON              ""
3129
+#define        ASM_APP_OFF             ""
3130
+
3131
+#define        FILE_ASM_OP             "\t.file\n"
3132
+
3133
+/* Output and Generation of Labels */
3134
+#define        GLOBAL_ASM_OP           "\t.global\t"
3135
+
3136
+#undef BITS_PER_UNIT
3137
+#define        BITS_PER_UNIT   (32)
3138
+
3139
+/* Assembler Commands for Alignment */
3140
+#define        ASM_OUTPUT_ALIGN(STREAM,POWER)  \
3141
+               { int pwr = POWER; fprintf(STREAM, "\t.p2align %d\n", (pwr<2)?2:pwr); }
3142
+
3143
+
3144
+/* A C compound statement to output to stdio stream STREAM the assembler syntax
3145
+ * for an instruction operand X. */
3146
+#define        PRINT_OPERAND(STREAM, X, CODE)  zip_print_operand(STREAM, X, CODE)
3147
+#define        PRINT_OPERAND_ADDRESS(STREAM, X) zip_print_operand_address(STREAM, X)
3148
+
3149
+/* Passing arguments in registers */
3150
+#define        FUNCTION_VALUE_REGNO_P(REGNO)   ((REGNO)==zip_R1)
3151
+
3152
+/* Define how to find the value returned by a function.  VALTYPE is the data
3153
+ * type of the value (as a tree).  If the precise function being called is known
3154
+ * FUNC is its FUNCTION_DECL; otherwise, FUNC is 0. */
3155
+#define        FUNCTION_VALUE(VALTYPE, FUNC) gen_rtx_REG(TYPE_MODE(VALTYPE), zip_R1)
3156
+
3157
+/* Define how to find the value returned by a library function assuming the
3158
+ * value has mode MODE.
3159
+ */
3160
+#define        LIBCALL_VALUE(MODE)     gen_rtx_REG(MODE, zip_R1)
3161
+
3162
+
3163
+/* STACK AND CALLING */
3164
+
3165
+
3166
+/* Define this macro as a C expression that is nonzero for registers that are
3167
+ * used by the epilogue or the return pattern.  The stack and frame pointer
3168
+ * registers are already assumed to be used as needed.
3169
+ */
3170
+#define        EPILOGUE_USES(R)        (R == RETURN_ADDRESS_REGNUM)
3171
+
3172
+
3173
+/* Normal alignment required for function parameters on the stack, in bits.  All
3174
+ * stack parameters receive at leaswt this much alignment regardless of data
3175
+ * type. */
3176
+#define        PARM_BOUNDARY   32
3177
+
3178
+/* Alignment of field after 'int : 0' in a structure. */
3179
+#define        EMPTY_FIELD_BOUNDARY    32
3180
+
3181
+/* No data type wants to be aligned rounder than this. */
3182
+#define        BIGGEST_ALIGNMENT       32
3183
+
3184
+/* The best alignment to use in cases where we have a choice. */
3185
+#define        FASTEST_ALIGNMENT       32
3186
+
3187
+/* Every structures size must be a multiple of 32-bits. */
3188
+#define        STRUCTURE_SIZE_BOUNDARY 32
3189
+
3190
+/* PCC_BITFIELD_TYPE_MATTERS -- define this if you wish to imitate the the way
3191
+ * other C compilers handle alignment of bit-fields and the structures that
3192
+ * contain them.
3193
+ *
3194
+ * The behavior is that the type written for a named bit-field (int, short, or
3195
+ * other integer type) imposes an alignment for the entire structure, as if the
3196
+ * structure really did contain an ordinary field of that type.  In addition,
3197
+ * the bit-field is placed within the structure so that it would fit within
3198
+ * such a field, not crossing a boundary for it.
3199
+ *
3200
+ * Thus, no most machines, a named bit-field whose type is written as int would
3201
+ * not cross a four-byte boundary, and would force four-byte alignment for the
3202
+ * whole structure.  (The alignment used may not be four bytes; it is controlled
3203
+ * by other alignment parameters.)
3204
+ *
3205
+ * An unnamed bit-field will not affect the alignment of the containing
3206
+ * structure.
3207
+ *
3208
+ * If thhe macro is defined, its definition should be a C expression, a non
3209
+ * zero value for the expression enables this behavior.
3210
+ * Look at the fundamental type that is used for a bit-field and use that to
3211
+ * impose alignment on the enclosing structure.  struct s{int a:8}; should
3212
+ * have the same alignment as 'int', not 'char'.
3213
+ */
3214
+#undef PCC_BITFIELD_TYPE_MATTERS
3215
+#define        PCC_BITFIELD_TYPE_MATTERS       0
3216
+
3217
+/* MAX_FIXED_MODE_SIZE -- An integer expression for the size in bits of the
3218
+ * largest integer machine mode that should actually be used.  All integer
3219
+ * machine modes of this size and smaller can be used for structures and unions
3220
+ * with the appropriate sizes.  If this macro is undefined,
3221
+ * GET_MODE_BITSIZE(DImode) is assumed.
3222
+ *
3223
+ * ZipCPU -- The default looks good enough for us.
3224
+ */
3225
+
3226
+/* Make strings word-aligned so strcpy from constants will be faster. */
3227
+#define        CONSTANT_ALIGNMENT(EXP, ALIGN)  (((TREE_CODE(EXP)==STRING_CST)  \
3228
+       && ((ALIGN) < FASTEST_ALIGNMENT)) ? FASTEST_ALIGNMENT : (ALIGN))
3229
+
3230
+/* Make arrays of chars word-aligned for the same reasons. */
3231
+#define        DATA_ALIGNMENT(TYPE, ALIGN)     ((TREE_CODE(TYPE) == ARRAY_TYPE) \
3232
+       && (TYPE_MODE(TREE_TYPE(TYPE)) == QImode)               \
3233
+       && ((ALIGN < FASTEST_ALIGNMENT) ? FASTEST_ALIGNMENT : (ALIGN)))
3234
+
3235
+/* Generate Code for Profiling
3236
+ */
3237
+#define        FUNCTION_PROFILER(FILE,LABELNO)         (abort(), 0)
3238
+
3239
+
3240
+/* A C expression which is nonzero if register number NUM is suitable for use
3241
+ * as an index register in operand addresses.
3242
+ */
3243
+#define        REGNO_OK_FOR_INDEX_P(NUM)       0
3244
+
3245
+
3246
+/* A C compound statement with a conditional 'goto LABEL;' executed if X
3247
+ * (an RTX) is a legitimate memory address on the target machine for a memory
3248
+ * operand of mode MODE.
3249
+ */
3250 111 dgisselq
+/* 17.03 Controlling the Compilation Driver, 'gcc' */
3251
+// DRIVER_SELF_SPECS
3252
+// OPTION_DEFAULT_SPECS
3253
+// CPP_SPEC
3254
+// CPLUSPLUS_CPP_SPEC
3255
+// CC1_SPEC
3256
+// CC1PLUS_SPEC
3257
+/* ASM_SPEC ... A C string constant that tells the GCC driver program options
3258
+ * to pass to the assembler.  It can also specify how to translate options you
3259
+ * give to GCC into options for GCC to pass to the assembler.  See the file
3260
+ * 'sun3.h' for an example of this.
3261
+ *
3262
+ * Do not define thismacro if it does not need to do anything.
3263
+ */
3264
+// #undef      ASM_SPEC
3265
+// ASM_FINAL_SPEC
3266
+// ASM_NEEDS_DASH_FOR_PIPED_INPUT
3267
+
3268
+/* LINK_SPEC ... A C string constant that tells the GCC driver program options
3269
+ * to pass to the linker.  It can also specify how to translate options you give
3270
+ * to GCC into options for GCC to pass to the linker.
3271
+ *
3272
+ * Do not define this macro if it does not need to do anything.
3273
+ */
3274
+
3275
+/* LIB_SPEC ... Another C string constant very much like LINK_SPEC.  The
3276
+ * difference between the two is that LIB_SPEC is used at the end of the
3277
+ * command given to the linker.
3278
+ *
3279
+ * If this macro is not defined, a default is provided that loads the standard
3280
+ * C library from the usual place.  See 'gcc.c'.
3281
+ */
3282
+#undef LIB_SPEC
3283
+// #define     LIB_SPEC        "%{!g:-lc} %{g:-lg} -lzip"
3284
+#define        LIB_SPEC        ""
3285
+
3286
+/* LIBGCC_SPEC ... Another C string constant that tells the GCC driver program
3287
+ * hoow and when to place a reference to 'libgcc.a' into the linker command
3288
+ * line.  This constant is placed both before and after the value of LIB_SPEC.
3289
+ *
3290
+ * If this macro is not defined, the GCC driver provides a default that passes
3291
+ * the string '-lgcc' to the linker.
3292
+ */
3293
+#undef LIBGCC_SPEC
3294
+#define        LIBGCC_SPEC     ""
3295
+
3296
+/* REAL_LIBGCC_SPEC ... By default, if ENABLE_SHARED_LIBGCC is defined, the
3297
+ * LIBGCC_SPEC is not directly used by the driver program but is instead
3298
+ * modified to refer to different versions of 'libgcc.a' depending on the
3299
+ * values of the command line flags '-static', '-shared', '-static-libgcc',
3300
+ * and '-shared-libgcc'.  On targets where these modifications are
3301
+ * inappropriate, define REAL_LIBGCC_SPEC instead.  REAL_LIBGCC_SPEC tells the
3302
+ * driver how to place a reference to 'libgcc' on the link command line, but
3303
+ * unlike LIBGCC_SPEC, it is used unmodified.
3304
+ */
3305
+#define        REAL_LIBGCC_SPEC        ""
3306
+
3307
+// USE_LD_AS_NEEDED
3308
+// LINK_EH_SPEC
3309
+
3310
+/* STARTFILE_SPEC ... Another C string constant used much like LINK_SPEC.  The
3311
+ * difference between the two is that STARTFILE_SPEC is used at the very
3312
+ * beginning of the command given to the linker.
3313
+ *
3314
+ * If this macro is not defined, a default is provided that loads the standard
3315
+ * C startup file from the usual place.  See 'gcc.c'
3316
+ */
3317
+#undef STARTFILE_SPEC
3318
+#define        STARTFILE_SPEC  ""
3319
+
3320
+/* ENDFILE_SPEC ... Another C string constant used much like LINK_SPEC.  The
3321
+ * difference between the two is that ENDFILE_SPEC is used at the very end
3322
+ * of the command given to the linker.
3323
+ *
3324
+ * Do not define this macro if it does not do anything.
3325
+ */
3326
+// #undef      ENDFILE_SPEC
3327
+// #define     ENDFILE_SPEC    ""
3328
+
3329
+// THREAD_MODEL_SPEC
3330
+// SYSROOT_SUFFIX_SPEC
3331
+// SYSROOT_HEADERS_SUFFIX_SPEC
3332
+// EXTRA_SPECS
3333
+// LINK_LIBGCC_SPECIAL_1
3334
+// LINK_GCC_C_SEQUENCE_SPEC
3335
+// LINK_COMMAND_SPEC
3336
+// TARGET_ALWAYS_STRIP_DOTDOT
3337
+// MULTILIB_DEFAULTS
3338
+// RELATIVE_PREFIX_NOT_LINKDIR
3339
+// MD_EXEC_PREFIX
3340
+// STANDARD_STARTFILE_PREFIX
3341
+// STANDARD_STARTFILE_PREFIX_1
3342
+// STANDARD_STARTFILE_PREFIX_2
3343
+// MD_STARTFILE_PREFIX
3344
+// MD_STARTFILE_PREFIX_1
3345
+// INIT_ENVIRONMENT
3346
+// LOCAL_INCLUDE_DIR
3347
+#undef LOCAL_INCLUDE_DIR
3348
+
3349
+// NATIVE_SYSTEM_HEADER_COMPONENT
3350
+// INCLUDE_DEFAULTS
3351
+
3352 102 dgisselq
+/* 17.03 Run-time Target Specification */
3353
+
3354
+/* TARGET_CPU_CPP_BUILTINS() ... This function-like macro expands to a block of
3355
+ * code that defines built-in preprocessor macros and assertions for the target
3356
+ * CPU, using the functions builtin_define, builtin_define_std, and
3357
+ * builtin_assert.  When the front end calls this macro it provides a trailing
3358
+ * semicolon, and since it has finished command line option proccessing your
3359
+ * code can use those results freely.
3360
+ *
3361
+ * ZipCPU --- We should probably capture in this macro what capabilities the
3362
+ * command line parameters we've been given indicate that our CPU has.  That
3363
+ * way, code can be adjusted depending upon the CPU's capabilities.
3364
+ */
3365
+#define        TARGET_CPU_CPP_BUILTINS()                       \
3366
+       { builtin_define("__ZIPCPU__");                 \
3367
+       if (ZIP_FPU) builtin_define("__ZIPFPU__");      \
3368
+       if (ZIP_ATOMIC) builtin_define("__ZIPATOMIC__");        \
3369
+       }
3370
+       // If (zip_param_has_fpu)  builtin_define("__ZIPFPU__");
3371
+       // If (zip_param_has_div)  builtin_define("__ZIPDIV__");
3372
+       // If (zip_param_has_mpy)  builtin_define("__ZIPMPY__");
3373
+       // If (zip_param_has_lock) builtin_define("__ZIPLOCK__");
3374
+       // If (zip_param_supervisor) builtin_define("__ZIPUREGS__");
3375
+       // If (we support int64s) builtin_define("___int64_t_defined");
3376
+
3377
+/* TARGET_OS_CPP_BUILTINS() ... Similarly to TARGET_CPU_CPP_BUILTINS but this
3378
+ * macro is optional and is used for the target operating system instead.
3379
+ */
3380
+
3381
+/* Option macros: (we need to define these eventually ... )
3382
+ *
3383
+ *     TARGET_HANDLE_OPTION
3384
+ *     TARGET_HANDLE_C_OPTION
3385
+ *     TARGET_OBJ_CONSTRUCT_STRING_OBJECT
3386
+ *     TARGET_OBJ_DECLARE_UNRESOLVED_CLASS_REFERENCE
3387
+ *     TARGET_OBJ_DECLARE_CLASS_DEFINITION
3388
+ *     TARGET_STRING_OBJECT_REF_TYPE_P
3389
+ *     TARGET_CHECK_STRING_OBJECT_FORMAT_ARG
3390
+ *     TARGET_OVERRIDE_OPTIONS_AFTER_CHANGE(VOID)
3391
+ *     C_COMMON_OVERRIDE_OTPTIONS
3392
+ *     TARGET_OPTION_OPTIMIZATION_TABLE
3393
+ *     TARGET_OPTION_INIT_STRUCT
3394
+ *     TARGET_OPTION_DEFAULT_PARAMS
3395
+ */
3396
+
3397
+/* SWITCHABLE_TARGET
3398
+ *
3399
+ * Zip CPU doesn't need this, so it defaults to zero.  No need to change it
3400
+ * here.
3401
+ */
3402
+
3403
+/* TARGET_FLOAT_EXCEPTIONS_ROUNDING_SUPPORTED_P(VOID) ... Returns true if the
3404
+ * target supports IEEE 754 floating-point exceptions and rounding modes, false
3405
+ * otherwise.  This is intended to relate to the float and double types, but not
3406
+ * necessarily "long double".  By default, returns true if the adddf3
3407
+ * instruction pattern is available and false otherwise, on the assumption that
3408
+ * hardware floating point supports exceptions and rounding modes but software
3409
+ * floating point does not.
3410
+ *
3411
+ * ZipCPU floating point is barely going to be functional, I doubt it will
3412
+ * support all of these bells and whistles when full functionality is even
3413
+ * achieved.  Therefore, we won't support these modes.  However, we can't just
3414
+ * set this to zero, so let's come back to this.
3415
+ */
3416
+// #warning "Wrong answer encoded to date"
3417 103 dgisselq
+// #undef      TARGET_FLOAT_EXCEPTIONS_ROUNDING_SUPPORTED_P
3418 102 dgisselq
+// #define     TARGET_FLOAT_EXCEPTIONS_ROUNDING_SUPPORTED_P(X) 0
3419
+
3420
+/* 17.04 Defining data structures for per-function information */
3421
+
3422
+/* INIT_EXPANDERS ... Macro called to initialize any target specific
3423
+ * information.  This macro is called once per function, before generation of
3424
+ * any RTL has begun.  The intention is to allow the initialization of the
3425
+ * function pointer init_machine_status.
3426
+ */
3427
+// #warning "I may need to define this to handle function return addresses ..."
3428
+
3429
+/* 17.05 Storage Layout */
3430
+
3431
+/* Storage Layout */
3432
+#define        BITS_BIG_ENDIAN         0        // MSB has highest number
3433
+#define        BYTES_BIG_ENDIAN        1       // 1 if MSB is lowest number
3434
+#define        WORDS_BIG_ENDIAN        1       // 1 if MSW is lowest number
3435
+#define        FLOAT_WORDS_BIG_ENDIAN  1
3436
+#define        BITS_PER_WORD           32
3437
+// #define     MAX_BITS_PER_WORD       // defaults to BITS_PER_WORD
3438
+#define        UNITS_PER_WORD          1       // Storage units in a word, pwr of 2:1-8
3439
+#define        MIN_UNITS_PER_WORD      1       // Default is UNITS_PER_WORD
3440
+/* POINTER_SIZE ... Width of a pointer in bits.  You must specify a value no
3441
+ * wider than the width of Pmode.  If it is not equal to the width of Pmode,
3442
+ * you must define POINTERS_EXTEND_UNSIGNED. If you do not specify a value the
3443
+ * default is BITS_PER_WORD.
3444
+ *
3445
+ * ZipCPU --- All of our pointers are 32-bits, the width of our address bus.
3446
+ */
3447
+#define        POINTER_SIZE            32      // Ptr width in bits
3448
+/* POINTERS_EXTEND_UNSIGNED ... A C expression that determines how pointers
3449
+ * should be extended from ptr_mode to either Pmode or word_mode.  It is greater
3450
+ * than zero if pointers should be zero-extended, zero if they should be sign
3451
+ * extended, and negative if some other conversion is needed.  In the last case,
3452
+ * the extension is done by the target's ptr_extend instruction.
3453
+ *
3454
+ * You need not define this macro if the ptr_mode, Pmode, and word_mode are all
3455
+ * the same width.
3456
+ *
3457
+ * ZipCPU --- While we shouldn't need this, QImode and HImode have the same
3458
+ * number of bits as SImode.  Therefore, one might wish to convert between the
3459
+ * two.  Hence, we specify how we would do that here.
3460
+ */
3461
+#define        POINTERS_EXTEND_UNSIGNED        0
3462
+
3463
+/* PROMOTE_MODE(m,unsignedp,type) ... A macro to update m and unsignedp when an
3464
+ * object whose type is type and which has he specified mode and signedness is
3465
+ * to be stored in a register.  This macro is only called when type is a scalar
3466
+ * type.
3467
+ *
3468
+ * On most RISC machines, which only have operations that operate on a full
3469
+ * register, define this macro to set m to word_mode if m is an integer mode
3470
+ * narrower than BITS_PER_WORD.  In most cases, only integer modes should be
3471
+ * widened because wider precision floating-point operations are usually more
3472
+ * expensive than their narrower counterparts.
3473
+ *
3474
+ * For most machines, the macro definition does not change unsigndep.  However,
3475
+ * some machines, have instructions that preferentially handle either signed or
3476
+ * unsigned quantities of certain modes.  For example, on the DEC Alpha, 32-bit
3477
+ * loads from memory and 32-bit add instructions sign-extend the result to
3478
+ * 64-bits. On such machines, set unsignedp according to which kind of extension
3479
+ * is more efficient.
3480
+ *
3481
+ * Do not define this macro if it would never modify m.
3482
+ *
3483
+ * ZipCPU --- We need to always (if possible) promote everything to SImode where
3484
+ * we can handle things.  HImode and QImode just don't make sense on this CPU.
3485
+ */
3486
+#define        PROMOTE_MODE(M,U,T)     if ((GET_MODE_CLASS(M)==MODE_INT)&&(GET_MODE_SIZE(M)<2)) (M)=SImode;
3487
+
3488
+// TARGET_PROMOTE_FUNCTION_MODE
3489
+/* PARM_BOUNDARY ... Normal alignment required for function parameters on the
3490
+ * stack, in bits.  All stack parameters receive at least this much alignment
3491
+ * regardless of data type.  On most machines, this is the same as the size of
3492
+ * an integer.
3493
+ */
3494
+#define        PARM_BOUNDARY   32
3495
+
3496
+/* STACK_BOUNDARY ... Define this macro to the minimum alignment enforced by
3497
+ * hardware for the stack pointer on this machine.  The definition is a C
3498
+ * expression for the desired alignment (measured in bits).  This value is used
3499
+ * as a default if PREFERRED_STACK_BOUNDARY is not defined.  On most machines,
3500
+ * this should be the same as PARM_BOUNDARY.
3501
+ */
3502
+#define        STACK_BOUNDARY  PARM_BOUNDARY
3503
+
3504
+/* PREFERRED_STACK_BOUNDARY ... Define this ... */
3505
+
3506
+/* INCOMING_STACK_BOUNDARY
3507
+ */
3508
+
3509
+/* FUNCTION_BOUNDARY ... Alignment required for a function entry point, in bits.
3510
+ */
3511
+#define        FUNCTION_BOUNDARY       32
3512
+
3513
+/* BIGGEST_ALIGNMENT ... Biggest alignment that any data type can require on
3514
+ * this machine, in bits.  Note that this is not the biggest alignment that is
3515
+ * supported, just the biggest alignment that, when violated, may cause a fault.
3516
+ */
3517
+#define BIGGEST_ALIGNMENT      32
3518
+
3519
+/* MINIMUM_ATOMIC_ALIGNMENT ... If defined, the smallest alignment, that can be
3520
+ * given to an object that can be referenced in one operation, without
3521
+ * disturbing any nearby object.  Normally, this is BITS_PER_UNIT, but may be
3522
+ * larger on machines that don't have byte or halfword store operations.
3523
+ */
3524
+#define        MINIMUM_ATOMIC_ALIGNMENT        BITS_PER_UNIT
3525
+
3526
+/* STRICT_ALIGNMENT ... Set this nonzero if move instructions will actually
3527
+ * fail to work when given unaligned data.  If instructions will merely go
3528
+ * slower in that case, define this macro as 0.
3529
+ */
3530
+#define        STRICT_ALIGNMENT        1
3531
+
3532
+/* MAX_FIXED_MODE_SIZE ... An integer expression for the size in bits of the
3533
+ * largest integer machine mode that should actually be used.  All integer
3534
+ * machine modes of this size or smaller can be used for structures and unions
3535
+ * with the appropriate sizes.  If this macro is undefined,
3536
+ * GET_MODE_BITSIZE(DImode) is assumed.
3537
+ *
3538
+ * ZipCPU ... Get_MOD_BITSIZE(DImode) will be 64, and this is really not the
3539
+ * size on bits of the largest integer machine mode.  However, that's the case
3540
+ * with most DI implementations: A long is two words, spliced together.  We'd
3541
+ * like to support that eventually, but we need to get there.  Hence, let's use
3542
+ * compile time flag (ZIP_HAS_DI) that we can enable when we're ready.
3543
+ */
3544
+#if (ZIP_HAS_DI != 0)
3545
+#define        MAX_FIXED_MODE_SIZE     64
3546
+#else
3547
+#define        MAX_FIXED_MODE_SIZE     32
3548
+#endif
3549
+
3550
+
3551
+/* 17.06 Layout of Source Language Data Types */
3552
+
3553
+#undef CHAR_TYPE_SIZE
3554
+#undef SHORT_TYPE_SIZE
3555
+#undef INT_TYPE_SIZE
3556
+#undef LONG_TYPE_SIZE
3557
+#undef LONG_LONG_TYPE_SIZE
3558
+//
3559
+#define        CHAR_TYPE_SIZE  32
3560
+#define        SHORT_TYPE_SIZE 32
3561
+#define        INT_TYPE_SIZE   32
3562
+#define        LONG_TYPE_SIZE  32
3563
+#define        LONG_LONG_TYPE_SIZE     64
3564
+// BOOL_TYPE_SIZE defaults to CHAR_TYPE_SIZE
3565
+#undef FLOAT_TYPE_SIZE
3566
+#undef DOUBLE_TYPE_SIZE
3567
+#undef LONG_DOUBLE_TYPE_SIZE
3568
+#define        FLOAT_TYPE_SIZE         32
3569
+#define        DOUBLE_TYPE_SIZE        FLOAT_TYPE_SIZE // Zip CPU doesn't support dbls
3570
+#define        LONG_DOUBLE_TYPE_SIZE   64      // This'll need to be done via emulation
3571
+// SHORT_FRAC_TYPE_SIZE
3572
+// LONG_FFRACT_TYPE_SIZE
3573
+// LONG_LONG_FRACT_TIME_SIZE
3574
+#undef SHORT_ACCUM_TYPE_SIZE
3575
+#undef ACCUM_TYPE_SIZE
3576
+#undef LONG_ACCUM_TYPE_SIZE
3577
+#define        SHORT_ACCUM_TYPE_SIZE   SHORT_TYPE_SIZE
3578
+#define        ACCUM_TYPE_SIZE         INT_TYPE_SIZE
3579
+#define        LONG_ACCUM_TYPE_SIZE    LONG_TYPE_SIZE
3580
+
3581
+/* LIBGCC2_GNU_PREFIX ... This macro corresponds to the TARGET_GNU_PREFIX target
3582
+ * hook and should be defined if that hook is overriden to be true.  It causes
3583
+ * function names in libgcc to be changed to use a __gnu_ prefix for their name
3584
+ * rather than the default __.  A port which uses this macro should also arrange
3585
+ * to use t-gnu-prefix in the libgcc config.host.
3586
+ *
3587
+ * ZipCPU -- I see no reason to define and therefore change this behavior.
3588
+ */
3589
+
3590
+/* TARGET_FLT_EVAL_METHOD ... A C expression for the value for FLT_EVAL_METHOD
3591
+ * in float.h,, assuming, if applicable, that the floating-point control word
3592
+ * is in its default state.  If you do not define this macro the value of
3593
+ * FLT_EVAL_METHOD will be zero.
3594
+ *
3595
+ * ZipCPU --- ???
3596
+ */
3597
+
3598
+/* WIDEST_HARDWARE_FP_SIZE ... A C expression for the size in bits of the widest
3599
+ * floating-point format supported by the hardware.  If you define this macro,
3600
+ * you must specify a value less than or equal to the value of LONG_DOUBLE_...
3601
+ * If you do not define this macro, the value of LONG_DOUBLE_TYPE_SIZE is the
3602
+ * default.
3603
+ *
3604
+ * ZipCPU supports 32-bit IEEE floats--IF THE SUPPORT IS COMPILED IN!  This
3605
+ * really needs to be determined, then, based upon a compile time parameter
3606
+ * where the one compiling the code states whether or not the H/W even has
3607
+ * floating point support.
3608
+ *
3609
+ * For now, we'll assume it does--but once we implement GCC parameters, we'll
3610
+ * need to change this.
3611
+ */
3612
+#undef WIDEST_HARDWARE_FP_SIZE
3613
+// #warning "Definition needs to change if no FPU present"
3614
+#define        WIDEST_HARDWARE_FP_SIZE FLOAT_TYPE_SIZE
3615
+
3616
+/* DEFAULT_SIGNED_CHAR ... An expression whose value is 1 or 0, according to
3617
+ * whether the type char should be signed or unsigned by default.  The user
3618
+ * can always override this default with the options -fsigned-char and
3619
+ * -funsigned-char.
3620
+ *
3621
+ * ZipCPU--let's go with the default behavior.
3622
+ */
3623
+#define        DEFAULT_SIGNED_CHAR     1
3624
+
3625
+/* TARGET_DEFAULT_SHORT_ENUMS(VOID) ... This target hook should return true if
3626 103 dgisselq
+ * the compiler should give an enum type only as many bytes as it takes to
3627 102 dgisselq
+ * represent the range of possible values of that type.  It should return
3628
+ * false if all enum types should be allocated like int.
3629
+ *
3630
+ * The default is to return false.  This is what the ZipCPU needs, so we won't
3631
+ * override it.
3632
+ */
3633
+
3634
+/* SIZE_TYPE ... A C expression for a string describing the name of the data
3635
+ * type to use for size values.  The typedef name size_t is defined using the
3636
+ * contents of the string.
3637
+ *
3638
+ * If you don't define this macro, the default is "long unsigned int".  Since
3639
+ * on the ZipCPU this is a 32-bit number, and all ZipCPU values are 32-bits,
3640
+ * the default seems perfect for us.
3641
+ */
3642
+#define        SIZE_TYPE       "unsigned int"
3643
+
3644
+/* SIZETYPE ... GCC defines internal types () for expressions dealing with size.
3645
+ * This macro is a C expression for a string describing the name of the data
3646
+ * type from which the precision of sizetype is extracted.  The string has the
3647
+ * same restrictions as SIZE_TYPE string.  If you don't define this macro, the
3648
+ * default is SIZE_TYPE --- which seems good enough for us.
3649
+ */
3650
+
3651
+/* PTRDIFF_TYPE ... A C expression for a string describing the name of the data
3652
+ * type to use fo rthe result of subtracting two pointers.  The typedef name
3653
+ * ptrdiff_t is defined using the contents of the string.  See SIZE_TYPE for
3654
+ * more information.
3655
+ *
3656
+ * The default is "long int" which for the ZipCPU is 32-bits---still good enough
3657
+ * for us.
3658
+ */
3659
+#define        PTRDIFF_TYPE    "int"
3660
+
3661
+/* WCHAR_TYPE ... A C expression for a string describing the name of the data
3662
+ * type to use for wide characters.  The typedef name wchar_t is defined using
3663
+ * the contents of  the string.  If you don't define this macro, the default is
3664
+ * 'int'--good enough for ZipCPU.
3665
+ */
3666
+
3667
+/* WCHAR_TYPE_SIZE ... A C expression for the size in bits of the data type for
3668
+ * wide characters.  This is used in cpp, which cannot make use of WCHAR_TYPE.
3669
+ */
3670
+#undef WCHAR_TYPE_SIZE
3671
+#define        WCHAR_TYPE_SIZE 32
3672
+
3673
+/* WINT_TYPE ... A C expression for a string describing the name of the data
3674
+ * type to use for wide characters passed to printf and returned from getwc.
3675
+ * The typedef name wint_t is defined using the contents of the string.  See
3676
+ *
3677 103 dgisselq
+ * ZipCPU -- If you don't define this macro, the default is "unsigned int"--also
3678
+ * best for us again.
3679 102 dgisselq
+ */
3680
+
3681
+/* INTMAX_TYPE ... A C expression for a string describing the name of the
3682
+ * data type that can represent any value of any standard or extended signed
3683
+ * integer type.  The typedef name intmax_t is defined using the contents of
3684
+ * the string.
3685
+ *
3686
+ * If you don't define this macro, the default is the first of "int", "long int"
3687
+ * or "long long int" that has as much precision as "long long int".
3688
+ */
3689
+
3690
+/* UINTMAX_TYPE ... same as INTMAX_TYPE, but for unsigned
3691
+ */
3692
+
3693
+#undef SIG_ATOMIC_TYPE
3694
+#if (ZIP_ATOMIC != 0)
3695
+#define        SIG_ATOMIC_TYPE "int"
3696
+#else
3697
+#define        SIG_ATOMIC_TYPE NULL    // We have no atomic types, but registers
3698
+#endif
3699
+#undef INT8_TYPE
3700
+#define        INT8_TYPE               NULL    // We have no 8-bit integer type
3701
+#undef INT16_TYPE
3702
+#define        INT16_TYPE              NULL
3703
+#undef INT32_TYPE
3704
+#define        INT32_TYPE              "int"
3705
+#undef UINT8_TYPE
3706
+#define        UINT8_TYPE              NULL
3707
+#undef UINT16_TYPE
3708
+#define        UINT16_TYPE             NULL
3709
+#undef UINT32_TYPE
3710
+#define        UINT32_TYPE             "unsigned int"
3711
+#undef INT_LEAST8_TYPE
3712
+#define        INT_LEAST8_TYPE         "int"
3713
+#undef INT_LEAST16_TYPE
3714
+#define        INT_LEAST16_TYPE        "int"
3715
+#undef INT_LEAST32_TYPE
3716
+#define        INT_LEAST32_TYPE        "int"
3717
+#undef UINT_LEAST8_TYPE
3718
+#define        UINT_LEAST8_TYPE        "unsigned int"
3719
+#undef UINT_LEAST16_TYPE
3720
+#define        UINT_LEAST16_TYPE       "unsigned int"
3721
+#undef UINT_LEAST32_TYPE
3722
+#define        UINT_LEAST32_TYPE       "unsigned int"
3723
+#undef INT_FAST8_TYPE
3724
+#define        INT_FAST8_TYPE          "int"
3725
+#undef INT_FAST16_TYPE
3726
+#define        INT_FAST16_TYPE         "int"
3727
+#undef INT_FAST32_TYPE
3728
+#define        INT_FAST32_TYPE         "int"
3729
+#undef UINT_FAST8_TYPE
3730
+#define        UINT_FAST8_TYPE         "unsigned int"
3731
+#undef UINT_FAST16_TYPE
3732
+#define        UINT_FAST16_TYPE        "unsigned int"
3733
+#undef UINT_FAST32_TYPE
3734
+#define        UINT_FAST32_TYPE        "unsigned int"
3735
+#undef INTPTR_TYPE
3736
+#define        INTPTR_TYPE             "unsigned int"
3737
+#undef UINTPTR_TYPE
3738
+#define        UINTPTR_TYPE            "unsigned int"
3739
+
3740
+#undef INT64_TYPE
3741
+#undef UINT64_TYPE
3742
+#undef INT_LEAST64_TYPE
3743
+#undef UINT_LEAST64_TYPE
3744
+#undef INT_FAST64_TYPE
3745
+#undef UINT_FAST64_TYPE
3746
+
3747
+#if (ZIP_HAS_DI != 0)
3748
+#define        INT64_TYPE              "long int"
3749
+#define        UINT64_TYPE             "long unsigned int"
3750
+#define        INT_LEAST64_TYPE        "long int"
3751
+#define        UINT_LEAST64_TYPE       "long unsigned int"
3752
+#define        INT_FAST64_TYPE         "long int"
3753
+#define        UINT_FAST64_TYPE        "long unsigned int"
3754
+#else
3755
+#define        INT64_TYPE              NULL
3756
+#define        UINT64_TYPE             NULL
3757
+#define        INT_LEAST64_TYPE        NULL
3758
+#define        UINT_LEAST64_TYPE       NULL
3759
+#define        INT_FAST64_TYPE         NULL
3760
+#define        UINT_FAST64_TYPE        NULL
3761
+#endif
3762
+
3763
+#define        TARGET_PTRMEMFUNC_VBI_LOCATION  ptrmemfunc_vbit_in_pfn
3764
+
3765
+
3766
+/* 17.07 Register Usage / Register definitions */
3767
+
3768
+/* FIRST_PSEUDO_REGISTER ... Number of hardware registers known to the compiler.
3769
+ * They receive numbers 0 through FIRST_PSEUDO_REGISTER-1; thus the first
3770
+ * pseudo register's numbrer really is assigned the number
3771
+ * FIRST_PSEUDO_REGISTER.
3772
+ *
3773
+ * ZipCPU---There are 16 registers in the ZipCPU, numbered 0-15 with the CC
3774
+ * and PC register being numbered 14 and 15 respectively.  Therefore, the
3775
+ * compiler can take register number 16 and above and do whatever it wants
3776
+ * with it.
3777
+ */
3778
+#ifdef DEFINE_USER_REGS
3779 103 dgisselq
+#  define      FIRST_PSEUDO_REGISTER   32
3780 102 dgisselq
+#else
3781 103 dgisselq
+#  ifdef       zip_FP_PSEUDO
3782
+#    define    FIRST_PSEUDO_REGISTER   (zip_FP_PSEUDO+1)
3783
+#  else
3784
+#    define    FIRST_PSEUDO_REGISTER   16
3785
+#  endif
3786 102 dgisselq
+#endif
3787
+
3788
+/* FIXED_REGISTERS ... An initializer that says which registers are used for
3789
+ * fixed purposes all throughout the compiled code and are therefore not
3790
+ * available for general allocation.  These would include the stack pointer, the
3791
+ * frame pointer (except on machines where that can be used as a general
3792
+ * register when no frame pointer is needed), the program counter on machines
3793
+ * where that is considered one of the addressable registers, and any other
3794
+ * numbered register with a standard use.
3795
+ *
3796
+ * This information is expressed as a sequence of numbers, separated by commas,
3797
+ * and surrounded by braces.  The nth number is 1 if register n is fixed, 0
3798
+ * otherwise.
3799
+ *
3800
+ * For the Zip CPU, we have three fixed registers that are not available for
3801
+ * general allocation:
3802
+ *
3803
+ *     SP      The stack pointer
3804
+ *     CC      The condition codes and CPU state register
3805
+ *     PC      The program counter
3806
+ *
3807
+ * Other registers, such as FP (the frame pointer) or GBL (the global offset
3808
+ * table pointer) are registers that we hope will not be so fixed.
3809
+ */
3810 103 dgisselq
+#ifdef zip_FP_PSEUDO
3811
+#  define      FIXED_REGISTERS         { 0,0,0,0,0,0,0,0,0,0,0,0,0,1,1,1,1 }
3812
+#else
3813
+#  define      FIXED_REGISTERS         { 0,0,0,0,0,0,0,0,0,0,0,0,0,1,1,1 }
3814
+#endif
3815 102 dgisselq
+
3816
+/* CALL_USED_REGISTERS ... like FIXED_REGISTERS but has 1 for each register
3817
+ * that is clobbered (in general) by function calls as well as for fixed
3818
+ * registers.  This macro therefore identifies the registers that are not
3819
+ * available for general allocation of values that must live across function
3820
+ * calls.
3821
+ *
3822
+ * If a register has 0 in CALL_USED_REGISTERS, the compiler automatically saves
3823
+ * it on function entry and restores it on function exit, if the register is
3824
+ * used within the function.
3825
+ *
3826
+ * On the Zip CPU, we must save R0 (the return address), and (let's pick) any
3827
+ * register above R5.
3828
+ */
3829 103 dgisselq
+#ifdef zip_FP_PSEUDO
3830
+#  define      CALL_USED_REGISTERS     { 0,1,1,1,1,0,0,0,0,0,0,0,0,1,1,1,1 }
3831
+#else
3832
+#  define      CALL_USED_REGISTERS     { 0,1,1,1,1,0,0,0,0,0,0,0,0,1,1,1 }
3833
+#endif
3834 102 dgisselq
+
3835
+/* CALL_REALLY_USED_REGISTERS ...  optional macro that, if not defined, defaults
3836
+ * to the value of CALL_USED_REGISTERS.
3837
+ */
3838
+
3839
+/* HARD_REGNO_CALL_PART_CLOBBERED(REGNO,MODE) ... A C expression that is nonzero
3840
+ * if it is not permissible to store a value of mode MODE in hard register REGNO
3841
+ * across a call without some part of it being clobbbered.  For most machines,
3842
+ * this macro need not be defined.  It is only required for machines that do
3843 103 dgisselq
+ * not preserve the entire contents of a register across a call.
3844 102 dgisselq
+ *
3845
+ * In the Zip CPU, we clobber R0 with our return address during a call, so let's
3846
+ * make sure this gets included here.
3847
+ */
3848
+#define        HARD_REGNO_CALL_PART_CLOBBERED(REGNO,MODE)      (REGNO==0)
3849
+
3850
+/* TARGET_CONDITIONAL_REGISTER_USAGE(VOID) ... This hook may conditionally
3851
+ * modify five variables fixed_regs, call_used_regs, global_regs, reg_names, and
3852
+ * reg_class_contents, to take into account any dependence of these register
3853
+ * sets on target flags.  The first three of these are of type char[]
3854
+ * (interpreted as Boolean vectors).  global_regs is a const char *[] and
3855
+ * reg_class_contents is a HARD_REG_SET.  Before the macro is called,
3856
+ * fixed_regs, call_used_regs, reg_class_contents, and reg_names have been
3857
+ * initialized from FIXED_REGISTERS, CALL_USED_REGISTERS, REG_CLASS_CONTENTS,
3858
+ * and REGISTER_NAMES, respectively.  global_regs has been cleared, and any
3859
+ * -ffixed-reg, -fcall-used-reg, and -fcall-saved-reg command options have been
3860
+ * applied.
3861
+ *
3862
+ * ZipCPU -- I may need to return and define this depending upon how FP and
3863
+ * GBL register allocation go.  But for now, we'll leave this at its default
3864
+ * value.
3865
+ */
3866
+// #warning "Revisit me after FP and GBL allocation"
3867
+
3868
+/* INCOMING_REGNO(out) ... Define this macro if the target machine has register
3869
+ * windows. ...
3870
+ *
3871
+ * Zip CPU has no register windows.
3872
+ */
3873
+
3874
+/* OUTGOING_REGNO ... same thing.
3875
+ */
3876
+
3877
+/* LOCAL_REGNO ... same thing.
3878
+ */
3879
+
3880
+/* PC_REGNUM ... If the program counter has a register number, define this as
3881
+ * that register number.  Otherwise do not define it.
3882
+ */
3883
+#define        PC_REGNUM       zip_PC
3884
+
3885
+
3886
+/* REG_ALLOC_ORDER ... If defined, an initializer for a vector of integers,
3887
+ * containing the number of hard registers in the order in which GCC should
3888
+ * prefer to use them (from most preferred to least.
3889
+ *
3890 103 dgisselq
+ * If this macro is not defined, registers are used lowest numbered first (all
3891 102 dgisselq
+ * else being equal).
3892
+ *
3893
+ * Since the default is the ZipCPU desired case, we won't define this here.
3894
+ */
3895
+
3896
+/* ADJUST_REG_ALLOC_ORDER ... on most machines it is not necessary to define
3897
+ * this macro, so we won't either.
3898
+ */
3899
+
3900
+/* HONOR_REG_ALLOC_ORDER ...
3901
+ */
3902
+
3903
+/* HONOR_REG_ALLOC_ORDER ... on most machines it is not necessary to define
3904
+ * this macro, so we won't either.
3905
+ */
3906
+
3907
+/* HARD_REGNO_NREGS(REGNO, MODE) ... A C expression for the number of
3908
+ * consecutive hard registers, starting at register number REGNO, required to
3909
+ * hold a value of mode MODE.
3910
+ *
3911
+ * On a machine where all registers are exactly one word, a suitable definition
3912
+ * is given of ((GET_MODE_SIZE(MODE)+UNITS_PER_WORD-1)/UNITS_PER_WORD.
3913
+ *
3914
+ * On ZipCPU, we might do
3915
+ *     ((((MODE)==DImode)||((MODE)==DFmode))?2:1)
3916
+ * but I think the default (above) code should work as well.  Hence, let's stick
3917
+ * with the default, lest someone try to create larger modes (TImode, OImode,
3918
+ * XImode) and expect us to follow them properly some how.
3919
+ *
3920
+ * Okay, now in hind sight, we know that the default doesn't work for our
3921
+ * architecture, since GET_MODE_SIZE(SImode)=4, not 1.  Thus, let's rearrange
3922
+ * this expression to work in bits rather than in bytes and we'll know more
3923
+ * of what we are doing.
3924
+ */
3925
+#undef HARD_REGNO_NREGS
3926
+#define        HARD_REGNO_NREGS(REGNO, MODE)   ((GET_MODE_SIZE(MODE)+UNITS_PER_WORD-1)\
3927
+               / (UNITS_PER_WORD))
3928
+
3929
+/* HARD_REGNO_NREGS_HAS_PADDING(REGNO,MODE) ... A C expression that is nonzero
3930
+ * if a value of mode MODE, stored in memory, ends with padding that causes it
3931
+ * to take up more space than in registers starting at register number REGNO
3932
+ * (as determined by multiplying GCC's notion of the size of the register when
3933
+ * containing this mode by the number of registers returned by HARD_REGNO_NREGS)
3934
+ * By default this is zero.
3935
+ *
3936
+ * Zip CPU --- The default looks good enough to me.
3937
+ */
3938
+
3939
+/* HARD_REGNO_NREGS_WITH_PADDING(REGNO, MODE)
3940
+ *
3941
+ * ZipCPU ---
3942
+ */
3943
+
3944
+/* REGMODE_NATURAL_SIZE(MODE) -- Define this macro if the natural size of
3945
+ * registers that hold values of mode mode is not the word size.  It is a C
3946
+ * expression that should give the natural size in bytes for the specified mode.
3947
+ * It is used by the register allocator to try to optimize its results.
3948
+ *
3949
+ * ZipCPU ---
3950
+ */
3951
+// #define     REGMODE_NATURAL_SIZE(MODE)      (((MODE)==DImode)?2:1)
3952
+
3953
+/* HARD_REGNO_MODE_OK ... A C expression that is nonzero if it is permissible
3954 103 dgisselq
+ * to store a value of mode MODE in a hard register number REGNO (or in several
3955 102 dgisselq
+ * registers starting with that one).  For a machine where all registers are
3956
+ * equivalent, a suitable definition is '1'.  You need not include code to check
3957
+ * for the numbers of fixed registers, because the allocation mechanism
3958
+ * considered them to be always occupied.
3959
+ *
3960
+ * ZipCPU --- As long as you are already avoiding the fixed registers, the
3961
+ * suitable default definition mentioned above should be sufficient.
3962
+ */
3963
+#undef HARD_REGNO_MODE_OK
3964 103 dgisselq
+#define        HARD_REGNO_MODE_OK(R,M) (R<zip_CC)
3965 102 dgisselq
+
3966
+/* HARD_REGNO_RENAME_OK(FROM,TO) ... A C expression that is nonzero if it is
3967
+ * okay to rename a hard register FROM to another hard register TO.  One common
3968
+ * use of this macro is to prevernt renaming of a register to another register
3969
+ * that is not saved by a prologue in an interrupt handler.  The default is
3970
+ * always nonzero.
3971
+ *
3972
+ * ZipCPU --- The default looks good enough to us.
3973
+ */
3974
+#undef HARD_REGNO_RENAME_OK
3975
+#define        HARD_REGNO_RENAME_OK(FROM,TO)   ((is_ZIP_GENERAL_REG(FROM))&&(is_ZIP_GENERAL_REG(TO)))
3976
+
3977
+
3978
+/* MODES_TIABLE_P(M1, M2) ... A C expression that is nonzero if a value of mode
3979
+ * M1 is accessible in mode M2 without copying.
3980
+ *
3981
+ * ZipCPU --- well, that's true for us (although we support scant few modes) ...
3982
+ * so lets' set to one.
3983
+ */
3984
+#define        MODES_TIEABLE_P(M1,M2)  1
3985
+
3986
+/* TARGET_HARD_REGNO_SCRATCH_OK(REGNO)
3987
+ * This target hook should return true if it is OK to use a hard register
3988
+ * REGNO has a scratch register in peephole2.  One common use of this macro is
3989
+ * to prevent using of a register that is not saved by a prologue in an
3990
+ * interrupt handler.  The default version of this hook always returns true.
3991
+ *
3992
+ * ZipCPU --- the default works for us as well.  If you are in an interrupt
3993
+ * context, you have an entirely new set of registers (the supervisor set), so
3994
+ * this is a non-issue.
3995
+ */
3996
+
3997
+/* AVOID_CCMODE_COPIES ... define this macro if the compiler should avoid
3998
+ * copies to/from CCmode register(s).  You should only define this macro if
3999
+ * support for copying to/from CCmode is incomplete.
4000
+ *
4001
+ * ZipCPU --- CCmode register copies work like any other, so we'll keep with the
4002
+ * default definition.
4003
+ */
4004
+
4005
+/* STACK_REGS ... Define this if the machine has any stack-like registers.
4006
+ *
4007
+ * Zip CPU has no stack-like registers, as their definition is different from
4008
+ * the ZipCPU stack pointer register.
4009
+ */
4010
+
4011
+#define        ZIP_REG_BYTE_SIZE       1
4012
+
4013
+/* 17.08 Register Classes */
4014
+
4015
+/* enum reg_class ... An enumerate type that must be defined with all the
4016
+ * register class names as enumerated values.  NO_REGS must be first.  ALL_REGS
4017
+ * must be the last register class, followed by one more enumerated value,
4018
+ * LIM_REG_CLASSES, which is not a register class but rather tells how many
4019
+ * classes there are.
4020
+ *
4021
+ * ZipCPU --- We'll defined register 0-13 as general registers, 14-15 in
4022
+ * all_regs, and go from there.
4023
+ */
4024
+enum   reg_class {
4025
+       NO_REGS, GENERAL_REGS,
4026
+#ifdef DEFINE_USER_REGS
4027
+       USER_REGS,
4028
+#endif
4029
+       ALL_REGS, LIM_REG_CLASSES
4030
+};
4031
+
4032
+/* N_REG_CLASSES ... the number of distinct register classes, defined as follows
4033
+ */
4034
+#define        N_REG_CLASSES   (int)LIM_REG_CLASSES
4035
+
4036
+/* REG_CLASS_NAMES ... An initializer containing the names of the register
4037
+ * classes as C string constants.  These names are used in writing some of the
4038
+ * debugging dumps.
4039
+ */
4040
+#define        REG_CLASS_NAMES { "NO_REGS", "GENERAL_REGS", "ALL_REGS" }
4041
+
4042
+/* REG_CLASS_CONTENTS ... An initializer containing the contents of the register
4043
+ * classes, as integerss which are bit masks.  The nth integer specifies the
4044
+ * contents of class n.  That way the integer mask is interpreted as that
4045
+ * register r is in the class if (mask&(1<<r)) is 1.
4046
+ *
4047
+ * When the machine has more than 32 registers ... that's not us.
4048
+ *
4049
+ * ZipCPU --- This is straight forward, three register classes, etc.
4050
+ */
4051 103 dgisselq
+#ifdef zip_FP_PSEUDO
4052
+#define        REG_CLASS_CONTENTS { { 0x00000}, {0x13fff}, {0x1ffff} }
4053
+#else
4054 102 dgisselq
+#define        REG_CLASS_CONTENTS { { 0x00000}, {0x03fff}, {0x0ffff} }
4055 103 dgisselq
+#endif
4056 102 dgisselq
+
4057
+#ifdef DEFINE_USER_REGS
4058
+#define        REG_CLASS_NAMES { "NO_REGS", "GENERAL_REGS", "USER_REGS", "ALL_REGS" }
4059
+#define        REG_CLASS_CONTENTS { { 0x00000},{0x03fff},{0x0ffff0000},{0x0ffffffff} }
4060
+#define        FIXED_REGISTERS         { 0,0,0,0,0,0,0,0,0,0,0,0,0,1,1,1,  1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1 }
4061
+#define        CALL_USED_REGISTERS     { 0,1,1,1,1,0,0,0,0,0,0,0,0,1,1,1,  1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1 }
4062
+#endif
4063
+
4064
+/* REGNO_REG_CLASS ... A C expression whose value is a register class
4065
+ * containing hard register REGNO.  In general there is more than one such
4066
+ * class;  Choose a class which is minimal, meaning that no smaller class also
4067
+ * contains the register.
4068
+ */
4069
+#undef REGNO_REG_CLASS
4070 103 dgisselq
+#ifdef zip_FP_PSEUDO
4071
+#define        REGNO_REG_CLASS(R)      (is_ZIP_REG(R)?((((R)<=13)||((R)==zip_FP_PSEUDO))?GENERAL_REGS:ALL_REGS):NO_REGS)
4072
+#else
4073 102 dgisselq
+#define        REGNO_REG_CLASS(R)      (is_ZIP_REG(R)?((R<=13)?GENERAL_REGS:ALL_REGS):NO_REGS)
4074 103 dgisselq
+#endif
4075 102 dgisselq
+
4076
+/* BASE_REG_CLASS ... A macro whose definition is the name of the class to which
4077
+ * a valid base register must belong.  A base register is one used in an address
4078
+ * which is the register value plus a displacement.
4079
+ */
4080
+#undef BASE_REG_CLASS
4081
+#define        BASE_REG_CLASS  GENERAL_REGS
4082
+
4083
+/* MODE_BASE_CLASS(MODE) ... This is a variation of the BASE_REG_CLASS macro
4084
+ * which allows the selection of a bse register in a mode dependent manner.  If
4085
+ * mode is VOIDmode then it should return the same value as BASE_REG_CLASS.
4086
+ */
4087
+#undef MODE_BASE_CLASS
4088
+#define        MODE_BASE_CLASS(MODE)   GENERAL_REGS
4089
+
4090
+/* MODE_BASE_REG_REG_CLASS(MODE) ... A C expression whose value is the register
4091
+ * class to which a valid base register must belong in order to be used in a
4092
+ * base plus index register address.  You should define this macro if base plus
4093
+ * index addresses have different requirements than other base register uses.
4094
+ *
4095
+ * Zip CPU does not support the base plus index addressing mode, thus ...
4096
+ */
4097 111 dgisselq
+// #undef      MODE_BASE_REG_REG_CLASS
4098
+// #define     MODE_BASE_REG_REG_CLASS(MODE)   NO_REGS
4099 102 dgisselq
+
4100
+/* INDEX_REG_CLASS ... A macro whose definition is the name of the class to
4101
+ * which a valid index register must belong.  An index register is one used in
4102
+ * an address where its value is either multiplied by a scale factor or added
4103
+ * to another register (as well as added to a displacement).
4104
+ *
4105
+ * ZipCPU -- Has no index registers.
4106
+ */
4107
+#undef INDEX_REG_CLASS
4108
+#define        INDEX_REG_CLASS NO_REGS
4109
+
4110
+/* REGNO_OK_FOR_BASE_P(NUM) ... A C expression which is nonzero if register
4111
+ * number num is suitable for use as a base register in operand addresses.
4112
+ */
4113
+#undef REGNO_OK_FOR_BASE_P
4114
+#ifdef DEFINE_USER_REGS
4115
+# define REGNO_OK_FOR_BASE_P(NUM)      ((NUM != zip_CC)&&(NUM < 16))
4116
+#else
4117
+# define REGNO_OK_FOR_BASE_P(NUM)      (NUM != zip_CC)
4118
+#endif
4119
+
4120
+/* REGNO_MODE_OK_FOR_BASE_P ... A C expressison that is just like
4121
+ * REGNO_OK_FOR_BASE_P, except that that expression may examine the mode of the
4122 111 dgisselq
+ * memory reference in MODE.  You should define this macro if the mode of the
4123 102 dgisselq
+ * memory reference affects whether a register may be used as a base register.
4124
+ *
4125
+ * ZipCPU --- the mode doesn't affect anything, so we don't define this.
4126
+ */
4127
+
4128
+/* REGNO_MODE_OK_FOR_REG_BASE_P(NUM, MODE) ... base plus index operand
4129
+ * addresses, accessing memory in mode mode.
4130
+ *
4131
+ * Use of this macro is deprecated.
4132
+ */
4133
+
4134 111 dgisselq
+/* REGNO_MODE_CODE_OK_FOR_BASE_P(N,M,AS,OC,IC) ... A C expression which is
4135 102 dgisselq
+ * nonzero if a register number N is suitable for use as a base register in
4136
+ * operand addresses, accessing memory in mode M in address space AS.  This is
4137
+ * similar to REGNO_MODE_OK_FOR_BASE_P, except that the expression may examine
4138
+ * the context in which the register appears in the memory reference.
4139
+ *
4140
+ * ZipCPU---We aren't specific in how we use our registers.
4141
+ */
4142
+#define        REGNO_MODE_CODE_OK_FOR_BASE_P(N,M,AS,OC,IC) REGNO_OK_FOR_BASE_P(N)
4143
+
4144
+/* REGNO_OK_FOR_INDEX_P(REGNO) ... A C expression which is nonzero if register
4145
+ * num is suitable for use as an index register in opernad addressess.  It may
4146
+ * be either a suitable hard register or a pseudo register that has been
4147 111 dgisselq
+ * allocated such as a hard register.
4148 102 dgisselq
+ *
4149
+ * ZipCPU has no index registers, therefore we declare this to be zero.
4150
+ */
4151
+#undef REGNO_OK_FOR_INDEX_P
4152
+#define        REGNO_OK_FOR_INDEX_P(REGNO)     0
4153
+
4154
+/* TARGET_PREFERRED_RENAME_CLASS(RCLASS) ... A target hook that places
4155
+ * additional preference on the register class to use when it is necessary to
4156
+ * rename a register in class RCLASS to another class, or perhaps NO_REGS, if no
4157
+ * preferred register class is found or hook preferred_rename_class is not
4158
+ * implemented.  SOmething returning a more restrictive class makes better code.
4159
+ * For example, on ARM, thumb-2 instructions using LO_REGS may be smaller than
4160
+ * instructions using GENERIC_REGS.  By returning LO_REGS from
4161
+ * preferred_rename_class, code size can be reduced.
4162
+ */
4163
+// #undef TARGET_PREFERRED_RENAME_CLASS
4164
+// #define     TARGET_PREFERRED_RENAME_CLASS(RCLASS)   RCLASS
4165
+
4166
+/* TARGET_PREFERRED_RELOAD_CLASS(X,RC) ... A target hook that places additional
4167
+ * restri tions on the register class to use when it is necessary to copy value
4168
+ * X into a register in class RC.  The value is a register class; rehaps RC, or
4169
+ * perhaps a smaller class.
4170
+ *
4171
+ * The default fversion of this hook always returns value of RC argument, which
4172
+ * sounds quite appropriate for the ZipCPU.
4173
+ */
4174
+
4175
+/* PREFERRED_RELOAD_CLASS(X,CLASS) ... A C expression that places additional
4176
+ * restrictions on the register class to use when it is necessary to copy
4177
+ * value X into a register in class CLASS.  On many machines, the following
4178
+ * definition is safe: PREFERRED_RELOAD_CLASS(X,CLASS) (CLASS)
4179
+ * Sometimes returning a more restrictive class makes better code.  For example,
4180
+ * on the 68k, when x is an integer constant that is in range for a moveq
4181
+ * instruction, the value of this macro is always DATA_REGS as long as CLASS
4182 111 dgisselq
+ * includes the data registers.  Requiring a data register guarantees that a
4183 102 dgisselq
+ * 'moveq' will be used.
4184
+ *
4185
+ * ZipCPU --- you can't load certain values into all members of ALL_REGS.  For
4186
+ * example, loading (sleep and !gie) into the CC register could halt the CPU.
4187
+ * Hence, we only allow loads into the GENERAL_REG class.
4188
+ */
4189
+#define        PREFERRED_RELOAD_CLASS(X, CLASS)        GENERAL_REGS
4190
+
4191
+/* TARGET_PREFERRED_OUTPUT_RELOAD_CLASS(RTX,RCLASS) ... Like TARGET_PREFERRED_..
4192
+ * RELOAD_CLASS, but for output instead of input reloads.
4193
+ *
4194
+ * ZipCPU --- there's gotta be a valid default behaviour for this.
4195
+ */
4196
+
4197
+/* LIMIT_RELOAD_CLASS(MODE, CL) ...
4198
+ *
4199
+ * Don't define this macro unless the target machine has limitations which
4200
+ * require the macro to do something nontrivial.  ZipCPU doesn't, so we won't.
4201
+ */
4202
+
4203
+/* TARGET_SECONDARY_RELOAD
4204
+ * SECONDARY_ ...
4205
+ * Don't think we need these ...
4206
+ */
4207
+
4208
+/* CLASS_MAX_NREGS(CLASS,MODE) ... A C expression for the maximum number of
4209
+ * consecutive registers of class CLASS needed to hold a value of mode MODE.
4210
+ *
4211
+ * This is closely related to the macro HARD_REGNO_NREGS.  In fact, the value
4212
+ * of the macro CLASS_MAX_REGS(CL,M) should be the maximum value of
4213
+ * HARD_REGNO_NREGS(REGNO,MODE) for all REGNO values in the class CLASS.
4214
+ *
4215
+ * This macro helps control the handling of multiple word values in the reload
4216
+ * pass.
4217
+ *
4218
+ * ZipCPU --- We'll just use HARDNO_REGNO_NREGS, since CLASS is independent for
4219
+ * us.  We'll also choose register R0, since ... well, since it simply doesn't
4220
+ * matter.  (HARD_REGNO_NREGS ignores this anyway)
4221
+ */
4222
+#define        CLASS_MAX_NREGS(CLASS, MODE)    HARD_REGNO_NREGS(0,MODE)
4223
+
4224
+/* CANNOT_CHANGE_MODE_CLASS
4225
+ * ???
4226
+ */
4227
+
4228
+/* TARGET_IRA_CHANGE_PSEUDO_ALLOCNO_CLASS
4229
+ */
4230
+
4231
+/* TARRGET_LRA_P
4232
+ * Default looks good.
4233
+ */
4234
+
4235
+/* TARGET_REGISTER_PRIORITY(INT) ... A target hook which returns the register
4236 111 dgisselq
+ * priority number to which the register HARD_REGNO belongs to.  The bigger the
4237 102 dgisselq
+ * number
4238
+ *
4239
+ * The default version of this target hook returns always zero---good enough for
4240
+ * the ZipCPU.
4241
+ */
4242
+
4243
+/* TARGET_REGISTER_USAGE_LEVELING_P(VOID) ... A target hook which returns true
4244
+ * if we need register usage leveling.  That means if a few hard registers are
4245
+ * equally good for the assignment, we choose the least used hard register.  The
4246
+ * register usage leveling may be profitable for some targets.  Don't use usage
4247
+ * leveling for targets with conditional execution or targets with big register
4248
+ * files as it hurts if-conversion and cross-jumping optimizations.  The default
4249
+ * version of this target hook returns always false.
4250
+ *
4251
+ * ZipCPU --- Default is the right answer.
4252
+ */
4253
+
4254
+/* TARGET_DIFFERENT_ADDR_DISPLACEMENT_P ...
4255
+ * Default looks good.
4256
+ */
4257
+
4258
+/* TARGET_CANNOT_SUBSTITUTE_MEM_EQUIV_P ...
4259
+ * Default looks good.
4260
+ */
4261
+
4262
+/* TARGET_LEGITIMIZE_ADDRESS_DISPLACEMENT ....
4263
+ */
4264
+
4265
+/* TARGET_SPILL_CLASS
4266
+ *
4267
+ * ZipCPU --- If we were running in supervisor mode only, this might be the
4268
+ * user set of registers.  However, we're not building for that mode (now),
4269
+ * so we'll leave this at the default of NO_REGS.
4270
+ */
4271
+
4272
+/* TARGET_CSTORE_MODE(ICODE) ... Defines the machine mode to use for the
4273
+ * boolean result of conditional store patterns.  The OCIDE argument is the
4274
+ * instruction code for the cstore being performed.  Not defining this hook is
4275
+ * the same as accepting the mode encoded into operand 0 of the cstore expander
4276
+ * patterns.
4277
+ *
4278
+ * ??? ZipCPU --- I don't follow this documentation.  We'll leave this at the
4279
+ * default therefore.
4280
+ */
4281
+
4282
+/* 17.09 Stack Layout and Calling Conventions */
4283
+
4284
+
4285
+/* STACK_GROWS_DOWNWARD ... Define this macro if pushing a word onto the stack
4286
+ * moves the stack pointer to a smaller address, and false otherwise.
4287
+ *
4288
+ * ZipCPU ... well, our stack does grow downward, but it doesn't do so auto-
4289
+ * magically.  We have to move the stack pointer ourselves.  However, since this
4290
+ * is our convention, we'll define it as such.
4291
+ */
4292
+#undef STACK_GROWS_DOWNWARD
4293
+#define        STACK_GROWS_DOWNWARD    1
4294
+
4295
+/* STACK_PUSH_CODE ... This macro defines the operation used when something is
4296
+ * pushed on the stack.  In RTL, a push operation will be
4297
+ * (set (mem( STACK_PUSH_CODE(reg sp))) ...) The choiecs are PRE_DEC, POST_DEC,
4298
+ * PRE_INC, and POST_INC.  Which of these is correct depends on the stack
4299
+ * direction and on whether the stack pointer points to the last item on the
4300
+ * stack or whether it points to the space for the next item on the stack.
4301
+ * The default is PRE_DECC when STACK_GROWS_DOWNWARD is true, which is almost
4302
+ * always right, and PRE_INC otherwise, which is often wrong.
4303
+ *
4304
+ * ZipCPU --- None of these is right, so let's leave this at the default and
4305
+ * see how badly we get mangled.  In particular, ZipCPU doesn't have any of the
4306
+ * PRE_DEC, POST_DEC, PRE_INC, or POST_INC addressing modes used here.
4307
+ */
4308
+
4309
+/* FRAME_GROWS_DOWNWARD ... Define this macro to nonzero if the addresses of
4310
+ * local variable slots are at negative offsets from the frame pointer.
4311
+ *
4312
+ * ZipCPU --- If the frame pointer is defined as the stack pointer upon the
4313 103 dgisselq
+ * start of function execution, and that stack pointer grows downward, then
4314 102 dgisselq
+ * this should be the case as well.
4315
+ */
4316
+#undef FRAME_GROWS_DOWNWARD
4317
+#define        FRAME_GROWS_DOWNWARD    1
4318
+// #define     FRAME_GROWS_DOWNWARD    0        // This was ECO32's value
4319
+
4320
+
4321
+/* ARGS_GROW_DOWNWARD ... Define this macro if successive arguments to a
4322
+ * function occupy decreasing addresses on the stack.
4323
+ *
4324
+ * ZipCPU -- we can leave this up to the compiler's preferred implementation,
4325
+ * it is of no consequence to the hardware.
4326
+ */
4327
+
4328
+/* STARTING_FRAME_OFFSET ... Offset from the frame pointer to the first local
4329
+ * variable slot to be allocated.  If FRAME_GROWS_DOWNWARD, find the next slot's
4330
+ * offset by subtracting the firstt slot's length from STARTING_FRAME_OFFSET.
4331
+ * Otherwise it is found by adding the length of the first slot to the value
4332
+ * START_FRAME_OFFSET.
4333
+ *
4334
+ * ZipCPU --- I'm not certain on this, let's come back after we look at how
4335
+ * the code is getting generated.  However, the ECO32 code I am copying from
4336
+ * suggests that 0 is the right value, so we'll use that here.
4337
+ */
4338
+// #warning "Re-evaluate me"
4339
+#define        STARTING_FRAME_OFFSET   0
4340
+
4341
+/* STACK_ALIGNMENT_NEEDED ... Define to zero to disable final alignment of the
4342
+ * stack during reload.  The nonzero default for this macro is suitable for most
4343
+ * ports.
4344
+ *
4345
+ * ZipCPU --- we'll leave this at the default, although if any alignment code
4346
+ * shows up on the stack we may need to adjust it.
4347
+ */
4348
+
4349
+/* STACK_POINTER_OFFSET ... Offset from the SP register to the first location at
4350
+ * which outgoing arguments are placed.  If not specified, the default value
4351
+ * of zero is used.  This is the proper value for most machines.
4352
+ */
4353
+#define        STACK_POINTER_OFFSET    0
4354
+
4355
+/* FIRST_PARM_OFFSET ... Offset from the argument pointer register to the first
4356
+ * argument's address.  On some machines it may depend on the data type of the
4357
+ * function.
4358
+ */
4359
+#define        FIRST_PARM_OFFSET(F)    0
4360
+
4361
+/* STACK_DYNAMIC_OFFSET(F) ... Offset from the stack pointer register to an item
4362
+ * dynamically allocated on the stack, e.g., by alloca.  The default value for
4363
+ * this macro is STACK_POINTER_OFFSET plus the length of the outgoing arguments.
4364
+ * The default is correct for most machines, ...
4365
+ *
4366
+ * ZipCPU --- so we'll use it for the ZipCPU.
4367
+ */
4368
+
4369
+/* INITIAL_FRAME_ADDRESS_RTX ... A C expression whose value is RTL representing
4370
+ * the address of the initial stack frame.  This address is passed to
4371
+ * RETURN_ADDR_RTX and DYNAMIC_CHAIN_ADDRESS.  If you don't define this macro,
4372
+ * a reasonable default value will be used.  Define this macro in order to make
4373
+ * frame pointer elimination work in the presence of __builtin_frame_address(C)
4374
+ * and __builtin_return_address(C) for (C) not equal to zero.
4375
+ *
4376
+ * ZipCPU --- Let's try the reasonable default and see what happens.
4377
+ */
4378
+
4379
+/* SETUP_FRAME_ADDRESSES ... A C expression that produces the machine-specific
4380
+ * code to setup the stack so that arbitrary frames can be accessed.  For
4381
+ * example, on the SPARC, we must flush all of the register windows to the stack
4382
+ * before we can access arbitrary stack frames.  You will seldom need to define
4383
+ * this macro.  The default is to do nothing.
4384
+ *
4385
+ * ZipCPU --- which is what we shall do here.
4386
+ */
4387
+
4388
+/* TARGET_BUILTIN_SETJMP_FRAME_VALUE(VOID) ... This target hook should return
4389
+ * an RTX that is used to store the address of the current frame into the
4390
+ * builtin setjmp buffer.  The default value, virtual_stack_vars_rtx, is correct
4391
+ * for most machines.  One reason you may need to define this target hook is if
4392
+ * hard_frame_pointer_rtx is the appropriate value on your machine.
4393
+ *
4394
+ * ZipCPU --- leave this undefined, since the default value should be correct
4395
+ * for "most" machines.
4396
+ */
4397
+
4398
+/* FRAME_ADDR_RTX ... most machines do not need to define it.
4399
+ */
4400
+
4401
+/* RETURN_ADDR_RTX(COUNT,FRAMEADDR) ... A C expression whose value is RTL
4402
+ * representing the value of the return address for the frame COUNT steps up
4403
+ * from the current frame, after the prologue.  FRAMEADDR is the frame pointer
4404
+ * of the COUNT frame, or the frame pointer of the COUNT-1 frame if
4405
+ * RETURN_ADDR_IN_PREVIOUS_FRAME is nonzero.  The value of the expression must
4406
+ * always be the correct address when COUNT is nonzero, but may be NULL_RTX if
4407
+ * there is no way to determine the return address of other frames.
4408
+ *
4409
+ * ZipCPU --- I have no idea how we'd do this, so let's just return NULL_RTX.
4410
+ */
4411
+#undef RETURN_ADDR_RTX
4412
+#define        RETURN_ADDR_RTX(COUNT,FRAMEADDR)        NULL_RTX
4413
+
4414
+/* RETURN_ADDR_IN_PREVIOUS_FRAME ... Define this macro to nonzero value if the
4415
+ * return address of a particular stack frame is accessed from the frame pointer
4416
+ * of the previous stack frame.  The zero default for this macro is suitable
4417
+ * for most ports.
4418
+ *
4419
+ * ZipCPU---Default works here as well.
4420
+ */
4421
+
4422
+/* INCOMING_RETURN_ADDR_RTX ... A C expression whose value is RTL representing
4423
+ * the location of the incoming return address at the beginning of any function,
4424
+ * before the prologue.  This RTL is either a REG, indicating that the return
4425
+ * value is saved in 'REG', or a MEM representing the location in the stack.
4426
+ * If this RTL is a REG, you should define DWARF_RETURN_COLUMN to
4427
+ * DWARF_FRAME_REGNUM(REGNO).
4428
+ *
4429
+ * ZipCPU --- While our incoming return address could theoretically be in any
4430
+ * register, our machine description file is going to place it into register
4431
+ * R0, so that's what we return here.
4432
+ */
4433
+#undef INCOMING_RETURN_ADDR_RTX
4434
+#define        INCOMING_RETURN_ADDR_RTX        gen_rtx_REG(SImode, zip_R0)
4435
+
4436
+
4437
+/* DWARF_ALT_FRAME_RETURN_COLUMN
4438
+ */
4439
+
4440
+/* DWARF_ZERO_REG ... A C exrpession whose value is an integer giving a DWARF2
4441
+ * register number that is considered to always have the value zero.  This
4442
+ * should only be defined if the target has an architected zero register (ZipCPU
4443
+ * does not), and someone decided it was a good idea to use that register number
4444
+ * to terminate the stack backtrace.  New ports should avoid this (so the
4445
+ * ZipCPU port will avoid it as well).
4446
+ *
4447
+ */
4448
+
4449
+/* TARGET_DWARF_HANDLE_FRAME_UNSPEC
4450
+ */
4451
+
4452
+/* INCOMING_FRAME_SP_OFFSET
4453
+ */
4454
+#define        INCOMING_FRAME_SP_OFFSET        0
4455
+
4456
+/* ARG_POINTER_CFA_OFFSET
4457
+ */
4458
+
4459
+/* FRAME_POINTER_CFA_OFFSET
4460
+ */
4461
+
4462
+/* CFA_FRAME_BASE_OFFSET
4463
+ */
4464
+
4465
+/* 17.09.02 Exception handling support */
4466
+
4467
+/* EH_RETURN_DATA_REGNO(N) ... A C expression whose value is the Nth register
4468
+ * number used for data by exception handlers, or INVALID_REGNUM if fewer than
4469
+ * N registers are usable.  The exception handling library routines communicate
4470
+ * with the exception handlers via a set of agreed upon registers.  Ideally
4471
+ * these registers should be call clobbered; it is possible to use call-saved
4472
+ * registers, but may negatively impact code size.  The target must support at
4473
+ * least 2 data registers, but should define 4 if their are enough free
4474
+ * registers.
4475
+ *
4476
+ * You must define this macro if you want to support call frame exception
4477
+ * handling like that provided by DWARF 2.
4478
+ */
4479
+#define        EH_RETURN_DATA_REGNO(N) (((N<ZIP_FIRST_ARG_REGNO)||(N>ZIP_LAST_ARG_REGNO))?(N-1):INVALID_REGNUM)
4480
+
4481
+/* EH_RETURN_STACKADJ_RTX ... A C expression whose value is RTL representing
4482
+ * a location in which to store a stack adjustment to be applied before function
4483
+ * return.  This is used to unwind the stack to an exception handler's call
4484
+ * frame.  It will be assigned zero on code paths that return normally.
4485
+ *
4486
+ * Do not define this macro if the stack pointer is saved and restored by the
4487
+ * regular prolog and epilog code in the call frame itself (which it is for the
4488
+ * ZipCPU); in this case, the exception handling library routines will update
4489
+ * the stack location to be restored in place.  Otherwise, you must define this
4490
+ * macro if you want to support call frame exception handling like that provided
4491
+ * by DWARF 2.
4492
+ *
4493
+ */
4494
+
4495
+/* EH_RETURN_HANDLER_RTX ... A C expression whose value is RTL representing a
4496
+ * location in which to store the address of an exception handler to which we
4497
+ * should return.  It will not be assigned on code paths that return normally.
4498
+ *
4499
+ * Typcally this is the location in the call frame at which the normal return
4500
+ * address is stored.  For targets that return by popping an address of the
4501
+ * stack, this might be a memory address just below the target callf rame
4502
+ * rather than inside the current call frame.  If defined,
4503
+ * EH_RETURN_STACKADJ_RTX will have already been assigned, so it may be used
4504
+ * to calculate the location of the target call frame.
4505
+ *
4506
+ * If you want to support call frame exception handling, you must define either
4507
+ * this macro or the eh_return instruction pattern.
4508
+ */
4509
+// #warning "I don't know what to do here."
4510
+
4511
+/*
4512
+ *
4513
+ *
4514
+ *
4515
+ *   REST OF SECTION SKIPPED ...
4516
+ *
4517
+ *
4518
+ *
4519
+ */
4520
+
4521
+/* 17.09.03 Specifying how stack checking is done */
4522
+
4523
+/* STACK_CHECK_BUILTIN ... a non-zero value if stack checking is done by the
4524
+ * configuration files in a machine-dependent manner.  You should define this
4525
+ * macro if stack checking is required by the ABI of your machine or if you
4526
+ * would like to do stack checking in some more efficient way than the generic
4527
+ * appraoch.  The default value of this macro is zero.
4528
+ *
4529
+ * ZipCPU --- The default makes sense for us.
4530
+ */
4531
+// #define STACK_CHECK_BUILTIN 0
4532
+
4533
+/* STACK_CHECK_STATIC_BUILTIN ... A nonzero value if static stack checking is
4534
+ * done by the configuration files in a machine-dependent manner.  You should
4535
+ * define this macro if you would like to do static stack checking in some more
4536
+ * efficient way than the generic approach.  The default value of this macro
4537
+ * is zero.
4538
+ *
4539
+ * ZipCPU --- The default makes sense for us.
4540
+ */
4541
+
4542
+/* STACK_CHECK_PROBE_INTERVAL_EXP ...  An integer specifying the interval at
4543
+ * which GCC must generate stack probe instructions, defined as 2 raised to this
4544
+ * interval.  You will normally define this macro so that the interval is no
4545
+ * larger than the size of the "guard pages" at the end of a stack area.  The
4546
+ * default value of 12 (4096-byte interval) is suitable for most systems.
4547
+ *
4548
+ * ZipCPU --- Default.
4549
+ */
4550
+
4551 <