URL https://opencores.org/ocsvn/zipcpu/zipcpu/trunk

Subversion Repositories zipcpu

[/] [zipcpu/] [trunk/] [sw/] [gcc-zippatch.patch] - Blame information for rev 120

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diff -Naur '--exclude=*.swp' gcc-5.3.0-original/config.sub gcc-5.3.0-zip/config.sub
--- gcc-5.3.0-original/config.sub       2015-01-02 04:30:21.000000000 -0500
+++ gcc-5.3.0-zip/config.sub    2016-01-30 12:27:56.023073747 -0500
@@ -316,7 +316,7 @@
        | visium \
        | we32k \
        | x86 | xc16x | xstormy16 | xtensa \
-       | z8k | z80)
+       | z8k | z80 | zip)
                basic_machine=$basic_machine-unknown
                ;;
        c54x)
@@ -1547,6 +1547,9 @@
 # system, and we'll never get to this point.
 
 case $basic_machine in
+       zip-*)
+               os=-elf
+               ;;
        score-*)
                os=-elf
                ;;
diff -Naur '--exclude=*.swp' gcc-5.3.0-original/configure gcc-5.3.0-zip/configure
--- gcc-5.3.0-original/configure        2015-05-03 13:29:57.000000000 -0400
+++ gcc-5.3.0-zip/configure     2016-01-30 16:19:48.264867231 -0500
@@ -3927,6 +3927,8 @@
   vax-*-*)
     noconfigdirs="$noconfigdirs target-newlib target-libgloss"
     ;;
+  zip*)
+    noconfigdirs="$noconfigdirs target-libffi target-boehm-gc gdb gprof"
 esac
 
 # If we aren't building newlib, then don't build libgloss, since libgloss
diff -Naur '--exclude=*.swp' gcc-5.3.0-original/configure.ac gcc-5.3.0-zip/configure.ac
--- gcc-5.3.0-original/configure.ac     2015-05-03 13:29:57.000000000 -0400
+++ gcc-5.3.0-zip/configure.ac  2016-02-12 10:47:23.847194843 -0500
@@ -1274,6 +1274,10 @@
   vax-*-*)
     noconfigdirs="$noconfigdirs target-newlib target-libgloss"
     ;;
+  zip*)
+    noconfigdirs="$noconfigdirs target-libffi target-boehm-gc gdb gprof"
+    unsupported_languages="$unsupported_languages fortran java"
+    ;;
 esac
 
 # If we aren't building newlib, then don't build libgloss, since libgloss
diff -Naur '--exclude=*.swp' gcc-5.3.0-original/gcc/cfgexpand.c gcc-5.3.0-zip/gcc/cfgexpand.c
--- gcc-5.3.0-original/gcc/cfgexpand.c  2015-07-23 06:39:26.000000000 -0400
+++ gcc-5.3.0-zip/gcc/cfgexpand.c       2016-04-01 06:40:17.288326711 -0400
@@ -108,6 +108,14 @@
 #include "tree-chkp.h"
 #include "rtl-chkp.h"
 
+#ifdef DO_ZIP_DEBUGS
+#include <stdio.h>
+#define ZIP_DEBUG_LINE(STR,RTX) do{fprintf(stderr,"%s:%d/%s\n",__FILE__,__LINE__,STR); zip_debug_rtx(RTX);} while(0)
+extern void    zip_debug_rtx(const_rtx);
+#else
+#define        ZIP_DEBUG_LINE(STR,RTX)
+#endif
+
 /* Some systems use __main in a way incompatible with its use in gcc, in these
    cases use the macros NAME__MAIN to give a quoted symbol and SYMBOL__MAIN to
    give the same symbol without quotes for an alternative entry point.  You
diff -Naur '--exclude=*.swp' gcc-5.3.0-original/gcc/cgraphbuild.c gcc-5.3.0-zip/gcc/cgraphbuild.c
--- gcc-5.3.0-original/gcc/cgraphbuild.c        2015-01-09 15:18:42.000000000 -0500
+++ gcc-5.3.0-zip/gcc/cgraphbuild.c     2016-03-24 22:13:24.815287808 -0400
@@ -62,6 +62,13 @@
 #include "ipa-prop.h"
 #include "ipa-inline.h"
 
+#ifdef DO_ZIP_DEBUGS
+extern void zip_debug_rtx(const_rtx);
+#define        ZIP_DEBUG_LINE(STR,RTX) do { fprintf(stderr, "%s:%d/%s\n", __FILE__,__LINE__,STR); zip_debug_rtx(RTX); } while(0)
+#else
+#define        ZIP_DEBUG_LINE(STR,RTX)
+#endif
+
 /* Context of record_reference.  */
 struct record_reference_ctx
 {
diff -Naur '--exclude=*.swp' gcc-5.3.0-original/gcc/common/config/zip/zip-common.c gcc-5.3.0-zip/gcc/common/config/zip/zip-common.c
--- gcc-5.3.0-original/gcc/common/config/zip/zip-common.c       1969-12-31 19:00:00.000000000 -0500
+++ gcc-5.3.0-zip/gcc/common/config/zip/zip-common.c    2016-02-14 00:54:31.821055716 -0500
@@ -0,0 +1,52 @@
+////////////////////////////////////////////////////////////////////////////////
+//
+// Filename:   common/config/zip/zip-common.c
+//
+// Project:    Zip CPU backend for the GNU Compiler Collection
+//
+// Purpose:    To eliminate the frame register automatically.
+//
+// Creator:    Dan Gisselquist, Ph.D.
+//             Gisselquist Technology, LLC
+//
+////////////////////////////////////////////////////////////////////////////////
+//
+// Copyright (C) 2016, Gisselquist Technology, LLC
+//
+// This program is free software (firmware): you can redistribute it and/or
+// modify it under the terms of  the GNU General Public License as published
+// by the Free Software Foundation, either version 3 of the License, or (at
+// your option) any later version.
+//
+// This program is distributed in the hope that it will be useful, but WITHOUT
+// ANY WARRANTY; without even the implied warranty of MERCHANTIBILITY or
+// FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+// for more details.
+//
+// You should have received a copy of the GNU General Public License along
+// with this program.  (It's in the $(ROOT)/doc directory, run make with no
+// target there if the PDF file isn't present.)  If not, see
+// <http://www.gnu.org/licenses/> for a copy.
+//
+// License:    GPL, v3, as defined and found on www.gnu.org,
+//             http://www.gnu.org/licenses/gpl.html
+//
+//
+////////////////////////////////////////////////////////////////////////////////
+#include "config.h"
+#include "system.h"
+#include "coretypes.h"
+#include "tm.h"
+#include "common/common-target.h"
+#include "common/common-target-def.h"
+
+static const struct default_options zip_option_optimization_table[] =
+  {
+    { OPT_LEVELS_1_PLUS, OPT_fomit_frame_pointer, NULL, 1 },
+    { OPT_LEVELS_NONE, 0, NULL, 0 }
+  };
+
+#undef TARGET_OPTION_OPTIMIZATION_TABLE
+#define        TARGET_OPTION_OPTIMIZATION_TABLE        zip_option_optimization_table
+
+struct gcc_targetm_common      targetm_common = TARGETM_COMMON_INITIALIZER;
diff -Naur '--exclude=*.swp' gcc-5.3.0-original/gcc/config/aarch64/aarch64-linux.h gcc-5.3.0-zip/gcc/config/aarch64/aarch64-linux.h
--- gcc-5.3.0-original/gcc/config/aarch64/aarch64-linux.h       2016-04-02 11:53:47.213604913 -0400
+++ gcc-5.3.0-zip/gcc/config/aarch64/aarch64-linux.h    2015-07-24 12:00:26.000000000 -0400
@@ -21,7 +21,7 @@
 #ifndef GCC_AARCH64_LINUX_H
 #define GCC_AARCH64_LINUX_H
 
-#define GLIBC_DYNAMIC_LINKER "/tools/lib/ld-linux-aarch64%{mbig-endian:_be}%{mabi=ilp32:_ilp32}.so.1"
+#define GLIBC_DYNAMIC_LINKER "/lib/ld-linux-aarch64%{mbig-endian:_be}%{mabi=ilp32:_ilp32}.so.1"
 
 #undef  ASAN_CC1_SPEC
 #define ASAN_CC1_SPEC "%{%:sanitize(address):-funwind-tables}"
diff -Naur '--exclude=*.swp' gcc-5.3.0-original/gcc/config/alpha/linux-elf.h gcc-5.3.0-zip/gcc/config/alpha/linux-elf.h
--- gcc-5.3.0-original/gcc/config/alpha/linux-elf.h     2016-04-02 11:53:47.213604913 -0400
+++ gcc-5.3.0-zip/gcc/config/alpha/linux-elf.h  2015-01-05 07:33:28.000000000 -0500
@@ -23,8 +23,8 @@
 #define EXTRA_SPECS \
 { "elf_dynamic_linker", ELF_DYNAMIC_LINKER },
 
-#define GLIBC_DYNAMIC_LINKER   "/tools/lib/ld-linux.so.2"
-#define UCLIBC_DYNAMIC_LINKER "/tools/lib/ld-uClibc.so.0"
+#define GLIBC_DYNAMIC_LINKER   "/lib/ld-linux.so.2"
+#define UCLIBC_DYNAMIC_LINKER "/lib/ld-uClibc.so.0"
 #if DEFAULT_LIBC == LIBC_UCLIBC
 #define CHOOSE_DYNAMIC_LINKER(G, U) "%{mglibc:" G ";:" U "}"
 #elif DEFAULT_LIBC == LIBC_GLIBC
diff -Naur '--exclude=*.swp' gcc-5.3.0-original/gcc/config/arm/linux-eabi.h gcc-5.3.0-zip/gcc/config/arm/linux-eabi.h
--- gcc-5.3.0-original/gcc/config/arm/linux-eabi.h      2016-04-02 11:53:47.213604913 -0400
+++ gcc-5.3.0-zip/gcc/config/arm/linux-eabi.h   2015-01-05 07:33:28.000000000 -0500
@@ -68,8 +68,8 @@
    GLIBC_DYNAMIC_LINKER_DEFAULT and TARGET_DEFAULT_FLOAT_ABI.  */
 
 #undef  GLIBC_DYNAMIC_LINKER
-#define GLIBC_DYNAMIC_LINKER_SOFT_FLOAT "/tools/lib/ld-linux.so.3"
-#define GLIBC_DYNAMIC_LINKER_HARD_FLOAT "/tools/lib/ld-linux-armhf.so.3"
+#define GLIBC_DYNAMIC_LINKER_SOFT_FLOAT "/lib/ld-linux.so.3"
+#define GLIBC_DYNAMIC_LINKER_HARD_FLOAT "/lib/ld-linux-armhf.so.3"
 #define GLIBC_DYNAMIC_LINKER_DEFAULT GLIBC_DYNAMIC_LINKER_SOFT_FLOAT
 
 #define GLIBC_DYNAMIC_LINKER \
diff -Naur '--exclude=*.swp' gcc-5.3.0-original/gcc/config/arm/linux-elf.h gcc-5.3.0-zip/gcc/config/arm/linux-elf.h
--- gcc-5.3.0-original/gcc/config/arm/linux-elf.h       2016-04-02 11:53:47.213604913 -0400
+++ gcc-5.3.0-zip/gcc/config/arm/linux-elf.h    2015-06-23 05:26:54.000000000 -0400
@@ -62,7 +62,7 @@
 
 #define LIBGCC_SPEC "%{mfloat-abi=soft*:-lfloat} -lgcc"
 
-#define GLIBC_DYNAMIC_LINKER "/tools/lib/ld-linux.so.2"
+#define GLIBC_DYNAMIC_LINKER "/lib/ld-linux.so.2"
 
 #define LINUX_TARGET_LINK_SPEC  "%{h*} \
    %{static:-Bstatic} \
diff -Naur '--exclude=*.swp' gcc-5.3.0-original/gcc/config/bfin/linux.h gcc-5.3.0-zip/gcc/config/bfin/linux.h
--- gcc-5.3.0-original/gcc/config/bfin/linux.h  2016-04-02 11:53:47.213604913 -0400
+++ gcc-5.3.0-zip/gcc/config/bfin/linux.h       2015-01-05 07:33:28.000000000 -0500
@@ -45,7 +45,7 @@
   %{shared:-G -Bdynamic} \
   %{!shared: %{!static: \
    %{rdynamic:-export-dynamic} \
-   -dynamic-linker /tools/lib/ld-uClibc.so.0} \
+   -dynamic-linker /lib/ld-uClibc.so.0} \
    %{static}} -init __init -fini __fini"
 
 #undef TARGET_SUPPORTS_SYNC_CALLS
diff -Naur '--exclude=*.swp' gcc-5.3.0-original/gcc/config/cris/linux.h gcc-5.3.0-zip/gcc/config/cris/linux.h
--- gcc-5.3.0-original/gcc/config/cris/linux.h  2016-04-02 11:53:47.213604913 -0400
+++ gcc-5.3.0-zip/gcc/config/cris/linux.h       2015-01-05 07:33:28.000000000 -0500
@@ -102,7 +102,7 @@
 #undef CRIS_DEFAULT_CPU_VERSION
 #define CRIS_DEFAULT_CPU_VERSION CRIS_CPU_NG
 
-#define GLIBC_DYNAMIC_LINKER "/tools/lib/ld.so.1"
+#define GLIBC_DYNAMIC_LINKER "/lib/ld.so.1"
 
 #undef CRIS_LINK_SUBTARGET_SPEC
 #define CRIS_LINK_SUBTARGET_SPEC \
diff -Naur '--exclude=*.swp' gcc-5.3.0-original/gcc/config/freebsd-spec.h gcc-5.3.0-zip/gcc/config/freebsd-spec.h
--- gcc-5.3.0-original/gcc/config/freebsd-spec.h        2016-04-02 11:53:47.213604913 -0400
+++ gcc-5.3.0-zip/gcc/config/freebsd-spec.h     2015-06-25 13:53:14.000000000 -0400
@@ -129,9 +129,9 @@
 #endif
 
 #if FBSD_MAJOR < 6
-#define FBSD_DYNAMIC_LINKER "/tools/libexec/ld-elf.so.1"
+#define FBSD_DYNAMIC_LINKER "/usr/libexec/ld-elf.so.1"
 #else
-#define FBSD_DYNAMIC_LINKER "/tools/libexec/ld-elf.so.1"
+#define FBSD_DYNAMIC_LINKER "/libexec/ld-elf.so.1"
 #endif
 
 /* NOTE: The freebsd-spec.h header is included also for various
diff -Naur '--exclude=*.swp' gcc-5.3.0-original/gcc/config/frv/linux.h gcc-5.3.0-zip/gcc/config/frv/linux.h
--- gcc-5.3.0-original/gcc/config/frv/linux.h   2016-04-02 11:53:47.213604913 -0400
+++ gcc-5.3.0-zip/gcc/config/frv/linux.h        2015-01-05 07:33:28.000000000 -0500
@@ -34,7 +34,7 @@
 #define ENDFILE_SPEC \
   "%{shared|pie:crtendS.o%s;:crtend.o%s} crtn.o%s"
 
-#define GLIBC_DYNAMIC_LINKER "/tools/lib/ld.so.1"
+#define GLIBC_DYNAMIC_LINKER "/lib/ld.so.1"
 
 #undef LINK_SPEC
 #define LINK_SPEC "\
diff -Naur '--exclude=*.swp' gcc-5.3.0-original/gcc/config/i386/gnu.h gcc-5.3.0-zip/gcc/config/i386/gnu.h
--- gcc-5.3.0-original/gcc/config/i386/gnu.h    2016-04-02 11:53:47.213604913 -0400
+++ gcc-5.3.0-zip/gcc/config/i386/gnu.h 2015-01-05 07:33:28.000000000 -0500
@@ -22,7 +22,7 @@
 #define GNU_USER_LINK_EMULATION "elf_i386"
 
 #undef GNU_USER_DYNAMIC_LINKER
-#define GNU_USER_DYNAMIC_LINKER "/tools/lib/ld.so"
+#define GNU_USER_DYNAMIC_LINKER "/lib/ld.so"
 
 #undef STARTFILE_SPEC
 #if defined HAVE_LD_PIE
diff -Naur '--exclude=*.swp' gcc-5.3.0-original/gcc/config/i386/kfreebsd-gnu64.h gcc-5.3.0-zip/gcc/config/i386/kfreebsd-gnu64.h
--- gcc-5.3.0-original/gcc/config/i386/kfreebsd-gnu64.h 2016-04-02 11:53:47.213604913 -0400
+++ gcc-5.3.0-zip/gcc/config/i386/kfreebsd-gnu64.h      2015-01-05 07:33:28.000000000 -0500
@@ -22,6 +22,6 @@
 #define GNU_USER_LINK_EMULATION64 "elf_x86_64_fbsd"
 #define GNU_USER_LINK_EMULATIONX32 "elf32_x86_64_fbsd"
 
-#define GLIBC_DYNAMIC_LINKER32 "/tools/lib/ld.so.1"
-#define GLIBC_DYNAMIC_LINKER64 "/tools/lib/ld-kfreebsd-x86-64.so.1"
-#define GLIBC_DYNAMIC_LINKERX32 "/tools/lib/ld-kfreebsd-x32.so.1"
+#define GLIBC_DYNAMIC_LINKER32 "/lib/ld.so.1"
+#define GLIBC_DYNAMIC_LINKER64 "/lib/ld-kfreebsd-x86-64.so.1"
+#define GLIBC_DYNAMIC_LINKERX32 "/lib/ld-kfreebsd-x32.so.1"
diff -Naur '--exclude=*.swp' gcc-5.3.0-original/gcc/config/i386/kfreebsd-gnu.h gcc-5.3.0-zip/gcc/config/i386/kfreebsd-gnu.h
--- gcc-5.3.0-original/gcc/config/i386/kfreebsd-gnu.h   2016-04-02 11:53:47.213604913 -0400
+++ gcc-5.3.0-zip/gcc/config/i386/kfreebsd-gnu.h        2015-01-05 07:33:28.000000000 -0500
@@ -19,4 +19,4 @@
 <http://www.gnu.org/licenses/>.  */
 
 #define GNU_USER_LINK_EMULATION "elf_i386_fbsd"
-#define GLIBC_DYNAMIC_LINKER "/tools/lib/ld.so.1"
+#define GLIBC_DYNAMIC_LINKER "/lib/ld.so.1"
diff -Naur '--exclude=*.swp' gcc-5.3.0-original/gcc/config/i386/linux64.h gcc-5.3.0-zip/gcc/config/i386/linux64.h
--- gcc-5.3.0-original/gcc/config/i386/linux64.h        2016-04-02 11:53:47.213604913 -0400
+++ gcc-5.3.0-zip/gcc/config/i386/linux64.h     2015-01-05 07:33:28.000000000 -0500
@@ -27,6 +27,6 @@
 #define GNU_USER_LINK_EMULATION64 "elf_x86_64"
 #define GNU_USER_LINK_EMULATIONX32 "elf32_x86_64"
 
-#define GLIBC_DYNAMIC_LINKER32 "/tools/lib/ld-linux.so.2"
-#define GLIBC_DYNAMIC_LINKER64 "/tools/lib64/ld-linux-x86-64.so.2"
-#define GLIBC_DYNAMIC_LINKERX32 "/tools/libx32/ld-linux-x32.so.2"
+#define GLIBC_DYNAMIC_LINKER32 "/lib/ld-linux.so.2"
+#define GLIBC_DYNAMIC_LINKER64 "/lib64/ld-linux-x86-64.so.2"
+#define GLIBC_DYNAMIC_LINKERX32 "/libx32/ld-linux-x32.so.2"
diff -Naur '--exclude=*.swp' gcc-5.3.0-original/gcc/config/i386/linux.h gcc-5.3.0-zip/gcc/config/i386/linux.h
--- gcc-5.3.0-original/gcc/config/i386/linux.h  2016-04-02 11:53:47.213604913 -0400
+++ gcc-5.3.0-zip/gcc/config/i386/linux.h       2015-01-05 07:33:28.000000000 -0500
@@ -20,4 +20,4 @@
 <http://www.gnu.org/licenses/>.  */
 
 #define GNU_USER_LINK_EMULATION "elf_i386"
-#define GLIBC_DYNAMIC_LINKER "/tools/lib/ld-linux.so.2"
+#define GLIBC_DYNAMIC_LINKER "/lib/ld-linux.so.2"
diff -Naur '--exclude=*.swp' gcc-5.3.0-original/gcc/config/ia64/linux.h gcc-5.3.0-zip/gcc/config/ia64/linux.h
--- gcc-5.3.0-original/gcc/config/ia64/linux.h  2016-04-02 11:53:47.213604913 -0400
+++ gcc-5.3.0-zip/gcc/config/ia64/linux.h       2015-01-05 07:33:28.000000000 -0500
@@ -55,7 +55,7 @@
 /* Define this for shared library support because it isn't in the main
    linux.h file.  */
 
-#define GLIBC_DYNAMIC_LINKER "/tools/lib/ld-linux-ia64.so.2"
+#define GLIBC_DYNAMIC_LINKER "/lib/ld-linux-ia64.so.2"
 
 #undef LINK_SPEC
 #define LINK_SPEC "\
diff -Naur '--exclude=*.swp' gcc-5.3.0-original/gcc/config/knetbsd-gnu.h gcc-5.3.0-zip/gcc/config/knetbsd-gnu.h
--- gcc-5.3.0-original/gcc/config/knetbsd-gnu.h 2016-04-02 11:53:47.213604913 -0400
+++ gcc-5.3.0-zip/gcc/config/knetbsd-gnu.h      2015-01-05 07:33:28.000000000 -0500
@@ -32,4 +32,4 @@
 
 
 #undef GNU_USER_DYNAMIC_LINKER
-#define GNU_USER_DYNAMIC_LINKER "/tools/lib/ld.so.1"
+#define GNU_USER_DYNAMIC_LINKER "/lib/ld.so.1"
diff -Naur '--exclude=*.swp' gcc-5.3.0-original/gcc/config/kopensolaris-gnu.h gcc-5.3.0-zip/gcc/config/kopensolaris-gnu.h
--- gcc-5.3.0-original/gcc/config/kopensolaris-gnu.h    2016-04-02 11:53:47.213604913 -0400
+++ gcc-5.3.0-zip/gcc/config/kopensolaris-gnu.h 2015-01-05 07:33:28.000000000 -0500
@@ -31,5 +31,4 @@
   while (0)
 
 #undef GNU_USER_DYNAMIC_LINKER
-#define GNU_USER_DYNAMIC_LINKER "/tools/lib/ld.so.1"
-
+#define GNU_USER_DYNAMIC_LINKER "/lib/ld.so.1"
diff -Naur '--exclude=*.swp' gcc-5.3.0-original/gcc/config/linux.h gcc-5.3.0-zip/gcc/config/linux.h
--- gcc-5.3.0-original/gcc/config/linux.h       2016-04-02 11:53:47.213604913 -0400
+++ gcc-5.3.0-zip/gcc/config/linux.h    2015-01-05 07:33:28.000000000 -0500
@@ -73,10 +73,10 @@
    GLIBC_DYNAMIC_LINKER must be defined for each target using them, or
    GLIBC_DYNAMIC_LINKER32 and GLIBC_DYNAMIC_LINKER64 for targets
    supporting both 32-bit and 64-bit compilation.  */
-#define UCLIBC_DYNAMIC_LINKER "/tools/lib/ld-uClibc.so.0"
-#define UCLIBC_DYNAMIC_LINKER32 "/tools/lib/ld-uClibc.so.0"
-#define UCLIBC_DYNAMIC_LINKER64 "/tools/lib/ld64-uClibc.so.0"
-#define UCLIBC_DYNAMIC_LINKERX32 "/tools/lib/ldx32-uClibc.so.0"
+#define UCLIBC_DYNAMIC_LINKER "/lib/ld-uClibc.so.0"
+#define UCLIBC_DYNAMIC_LINKER32 "/lib/ld-uClibc.so.0"
+#define UCLIBC_DYNAMIC_LINKER64 "/lib/ld64-uClibc.so.0"
+#define UCLIBC_DYNAMIC_LINKERX32 "/lib/ldx32-uClibc.so.0"
 #define BIONIC_DYNAMIC_LINKER "/system/bin/linker"
 #define BIONIC_DYNAMIC_LINKER32 "/system/bin/linker"
 #define BIONIC_DYNAMIC_LINKER64 "/system/bin/linker64"
diff -Naur '--exclude=*.swp' gcc-5.3.0-original/gcc/config/lm32/uclinux-elf.h gcc-5.3.0-zip/gcc/config/lm32/uclinux-elf.h
--- gcc-5.3.0-original/gcc/config/lm32/uclinux-elf.h    2016-04-02 11:53:47.213604913 -0400
+++ gcc-5.3.0-zip/gcc/config/lm32/uclinux-elf.h 2015-01-05 07:33:28.000000000 -0500
@@ -67,7 +67,7 @@
    %{shared:-shared} \
    %{symbolic:-Bsymbolic} \
    %{rdynamic:-export-dynamic} \
-   -dynamic-linker /tools/lib/ld-linux.so.2"
+   -dynamic-linker /lib/ld-linux.so.2"
 
 #define TARGET_OS_CPP_BUILTINS() GNU_USER_TARGET_OS_CPP_BUILTINS()
 
diff -Naur '--exclude=*.swp' gcc-5.3.0-original/gcc/config/m68k/linux.h gcc-5.3.0-zip/gcc/config/m68k/linux.h
--- gcc-5.3.0-original/gcc/config/m68k/linux.h  2016-04-02 11:53:47.213604913 -0400
+++ gcc-5.3.0-zip/gcc/config/m68k/linux.h       2015-01-05 07:33:28.000000000 -0500
@@ -71,7 +71,7 @@
    When the -shared link option is used a final link is not being
    done.  */
 
-#define GLIBC_DYNAMIC_LINKER "/tools/lib/ld.so.1"
+#define GLIBC_DYNAMIC_LINKER "/lib/ld.so.1"
 
 #undef LINK_SPEC
 #define LINK_SPEC "-m m68kelf %{shared} \
diff -Naur '--exclude=*.swp' gcc-5.3.0-original/gcc/config/microblaze/linux.h gcc-5.3.0-zip/gcc/config/microblaze/linux.h
--- gcc-5.3.0-original/gcc/config/microblaze/linux.h    2016-04-02 11:53:47.213604913 -0400
+++ gcc-5.3.0-zip/gcc/config/microblaze/linux.h 2015-05-28 10:08:19.000000000 -0400
@@ -28,7 +28,7 @@
 #undef TLS_NEEDS_GOT
 #define TLS_NEEDS_GOT 1
 
-#define DYNAMIC_LINKER "/tools/lib/ld.so.1"
+#define DYNAMIC_LINKER "/lib/ld.so.1"
 #undef  SUBTARGET_EXTRA_SPECS
 #define SUBTARGET_EXTRA_SPECS \
   { "dynamic_linker", DYNAMIC_LINKER }
diff -Naur '--exclude=*.swp' gcc-5.3.0-original/gcc/config/mips/linux.h gcc-5.3.0-zip/gcc/config/mips/linux.h
--- gcc-5.3.0-original/gcc/config/mips/linux.h  2016-04-02 11:53:47.213604913 -0400
+++ gcc-5.3.0-zip/gcc/config/mips/linux.h       2015-01-05 07:33:28.000000000 -0500
@@ -22,20 +22,20 @@
 #define GNU_USER_LINK_EMULATIONN32 "elf32%{EB:b}%{EL:l}tsmipn32"
 
 #define GLIBC_DYNAMIC_LINKER32 \
-  "%{mnan=2008:/tools/lib/ld-linux-mipsn8.so.1;:/tools/lib/ld.so.1}"
+  "%{mnan=2008:/lib/ld-linux-mipsn8.so.1;:/lib/ld.so.1}"
 #define GLIBC_DYNAMIC_LINKER64 \
-  "%{mnan=2008:/tools/lib64/ld-linux-mipsn8.so.1;:/tools/lib64/ld.so.1}"
+  "%{mnan=2008:/lib64/ld-linux-mipsn8.so.1;:/lib64/ld.so.1}"
 #define GLIBC_DYNAMIC_LINKERN32 \
-  "%{mnan=2008:/tools/lib32/ld-linux-mipsn8.so.1;:/tools/lib32/ld.so.1}"
+  "%{mnan=2008:/lib32/ld-linux-mipsn8.so.1;:/lib32/ld.so.1}"
 
 #undef UCLIBC_DYNAMIC_LINKER32
 #define UCLIBC_DYNAMIC_LINKER32 \
-  "%{mnan=2008:/tools/lib/ld-uClibc-mipsn8.so.0;:/tools/lib/ld-uClibc.so.0}"
+  "%{mnan=2008:/lib/ld-uClibc-mipsn8.so.0;:/lib/ld-uClibc.so.0}"
 #undef UCLIBC_DYNAMIC_LINKER64
 #define UCLIBC_DYNAMIC_LINKER64 \
-  "%{mnan=2008:/tools/lib/ld64-uClibc-mipsn8.so.0;:/tools/lib/ld64-uClibc.so.0}"
+  "%{mnan=2008:/lib/ld64-uClibc-mipsn8.so.0;:/lib/ld64-uClibc.so.0}"
 #define UCLIBC_DYNAMIC_LINKERN32 \
-  "%{mnan=2008:/tools/lib32/ld-uClibc-mipsn8.so.0;:/tools/lib32/ld-uClibc.so.0}"
+  "%{mnan=2008:/lib32/ld-uClibc-mipsn8.so.0;:/lib32/ld-uClibc.so.0}"
 
 #define BIONIC_DYNAMIC_LINKERN32 "/system/bin/linker32"
 #define GNU_USER_DYNAMIC_LINKERN32 \
diff -Naur '--exclude=*.swp' gcc-5.3.0-original/gcc/config/mn10300/linux.h gcc-5.3.0-zip/gcc/config/mn10300/linux.h
--- gcc-5.3.0-original/gcc/config/mn10300/linux.h       2016-04-02 11:53:47.213604913 -0400
+++ gcc-5.3.0-zip/gcc/config/mn10300/linux.h    2015-01-05 07:33:28.000000000 -0500
@@ -32,7 +32,7 @@
 #undef  ASM_SPEC
 #define ASM_SPEC ""
 
-#define GLIBC_DYNAMIC_LINKER "/tools/lib/ld.so.1"
+#define GLIBC_DYNAMIC_LINKER "/lib/ld.so.1"
 
 #undef  LINK_SPEC
 #define LINK_SPEC "%{mrelax:--relax} %{shared:-shared} \
diff -Naur '--exclude=*.swp' gcc-5.3.0-original/gcc/config/pa/pa-linux.h gcc-5.3.0-zip/gcc/config/pa/pa-linux.h
--- gcc-5.3.0-original/gcc/config/pa/pa-linux.h 2016-04-02 11:53:47.217604879 -0400
+++ gcc-5.3.0-zip/gcc/config/pa/pa-linux.h      2015-09-24 20:04:26.000000000 -0400
@@ -37,7 +37,7 @@
 /* Define this for shared library support because it isn't in the main
    linux.h file.  */
 
-#define GLIBC_DYNAMIC_LINKER "/tools/lib/ld.so.1"
+#define GLIBC_DYNAMIC_LINKER "/lib/ld.so.1"
 
 #undef LINK_SPEC
 #define LINK_SPEC "\
diff -Naur '--exclude=*.swp' gcc-5.3.0-original/gcc/config/rs6000/linux64.h gcc-5.3.0-zip/gcc/config/rs6000/linux64.h
--- gcc-5.3.0-original/gcc/config/rs6000/linux64.h      2016-04-02 11:53:47.217604879 -0400
+++ gcc-5.3.0-zip/gcc/config/rs6000/linux64.h   2015-03-09 19:18:57.000000000 -0400
@@ -357,14 +357,14 @@
 #undef LINK_OS_DEFAULT_SPEC
 #define LINK_OS_DEFAULT_SPEC "%(link_os_linux)"
 
-#define GLIBC_DYNAMIC_LINKER32 "/tools/lib/ld.so.1"
+#define GLIBC_DYNAMIC_LINKER32 "/lib/ld.so.1"
 #ifdef LINUX64_DEFAULT_ABI_ELFv2
-#define GLIBC_DYNAMIC_LINKER64 "%{mabi=elfv1:/tools/lib64/ld64.so.1;:/tools/lib64/ld64.so.2}"
+#define GLIBC_DYNAMIC_LINKER64 "%{mabi=elfv1:/lib64/ld64.so.1;:/lib64/ld64.so.2}"
 #else
-#define GLIBC_DYNAMIC_LINKER64 "%{mabi=elfv2:/tools/lib64/ld64.so.2;:/tools/lib64/ld64.so.1}"
+#define GLIBC_DYNAMIC_LINKER64 "%{mabi=elfv2:/lib64/ld64.so.2;:/lib64/ld64.so.1}"
 #endif
-#define UCLIBC_DYNAMIC_LINKER32 "/tools/lib/ld-uClibc.so.0"
-#define UCLIBC_DYNAMIC_LINKER64 "/tools/lib/ld64-uClibc.so.0"
+#define UCLIBC_DYNAMIC_LINKER32 "/lib/ld-uClibc.so.0"
+#define UCLIBC_DYNAMIC_LINKER64 "/lib/ld64-uClibc.so.0"
 #if DEFAULT_LIBC == LIBC_UCLIBC
 #define CHOOSE_DYNAMIC_LINKER(G, U) "%{mglibc:" G ";:" U "}"
 #elif DEFAULT_LIBC == LIBC_GLIBC
diff -Naur '--exclude=*.swp' gcc-5.3.0-original/gcc/config/rs6000/sysv4.h gcc-5.3.0-zip/gcc/config/rs6000/sysv4.h
--- gcc-5.3.0-original/gcc/config/rs6000/sysv4.h        2016-04-02 11:53:47.217604879 -0400
+++ gcc-5.3.0-zip/gcc/config/rs6000/sysv4.h     2015-09-24 09:46:45.000000000 -0400
@@ -757,8 +757,8 @@
 
 #define LINK_START_LINUX_SPEC ""
 
-#define GLIBC_DYNAMIC_LINKER "/tools/lib/ld.so.1"
-#define UCLIBC_DYNAMIC_LINKER "/tools/lib/ld-uClibc.so.0"
+#define GLIBC_DYNAMIC_LINKER "/lib/ld.so.1"
+#define UCLIBC_DYNAMIC_LINKER "/lib/ld-uClibc.so.0"
 #if DEFAULT_LIBC == LIBC_UCLIBC
 #define CHOOSE_DYNAMIC_LINKER(G, U) "%{mglibc:" G ";:" U "}"
 #elif !defined (DEFAULT_LIBC) || DEFAULT_LIBC == LIBC_GLIBC
diff -Naur '--exclude=*.swp' gcc-5.3.0-original/gcc/config/s390/linux.h gcc-5.3.0-zip/gcc/config/s390/linux.h
--- gcc-5.3.0-original/gcc/config/s390/linux.h  2016-04-02 11:53:47.217604879 -0400
+++ gcc-5.3.0-zip/gcc/config/s390/linux.h       2015-05-11 03:14:10.000000000 -0400
@@ -60,8 +60,8 @@
 #define MULTILIB_DEFAULTS { "m31" }
 #endif
 
-#define GLIBC_DYNAMIC_LINKER32 "/tools/lib/ld.so.1"
-#define GLIBC_DYNAMIC_LINKER64 "/tools/lib/ld64.so.1"
+#define GLIBC_DYNAMIC_LINKER32 "/lib/ld.so.1"
+#define GLIBC_DYNAMIC_LINKER64 "/lib/ld64.so.1"
 
 #undef  LINK_SPEC
 #define LINK_SPEC \
diff -Naur '--exclude=*.swp' gcc-5.3.0-original/gcc/config/sh/linux.h gcc-5.3.0-zip/gcc/config/sh/linux.h
--- gcc-5.3.0-original/gcc/config/sh/linux.h    2016-04-02 11:53:47.217604879 -0400
+++ gcc-5.3.0-zip/gcc/config/sh/linux.h 2015-01-05 07:33:28.000000000 -0500
@@ -43,7 +43,7 @@
 
 #define TARGET_ASM_FILE_END file_end_indicate_exec_stack
 
-#define GLIBC_DYNAMIC_LINKER "/tools/lib/ld-linux.so.2"
+#define GLIBC_DYNAMIC_LINKER "/lib/ld-linux.so.2"
 
 #undef SUBTARGET_LINK_EMUL_SUFFIX
 #define SUBTARGET_LINK_EMUL_SUFFIX "_linux"
diff -Naur '--exclude=*.swp' gcc-5.3.0-original/gcc/config/sparc/linux64.h gcc-5.3.0-zip/gcc/config/sparc/linux64.h
--- gcc-5.3.0-original/gcc/config/sparc/linux64.h       2016-04-02 11:53:47.217604879 -0400
+++ gcc-5.3.0-zip/gcc/config/sparc/linux64.h    2015-01-05 07:33:28.000000000 -0500
@@ -84,8 +84,8 @@
    When the -shared link option is used a final link is not being
    done.  */
 
-#define GLIBC_DYNAMIC_LINKER32 "/tools/lib/ld-linux.so.2"
-#define GLIBC_DYNAMIC_LINKER64 "/tools/lib64/ld-linux.so.2"
+#define GLIBC_DYNAMIC_LINKER32 "/lib/ld-linux.so.2"
+#define GLIBC_DYNAMIC_LINKER64 "/lib64/ld-linux.so.2"
 
 #ifdef SPARC_BI_ARCH
 
@@ -193,7 +193,7 @@
 #else /* !SPARC_BI_ARCH */
 
 #undef LINK_SPEC
-#define LINK_SPEC "-m elf64_sparc -Y P,%R/tools/lib64 %{shared:-shared} \
+#define LINK_SPEC "-m elf64_sparc -Y P,%R/usr/lib64 %{shared:-shared} \
   %{!shared: \
     %{!static: \
       %{rdynamic:-export-dynamic} \
diff -Naur '--exclude=*.swp' gcc-5.3.0-original/gcc/config/sparc/linux.h gcc-5.3.0-zip/gcc/config/sparc/linux.h
--- gcc-5.3.0-original/gcc/config/sparc/linux.h 2016-04-02 11:53:47.217604879 -0400
+++ gcc-5.3.0-zip/gcc/config/sparc/linux.h      2015-01-05 07:33:28.000000000 -0500
@@ -83,7 +83,7 @@
    When the -shared link option is used a final link is not being
    done.  */
 
-#define GLIBC_DYNAMIC_LINKER "/tools/lib/ld-linux.so.2"
+#define GLIBC_DYNAMIC_LINKER "/lib/ld-linux.so.2"
 
 #undef  LINK_SPEC
 #define LINK_SPEC "-m elf32_sparc %{shared:-shared} \
diff -Naur '--exclude=*.swp' gcc-5.3.0-original/gcc/config/vax/linux.h gcc-5.3.0-zip/gcc/config/vax/linux.h
--- gcc-5.3.0-original/gcc/config/vax/linux.h   2016-04-02 11:53:47.217604879 -0400
+++ gcc-5.3.0-zip/gcc/config/vax/linux.h        2015-01-05 07:33:28.000000000 -0500
@@ -41,7 +41,7 @@
   %{!shared: \
     %{!static: \
       %{rdynamic:-export-dynamic} \
-      -dynamic-linker /tools/lib/ld.so.1} \
+      -dynamic-linker /lib/ld.so.1} \
     %{static:-static}}"
 
 #undef  WCHAR_TYPE
diff -Naur '--exclude=*.swp' gcc-5.3.0-original/gcc/config/xtensa/linux.h gcc-5.3.0-zip/gcc/config/xtensa/linux.h
--- gcc-5.3.0-original/gcc/config/xtensa/linux.h        2016-04-02 11:53:47.217604879 -0400
+++ gcc-5.3.0-zip/gcc/config/xtensa/linux.h     2015-01-05 07:33:28.000000000 -0500
@@ -44,7 +44,7 @@
   %{mlongcalls:--longcalls} \
   %{mno-longcalls:--no-longcalls}"
 
-#define GLIBC_DYNAMIC_LINKER "/tools/lib/ld.so.1"
+#define GLIBC_DYNAMIC_LINKER "/lib/ld.so.1"
 
 #undef LINK_SPEC
 #define LINK_SPEC \
diff -Naur '--exclude=*.swp' gcc-5.3.0-original/gcc/config/zip/netbsd.h gcc-5.3.0-zip/gcc/config/zip/netbsd.h
--- gcc-5.3.0-original/gcc/config/zip/netbsd.h  1969-12-31 19:00:00.000000000 -0500
+++ gcc-5.3.0-zip/gcc/config/zip/netbsd.h       2016-01-30 15:04:14.796899050 -0500
@@ -0,0 +1,82 @@
+////////////////////////////////////////////////////////////////////////////////
+//
+// Filename:   netbsd.h
+//
+// Project:    Zip CPU backend for the GNU Compiler Collection
+//
+// Purpose:
+//
+// Creator:    Dan Gisselquist, Ph.D.
+//             Gisselquist Technology, LLC
+//
+////////////////////////////////////////////////////////////////////////////////
+//
+// Copyright (C) 2016, Gisselquist Technology, LLC
+//
+// This program is free software (firmware): you can redistribute it and/or
+// modify it under the terms of  the GNU General Public License as published
+// by the Free Software Foundation, either version 3 of the License, or (at
+// your option) any later version.
+//
+// This program is distributed in the hope that it will be useful, but WITHOUT
+// ANY WARRANTY; without even the implied warranty of MERCHANTIBILITY or
+// FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+// for more details.
+//
+// You should have received a copy of the GNU General Public License along
+// with this program.  (It's in the $(ROOT)/doc directory, run make with no
+// target there if the PDF file isn't present.)  If not, see
+// <http://www.gnu.org/licenses/> for a copy.
+//
+// License:    GPL, v3, as defined and found on www.gnu.org,
+//             http://www.gnu.org/licenses/gpl.html
+//
+//
+////////////////////////////////////////////////////////////////////////////////
+#ifndef        ZIP_NETBSD_H
+#define        ZIP_NETBSD_H
+
+/* Define default target values. */
+
+#undef MACHINE_TYPE
+#define        MACHINE_TYPE    "NetBSD/Zip ELF"
+
+#undef TARGET_OS_CPP_BUILTINS
+#define        TARGET_OS_CPP_BUILTINS()        \
+       do { NETBSD_OS_CPP_BUILTINS_ELF();              \
+       builtin_define("__ZIPCPU__");                   \
+       builtin_assert("cpu=zip");                      \
+       builtin_assert("machine=zip");                  \
+       } while(0);
+
+#undef CPP_SPEC
+#define        CPP_SPEC        NETBSD_CPP_SPEC
+
+#undef STARTFILE_SPEC
+#define        STARTFILE_SPEC  NETBSD_STARTFILE_SPEC
+
+#undef ENDFILE_SPEC
+#define        ENDFILE_SPEC    NETBSD_ENDFILE_SPEC
+
+#undef LIB_SPEC
+#define        LIB_SPEC        NETBSD_LIB_SPEC
+
+#undef TARGET_VERSION
+#define        TARGET_VERSION  fprintf(stderr, " (%s)", MACHINE_TYPE);
+
+/* Make gcc agree with <machine/ansi.h> */
+
+#undef WCHAR_TYPE
+#define        WCHAR_TYPE      "int"
+
+#undef WCHAR_TYPE_SIZE
+#define        WCHAR_TYPE_SIZE 32
+
+#undef WINT_TYPE
+#define        WINT_TYPE       "int"
+
+/* Clean up after the generic Zip/ELF configuration. */
+#undef MD_EXEC_PREFIX
+#undef MD_STARTFILE_PREFIX
+
+#endif /* ZIP_NETBSD_H */
diff -Naur '--exclude=*.swp' gcc-5.3.0-original/gcc/config/zip/t-zip gcc-5.3.0-zip/gcc/config/zip/t-zip
--- gcc-5.3.0-original/gcc/config/zip/t-zip     1969-12-31 19:00:00.000000000 -0500
+++ gcc-5.3.0-zip/gcc/config/zip/t-zip  2016-02-04 19:00:59.939652587 -0500
@@ -0,0 +1,47 @@
+################################################################################
+##
+## Filename:   t-zip
+##
+## Project:    Zip CPU backend for the GNU Compiler Collection
+##
+## Purpose:
+##
+## Creator:    Dan Gisselquist, Ph.D.
+##             Gisselquist Technology, LLC
+##
+################################################################################
+##
+## Copyright (C) 2016, Gisselquist Technology, LLC
+##
+## This program is free software (firmware): you can redistribute it and/or
+## modify it under the terms of  the GNU General Public License as published
+## by the Free Software Foundation, either version 3 of the License, or (at
+## your option) any later version.
+##
+## This program is distributed in the hope that it will be useful, but WITHOUT
+## ANY WARRANTY; without even the implied warranty of MERCHANTIBILITY or
+## FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+## for more details.
+##
+## You should have received a copy of the GNU General Public License along
+## with this program.  (It's in the $(ROOT)/doc directory, run make with no
+## target there if the PDF file isn't present.)  If not, see
+## <http://www.gnu.org/licenses/> for a copy.
+##
+## License:    GPL, v3, as defined and found on www.gnu.org,
+##             http://www.gnu.org/licenses/gpl.html
+##
+##
+################################################################################
+
+FPBIT = fp-bit.c
+DPBIT = dp-bit.c
+
+# dp-bit.c: $(srcdir)/config/fp-bit.c
+       # cat $(srcdir)/config/fp-bit.c > dp-bit.c
+#
+# fp-bit.c: $(srcdir)/config/fp-bit.c
+       # echo '#define FLOAT" > fp-bit.c
+       # cat $(srcdir)/config/fp-bit.c >> fp-bit.c
+
+
diff -Naur '--exclude=*.swp' gcc-5.3.0-original/gcc/config/zip/zip.c gcc-5.3.0-zip/gcc/config/zip/zip.c
--- gcc-5.3.0-original/gcc/config/zip/zip.c     1969-12-31 19:00:00.000000000 -0500
+++ gcc-5.3.0-zip/gcc/config/zip/zip.c  2016-04-01 06:26:30.217272207 -0400
@@ -0,0 +1,2341 @@
+////////////////////////////////////////////////////////////////////////////////
+//
+// Filename:   zip.c
+//
+// Project:    Zip CPU backend for the GNU Compiler Collection
+//
+// Purpose:
+//
+// Creator:    Dan Gisselquist, Ph.D.
+//             Gisselquist Technology, LLC
+//
+////////////////////////////////////////////////////////////////////////////////
+//
+// Copyright (C) 2016, Gisselquist Technology, LLC
+//
+// This program is free software (firmware): you can redistribute it and/or
+// modify it under the terms of  the GNU General Public License as published
+// by the Free Software Foundation, either version 3 of the License, or (at
+// your option) any later version.
+//
+// This program is distributed in the hope that it will be useful, but WITHOUT
+// ANY WARRANTY; without even the implied warranty of MERCHANTIBILITY or
+// FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+// for more details.
+//
+// You should have received a copy of the GNU General Public License along
+// with this program.  (It's in the $(ROOT)/doc directory, run make with no
+// target there if the PDF file isn't present.)  If not, see
+// <http://www.gnu.org/licenses/> for a copy.
+//
+// License:    GPL, v3, as defined and found on www.gnu.org,
+//             http://www.gnu.org/licenses/gpl.html
+//
+//
+////////////////////////////////////////////////////////////////////////////////
+#include "config.h"
+#include "system.h"
+#include "coretypes.h"
+#include "tm.h"
+#include "rtl.h"
+#include "dominance.h"
+#include "cfg.h"
+#include "cfgrtl.h"
+#include "cfganal.h"
+#include "lcm.h"
+#include "cfgbuild.h"
+#include "cfgcleanup.h"
+#include "predict.h"
+#include "basic-block.h"
+#include "df.h"
+#include "hashtab.h"
+#include "hash-set.h"
+#include "machmode.h"
+#include "symtab.h"
+#include "rtlhash.h"
+#include "tree.h"
+#include "regs.h"
+#include "hard-reg-set.h"
+#include "real.h"
+#include "insn-config.h"
+#include "conditions.h"
+#include "output.h"
+#include "insn-attr.h"
+#include "flags.h"
+#include "expr.h"
+#include "function.h"
+#include "recog.h"
+#include "toplev.h"
+#include "ggc.h"
+#include "builtins.h"
+#include "calls.h"
+#include "langhooks.h"
+#include "optabs.h"
+#include "explow.h"
+#include "emit-rtl.h"
+
+// #include "tmp_p.h"
+#include "target.h"
+#include "target-def.h"
+// #include "tm-constrs.h"
+// #include "tm-preds.h"
+
+#include "diagnostic.h"
+// #include "integrate.h"
+
+// static int  zip_arg_partial_bytes(CUMULATIVE_ARGS *, enum machine_mode, tree, bool);
+// static      bool    zip_pass_by_reference(CUMULATIVE_ARGS *, enum machine_mode, const_tree, bool);
+static bool    zip_return_in_memory(const_tree, const_tree);
+static bool    zip_frame_pointer_required(void);
+// static      bool    zip_must_pass_in_stack(enum machine_mode, const_tree);
+
+// static      void    zip_setup_incoming_varargs(CUMULATIVE_ARGS *, enum machine_mode, tree, int *, int);
+static void zip_function_arg_advance(cumulative_args_t ca, enum machine_mode mode,
+               const_tree type, bool named);
+static rtx zip_function_arg(cumulative_args_t ca, enum machine_mode mode, const_tree type, bool named);
+
+static void    zip_asm_trampoline_template(FILE *);
+static void    zip_trampoline_init(rtx, tree, rtx);
+static void    zip_init_builtins(void);
+static tree zip_builtin_decl(unsigned, bool);
+// static void zip_asm_output_anchor(rtx x);
+       void    zip_asm_output_def(FILE *s, const char *n, const char *v);
+       void    zip_update_cc_notice(rtx exp, rtx_insn *insn);
+static rtx     zip_expand_builtin(tree exp, rtx target, rtx subtarget,
+                       enum machine_mode tmode, int    ignore);
+static bool    zip_scalar_mode_supported_p(enum machine_mode mode);
+static bool    zip_libgcc_floating_mode_supported_p(enum machine_mode mode);
+static int     zip_address_cost(rtx addr, enum machine_mode mode, addr_space_t as, bool spd);
+static bool    zip_mode_dependent_address_p(const_rtx addr, addr_space_t);
+static unsigned HOST_WIDE_INT  zip_const_anchor = 0x20000;
+static          HOST_WIDE_INT  zip_min_opb_imm = -0x200000;
+static          HOST_WIDE_INT  zip_max_opb_imm =  0x1fffff;
+static          HOST_WIDE_INT  zip_min_anchor_offset = -0x20000;
+static          HOST_WIDE_INT  zip_max_anchor_offset =  0x1ffff;
+static          HOST_WIDE_INT  zip_min_mov_offset = -0x1000;
+static          HOST_WIDE_INT  zip_max_mov_offset =  0x0fff;
+static int     zip_sched_issue_rate(void) { return 1; }
+static bool    zip_legitimate_address_p(machine_mode, rtx, bool);
+static bool    zip_legitimate_move_operand_p(machine_mode, rtx, bool);
+       void    zip_debug_rtx_pfx(const char *, const_rtx x);
+       void    zip_debug_rtx(const_rtx x);
+static void    zip_override_options(void);
+static bool    zip_can_eliminate(int from ATTRIBUTE_UNUSED, int to);
+static int     zip_memory_move_cost(machine_mode, reg_class_t, bool);
+static rtx     zip_legitimize_address(rtx x, rtx oldx, machine_mode mode);
+static bool    zip_cannot_modify_jumps_p(void);
+
+
+#define        ALL_DEBUG_OFF   false
+#define        ALL_DEBUG_ON    false
+
+enum ZIP_BUILTIN_ID_CODE {
+       ZIP_BUILTIN_RTU,
+       ZIP_BUILTIN_HALT,
+       ZIP_BUILTIN_IDLE,
+       ZIP_BUILTIN_SYSCALL,
+       ZIP_BUILTIN_SAVE_CONTEXT,
+       ZIP_BUILTIN_RESTORE_CONTEXT,
+       ZIP_BUILTIN_BITREV,
+       ZIP_BUILTIN_CC,
+       ZIP_BUILTIN_UCC,
+       ZIP_BUILTIN_MAX
+};
+
+static GTY (()) tree   zip_builtins[(int)ZIP_BUILTIN_MAX];
+static enum insn_code  zip_builtins_icode[(int)ZIP_BUILTIN_MAX];
+
+
+#include "gt-zip.h"
+
+/* The Global 'targetm' Variable. */
+struct gcc_target      targetm = TARGET_INITIALIZER;
+
+
+enum   reg_class zip_reg_class(int);
+
+#define        LOSE_AND_RETURN(msgid, x)               \
+       do {                                    \
+               zip_operand_lossage(msgid, x);  \
+               return;                         \
+       } while(0)
+
+/* Per-function machine data. */
+struct GTY(()) machine_function
+{
+       /* number of pretented arguments for varargs */
+       int     pretend_size;
+
+       /* Number of bytes saved on the stack for local variables. */
+       int     local_vars_size;
+
+       /* Number of bytes saved on stack for register save area */
+       int     saved_reg_size;
+       int     save_ret;
+
+       int     sp_fp_offset;
+       bool    fp_needed;
+       int     size_for_adjusting_sp;
+};
+
+/* Allocate a chunk of memory for per-function machine-dependent data. */
+
+static struct machine_function *
+zip_init_machine_status(void) {
+       return ggc_cleared_alloc<machine_function>();
+}
+
+static void
+zip_override_options(void)
+{
+       init_machine_status = zip_init_machine_status;
+}
+
+enum   reg_class
+zip_reg_class(int regno)
+{
+       if (is_ZIP_GENERAL_REG(regno)) {
+               return GENERAL_REGS;
+       } else if (is_ZIP_REG(regno)) {
+               return ALL_REGS;
+       } return NO_REGS;
+}
+
+/* Worker function for TARGET_RETURN_IN_MEMORY. */
+static bool
+zip_return_in_memory(const_tree type, const_tree fntype ATTRIBUTE_UNUSED) {
+       const   HOST_WIDE_INT size = int_size_in_bytes(type);
+       return (size == -1)||(size > UNITS_PER_WORD);
+}
+
+/* Emit an error emssage when we're in an asm, and a fatal error for "normal"
+ * insn.  Formatted output isn't easily implemented, since we use output operand
+ * lossage to output the actual message and handle the categorization of the
+ * error.  */
+
+static void
+zip_operand_lossage(const char *msgid, rtx op) {
+       fprintf(stderr, "Operand lossage??\n");
+       debug_rtx(op);
+       zip_debug_rtx(op);
+       output_operand_lossage("%s", msgid);
+}
+
+/* The PRINT_OPERAND_ADDRESS worker.   */
+void
+zip_print_operand_address(FILE *file, rtx x) {
+       const bool      dbg = ((ALL_DEBUG_ON)||(false))&&(!ALL_DEBUG_OFF);
+
+       if (dbg) zip_debug_rtx(x);
+       switch(GET_CODE(x)) {
+               case REG:
+                       fprintf(file, "(%s)", reg_names[REGNO(x)]);
+                       break;
+               case SYMBOL_REF:
+                       fprintf(file, "%s", XSTR(x,0));
+                       break;
+               case LABEL_REF:
+                       x = LABEL_REF_LABEL(x);
+               case CODE_LABEL:
+                       { char buf[256];
+                       ASM_GENERATE_INTERNAL_LABEL(buf, "L", CODE_LABEL_NUMBER(x));
+#ifdef ASM_OUTPUT_LABEL_REF
+                       ASM_OUTPUT_LABEL_REF(file, buf);
+#else
+                       assemble_name(file, buf);
+#endif
+                       }
+                       break;
+               case PLUS:
+                       if (!REG_P(XEXP(x, 0))) {
+                               fprintf(stderr, "Unsupported address construct\n");
+                               zip_debug_rtx(x);
+                               abort();
+                       } if (CONST_INT_P(XEXP(x, 1))) {
+                               if (INTVAL(XEXP(x,1))!=0) {
+                                       fprintf(file, "%ld(%s)",
+                                       INTVAL(XEXP(x, 1)),
+                                       reg_names[REGNO(XEXP(x, 0))]);
+                               } else {
+                                       fprintf(file, "(%s)",
+                                       reg_names[REGNO(XEXP(x, 0))]);
+                               }
+                       } else if (GET_CODE(XEXP(x,1)) == SYMBOL_REF) {
+                               fprintf(file, "%s(%s)", XSTR(x,0),
+                                       reg_names[REGNO(XEXP(x, 0))]);
+                       } else if ((GET_CODE(XEXP(x, 1)) == MINUS)
+                               && (GET_CODE(XEXP(XEXP(x, 1), 0))==SYMBOL_REF)
+                               && (GET_CODE(XEXP(XEXP(x, 1), 1))==SYMBOL_REF)) {
+                               fprintf(file, "%s-%s(%s)",
+                                       XSTR(XEXP(XEXP(x, 1),0),0),
+                                       XSTR(XEXP(XEXP(x, 1),1),0),
+                                       reg_names[REGNO(XEXP(x, 0))]);
+                       } else
+                               fprintf(file, "#INVALID(%s)",
+                                       reg_names[REGNO(XEXP(x, 0))]);
+                       /*
+                       else if (GET_CODE(XEXP(addr, 1)) == LABEL)
+                               fprintf(file, "%s(%s)",
+                                       GET_CODE(XEXP(addr, 1)),
+                                       reg_names[REGNO(GET_CODE(XEXP(addr, 0)))]);
+                       else if ((GET_CODE(XEXP(addr, 1)) == MINUS)
+                               && (GET_CODE(XEXP(GET_CODE(XEXP(addr, 1)), 0))==LABEL)
+                               && (GET_CODE(XEXP(GET_CODE(XEXP(addr, 1)), 1))==LABEL)) {
+                               fprintf(file, "%s-%s(%s)",
+                                       reg_names[REGNO(GET_CODE(XEXP(addr, 0)))]);
+                                       reg_names[REGNO(GET_CODE(XEXP(addr, 0)))]);
+                                       reg_names[REGNO(GET_CODE(XEXP(addr, 0)))]);
+                       }
+                       */
+                       break;
+               // We don't support direct memory addressing within our
+               // instruction set, even though the instructions themselves
+               // would support direct memory addressing of the lower 18 bits
+               // of memory space.
+               case MEM:
+                       if (dbg) zip_debug_rtx(x);
+                       zip_print_operand_address(file, XEXP(x, 0));
+                       break;
+               case CONST_INT:
+                       fprintf(file, "%ld",INTVAL(x));
+                       break;
+               default:
+                       fprintf(stderr, "Unknown address format\n");
+                       zip_debug_rtx(x);
+                       abort(); break;
+                       // output_addr_const(file, x);
+               break;
+       }
+}
+
+/* The PRINT_OPERAND worker. */
+
+void
+zip_print_operand(FILE *file, rtx x, int code)
+{
+       rtx operand = x;
+       int     rgoff = 0;
+
+       // fprintf(file, "Print Operand!\n");
+
+       /* New code entries should just be added to the switch below.  If
+        * handling is finished, just return.  If handling was just a
+        * modification of the operand, the modified operand should be put in
+        * "operand", and then do a break to let default handling
+        * (zero-modifier) output the operand.
+        */
+       switch(code) {
+               case 0:
+                       /* No code, print as usual. */
+                       break;
+               case 'L':
+                       /* Lower of two registers, print one up */
+                       rgoff = 1;
+                       break;
+               case 'R':
+               case 'H':
+                       /* Higher of a register pair, print normal */
+                       break;
+
+               default:
+                       LOSE_AND_RETURN("invalid operand modifier letter", x);
+       }
+
+       /* Print an operand as without a modifier letter. */
+       switch (GET_CODE(operand)) {
+       case REG:
+               if (REGNO(operand)+rgoff >= FIRST_PSEUDO_REGISTER)
+                       internal_error("internal error: bad register: %d", REGNO(operand));
+               fprintf(file, "%s", reg_names[REGNO(operand)+rgoff]);
+               return;
+       case SCRATCH:
+               LOSE_AND_RETURN("Need a scratch register", x);
+               return;
+
+       case CODE_LABEL:
+       case LABEL_REF:
+       case SYMBOL_REF:
+       case PLUS:
+               PRINT_OPERAND_ADDRESS(file, operand);
+               return;
+       case MEM:
+               PRINT_OPERAND_ADDRESS(file, XEXP(operand, 0));
+               return;
+
+       default:
+               /* No need to handle all strange variants, let
+                * output_addr_const do it for us.
+                */
+               if (CONSTANT_P(operand)) {
+                       output_addr_const(file, operand);
+                       return;
+               }
+
+               LOSE_AND_RETURN("unexpected operand", x);
+       }
+}
+
+static bool
+zip_frame_pointer_required(void)
+{
+       // This should really depend upon whether we have variable sized
+       // arguments in our frame or not.  Once this fails, let's look
+       // at what the problem was and then whether or not we can detect
+       // it.
+       //
+       // Use a GCC global to determine our answer
+       if (cfun->calls_alloca)
+               return true;
+       return (frame_pointer_needed);
+/*
+       fprintf(stderr, "ZIP_FRAME_POINTER_REQUIRED()\n");
+       if (frame_pointer_needed) {
+               fprintf(stderr, "FRAME_POINTER_NEEDED is true\n");
+               zip_debug_rtx(frame_pointer_rtx);
+               if (frame_pointer_rtx == NULL_RTX)
+                       return true;
+               if (GET_CODE(frame_pointer_rtx)==PLUS) {
+                       if ((REG_P(XEXP(frame_pointer_rtx,0)))
+                               &&(REGNO(XEXP(frame_pointer_rtx, 0))==zip_SP)
+                               &&(CONST_INT_P(XEXP(frame_pointer_rtx,1))))
+                               return false;
+                       if ((REG_P(XEXP(frame_pointer_rtx,1)))
+                               &&(REGNO(XEXP(frame_pointer_rtx, 1))==zip_SP)
+                               &&(CONST_INT_P(XEXP(frame_pointer_rtx,0))))
+                               return false;
+                       return true;
+               } else if ((REG_P(frame_pointer_rtx))
+                               &&(REGNO(frame_pointer_rtx) == zip_SP))
+                       return false;
+               return true;
+       } else return false;
+*/
+}
+
+/* Determine whether or not a register needs to be saved on the stack or not.
+ */
+static bool
+zip_save_reg(int regno) {
+       if (regno == 0)
+               return ((!crtl->is_leaf)
+                       ||((df_regs_ever_live_p(0))&&(!call_used_regs[0])));
+       else if ((regno == zip_GOT)&&(!ZIP_PIC))
+               return  ((df_regs_ever_live_p(regno))
+                               &&(!call_used_regs[regno]));
+       else if (regno == zip_FP)
+               return((zip_frame_pointer_required())||((df_regs_ever_live_p(regno))
+                               &&(!call_used_regs[regno])));
+       else if (regno < zip_FP)
+               return  ((df_regs_ever_live_p(regno))
+                               &&(!call_used_regs[regno]));
+       return false;
+}
+
+/* Compute the size of the local area and the size to be adjusted by the
+ * prologue and epilogue.
+ *
+ * Here's what we are looking at (top is the current, bottom is the last ...)
+ *
+ *     Stack Pointer ->
+ *                     Local variables (could be variable size)
+ *     Frame Pointer ->        (= Stack Pointer + sp_fp_offset)
+ *                     Saved return address, if saved
+ *                     Other Saved registers
+ *                     Saved frame pointer (if used)
+ *                     Saved R12, if used
+ *                     (Stack pointer is not saved)
+ *     Original stack pointer ->       (= Stack_Pointer +size_for_adjusting_sp)
+ *                     Called arguments (not passed in registers)
+ *                     Return arguments (not R1, args.pretend_args_size)
+ *             (Prior function's stack frame ... )
+ *
+ */
+static void
+zip_compute_frame(void) {
+       int     regno;
+       int     args_size;
+
+       // gcc_assert(crtl);
+       gcc_assert(cfun);
+       gcc_assert(cfun->machine);
+
+       args_size=(ACCUMULATE_OUTGOING_ARGS ? crtl->outgoing_args_size : 0);
+
+       if(crtl->args.pretend_args_size > 0) {
+               args_size += crtl->args.pretend_args_size;
+               // printf("%s pretend_args_size : %d\n", current_function_name(),
+                       // crtl->args.pretend_args_size);
+               cfun->machine->pretend_size = crtl->args.pretend_args_size;
+       }
+
+       cfun->machine->local_vars_size = get_frame_size();
+
+       // Save callee-saved registers.
+       cfun->machine->saved_reg_size = 0;
+       for(regno=0; regno < FIRST_PSEUDO_REGISTER; regno++) {
+               if (zip_save_reg(regno))
+                       cfun->machine->saved_reg_size ++;
+       }
+
+       cfun->machine->fp_needed = (zip_frame_pointer_required());
+
+       if ((cfun->machine->fp_needed)&&
+                       (!df_regs_ever_live_p(zip_FP))) {
+               cfun->machine->saved_reg_size ++;
+       }
+
+       cfun->machine->sp_fp_offset = args_size + cfun->machine->local_vars_size;
+       cfun->machine->size_for_adjusting_sp = cfun->machine->local_vars_size
+                       + cfun->machine->saved_reg_size
+                       + args_size;
+
+       /*
+       if (cfun->machine->fp_needed)
+               frame_pointer_rtx = gen_rtx_REG(Pmode, zip_FP);
+       else
+               frame_pointer_rtx = plus_constant(Pmode, gen_rtx_REG(Pmode, zip_SP),
+                       cfun->machine->sp_fp_offset);
+       */
+}
+
+void
+zip_expand_prologue(void) {
+       rtx     insn;
+
+       const bool      dbg = ((ALL_DEBUG_ON)||(false))&&(!ALL_DEBUG_OFF);
+       zip_compute_frame();
+
+       if (dbg)  fprintf(stderr, "Computing Prologue instructions\n");
+       if (cfun->machine->size_for_adjusting_sp != 0) {
+               insn = emit_insn(gen_subsi3(stack_pointer_rtx,
+                               stack_pointer_rtx,
+                       gen_int_mode(cfun->machine->size_for_adjusting_sp,
+                               SImode)));
+                       // cfun->machine->sp_fp_offset
+
+               RTX_FRAME_RELATED_P(insn) = 1;
+       }
+
+       {
+               int offset = 0, regno;
+               for(regno=0; regno < FIRST_PSEUDO_REGISTER; regno++) {
+                       if (zip_save_reg(regno)) {
+                               insn=emit_insn(gen_movsi_sto(
+                                       gen_rtx_MEM(SImode, plus_constant(
+                                               Pmode, stack_pointer_rtx,
+                                               cfun->machine->sp_fp_offset
+                                               +offset++, true)),
+                                       gen_rtx_REG(SImode, regno)));
+                               RTX_FRAME_RELATED_P(insn) = 1;
+                       }
+               }
+               if (dbg)  fprintf(stderr, "%d registers saved%s\n", offset,
+                       (crtl->saves_all_registers)?", should be all of them":", less than all");
+       }
+
+       if (cfun->machine->fp_needed) {
+               if (dbg) zip_debug_rtx(stack_pointer_rtx);
+               if (dbg) zip_debug_rtx(frame_pointer_rtx);
+               insn = emit_insn(gen_movsi_reg_off(frame_pointer_rtx,
+                               stack_pointer_rtx, gen_int_mode(
+                                               cfun->machine->sp_fp_offset,
+                                               SImode)));
+               RTX_FRAME_RELATED_P(insn) = 1;
+               if (dbg)  fprintf(stderr, "sp_fp_offset is %d\n", cfun->machine->sp_fp_offset);
+       }
+}
+
+bool
+zip_use_return_insn(void)
+{
+       if ((!reload_completed)||(cfun->machine->fp_needed)
+                       ||(get_frame_size()!=0)) {
+               // If R0 ever gets pushed to the stack, then we cannot
+               // use a master return from anywhere.  We need to clean up the
+               // stack first.
+               if ((!crtl->is_leaf)||((df_regs_ever_live_p(0))
+                                               &&(!call_used_regs[0]))) {
+                       return false;
+               }
+       }
+       zip_compute_frame();
+       return (cfun->machine->size_for_adjusting_sp == 0);
+}
+
+/* As per the notes in M68k.c, quote the function epilogue should not depend
+ * upon the current stack pointer.  It should use the frame poitner only,
+ * if there is a frame pointer.  This is mandatory because of alloca; we also
+ * take advantage of it to omit stack adjustments before returning ...
+ *
+ * Let's see if we can use their approach here.
+ *
+ * We can't.  Consider our choices:
+ *     LOD (FP),R0
+ *     LOD 1(FP),R4
+ *     LOD 2(FP),R5
+ *     LOD 3(FP),R6
+ *     LOD 4(FP),FP
+ *     ... Then what is the stack pointer?
+ * or
+ *     LOD (FP),R0
+ *     LOD 1(FP),R4
+ *     LOD 2(FP),R5
+ *     LOD 3(FP),R6
+ *     MOV FP,SP
+ *     LOD 4(SP),FP
+ *     ... Which suffers unnecessary pipeline stalls, and certainly doesn't
+ *     exploit our pipeline memory function
+ * or
+ *     MOV FP,SP
+ *     LOD (SP),R0
+ *     LOD 1(SP),R4
+ *     LOD 2(SP),R5
+ *     LOD 3(SP),R6
+ *     LOD 4(SP),FP
+ * Which will be our choice.  Note that we do use the stack pointer, eventually.
+ *
+ */
+void
+zip_expand_epilogue(void) {
+       int     regno, offset;
+       const bool      dbg = ((ALL_DEBUG_ON)||(false))&&(!ALL_DEBUG_OFF);
+
+       zip_compute_frame();
+
+       if (dbg) fprintf(stderr, "EPILOG::\n");
+       if (cfun->machine->fp_needed) {
+               if (dbg) fprintf(stderr, "EPILOG::Moving frame pointer to stack register\n");
+               emit_insn(gen_movsi_reg(stack_pointer_rtx, frame_pointer_rtx));
+       }
+
+       if (cfun->machine->saved_reg_size != 0) {
+               offset =  (cfun->machine->size_for_adjusting_sp -
+                               cfun->machine->sp_fp_offset
+                       - cfun->machine->saved_reg_size);
+               if (dbg) fprintf(stderr, "EPILOG::Saved_REG_Size = %d\n", cfun->machine->saved_reg_size);
+               for(regno=0; regno < FIRST_PSEUDO_REGISTER; regno++) {
+                       if (zip_save_reg(regno)) {
+                               if (dbg) fprintf(stderr, "EPILOG::RESTORING R%d\n", regno);
+                               emit_insn(gen_movsi_lod(
+                                               gen_rtx_REG(SImode, regno),
+                                       gen_rtx_MEM(SImode, plus_constant( SImode,
+                                               stack_pointer_rtx, offset++, true))));
+                       }
+               }
+       }
+
+       if (cfun->machine->size_for_adjusting_sp != 0) {
+               if (dbg) fprintf(stderr, "EPILOG::ADDSI3(StackPtr, %d)\n",
+                               cfun->machine->size_for_adjusting_sp);
+               emit_insn(gen_addsi3(stack_pointer_rtx, stack_pointer_rtx,
+                       gen_int_mode(
+                               cfun->machine->size_for_adjusting_sp
+                               -cfun->machine->sp_fp_offset, SImode)));
+       }
+       if (dbg) fprintf(stderr, "EPILOG::EMITTING-RETURN\n");
+
+       emit_jump_insn(ret_rtx);
+}
+
+/* Implement RETURN_ADDR_RTX(COUNT, FRAMEADDR).
+ *
+ * We currently only support calculating the return address for the current
+ * frame.
+ */
+
+/*
+rtx
+zip_return_addr_rtx(int count, rtx frame ATTRIBUTE_UNUSED)
+{
+       if (count)
+               return NULL_RTX;
+
+       zip_compute_frame();
+
+       // saved return address for current function is at fp - 1
+       if (cfun->machine->save_ret)
+               return gen_rtx_MEM(Pmode, plus_constant(frame_pointer_rtx,
+                               -UNITS_PER_WORD));
+       return get_hard_reg_initial_val(Pmode, RETURN_ADDRESS_REGNUM);
+}
+*/
+
+/* Implements the macro INITIAL_ELIMINATION_OFFSET,
+ * return the OFFSET.
+ */
+int
+zip_initial_elimination_offset(int from, int to) {
+       int     ret = 0;
+       zip_compute_frame();
+
+       if (((from) == FRAME_POINTER_REGNUM)&&((to) == STACK_POINTER_REGNUM)) {
+               ret = cfun->machine->sp_fp_offset;
+       } else if (((from)=ARG_POINTER_REGNUM)&&((to)==STACK_POINTER_REGNUM)) {
+               ret = cfun->machine->sp_fp_offset;
+       } else if (((from)=ARG_POINTER_REGNUM)&&((to)==FRAME_POINTER_REGNUM)) {
+               // ret = cfun->machine->local_vars_size;
+               ret = 0;
+       } else {
+               abort();
+       }
+
+       return ret;
+}
+
+/* Return non-zero if the function argument described by TYPE is to be passed
+ * by reference.
+ */
+/*
+static bool
+zip_pass_by_reference(CUMULATIVE_ARGS *cum ATTRIBUTE_UNUSED,
+               enum machine_mode mode, const_tree type,
+               bool name ATTRIBUTE_UNUSED) {
+       unsigned        HOST_WIDE_INT   size;
+
+       if (type) {
+               if (AGGREGATE_TYPE_P(type)) {
+                       return TRUE;
+               } size = int_size_in_bytes(type);
+       } else
+               size = GET_MODE_SIZE(mode);
+
+       return (size > GET_MODE_SIZE(SImode)); // > 1 word : is this okay?
+       // The idea is to pass everything larger than an int by reference (or
+       // on the stack)
+}
+*/
+
+/*
+ * Code taken from m68k ...
+ */
+static bool
+zip_can_eliminate(int from, int to)
+{
+       // fprintf(stderr, "CAN_ELIMINATE::QUERYING(%d,%d)\n", from, to);
+       if ((from == zip_FP)&&(to == zip_SP))
+               return !cfun->machine->fp_needed;
+       return true;
+}
+
+/*
+static bool
+zip_must_pass_in_stack(enum machine_mode mode, const_tree type)
+{
+       if (mode == BLKmode) {
+               return true;
+       } if (type == NULL) {
+               return false;
+       } return AGGREGATE_TYPE_P(type);
+}
+*/
+
+/*
+static void
+zip_basic_check(void)
+{
+       gcc_assert(mode_base_align[SImode]==4);
+       if ((BITS_PER_UNIT != 32)
+                       ||(GET_MODE_SIZE(SImode)!=1)
+                       ||(GET_MODE_SIZE(DImode)!=1)
+                       ||(HARD_REGNO_NREGS(0,SImode)!=1)) {
+               printf("SIZEOF(SIMode) == %d\n", GET_MODE_SIZE(SImode));
+               printf("BITS_PER_UNIT  == %d\n", BITS_PER_UNIT);
+               gcc_assert(BITS_PER_UNIT==32);
+               gcc_assert(GET_MODE_SIZE(SImode)==1);
+               gcc_assert(HARD_REGNO_NREGS(0,SImode)==1);
+       }
+}
+*/
+
+#define        zip_basic_check()
+
+/* Compute the number of word sized regiters needed to hold a function
+ * argument of mode INT_MODE and tree type TYPE.
+ */
+int
+zip_num_arg_regs(enum machine_mode mode, const_tree type) {
+       int     size;
+
+       zip_basic_check();
+
+       if (targetm.calls.must_pass_in_stack(mode, type))
+               return 0;
+
+       if ((type)&&(mode == BLKmode))
+               size = int_size_in_bytes(type);
+       else
+               size = GET_MODE_SIZE(mode);
+
+       return (size + UNITS_PER_WORD - 1)/UNITS_PER_WORD;
+}
+
+/* pushed in function prologue */
+/*
+static void
+zip_setup_incoming_varargs(CUMULATIVE_ARGS *cum, enum machine_mode mode,
+               tree type, int *pretend_size, int no_rtl) {
+       if (no_rtl)
+               return;
+
+       gcc_assert(mode != BLKmode);
+
+       if (*cum < (ZIP_LAST_ARG_REGNO+1)) {
+               int size = ZIP_FIRST_ARG_REGNO + ZIP_NUM_ARGS_REGS - *cum;
+               rtx     regblock;
+               int     offset = (*cum - ZIP_FIRST_ARG_REGNO) * UNITS_PER_WORD;
+               regblock = gen_rtx_MEM(BLKmode,
+                       plus_constant(arg_pointer_rtx, offset));
+               move_block_from_reg(*cum, regblock, size);
+               *pretend_size = size * UNITS_PER_WORD;
+       }
+
+       if (targetm.calls.strict_argument_naming(cum))
+               *cum = *cum + zip_num_arg_regs(mode, type);
+}
+*/
+
+/*
+static int
+zip_arg_partial_bytes(CUMULATIVE_ARGS *cum, enum machine_mode mode,
+               tree type, bool name ATTRIBUTE_UNUSED) {
+       int     words;
+       unsigned int    regs = zip_num_arg_regs(mode, type);
+
+       if (*cum >= ZIP_LAST_ARG_REGNO + 1)
+               words = 0;
+       else if ((*cum + regs) > ZIP_LAST_ARG_REGNO + 1)
+               words = (*cum + regs) - ZIP_LAST_ARG_REGNO + 1;
+       else
+               words = 0;
+
+       return words * UNITS_PER_WORD;
+}
+*/
+
+static void
+zip_function_arg_advance(cumulative_args_t ca, machine_mode mode,
+               const_tree type, bool named ATTRIBUTE_UNUSED) {
+       CUMULATIVE_ARGS *cum;
+       int     nreg;
+
+       zip_basic_check();
+
+       cum = get_cumulative_args(ca);
+       nreg = zip_num_arg_regs(mode, type);
+       if (((*cum)+nreg) > NUM_ARG_REGS)
+               (*cum) = NUM_ARG_REGS;
+       else
+               (*cum) += nreg;
+}
+
+static rtx
+zip_function_arg(cumulative_args_t ca, machine_mode mode,
+               const_tree type ATTRIBUTE_UNUSED, bool named) {
+       CUMULATIVE_ARGS *cum;
+
+       zip_basic_check();
+
+
+       if (!named)
+               return NULL_RTX;
+       //if (targetm.calls.must_pass_in_stack(mode, type))
+               //return NULL_RTX;
+       cum = get_cumulative_args(ca);
+
+       if ((*cum) >= NUM_ARG_REGS)
+               return NULL_RTX;
+       return
+               gen_rtx_REG(mode, (*cum)+1);
+}
+
+/* NOTICE_UPDATE_CC sends us here
+ */
+void
+zip_update_cc_notice(rtx exp, rtx_insn *insn)
+{
+       const bool      dbg = ((ALL_DEBUG_ON)||(false))&&(!ALL_DEBUG_OFF);
+       enum    attr_ccresult  ccr;
+       enum    attr_conditional  conditionally_executed;
+
+       // The default is that nothing has changed.
+       // cc_status = cc_status_prev;
+       rtx     src, dest;
+
+       if (dbg) fprintf(stderr, "CC-NOTICE ...\n");
+       if (dbg) zip_debug_rtx_pfx("CC :", exp);
+       if (dbg) debug_rtx(exp);
+
+       ccr = get_attr_ccresult(insn);
+       if (ccr == CCRESULT_UNKNOWN) {
+               CC_STATUS_INIT;
+               if (dbg) fprintf(stderr, "\tINIT-CC\n");
+               return;
+       }
+
+       if ((GET_CODE(exp) == PARALLEL)&&(GET_CODE(XVECEXP(exp, 0, 0))==SET)) {
+               // This works up and until we add cc0 parallel instructions
+               // to our instruction set.
+               dest = SET_DEST(XVECEXP(exp, 0, 0));
+               src  = SET_SRC (XVECEXP(exp, 0, 0));
+       } else if (GET_CODE(exp) == SET) {
+               dest = SET_DEST(exp);
+               src  = SET_SRC (exp);
+       } else {
+               // First, do nothing if we haven't touched the condition codes.
+               // Condition codes can only be changed as a result of a set
+               // expression ...?
+               if (dbg) fprintf(stderr, "Non-set expression, doesn\'t touch condition codes\n");
+               return;
+       }
+
+
+       if (ccr == CCRESULT_UNCHANGED) {
+               if (dbg) fprintf(stderr, "\tUnchanged CC\n");
+
+               // We can't just run away here ... even though the CC result
+               // hasn't changed, GCC's ability to recognize it as a valid
+               // result has changed.  In other words, if we just 'set' a
+               // value contained within either value1 or value2, then we'll
+               // need to update those values so that they are no longer looked
+               // upon as potentially containing the current CC values.
+
+               if (dest) {
+                       if (dest == cc0_rtx)
+                               CC_STATUS_INIT;
+                       else if ((REG_P(dest))&&(dest != pc_rtx)) {
+                               // An example here might be a load instruction
+                               if (reg_mentioned_p(dest, cc_status.value1))
+                                       cc_status.value1 = NULL_RTX;
+                               if (reg_mentioned_p(dest, cc_status.value2))
+                                       cc_status.value2 = NULL_RTX;
+                       }
+               }
+               return;
+       }
+
+       // Gotta wait on this test, until we know whether or not the
+       // conditionally executed instruction was designed to set the
+       // CC0 register.
+       conditionally_executed = get_attr_conditional(insn);
+       if ((conditionally_executed == CONDITIONAL_YES)&&(dest != cc0_rtx)) {
+               // cc_status is unchanged
+               // However, GCC's vision of it may have changed
+               //
+               // Initialize CC_STATUS
+               if (dbg) fprintf(stderr, "\tCC -- unchanged (conditional exec)\n");
+               CC_STATUS_INIT;
+               return;
+       } else if (GET_CODE(src)==IF_THEN_ELSE) {
+               // Same thing as above
+               CC_STATUS_INIT;
+               return;
+       }
+
+       if (ccr == CCRESULT_VALIDZN)
+               cc_status.flags = CC_NO_OVERFLOW;
+       else
+               cc_status.flags = 0;
+       cc_status.value1 = dest;
+       if (dest == cc0_rtx)
+               cc_status.value2 = src;
+       else if((REG_P(dest))&&(!reg_mentioned_p(dest, src)))
+               cc_status.value2 = src;
+       else if((SUBREG_P(dest))&&(!reg_mentioned_p(XEXP(dest,0), src)))
+               cc_status.value2 = src;
+       else
+               cc_status.value2 = 0;
+       if (dbg) fprintf(stderr, "\tCC -- Set flags for\n");
+       if (dbg) zip_debug_rtx_pfx("V1: ", dest);
+       if ((dbg)&&(cc_status.value2)) zip_debug_rtx_pfx("V2: ", src);
+       else if (dbg)   fprintf(stderr, "V2: (No SRC)\n");
+       if ((dbg)&&(REG_P(dest))) fprintf(stderr, "src refers to dest ?? %s\n",
+               refers_to_regno_p(REGNO(dest),REGNO(dest),src,NULL)?"Yes":"No");
+       if ((dbg)&&(REG_P(dest))) fprintf(stderr, "Occurrs %d times\n",
+               count_occurrences(dest,src,0));
+       if ((dbg)&&(REG_P(dest))) fprintf(stderr, "%s mentioned\n",
+               reg_mentioned_p(dest,src)?"Is":"Is not");
+       if ((dbg)&&(REG_P(dest))) fprintf(stderr, "%s referenced\n",
+               reg_referenced_p(dest,src)?"Is":"Is not");
+
+//
+// These results are only used in final.c, where they are used to remove
+// compare instructions if the optimizer is on.  If I produce nothing, no
+// compare instructions will be removed.  If I produce something, a smart
+// decision may be made to remove compare instructions.
+//
+// cc_status will be compared  with subsequent
+//     (set (cc0) (something)) (i.e. compare only) instructions
+//
+//     (set (cc0) (compare (x) (y)))
+//     dst = cc0 -- the destination of the set is ignored, save that it must be
+//             cc0
+//     src1 = (compare (x) (y))
+//     if (src1 == compare)&&(y == (const_int 0))
+//             src2 = (x)
+//     else
+//             src2 = null
+//
+//     Four conditions:
+//     1. if (val1)&&(src1 == val1)
+//             This would be true if I had seen a (set (val1) (src1)) insn
+//             If I have seen a (set (val1) (src1))
+//                     or equivalently a (set (val1) (compare (x) (y)))
+//     or
+//     2. if (val2)&&(src1 == val2)
+//             This would be true if I had seen a (set (val1) (src1)) insn,
+//             and only if val2 was still valid.
+//     or
+//     3. if (src2)&&(value1)&&(src2 == value1)
+//             This would be true if we are comparing against zero, and the
+//             number we are comparing against zero is value 1
+//     or
+//     4. if (src2)&&(value2)&&(src2 == value2)
+//             ... or value2.  This is the common ZipCPU case.
+//
+//             then delete the compare.
+//
+}
+
+
+/* totally buggy - we can't return pointers to nested functions */
+static void
+zip_asm_trampoline_template(FILE *f) {
+       // Whereas at one time I thought I wouldn't need it, now I know I
+       // need this trampoline function, although it is for a completely
+       // different purpose than the one I was familiar with.
+       fprintf(f, "\tldihi 0,r1\n");
+       fprintf(f, "\tldilo 0,r1\n");
+       fprintf(f, "\tjmp r1\n");
+}
+
+/* Worker function for TARGET_TRAMPOLINE_INIT. */
+static void
+zip_trampoline_init(rtx m_tramp ATTRIBUTE_UNUSED,
+       tree fndecl ATTRIBUTE_UNUSED,
+       rtx chain_value ATTRIBUTE_UNUSED) {
+// #warning "This needs to be filled out"
+       abort();
+}
+
+static tree
+def_builtin(const char *name, enum insn_code icode, enum ZIP_BUILTIN_ID_CODE code,
+       tree type)
+{
+       tree t = add_builtin_function(name,type,code,BUILT_IN_MD, NULL, NULL_TREE);
+       zip_basic_check();
+
+       if(t) {
+               zip_builtins[code] = t;
+               zip_builtins_icode[code] = icode;
+       }
+
+       return t;
+
+}
+
+void   zip_init_builtins(void) {
+       zip_basic_check();
+
+  tree void_ftype_void = build_function_type_list(void_type_node, NULL_TREE);
+#ifdef HAVE_zip_rtu
+  def_builtin("zip_rtu", CODE_FOR_zip_rtu, ZIP_BUILTIN_RTU, void_ftype_void);
+#endif
+#ifdef HAVE_zip_halt
+  def_builtin("zip_halt",  CODE_FOR_zip_halt,  ZIP_BUILTIN_HALT, void_ftype_void);
+#endif
+#ifdef HAVE_zip_idle
+  def_builtin("zip_idle", CODE_FOR_zip_idle, ZIP_BUILTIN_IDLE, void_ftype_void);
+#endif
+
+#ifdef HAVE_zip_syscall
+// Support int SYSCALL(callID, int a, int b, int c);
+  def_builtin("zip_syscall", CODE_FOR_zip_syscall, ZIP_BUILTIN_SYSCALL,
+                       build_function_type_list(void_type_node, NULL_TREE));
+#endif
+
+#ifdef HAVE_zip_save_context
+  def_builtin("zip_save_context", CODE_FOR_zip_save_context, ZIP_BUILTIN_SAVE_CONTEXT,
+               build_function_type_list(void_type_node, ptr_type_node, 0));
+#endif
+
+#ifdef HAVE_zip_restore_context
+  def_builtin("zip_restore_context", CODE_FOR_zip_restore_context, ZIP_BUILTIN_RESTORE_CONTEXT,
+       build_function_type_list(void_type_node, ptr_type_node, 0));
+#endif
+
+#ifdef HAVE_zip_bitrev
+  def_builtin("zip_bitrev", CODE_FOR_zip_bitrev, ZIP_BUILTIN_BITREV,
+       build_function_type_list(unsigned_type_node, unsigned_type_node,
+               NULL_TREE));
+#endif
+
+#ifdef HAVE_zip_cc
+  def_builtin("zip_cc", CODE_FOR_zip_cc, ZIP_BUILTIN_CC,
+       build_function_type_list(unsigned_type_node, NULL_TREE));
+#endif
+
+#ifdef HAVE_zip_ucc
+  def_builtin("zip_ucc", CODE_FOR_zip_ucc, ZIP_BUILTIN_UCC,
+       build_function_type_list(unsigned_type_node, NULL_TREE));
+#endif
+
+}
+
+static tree
+zip_builtin_decl(unsigned zip_builtin_code, bool initialize_p ATTRIBUTE_UNUSED)
+{
+  if (zip_builtin_code >= ZIP_BUILTIN_MAX)
+    return error_mark_node;
+
+  return zip_builtins[zip_builtin_code];
+}
+
+static rtx
+zip_expand_builtin(tree exp, rtx target,
+               rtx subtarget ATTRIBUTE_UNUSED,
+               machine_mode tmode ATTRIBUTE_UNUSED,
+               int     ignore ATTRIBUTE_UNUSED) {
+
+       tree    fndecl = TREE_OPERAND(CALL_EXPR_FN(exp), 0);
+       bool    nonvoid = (TREE_TYPE(TREE_TYPE(fndecl)) != void_type_node);
+       enum    ZIP_BUILTIN_ID_CODE code=(enum ZIP_BUILTIN_ID_CODE)DECL_FUNCTION_CODE(fndecl);
+       enum    insn_code icode = zip_builtins_icode[code];
+       rtx     pat, op[5];
+       call_expr_arg_iterator  iter;
+       tree    arg;
+
+       if ((code == ZIP_BUILTIN_SAVE_CONTEXT)
+                       ||(code == ZIP_BUILTIN_RESTORE_CONTEXT)) {
+               arg = first_call_expr_arg(exp, &iter);
+               if (arg == error_mark_node)
+                       return NULL_RTX;
+               op[0] = expand_normal(arg);
+               if (GET_CODE(op[0]) != REG)
+                       op[0] = force_reg(Pmode, op[0]);
+               pat = GEN_FCN(icode)(op[0]);
+       } else if (code == ZIP_BUILTIN_BITREV) {
+               arg = first_call_expr_arg(exp, &iter);
+               if (arg == error_mark_node) {
+                       return NULL_RTX;
+               }
+               op[0] = expand_normal(arg);
+               if (!target)
+                       target = gen_reg_rtx(SImode);
+               pat = GEN_FCN(icode)(target, op[0]);
+       } else if ((code == ZIP_BUILTIN_CC)||(code == ZIP_BUILTIN_UCC)) {
+               if (!target)
+                       target = gen_reg_rtx(SImode);
+               pat = GEN_FCN(icode)(target);
+       } else // RTU, HALT, IDLE
+               pat = GEN_FCN(icode)();
+       if (!pat)
+               return NULL_RTX;
+       emit_insn(pat);
+       return (nonvoid ? target : const0_rtx);
+}
+
+static bool
+zip_scalar_mode_supported_p(enum machine_mode mode) {
+       zip_basic_check();
+
+       return ((mode)==SImode)||((mode)==DImode); // ||((mode)==SFmode);
+}
+
+static bool
+zip_libgcc_floating_mode_supported_p(enum machine_mode mode) {
+       return ((mode)==SFmode)||((mode)==DFmode);
+}
+
+static int
+zip_address_cost(rtx addr ATTRIBUTE_UNUSED,
+       enum machine_mode mode ATTRIBUTE_UNUSED,
+       addr_space_t as ATTRIBUTE_UNUSED, bool spd ATTRIBUTE_UNUSED) {
+       return 1;
+}
+
+static bool
+zip_mode_dependent_address_p(const_rtx addr ATTRIBUTE_UNUSED,
+       addr_space_t as ATTRIBUTE_UNUSED) {
+       return false;
+}
+
+/*
+static void
+zip_asm_output_anchor(rtx x) {
+       printf("ANCHOR: OP(%d)\n", GET_CODE(x));
+}
+*/
+
+static void
+zip_debug_print(const char *pfx, int lvl, const char *str) {
+       int     i;
+       i = lvl;
+       if ((true)||(lvl == 0))
+               fprintf(stderr, "%s", pfx);
+       else
+               i += strlen(pfx);
+       while(i-->0)
+               fprintf(stderr, "  ");
+       fprintf(stderr, "%s\n", str);
+}
+
+static void
+zip_debug_print_m(const char *pfx, int lvl, const char *str, enum machine_mode m) {
+       int     i;
+
+       i = lvl;
+       if ((true)||(lvl == 0))
+               fprintf(stderr, "%s", pfx);
+       else
+               i = lvl+strlen(pfx);
+       while(i-->0)
+               fprintf(stderr, "  ");
+       switch(m) {
+               case VOIDmode:
+                       fprintf(stderr, "%s:V\n", str);
+                       break;
+               case BLKmode:
+                       fprintf(stderr, "%s:BLK\n", str);
+                       break;
+               case BImode:
+                       fprintf(stderr, "%s:BI\n", str);
+                       break;
+#ifdef HAVE_QImode
+               case QImode:
+                       fprintf(stderr, "%s:QI\n", str);
+                       break;
+#endif
+#ifdef HAVE_HImode
+               case HImode:
+                       fprintf(stderr, "%s:HI\n", str);
+                       break;
+#endif
+               case SImode:
+                       fprintf(stderr, "%s:SI\n", str);
+                       break;
+               case DImode:
+                       fprintf(stderr, "%s:DI\n", str);
+                       break;
+               default:
+                       fprintf(stderr, "%s:?\n", str);
+       }
+}
+
+static void
+zip_debug_rtx_1(const char *pfx, const_rtx x, int lvl) {
+       if (x == NULL_RTX) {
+               zip_debug_print(pfx, lvl, "(NULL-RTX)");
+               return;
+       } else if (GET_CODE(x) > NUM_RTX_CODE) {
+               char    buf[64];
+               sprintf(buf, "(BAD-RTX-CODE %d)", GET_CODE(x));
+               zip_debug_print(pfx, lvl, buf);
+               gcc_assert(0 && "Bad RTX Code");
+               return;
+       } switch(GET_CODE(x)) { // rtl.def
+       case PARALLEL: zip_debug_print(pfx, lvl, "(PARALLEL");
+               debug_rtx(x); break;
+       case INT_LIST: zip_debug_print(pfx, lvl, "(INT-LIST"); break;
+       case SEQUENCE: zip_debug_print(pfx, lvl, "(SEQUENCE"); break;
+       case ADDRESS: zip_debug_print(pfx, lvl, "(ADDRESS"); break;
+       case DEBUG_INSN: zip_debug_print(pfx, lvl, "(DEBUG-INSN"); break;
+       case INSN:
+               zip_debug_print(pfx, lvl, "(INSN");
+               /*
+               { const rtx_insn *tmp_rtx;
+               for(tmp_rtx = as_a <const rtx_insn *>(x); tmp_rtx != 0; tmp_rtx = NEXT_INSN(tmp_rtx)) {
+                       zip_debug_rtx_1(tmp_rtx, lvl+1);
+               }}
+               */
+               zip_debug_rtx_1(pfx, PATTERN(x), lvl+1);
+               zip_debug_print(pfx, lvl, ")");
+               debug_rtx(x);
+               break;
+       case JUMP_INSN: zip_debug_print(pfx, lvl, "(JUMP-INSN");
+               zip_debug_rtx_1(pfx, PATTERN(x), lvl+1);
+               zip_debug_print(pfx, lvl, ")");
+               /*
+               if (JUMP_LABEL(x)) {
+                       if (GET_CODE(JUMP_LABEL(x)) == LABEL_REF) {
+                               char    buf[64];
+                               sprintf(buf, "(LABEL *.L%d))", CODE_LABEL_NUMBER(LABEL_REF_LABEL(JUMP_LABEL(x))));
+                               zip_debug_print(pfx, lvl+1, buf);
+                       } else if (GET_CODE(JUMP_LABEL(x))==CODE_LABEL) {
+                               char    buf[64];
+                               sprintf(buf, "(CODE_LABEL *.L%d))", CODE_LABEL_NUMBER(JUMP_LABEL(x)));
+                               zip_debug_print(pfx, lvl+1, buf);
+                       } else
+                       zip_debug_print(pfx, lvl+1, "(w/Label))");
+               } else
+                       zip_debug_print(pfx, lvl+1, "(NO label))");
+               debug_rtx(x);
+               */
+               break;
+       case CALL:
+               zip_debug_print(pfx, lvl, "(CALL (Adr) (Args)");
+               zip_debug_rtx_1(pfx, XEXP(x,0), lvl+1);
+               zip_debug_rtx_1(pfx, XEXP(x,1), lvl+1);
+               zip_debug_print(pfx, lvl, ")");
+               break;
+       case CALL_INSN: zip_debug_print(pfx, lvl, "(CALL-INSN");
+               debug_rtx(x);
+               break;
+       case BARRIER: zip_debug_print(pfx, lvl, "(BARRIER)"); break;
+       case RETURN: zip_debug_print(pfx, lvl, "(RETURN)"); break;
+       case NOTE:
+               {       char buf[128];
+                       sprintf(buf, "(NOTE %s)", GET_REG_NOTE_NAME(GET_MODE(x)));
+                       zip_debug_print(pfx, lvl, buf);
+               }break;
+       case COND_EXEC: zip_debug_print(pfx, lvl, "(COND_EXEC)");
+               debug_rtx(x);
+               break;
+       case ASM_INPUT: zip_debug_print(pfx, lvl, "(ASM INPUT)"); break;
+       case ASM_OPERANDS: zip_debug_print(pfx, lvl, "(ASM OPERANDS)"); break;
+       case UNSPEC: zip_debug_print(pfx, lvl, "(UNSPEC)"); break;
+       case UNSPEC_VOLATILE: zip_debug_print(pfx, lvl, "(UNSPEC_VOLATILE)"); break;
+       case CODE_LABEL:
+               {
+                       char    buf[64];
+                       sprintf(buf, "(CODE_LABEL *.L%d)", CODE_LABEL_NUMBER(x));
+                       zip_debug_print_m(pfx, lvl, buf, GET_MODE(x));
+               } break;
+       case SET:
+               zip_debug_print_m(pfx, lvl, "(SET", GET_MODE(x));
+               zip_debug_rtx_1(pfx, SET_DEST(x),lvl+1);
+               zip_debug_rtx_1(pfx, SET_SRC(x),lvl+1);
+               zip_debug_print(pfx, lvl, ")");
+               debug_rtx(x);
+               break;
+       case REG:
+               if (REGNO(x) == zip_PC)
+                       zip_debug_print(pfx, lvl, "(PC)");
+               else if (REGNO(x) == zip_CC)
+                       zip_debug_print(pfx, lvl, "(CC0)");
+               else if (REGNO(x) == zip_SP)
+                       zip_debug_print(pfx, lvl, "(SP)");
+               else if (REGNO(x) == zip_FP)
+                       zip_debug_print(pfx, lvl, "(REG FP)");
+               else if (REGNO(x) == zip_GOT)
+                       zip_debug_print(pfx, lvl, "(REG GBL)");
+               else if (FUNCTION_VALUE_REGNO_P(REGNO(x)))
+                       zip_debug_print(pfx, lvl, "(REG RTN-VL)");
+               else if (REGNO(x) == RETURN_ADDRESS_REGNUM)
+                       zip_debug_print(pfx, lvl, "(REG RTN-AD)");
+               else { char buf[25];
+               sprintf(buf, "(REG %d)", REGNO(x));
+               zip_debug_print_m(pfx, lvl, buf, GET_MODE(x));
+               } break;
+       case IF_THEN_ELSE: // 51
+               zip_debug_print(pfx, lvl, "(IF-THEN-ELSE");
+               zip_debug_rtx_1(pfx, XEXP(x,0),lvl+1);
+               zip_debug_rtx_1(pfx, XEXP(x,1),lvl+1);
+               zip_debug_rtx_1(pfx, XEXP(x,2),lvl+1);
+               zip_debug_print(pfx, lvl, ")");
+               break;
+       case PC:
+               zip_debug_print(pfx, lvl, "(PC)");
+               break;
+       case CC0:
+               zip_debug_print(pfx, lvl, "(CC0)");
+               break;
+       case COMPARE:
+               zip_debug_print(pfx, lvl, "(COMPARE");
+               zip_debug_rtx_1(pfx, XEXP(x,0),lvl+1);
+               zip_debug_rtx_1(pfx, XEXP(x,1),lvl+1);
+               zip_debug_print(pfx, lvl, ")");
+               break;
+       case CONST:
+               zip_debug_print_m(pfx, lvl, "(CONST", GET_MODE(x));
+               zip_debug_rtx_1(pfx, XEXP(x,0),lvl+1);
+               zip_debug_print(pfx, lvl, ")");
+               break;
+       case CONST_INT:
+               { char buf[25];
+               if (GET_MODE(x)==SImode)
+                       sprintf(buf, "(CONST_INT:SI %ld)", INTVAL(x));
+               else if (GET_MODE(x)==VOIDmode)
+                       sprintf(buf, "(CONST_INT:V %ld)", INTVAL(x));
+               else
+                       sprintf(buf, "(CONST_INT:? %ld)", INTVAL(x));
+               zip_debug_print(pfx, lvl, buf);
+               } break;
+       case LABEL_REF:
+               { char buf[256], *bp;
+               sprintf(buf, "(LABEL *.L%d)", CODE_LABEL_NUMBER(LABEL_REF_LABEL(x)));
+               zip_debug_print(pfx, lvl, buf);
+               }
+               break;
+       case SYMBOL_REF:
+               {
+                       char buf[64];
+                       sprintf(buf, "(SYMBOL: %s)", XSTR(x,0));
+                       // fprintf(file, "%s", XSTR(x,0));
+                       zip_debug_print(pfx, lvl, buf);
+               }
+               break;
+       case MEM:
+               zip_debug_print_m(pfx, lvl, "(MEM", GET_MODE(x));
+               zip_debug_rtx_1(pfx, XEXP(x,0),lvl+1);
+               zip_debug_print(pfx, lvl, ")");
+               break;
+       /*
+       case VALUE:
+               {
+                       char buf[64];
+                       sprintf(buf, "(VALUE: %d)", INTVAL(XEXP,0));
+                       zip_debug_print_m(pfx, lvl, "buf", GET_MODE(x));
+               }
+               break;
+       */
+       case PLUS:
+               zip_debug_print_m(pfx, lvl, "(PLUS", GET_MODE(x));
+               zip_debug_rtx_1(pfx, XEXP(x,0),lvl+1);
+               zip_debug_rtx_1(pfx, XEXP(x,1),lvl+1);
+               zip_debug_print(pfx, lvl, ")");
+               break;
+       case MINUS:
+               zip_debug_print_m(pfx, lvl, "(MINUS", GET_MODE(x));
+               zip_debug_rtx_1(pfx, XEXP(x,0),lvl+1);
+               zip_debug_rtx_1(pfx, XEXP(x,1),lvl+1);
+               zip_debug_print(pfx, lvl, ")");
+               break;
+       case AND:
+               zip_debug_print_m(pfx, lvl, "(AND", GET_MODE(x));
+               zip_debug_rtx_1(pfx, XEXP(x,0),lvl+1);
+               zip_debug_rtx_1(pfx, XEXP(x,1),lvl+1);
+               zip_debug_print(pfx, lvl, ")");
+               break;
+       case IOR:
+               zip_debug_print_m(pfx, lvl, "(OR", GET_MODE(x));
+               zip_debug_rtx_1(pfx, XEXP(x,0),lvl+1);
+               zip_debug_rtx_1(pfx, XEXP(x,1),lvl+1);
+               zip_debug_print(pfx, lvl, ")");
+               break;
+       case XOR:
+               zip_debug_print_m(pfx, lvl, "(XOR", GET_MODE(x));
+               zip_debug_rtx_1(pfx, XEXP(x,0),lvl+1);
+               zip_debug_rtx_1(pfx, XEXP(x,1),lvl+1);
+               zip_debug_print(pfx, lvl, ")");
+               break;
+       case MULT:
+               zip_debug_print_m(pfx, lvl, "(MULT", GET_MODE(x));
+               zip_debug_rtx_1(pfx, XEXP(x,0),lvl+1);
+               zip_debug_rtx_1(pfx, XEXP(x,1),lvl+1);
+               zip_debug_print(pfx, lvl, ")");
+               break;
+       case EQ:        //
+               zip_debug_print_m(pfx, lvl, "(EQ", GET_MODE(x));
+               zip_debug_rtx_1(pfx, XEXP(x,0),lvl+1);
+               zip_debug_rtx_1(pfx, XEXP(x,1),lvl+1);
+               zip_debug_print(pfx, lvl, ")");
+               break;
+       case NE:        //
+               zip_debug_print_m(pfx, lvl, "(NE", GET_MODE(x));
+               zip_debug_rtx_1(pfx, XEXP(x,0),lvl+1);
+               zip_debug_rtx_1(pfx, XEXP(x,1),lvl+1);
+               zip_debug_print(pfx, lvl, ")");
+               break;
+       case GE:        //
+               zip_debug_print_m(pfx, lvl, "(GE", GET_MODE(x));
+               zip_debug_rtx_1(pfx, XEXP(x,0),lvl+1);
+               zip_debug_rtx_1(pfx, XEXP(x,1),lvl+1);
+               zip_debug_print(pfx, lvl, ")");
+               break;
+       case GT:        //
+               zip_debug_print_m(pfx, lvl, "(GT", GET_MODE(x));
+               zip_debug_rtx_1(pfx, XEXP(x,0),lvl+1);
+               zip_debug_rtx_1(pfx, XEXP(x,1),lvl+1);
+               zip_debug_print(pfx, lvl, ")");
+               break;
+       case LE:        //
+               zip_debug_print_m(pfx, lvl, "(LE", GET_MODE(x));
+               zip_debug_rtx_1(pfx, XEXP(x,0),lvl+1);
+               zip_debug_rtx_1(pfx, XEXP(x,1),lvl+1);
+               zip_debug_print(pfx, lvl, ")");
+               break;
+       case LT:        //
+               zip_debug_print_m(pfx, lvl, "(LT", GET_MODE(x));
+               zip_debug_rtx_1(pfx, XEXP(x,0),lvl+1);
+               zip_debug_rtx_1(pfx, XEXP(x,1),lvl+1);
+               zip_debug_print(pfx, lvl, ")");
+               break;
+       case GEU:       //
+               zip_debug_print_m(pfx, lvl, "(GEU", GET_MODE(x));
+               zip_debug_rtx_1(pfx, XEXP(x,0),lvl+1);
+               zip_debug_rtx_1(pfx, XEXP(x,1),lvl+1);
+               zip_debug_print(pfx, lvl, ")");
+               break;
+       case GTU:       //
+               zip_debug_print_m(pfx, lvl, "(GTU", GET_MODE(x));
+               zip_debug_rtx_1(pfx, XEXP(x,0),lvl+1);
+               zip_debug_rtx_1(pfx, XEXP(x,1),lvl+1);
+               zip_debug_print(pfx, lvl, ")");
+               break;
+       case LEU:       //
+               zip_debug_print_m(pfx, lvl, "(LEU", GET_MODE(x));
+               zip_debug_rtx_1(pfx, XEXP(x,0),lvl+1);
+               zip_debug_rtx_1(pfx, XEXP(x,1),lvl+1);
+               zip_debug_print(pfx, lvl, ")");
+               break;
+       case LTU:       //
+               zip_debug_print_m(pfx, lvl, "(LTU", GET_MODE(x));
+               zip_debug_rtx_1(pfx, XEXP(x,0),lvl+1);
+               zip_debug_rtx_1(pfx, XEXP(x,1),lvl+1);
+               zip_debug_print(pfx, lvl, ")");
+               break;
+       case SCRATCH:   //
+               zip_debug_print_m(pfx, lvl, "(SCRATCH)", GET_MODE(x));
+               break;
+       case SUBREG:
+               { char buf[25];
+               if (REG_P(XEXP(x,0))) {
+                       sprintf(buf, "(SUBREG %d/%d)", REGNO(XEXP(x,0)),
+                               SUBREG_BYTE(x));
+                       zip_debug_print(pfx, lvl, buf);
+               } else if (MEM_P(XEXP(x,0))) {
+                       sprintf(buf, "(SUBREG /%d", SUBREG_BYTE(x));
+                       zip_debug_print(pfx, lvl, buf);
+                       zip_debug_rtx_1(pfx, XEXP(x,0),lvl+1);
+                       zip_debug_print(pfx, lvl, ")");
+               } else {
+                       sprintf(buf, "(SUBREG UNK /%d", SUBREG_BYTE(x));
+                       zip_debug_print(pfx, lvl, buf);
+                       zip_debug_rtx_1(pfx, XEXP(x,0),lvl+1);
+                       zip_debug_print(pfx, lvl, ")");
+               }}
+               break;
+       default:
+               { char buf[128];
+               sprintf(buf, "(? = %d) -- calling DEBUG-RTX", GET_CODE(x));
+               zip_debug_print(pfx, lvl, buf);
+               debug_rtx(x);
+               } break;
+       }
+}
+
+void
+zip_debug_rtx_pfx(const char *pfx, const_rtx x) {
+       zip_debug_rtx_1(pfx, x, 0);
+}
+
+void
+zip_debug_rtx(const_rtx x) {
+       zip_debug_rtx_pfx("", x);
+}
+
+void
+zip_debug_insn(rtx_insn *insn ATTRIBUTE_UNUSED) {
+}
+
+void
+zip_debug_bb(basic_block bb) {
+       rtx_insn        *insn;
+
+       fprintf(stderr, "************ BASIC-BLOCK ***************\n");
+       FOR_BB_INSNS(bb, insn)
+       {
+               zip_debug_rtx(insn);
+       }
+}
+
+
+static bool
+zip_legitimate_opb(const_rtx x, bool strict)
+{
+       const bool      dbg = ((ALL_DEBUG_ON)||(false))&&(!ALL_DEBUG_OFF);
+
+       if (dbg) fprintf(stderr, "ZIP-LEGITIMATE-OPB\n");
+       if (dbg) zip_debug_rtx_pfx("Test: ", x);
+
+       if (NULL_RTX == x)
+               return false;
+       else if ((GET_MODE(x) != SImode)&&(GET_MODE(x) != VOIDmode))
+               return false;
+       else if (REG_P(x)) {
+               bool    res;
+               // Only insist the register b a valid register if strict is true
+               res = (!strict)||((is_ZIP_REG(REGNO(x)))&&(REGNO(x) != zip_CC));
+               if (dbg) fprintf(stderr, "ZIP-LEGITIMATE-OPB -> %s (Reg)\n",
+                       (res)?"YES!":"No");
+               return res;
+       } else if ((!strict)&&(SUBREG_P(x))) {
+               // Only insist the register b a valid register if strict is true
+               if (dbg) fprintf(stderr, "ZIP-LEGITIMATE-OPB -> (Subreg(Reg),recurse)\n");
+               return zip_legitimate_opb(XEXP(x,0), strict);
+       } else if ((CONST_INT_P(x))
+               &&(INTVAL(x) >= zip_min_opb_imm)
+               &&(INTVAL(x) <= zip_max_opb_imm)) {
+               if (dbg) fprintf(stderr, "ZIP-LEGITIMATE-OPB -> YES! (Const)\n");
+               return true;
+       } else if (GET_CODE(x) == PLUS) {
+               // Is it a valid register?
+               if(!REG_P(XEXP(x,0))) {
+                       if (dbg) fprintf(stderr, "ZIP-LEGITIMATE-OPB -> No (No reg in +%s)\n",
+                       (GET_CODE(XEXP(x,1))==REG)?", reg in op[1]":"");
+                       return false;
+               } if ((strict)&&((!is_ZIP_REG(REGNO(XEXP(x,0))))||(REGNO(XEXP(x,0)) == zip_CC))) {
+                       if (dbg) fprintf(stderr, "ZIP-LEGITIMATE-OPB -> No (Wrong reg in +, %d)\n", REGNO(XEXP(x,0)));
+                       return false;
+               } if ((GET_CODE(XEXP(x, 1)) == CONST_INT)
+                       &&(INTVAL(XEXP(x, 1)) <= zip_max_anchor_offset)
+                       &&(INTVAL(XEXP(x, 1)) >= zip_min_anchor_offset)) {
+                       if (dbg) fprintf(stderr, "ZIP-LEGITIMATE-OPB -> YES! (reg+int)\n");
+                       // if((INTVAL(XEXP(x,1))<0)&&(REGNO(XEXP(x,0))==zip_SP))
+                               // gcc_unreachable();
+                       return true;
+               } if ((GET_CODE(XEXP(x, 1)) == LABEL_REF)
+                       ||(GET_CODE(XEXP(x, 1)) == SYMBOL_REF)) {
+                       // While we can technically support this, the problem
+                       // is that the symbol address could be anywhere, and we
+                       // have no way of recovering if it's outside of our
+                       // 14 allowable bits.
+                       if (dbg) fprintf(stderr, "ZIP-LEGITIMATE-OPB -> No. (reg+lbl)\n");
+                       return false;
+               }
+               // if ((GET_CODE(XEXP(x, 1)) == MINUS)
+               //      &&((GET_CODE(XEXP(XEXP(x,1),0)) == LABEL_REF)
+               //              ||(GET_CODE(XEXP(XEXP(x,1),0)) == CONST_INT)
+               //              ||(GET_CODE(XEXP(XEXP(x,1),0)) == SYMBOL_REF))
+               //      &&((GET_CODE(XEXP(XEXP(x,1),1)) == LABEL_REF)
+               //              ||(GET_CODE(XEXP(XEXP(x,1),0)) == CONST_INT)
+               //              ||(GET_CODE(XEXP(XEXP(x,1),1)) == SYMBOL_REF))
+               //      &&((GET_CODE(XEXP(XEXP(x,1),0)))
+               //              == (GET_CODE(XEXP(XEXP(x,1),1))))) {
+               //      if (dbg) fprintf(stderr, "ZIP-LEGITIMATE-OPERAND-ADDRESS -> YES! (lbl-lbl+reg)\n");
+               //      return true;
+               //}
+       }
+
+       if (dbg) fprintf(stderr, "ZIP-LEGITIMATE-OPB -> No\n");
+       if (dbg) zip_debug_rtx(x);
+       return false;
+}
+
+static bool
+zip_legitimate_move_operand_p(machine_mode mode ATTRIBUTE_UNUSED, rtx x, bool strict) {
+       const bool      dbg = ((ALL_DEBUG_ON)||(false))&&(!ALL_DEBUG_OFF);
+
+       if (dbg) fprintf(stderr, "ZIP-VALID-MOVE-OPERAND\n");
+       if (dbg) zip_debug_rtx_pfx("VMov?: ", x);
+
+       if (NULL_RTX == x)
+               return false;
+       else if (REG_P(x)) {
+               // Only insist the register b a valid register if strict is true
+               if (dbg) fprintf(stderr, "ZIP-VALID-MOVE-OPERAND -> YES! (Reg)\n");
+               return (!strict)||((is_ZIP_REG(REGNO(x)))&&(REGNO(x) !=zip_CC));
+       } else if (GET_CODE(x) == PLUS) {
+               // if (GET_CODE(XEXP(x,0))==PLUS) {
+               // return (zip_legitimate_opb(XEXP(x,0), strict))
+               // &&(zip_const_address_operand(XEXP(x,0)));
+               // }
+               // Is it a valid register?
+               if(GET_CODE(XEXP(x,0)) != REG) {
+                       if (dbg) fprintf(stderr, "ZIP-VALID-MOVE-OPERAND -> No (No reg in +%s)\n",
+                       (GET_CODE(XEXP(x,1))==REG)?", reg in op[1]":"");
+                       return false;
+               } if ((strict)&&
+                       ((!is_ZIP_REG(REGNO(XEXP(x,0))))
+                       ||(REGNO(XEXP(x,0)) == zip_CC))) {
+                       if (dbg) fprintf(stderr, "ZIP-VALID-MOVE-OPERAND -> No (Wrong reg in +, %d)\n", REGNO(XEXP(x,0)));
+                       return false;
+               } if ((GET_CODE(XEXP(x, 1)) == CONST_INT)
+                       &&(INTVAL(XEXP(x, 1)) <= zip_max_mov_offset)
+                       &&(INTVAL(XEXP(x, 1)) >= zip_min_mov_offset)) {
+                       if (dbg) fprintf(stderr, "ZIP-VALID-MOVE-OPERAND -> YES! (reg+int)\n");
+                       return true;
+               }
+       }
+
+       if (dbg) fprintf(stderr, "ZIP-VALID-MOVE-OPERAND -> No\n");
+       if (dbg) zip_debug_rtx(x);
+       return false;
+}
+
+int
+zip_pd_mov_operand(rtx op)
+{
+       const bool      dbg = ((ALL_DEBUG_ON)||(false))&&(!ALL_DEBUG_OFF);
+
+       if (dbg) fprintf(stderr, "ZIP-VALID-MOV(predicate) for OPERAND\n");
+       return zip_legitimate_move_operand_p(VOIDmode, op, !can_create_pseudo_p());
+}
+
+int
+zip_pd_mvimm_operand(rtx op)
+{
+       const bool      dbg = ((ALL_DEBUG_ON)||(false))&&(!ALL_DEBUG_OFF);
+
+       if (dbg) fprintf(stderr, "ZIP-VALID-MVIMM(predicate) for OPERAND\n");
+       if (!CONST_INT_P(op))
+               return false;
+       if (INTVAL(op) > zip_max_mov_offset)
+               return false;
+       if (INTVAL(op) < zip_min_mov_offset)
+               return false;
+       return true;
+}
+
+int
+zip_pd_imm_operand(rtx op)
+{
+       const bool      dbg = ((ALL_DEBUG_ON)||(false))&&(!ALL_DEBUG_OFF);
+
+       if (dbg) fprintf(stderr, "ZIP-VALID-IMM(predicate) for OPERAND\n");
+       if (!CONST_INT_P(op))
+               return false;
+       if (INTVAL(op) > zip_max_anchor_offset)
+               return false;
+       if (INTVAL(op) < zip_min_anchor_offset)
+               return false;
+       return true;
+}
+
+int
+zip_address_operand(rtx op)
+{
+       const bool      dbg = ((ALL_DEBUG_ON)||(false))&&(!ALL_DEBUG_OFF);
+
+       if (dbg) fprintf(stderr, "ZIP-ADDRESS for OPERAND\n");
+       if ((REG_P(op))&&(REGNO(op)==zip_CC))
+               return false;
+       else if ((GET_CODE(op) == PLUS)&&(REG_P(XEXP(op,0)))
+                       &&(REGNO(XEXP(op,0))==zip_CC))
+               return false;
+       else
+               return zip_legitimate_opb(op, !can_create_pseudo_p());
+}
+
+int
+zip_pd_opb_operand(rtx op)
+{
+       const bool      dbg = ((ALL_DEBUG_ON)||(false))&&(!ALL_DEBUG_OFF);
+
+       if (dbg) fprintf(stderr, "ZIP-OPB(predicate) for OPERAND\n");
+       return zip_legitimate_opb(op, !can_create_pseudo_p());
+}
+
+int
+zip_ct_address_operand(rtx op)
+{
+       const bool      dbg = ((ALL_DEBUG_ON)||(false))&&(!ALL_DEBUG_OFF);
+
+       if (dbg) fprintf(stderr, "ZIP-ADDRESS(constraint) for OPERAND\n");
+       return zip_legitimate_opb(op, !can_create_pseudo_p());
+}
+
+int
+zip_const_address_operand(rtx x) {
+       const bool      dbg = ((ALL_DEBUG_ON)||(false))&&(!ALL_DEBUG_OFF);
+
+       if (dbg) fprintf(stderr, "is ZIP-CONST-ADDRESS?\n");
+       if (dbg) zip_debug_rtx(x);
+       if ((GET_MODE(x) != SImode)&&(GET_MODE(x) != VOIDmode))
+               return false;
+       if ((GET_CODE(x) == LABEL_REF)
+                       ||(GET_CODE(x) == CODE_LABEL)
+                       ||(GET_CODE(x) == SYMBOL_REF)) {
+               if (dbg) fprintf(stderr, "is ZIP-CONST-ADDRESS? -> YES!\n");
+               return true;
+       } else if (CONST_INT_P(x)) {
+               if (dbg) fprintf(stderr, "is ZIP-CONST-ADDRESS? -> YES!\n");
+               return true;
+       } else if (GET_CODE(x) == PLUS) {
+               if (dbg) fprintf(stderr, "is ZIP-CONST-ADDRESS(PLUS)\n");
+               return ((zip_const_address_operand(XEXP(x,0)))
+                       &&(CONST_INT_P(XEXP(x,1))));
+       } else if (GET_CODE(x) == MINUS) {
+               if (dbg) fprintf(stderr, "is ZIP-CONST-ADDRESS(MINUS)\n");
+               return ((zip_const_address_operand(XEXP(x,0)))
+                       &&(zip_const_address_operand(XEXP(x,1))));
+       }
+
+       if (dbg) fprintf(stderr, "is ZIP-CONST-ADDRESS? -> No\n");
+       if (dbg) zip_debug_rtx(x);
+       return false;
+}
+
+int
+zip_ct_const_address_operand(rtx x) {
+       const bool      dbg = ((ALL_DEBUG_ON)||(false))&&(!ALL_DEBUG_OFF);
+
+       if (dbg) fprintf(stderr, "ZIP-CONST-ADDRESS(constraint)\n");
+       return zip_const_address_operand(x);
+}
+
+int
+zip_pd_const_address_operand(rtx x) {
+       const bool      dbg = ((ALL_DEBUG_ON)||(false))&&(!ALL_DEBUG_OFF);
+
+       if (dbg) fprintf(stderr, "ZIP-CONST-ADDRESS(predicate)\n");
+       return zip_const_address_operand(x);
+}
+
+
+static bool
+zip_legitimate_address_p(machine_mode mode ATTRIBUTE_UNUSED, rtx x, bool strict)
+{
+       const bool      dbg = ((ALL_DEBUG_ON)||(false))&&(!ALL_DEBUG_OFF);
+
+       if (dbg) fprintf(stderr, "Zip-LEGITIMATE-ADDRESS-P\n");
+       if (dbg) zip_debug_rtx(x);
+
+       // Only insist the register be a valid register if strict is true
+       if (zip_legitimate_opb(x, strict))
+               return true;
+       // else if (zip_const_address_operand(x))
+               // return true;
+
+       return false;
+}
+
+static rtx
+zip_legitimize_address(rtx x, rtx oldx ATTRIBUTE_UNUSED, machine_mode mode ATTRIBUTE_UNUSED) {
+       const bool      dbg = ((ALL_DEBUG_ON)||(false))&&(!ALL_DEBUG_OFF);
+
+       if (dbg) zip_debug_rtx_pfx("LEGITIMIZE: ", x);
+       if (zip_legitimate_address_p(mode, x, !can_create_pseudo_p()))
+               return x;
+
+       if (GET_CODE(x)==PLUS) {
+               if (!REG_P(XEXP(x,0)))
+                       XEXP(x,0) = force_reg(GET_MODE(x),XEXP(x,0));
+               if ((!zip_legitimate_address_p(mode, x, !can_create_pseudo_p()))
+                       &&(!CONST_INT_P(XEXP(x,1))))
+                       x = force_reg(GET_MODE(x),x);
+       } else if (MEM_P(x))
+               x = force_reg(GET_MODE(x),x);
+
+       if (dbg) zip_debug_rtx_pfx("LEGITIMATE: ", x);
+       return x;
+}
+
+void
+zip_asm_output_def(FILE *stream, const char *name, const char *value)
+{
+       assemble_name(stream, name);
+       fprintf(stream, "\t.equ ");
+       assemble_name(stream, value);
+       fputc('\n', stream);
+}
+
+/*
+bool   zip_load_address_lod(rtx regrx, rtx memrx) {
+       fprintf(stderr, "ZIP-LOAD-ADDRESS-LOD\n");
+       if (!MEM_P(memrx))
+               return false;
+       if (GET_CODE(regrx) != REG)
+               return false;
+       enum    rtx_code ic = GET_CODE(memrx);
+       if ((ic == SYMBOL_REF)
+               ||(ic == CODE_LABEL)
+               ||(ic == LABEL_REF)) {
+               if (can_create_pseudo_p()) {
+                       rtx scratch_reg;
+                       scratch_reg = gen_rtx_SCRATCH(SImode);
+                       emit_insn(gen_movsi_ldi(scratch_reg, XEXP(memrx, 0)));
+                       emit_insn(gen_movsi_lod(regrx, scratch_reg));
+                       return true;
+               } else return false;
+       } else return false;
+}
+
+bool   zip_load_address_sto(rtx memrx, rtx regrx) {
+       fprintf(stderr,  "CHECKING-IN-W/ZIP_LOAD_ADDRESS_STORE\n");
+       if (!MEM_P(memrx))
+               return false;
+       if (GET_CODE(regrx) != REG)
+               return false;
+       enum    rtx_code ic = GET_CODE(memrx);
+       if ((ic == SYMBOL_REF)
+               ||(ic == CODE_LABEL)
+               ||(ic == LABEL_REF)) {
+               if (can_create_pseudo_p()) {
+                       rtx scratch_reg;
+                       scratch_reg = gen_rtx_SCRATCH(SImode);
+                       emit_insn(gen_movsi_ldi(scratch_reg, XEXP(memrx, 0)));
+                       emit_insn(gen_movsi_sto(scratch_reg, regrx));
+                       return true;
+               } else return false;
+       } return false;
+}
+*/
+
+#define        USE_SUBREG
+#ifdef USE_SUBREG
+#define        SREG_P(RTX) ((SUBREG_P(RTX))&&(REG_P(XEXP(RTX,0))))
+#define        SMEM_P(RTX) ((SUBREG_P(RTX))&&(MEM_P(XEXP(RTX,0))))
+#else
+#define        SREG_P(RTX)     false
+#define        SMEM_P(RTX)     false
+#endif
+
+bool   zip_gen_move_rtl(rtx dst, rtx src) {
+       const bool      dbg = ((ALL_DEBUG_ON)||(false))&&(!ALL_DEBUG_OFF);
+
+       if (dbg) fprintf(stderr, "ZIP-GEN-MOVE\n");
+       if (dbg) zip_debug_rtx_pfx("FROM: ", src);
+       if (dbg) zip_debug_rtx_pfx("TO  : ", dst);
+       if (dbg) fprintf(stderr, "PSEUDOs: %s\n", can_create_pseudo_p()?"true":"false");
+       if (((REG_P(dst))||(SREG_P(dst)))
+                       &&((REG_P(src))||(SREG_P(src)))) {
+               // First type of move... register to register
+               if (dbg) fprintf(stderr, "ZIP-GEN-MOVE/REG -- EMIT\n");
+               // if (SREG_P(dst)) dst = gen_raw_REG(SImode,REGNO(XEXP(dst,0))+SUBREG_BYTE(dst));
+               // if (SREG_P(src)) src = gen_raw_REG(SImode,REGNO(XEXP(src,0))+SUBREG_BYTE(src));
+               emit_insn(gen_movsi_reg(dst, src));
+       } else if ((MEM_P(dst))&&(MEM_P(XEXP(dst,0)))) {
+               // An indirect store, (mem (mem (addr .))) = whatever ...
+               if (can_create_pseudo_p()) {
+                       rtx     tmp = gen_reg_rtx(Pmode);
+                       zip_gen_move_rtl(tmp, XEXP(dst,0));
+                       // mark_reg_pointer(tmp,0);
+                       zip_gen_move_rtl(gen_rtx_MEM(GET_MODE(src), tmp), src);
+               } else {
+                       fprintf(stderr, "ZIP:Cannot move into mem w/o pseudo\n");
+                       return false;
+               }
+       } else if ((MEM_P(src))&&(MEM_P(XEXP(src,0)))) {
+               // If this is an indirect load, Rx = (mem (mem (addr)))
+               if (can_create_pseudo_p()) {
+                       rtx     tmp = gen_reg_rtx(Pmode);
+                       zip_gen_move_rtl(tmp, XEXP(src,0));
+                       // mark_reg_pointer(tmp,0);
+                       zip_gen_move_rtl(dst, gen_rtx_MEM(GET_MODE(src), tmp));
+               } else {
+                       fprintf(stderr, "ZIP: Cannot move from mem(mem(ptr)) w/o pseudo\n");
+                       return false;
+               }
+       } else if (((REG_P(dst))||(SREG_P(dst)))&&(GET_CODE(src)==PLUS)
+                       &&(REG_P(XEXP(src,0)))
+                       &&(CONST_INT_P(XEXP(src,1)))) {
+               // if (SREG_P(dst)) dst = gen_raw_REG(SImode,REGNO(XEXP(dst,0))+SUBREG_BYTE(dst));
+               // Second type of move... register plus offset to register
+               if ((INTVAL(XEXP(src, 1)) <= zip_max_mov_offset)
+                       &&(INTVAL(XEXP(src, 1)) >= zip_min_mov_offset)) {
+                       // The offset is within bounds
+                       if (dbg) fprintf(stderr, "ZIP-GEN-MOVE/REG+OFF -- EMIT\n");
+                       emit_insn(gen_movsi_reg_off(dst, XEXP(src,0),XEXP(src,1)));
+               } else if (can_create_pseudo_p()) {
+                       // The offset is out of bounds, get a new register and
+                       // generate an add instruction to split this up.
+                       rtx     tmp = gen_reg_rtx(GET_MODE(XEXP(src,0)));
+
+                       if (dbg) fprintf(stderr, "ZIP-GEN-MOVE/LDI\n");
+                       emit_insn(gen_movsi_ldi(tmp, XEXP(src,1)));
+                       if (dbg) fprintf(stderr, "ZIP-GEN-MOVE/ADD\n");
+                       emit_insn(gen_addsi3(tmp, tmp, XEXP(src,0)));
+                       if (dbg) fprintf(stderr, "ZIP-GEN-MOVE/DST\n");
+                       emit_insn(gen_movsi_reg(dst, tmp));
+               } else {
+                       fprintf(stderr, "ZIP: Cannot move a(r),b w/o pseudo for out of bounds a\n");
+                       return false;
+               }
+       } else if ((MEM_P(dst))&&(MEM_P(src))) {
+               rtx     tmp;
+               if (dbg) fprintf(stderr, "ZIP-GEN-MOVE/MEM/MEM\n");
+               if (can_create_pseudo_p()) {
+                       tmp = gen_reg_rtx(GET_MODE(src));
+                       emit_insn(gen_movsi(tmp, src));
+                       emit_insn(gen_movsi(dst, tmp));
+               } else {
+                       fprintf(stderr, "ZIP: Cannot move mem(A) to mem(B) w/o pseudo\n");
+                       return false;
+               }
+       } else if (((REG_P(dst))||(SREG_P(dst)))&&(MEM_P(src))) {
+               // Memory load
+               // if (SREG_P(dst)) dst = gen_raw_REG(SImode,REGNO(XEXP(dst,0))+SUBREG_BYTE(dst));
+               if (dbg) fprintf(stderr, "ZIP-GEN-MOVE/LOD\n");
+               if (zip_legitimate_opb(XEXP(src, 0), false)) {
+                       if (dbg) fprintf(stderr, "ZIP-GEN-MOVE/SIMPLE-LOD(ADDR)\n");
+                       if (dbg) zip_debug_rtx_pfx("Smple-Addr: ", src);
+                       emit_insn(gen_movsi_lod(dst, src));
+               } else if (zip_const_address_operand(XEXP(src,0))) {
+                       if (can_create_pseudo_p()) {
+                               rtx     tmp;
+                               if (dbg) fprintf(stderr, "ZIP-GEN-MOVE/LOD(CONST-ADDR)\n");
+                               tmp = gen_reg_rtx(Pmode);
+                               emit_insn(gen_movsi_ldi(tmp, XEXP(src,0)));
+                               emit_insn(gen_movsi_lod(dst, gen_rtx_MEM(GET_MODE(src),tmp)));
+                       } else {
+                               if (dbg) fprintf(stderr, "ZIP-GEN-MOVE/LOD(CONST-ADDR,SELF)\n");
+                               emit_insn(gen_movsi_ldi(dst, XEXP(src,0)));
+                               emit_insn(gen_movsi_lod(dst, gen_rtx_MEM(GET_MODE(src),dst)));
+                       }
+               } else {
+                       internal_error("%s", "ZIP/No usable load\n");
+               }
+       } else if ((MEM_P(dst))&&((REG_P(src))||(SREG_P(src)))) {
+               // Memory store
+               // if (SREG_P(src)) src = gen_raw_REG(SImode,REGNO(XEXP(src,0))+SUBREG_BYTE(src));
+               if (dbg) fprintf(stderr, "ZIP-GEN-MOVE/STO\n");
+               if (zip_legitimate_opb(XEXP(dst, 0), false)) {
+                       // If it's a legitimate address already, do nothing mor
+                       if (dbg) fprintf(stderr, "ZIP-GEN-MOVE/STO(Legit Addr)--EMIT\n");
+                       // if (REG_P(XEXP(dst,0)))
+                               // mark_reg_pointer(XEXP(dst,0),0);
+                       // else if ((GET_CODE(XEXP(dst,0))==PLUS)
+                                       // &&(REG_P(XEXP(XEXP(dst,0),0))))
+                               // mark_reg_pointer(XEXP(XEXP(dst,0),0),0);
+                       emit_insn(gen_movsi_sto(dst, src));
+               } else if (zip_const_address_operand(XEXP(dst,0))) {
+                       rtx     tmp;
+
+                       if (can_create_pseudo_p()) {
+                               if (dbg) fprintf(stderr, "ZIP-GEN-MOVE/STO(Const Addr,Reg) -- EMIT\n");
+                               // Otherwise we need to load the memory address
+                               // into a register
+                               tmp = gen_reg_rtx(Pmode);
+                               // mark_reg_pointer(tmp,0);
+                               emit_insn(gen_movsi_ldi(tmp, XEXP(dst,0)));
+                               //
+                               // Then we can do our load
+                               if (dbg) fprintf(stderr, "ZIP-GEN-MOVE/STO -- emit\n");
+                               emit_insn(gen_movsi_sto(gen_rtx_MEM(GET_MODE(src), tmp), src));
+                       } else {
+                               fprintf(stderr, "Cannot move src -> mem(dst) w/o pseudo\n");
+                               return false;
+                       }
+               } else if (can_create_pseudo_p())
+                       internal_error("%s", "ZIP/No usable store\n");
+               else {
+                       fprintf(stderr, "ZIP/Unanticipated store problem\n");
+                       return false;
+               }
+               if (dbg) fprintf(stderr, "ZIP-GEN-MOVE/STO -- DONE\n");
+       } else if ((MEM_P(dst))&&((CONST_INT_P(src))||(GET_CODE(src)==SYMBOL_REF))) {
+               // Store a constant into memory
+               rtx     tmp;
+
+               if (can_create_pseudo_p()) {
+                       if (dbg) fprintf(stderr, "ZIP-GEN-MOVE/CONST->MEM\n");
+                       // Load the source constant into a register first
+                       tmp = gen_reg_rtx((GET_MODE(src)==VOIDmode)?GET_MODE(dst):GET_MODE(src));
+                       emit_insn(gen_movsi_ldi(tmp,src));
+                       if (dbg) fprintf(stderr, "ZIP-GEN-MOVE/CONST->REG->MEM -- RECURSE\n");
+
+                       // Then do a normal move, recursing to handle memory
+                       // properly
+                       zip_gen_move_rtl(dst, tmp);
+                       if (dbg) fprintf(stderr, "ZIP-GEN-MOVE/CONST->MEM -- DONE\n");
+               } else {
+                       fprintf(stderr, "ZIP/Cannot store constant into mem w/o pseudo\n");
+                       return false;
+               }
+       } else if (((REG_P(dst))||(SREG_P(dst)))&&(CONST_INT_P(src))) {
+               // if (SREG_P(dst)) dst = gen_raw_REG(SImode,REGNO(XEXP(dst,0))+SUBREG_BYTE(dst));
+               // Load a constant into a register
+               // The assembler really takes care of all of this, since
+               // the assembler will split the constant if it doesn't fit
+               // into a single instruction.
+               if (dbg) fprintf(stderr, "ZIP-GEN-MOVE/CONST->REG\n");
+               // if ((GET_MODE(dst)==VOIDmode)&&(GET_MODE(src)==VOIDmode))
+                       // PUT_MODE(dst,SImode);
+               emit_insn(gen_movsi_ldi(dst, src));
+       } else if ((REG_P(dst))&&
+                       ((LABEL_P(src))
+                       ||(GET_CODE(src)==SYMBOL_REF)
+                       ||(GET_CODE(src)==LABEL_REF))) {
+               // Load a constant into a register
+               // The assembler really takes care of all of this, since
+               // the assembler will split the constant if it doesn't fit
+               // into a single instruction.
+               if (dbg) fprintf(stderr, "ZIP-GEN-MOVE/LABEL->REG\n");
+               emit_insn(gen_movsi_ldi(dst, src));
+       } else if ((REG_P(dst))&&
+                       ((GET_CODE(src)==PLUS)
+                       &&((GET_CODE(XEXP(src,0))==SYMBOL_REF)
+                               ||(GET_CODE(XEXP(src,0))==LABEL_REF))
+                       &&(CONST_INT_P(XEXP(src,1))))) {
+               if (dbg) fprintf(stderr, "ZIP-GEN-MOVE/LABEL+OFFSET->REG\n");
+               if ((INTVAL(XEXP(src,1))>=zip_min_mov_offset)
+                       &&(INTVAL(XEXP(src,1))<=zip_max_mov_offset)) {
+                       emit_insn(gen_movsi_ldi(dst, XEXP(src,1)));
+                       emit_insn(gen_movsi_reg_off(dst, dst, XEXP(src,1)));
+               } else if (can_create_pseudo_p()) {
+                       rtx tmp = gen_reg_rtx(Pmode);
+                       emit_insn(gen_movsi_ldi(tmp, XEXP(src,1)));
+                       emit_insn(gen_movsi_ldi(dst, src));
+                       emit_insn(gen_addsi3(dst,dst,tmp));
+                       return true;
+               } else {
+                       fprintf(stderr, "Cannot move LABEL+OFFSET -> dst w/o pseudo\n");
+                       return false;
+               }
+       } else if (((REG_P(dst))||(SREG_P(dst)))&&(GET_CODE(src) == CONST)) {
+               // if (SREG_P(dst)) dst = gen_raw_REG(SImode,REGNO(XEXP(dst,0))+SUBREG_BYTE(dst));
+               zip_gen_move_rtl(dst, XEXP(src,0));
+       } else if (SMEM_P(dst)) {
+               rtx     addr = XEXP(XEXP(dst,0),0);
+               if (REG_P(addr)) {
+                       zip_gen_move_rtl(
+                               gen_rtx_MEM(SImode, plus_constant(Pmode,addr,
+                                       SUBREG_BYTE(dst),false)),src);
+               } else if ((GET_CODE(addr)==PLUS)
+                               &&(REG_P(XEXP(addr,0)))
+                               &&(CONST_INT_P(XEXP(addr,1)))) {
+                       rtx addreg = XEXP(addr,0);
+                       zip_gen_move_rtl(
+                               gen_rtx_MEM(SImode, plus_constant(Pmode,addreg,
+                                       INTVAL(XEXP(addr,1))+SUBREG_BYTE(dst),
+                                       false)),src);
+               } else fprintf(stderr, "ZIP/Cannot understand SUBREG\n");
+       } else if (SMEM_P(src)) {
+               rtx     addr = XEXP(XEXP(src,0),0);
+               if (REG_P(addr)) {
+                       zip_gen_move_rtl(dst,
+                               gen_rtx_MEM(SImode, plus_constant(Pmode,addr,
+                                       SUBREG_BYTE(src),false)));
+               } else if ((GET_CODE(addr)==PLUS)
+                               &&(REG_P(XEXP(addr,0)))
+                               &&(CONST_INT_P(XEXP(addr,1)))) {
+                       rtx addreg = XEXP(addr,0);
+                       zip_gen_move_rtl(dst,
+                               gen_rtx_MEM(SImode, plus_constant(Pmode,addreg,
+                                       INTVAL(XEXP(addr,1))+SUBREG_BYTE(src),
+                                       false)));
+               } else fprintf(stderr, "ZIP/Cannot understand SUBREG\n");
+       } else {
+               fprintf(stderr, "ZIP/No usable move\n");
+               zip_debug_rtx_pfx("TO  : ", dst);
+               zip_debug_rtx_pfx("FROM: ", src);
+               debug_rtx(dst);
+               debug_rtx(src);
+               return false;
+       }
+       if (dbg) fprintf(stderr, "ZIP-GEN-MOVE -- DONE\n");
+       return true;
+}
+
+const char *zip_set_zero_or_one(rtx condition, rtx dst) {
+       const bool      dbg = ((ALL_DEBUG_ON)||(false))&&(!ALL_DEBUG_OFF);
+       if (dbg) fprintf(stderr, "ZIP::SET-ZERO-OR-ONE\n");
+       if (dbg) zip_debug_rtx_pfx("CND", condition);
+       if (dbg) zip_debug_rtx_pfx("REG", dst);
+       switch(GET_CODE(condition)) {
+       case EQ:        return "LDI\t0,%0\n\tLDILO.Z\t1,%0";
+       case NE:        return "LDI\t0,%0\n\tLDILO.NZ\t1,%0";
+       case LT:        return "LDI\t0,%0\n\tLDILO.LT\t1,%0";
+       case GT:        return "LDI\t0,%0\n\tLDILO.GT\t1,%0";
+       case LE:        return "LDI\t1,%0\n\tLDILO.GT\t0,%0";
+       case GE:        return "LDI\t0,%0\n\tLDILO.GE\t1,%0";
+       case LTU:       return "LDI\t0,%0\n\tLDILO.C\t1,%0";
+       case GTU:       return "LDI\t1,%0\n\tLDILO.C\t0,%0\n\tLDILO.Z\t0,%0";
+       case LEU:       return "LDI\t0,%0\n\tLDILO.C\t1,%0\n\tLDILO.Z\t1,%0";
+       case GEU:       return "LDI\t1,%0\n\tLDILO.C\t0,%0";
+       default:
+               zip_debug_rtx(condition);
+               internal_error("CSTORE Unsupported condition");
+               return NULL;
+       }
+}
+
+const char *zip_binary_movsicc(rtx_code condition, const char *op, const int opno) {
+       static char     result[64] = "";
+       switch(condition) {
+               //
+               // Result already exists in the iffalse register
+               // Can't change it.  Therefore, on the
+               // condition ... move true register to the
+               // destination
+               //
+               case EQ:        sprintf(result, "%s.Z\t%%%d,%%0", op, opno); break;
+               case NE:        sprintf(result, "%s.NZ\t%%%d,%%0", op, opno); break;
+               case LT:        sprintf(result, "%s.LT\t%%%d,%%0", op, opno); break;
+               case GT:        sprintf(result, "%s.GT\t%%%d,%%0", op, opno); break;
+               // .LE doesn't exist on Zip CPU--turn this into two instructions
+               case LE:        sprintf(result, "%s.LT\t%%%d,%%0\n\t%s.Z\t%%%d,%%0", op, opno, op, opno); break;
+               case GE:        sprintf(result, "%s.GE\t%%%d,%%0", op, opno); break;
+               case LTU:       sprintf(result, "%s.C\t%%%d,%%0", op, opno); break;
+               //
+               // .GTU doesn't exist on the Zip CPU either. We also note that
+               // .C will never be set on an equal condition.  Therefore, we
+               // turn this into a XOR.NZ 2,CC, which will set the .C condition
+               // as long as .Z wasn't true.  We then undo this when we're
+               // done.  This is possible since none of these instructions
+               // (LDI/MOV/Lod conditional, nor Xor conditional) will ever set
+               // the condition codes.
+               //
+               // This is obviously not very optimal.  Avoid this by all means
+               // if you can
+               case GTU:       sprintf(result, "XOR.NZ\t2,CC\n%s.C\t%%%d,%%0\n\tXOR.NZ\t2,CC", op, opno); break;
+               // .LEU doesn't exist on Zip CPU either--turn this into another
+               // two instructions
+               case LEU:       sprintf(result, "%s.C\t%%%d,%%0\n\t%s.Z\t%%%d,%%0", op, opno, op, opno); break;
+               //
+               // .GEU doesn't exist on Zip CPU.  Implementing it her is
+               // painful.  We can change the condition codes to make it so,
+               // but the instruction requires the condition codes not be
+               // changed.  Hence, we must change them back if we do so.
+               //
+               // .C will be set on less than but not equal.  Hence !.C will
+               // be true on greater than or equal.
+               case GEU:       sprintf(result, "XOR\t2,CC\n%s.C\t%%%d,%%0\n\tXOR\t2,CC", op, opno); break;
+               default:
+                       internal_error("MOVSICC(BINARY) Unsupported condition");
+                       return NULL;
+       } return result;
+}
+
+const char *zip_tertiary_movsicc(rtx condition, const char *optrue, const char *opfalse) {
+       static  char    result[64] = "";
+       switch(GET_CODE(condition)) {
+               case EQ:        sprintf(result,"%s\t%%3,%%0\n\t%s.Z\t%%2,%%0", opfalse, optrue); break;
+               case NE:        sprintf(result,"%s\t%%3,%%0\n\t%s.NZ\t%%2,%%0", opfalse, optrue); break;
+               case LT:        sprintf(result,"%s\t%%3,%%0\n\t%s.LT\t%%2,%%0", opfalse, optrue); break;
+               case GT:        sprintf(result,"%s\t%%3,%%0\n\t%s.GT\t%%2,%%0", opfalse, optrue); break;
+               // LE doesn't exist on a Zip CPU.  Accomplish this by
+               // reversing the condition: i.e., load the false value into
+               // the register, and the on condition load the true value.
+               case LE:        sprintf(result,"%s\t%%2,%%0\n\t%s.GT\t%%3,%%0", optrue, opfalse); break;
+               case GE:        sprintf(result,"%s\t%%3,%%0\n\t%s.GE\t%%2,%%0", opfalse, optrue); break;
+               case LTU:       sprintf(result,"%s\t%%3,%%0\n\t%s.C\t%%2,%%0", opfalse, optrue); break;
+               //
+               case GTU:       sprintf(result,"%s\t%%2,%%0\n\t%s.C\t%%3,%%0\n\t%s.Z\t%%3,%%0", optrue, opfalse, opfalse); break;
+               case LEU:       sprintf(result,"%s\t%%3,%%0\n\t%s.C\t%%2,%%0\n\t%s.Z\t%%2,%%0", opfalse, optrue, optrue); break;
+               case GEU:       sprintf(result,"%s\t%%2,%%0\n\t%s.C\t%%3,%%0\n", optrue, opfalse); break;
+               default:
+                       internal_error("MOVSICC Unsupported condition");
+                       return NULL;
+       } return result;
+}
+
+const char *zip_movsicc(rtx dst, rtx condition, rtx iftrue, rtx iffalse) {
+       const bool      dbg = ((ALL_DEBUG_ON)||(false))&&(!ALL_DEBUG_OFF);
+       if (dbg) fprintf(stderr, "ZIP::MOVSICC\n");
+       if (dbg) zip_debug_rtx_pfx("DST", dst);
+       if (dbg) zip_debug_rtx_pfx("CND", condition);
+       if (dbg) zip_debug_rtx_pfx("TRU", iftrue);
+       if (dbg) zip_debug_rtx_pfx("FAL", iffalse);
+       if ((REG_P(iftrue))&&(REGNO(dst)==REGNO(iftrue))) {
+               if (dbg) fprintf(stderr, "ZIP::MOVSICC -- CASE if(X) -> R\n");
+               if (zip_legitimate_move_operand_p(SImode, iffalse, true))
+                       return zip_binary_movsicc(reverse_condition(GET_CODE(condition)), "MOV", 3);
+               else if (zip_const_address_operand(iffalse))
+                       return zip_binary_movsicc(reverse_condition(GET_CODE(condition)), "LDI", 3);
+               else if (zip_const_address_operand(iffalse))
+                       return zip_binary_movsicc(reverse_condition(GET_CODE(condition)), "LDI", 3);
+               else if ((MEM_P(iffalse))&&(zip_legitimate_opb(XEXP(iffalse,0), true)))
+                       return zip_binary_movsicc(reverse_condition(GET_CODE(condition)), "LOD", 3);
+               else {
+                       internal_error("MOVSICC Unsupported mode");
+                       return NULL;
+               }
+       } if ((REG_P(iftrue))&&(REGNO(dst)==REGNO(iftrue))) {
+               if (dbg) fprintf(stderr, "ZIP::MOVSICC -- CASE if(!X) -> R\n");
+               if (zip_legitimate_move_operand_p(SImode, iftrue, true))
+                       return zip_binary_movsicc(GET_CODE(condition), "MOV",2);
+               else if (zip_const_address_operand(iffalse))
+                       return zip_binary_movsicc(GET_CODE(condition), "LDI",2);
+               else if (zip_const_address_operand(iffalse))
+                       return zip_binary_movsicc(GET_CODE(condition), "LDI",2);
+               else if ((MEM_P(iffalse))&&(zip_legitimate_opb(XEXP(iffalse,0), true)))
+                       return zip_binary_movsicc(GET_CODE(condition), "LOD",2);
+               else {
+                       internal_error("MOVSICC Unsupported mode");
+                       return NULL;
+               }
+       } if ((zip_const_address_operand(iftrue))&&(zip_const_address_operand(iffalse))) {
+               if (dbg) fprintf(stderr, "ZIP::MOVSICC -- IF(X) #1 ELSE #2\n");
+               return zip_tertiary_movsicc(condition, "LDI", "LDI");
+       } if ((zip_const_address_operand(iftrue))&&(zip_legitimate_move_operand_p(SImode, iffalse, true))) {
+               if (dbg) fprintf(stderr, "ZIP::MOVSICC -- IF(X) #1 ELSE A+B\n");
+               return zip_tertiary_movsicc(condition, "LDI", "MOV");
+       } if ((zip_legitimate_move_operand_p(SImode, iftrue, true))&&(zip_const_address_operand(iffalse))) {
+               if (dbg) fprintf(stderr, "ZIP::MOVSICC -- IF(X) A+B ELSE #x\n");
+               return zip_tertiary_movsicc(condition, "MOV", "LDI");
+       } if ((zip_legitimate_move_operand_p(SImode, iftrue, true))
+                       &&(zip_legitimate_move_operand_p(SImode, iffalse, true))) {
+               if (dbg) fprintf(stderr, "ZIP::MOVSICC -- IF(X) A+B ELSE C+D\n");
+               return zip_tertiary_movsicc(condition, "MOV", "MOV");
+       }
+       if ((MEM_P(iftrue))
+               &&(zip_legitimate_opb(XEXP(iftrue,0), true))
+               &&(zip_legitimate_move_operand_p(SImode, iffalse, true))) {
+               if (dbg) fprintf(stderr, "ZIP::MOVSICC -- IF(X) A[B] ELSE C+D\n");
+               return zip_tertiary_movsicc(condition, "LOD", "MOV");
+       } if ((zip_legitimate_move_operand_p(SImode, iftrue, true))
+               &&(MEM_P(iffalse))&&(zip_legitimate_opb(XEXP(iffalse,0), true))) {
+               if (dbg) fprintf(stderr, "ZIP::MOVSICC -- IF(X) A+B ELSE C[D]\n");
+               return zip_tertiary_movsicc(condition, "MOV", "LOD");
+       } if ((MEM_P(iftrue))&&(zip_legitimate_opb(XEXP(iftrue,0), true))
+               &&(MEM_P(iffalse))&&(zip_legitimate_opb(XEXP(iffalse,0), true))) {
+               if (dbg) fprintf(stderr, "ZIP::MOVSICC -- IF(X) A[B] ELSE C[D]\n");
+               return zip_tertiary_movsicc(condition, "LOD", "LOD");
+       } if ((MEM_P(iftrue))
+               &&(zip_legitimate_opb(XEXP(iftrue,0),true))
+               &&(zip_const_address_operand(iffalse))) {
+               if (dbg) fprintf(stderr, "ZIP::MOVSICC -- IF(X) A[B] ELSE #x\n");
+               return zip_tertiary_movsicc(condition, "LOD", "LDI");
+       } if ((MEM_P(iffalse))
+               &&(zip_legitimate_opb(XEXP(iffalse,0),true))
+               &&(zip_const_address_operand(iftrue))) {
+               if (dbg) fprintf(stderr, "ZIP::MOVSICC -- IF(X) #x ELSE A[B]\n");
+               return zip_tertiary_movsicc(condition, "LDI", "LOD");
+       }
+
+       internal_error("MOVSICC Operands not supported");
+}
+
+const char *zip_addsicc(rtx dst, rtx condition, rtx ifsrc, rtx addv ATTRIBUTE_UNUSED) {
+       // We know upon entry that REG_P(dst) must be true
+       if (!REG_P(dst))
+               internal_error("%s","ADDSICC into something other than register");
+       if ((REG_P(ifsrc))&&(REGNO(dst)==REGNO(ifsrc))) {
+               switch (GET_CODE(condition)) {
+               case EQ: return "ADD.Z\t%3,%0";
+               case NE: return "ADD.NZ\t%3,%0";
+               case LT: return "ADD.LT\t%3,%0";
+               case GT: return "ADD.GT\t%3,%0";
+               case LE: return "ADD.LT\t%3,%0\n\tADD.Z\t%3,%0";
+               case GE: return "ADD.GE\t%3,%0";
+               case LTU: return "ADD.C\t%3,%0";
+               case LEU: return "ADD.C\t%3,%0\n\tADD.Z\t%3,%0";
+               case GEU: return "XOR\t2,CC\n\tADD.C\t%3,%0\n\tXOR\t2,CC";
+               // Can do a GEU comparison, and then undo on the Zero condition
+               case GTU: return "XOR\t2,CC\n\tADD.C\t%3,%0\n\tSUB.Z\t%3,%0\n\tXOR\t2,CC";
+               default:
+                       internal_error("%s", "Zip/No usable addsi expansion");
+                       break;
+               }
+       } else {
+               // MOV A+REG,REG
+               switch (GET_CODE(condition)) {
+               case EQ: return "MOV.Z\t%3+%2,%0";
+               case NE: return "MOV.NZ\t%3+%2,%0";
+               case LT: return "MOV.LT\t%3+%2,%0";
+               case GT: return "MOV.GT\t%3+%2,%0";
+               case LE: return "MOV.LT\t%3+%2,%0\n\tMOV.Z\t%3+%2,%0";
+               case GE: return "MOV.GE\t%3+%2,%0";
+               case LTU: return "MOV.C\t%3+%2,%0";
+               case LEU: return "MOV.C\t%3+%2,%0\n\tMOV.Z\t%3+%2,%0";
+               case GEU: return "XOR\t2,CC\n\tMOV.C\t%3+%2,%0\n\tXOR\t2,CC";
+               // Can do a GEU comparison, and then undo on the Zero condition
+               // EXCEPT: with a move instruction, what's there to undo?  We
+               // just clobbered our register!
+               // case GTU: return "XOR\t2,CC\n\tMOV.C\t%3,%0\n\tSUB.Z\t%3,%0XOR\t2,CC";
+               default:
+                       internal_error("%s", "Zip/No usable addsi(reg,reg) expansion");
+                       break;
+               }
+       }
+
+       return "BREAK";
+}
+
+static int     zip_memory_move_cost(machine_mode mode, reg_class_t ATTRIBUTE_UNUSED, bool in ATTRIBUTE_UNUSED) {
+       int     rv = 14;
+       if ((mode == DImode)||(mode == DFmode))
+               rv += 2;
+       return rv;
+}
+
+// #warning "How do we tell the compiler LDI label is expensive as 2 ops"?
+
+static bool    zip_cannot_modify_jumps_p(void) {
+       // Let's try their suggested approach, keeping us from modifying jumps
+       // after reload.  This should also allow our peephole2 optimizations
+       // to adjust things back to what they need to be if necessary.
+       return (reload_completed || reload_in_progress);
+}
diff -Naur '--exclude=*.swp' gcc-5.3.0-original/gcc/config/zip/zip.h gcc-5.3.0-zip/gcc/config/zip/zip.h
--- gcc-5.3.0-original/gcc/config/zip/zip.h     1969-12-31 19:00:00.000000000 -0500
+++ gcc-5.3.0-zip/gcc/config/zip/zip.h  2016-04-01 06:33:55.090614401 -0400
@@ -0,0 +1,3898 @@
+////////////////////////////////////////////////////////////////////////////////
+//
+// Filename:   gcc/config/zip/zip.h
+//
+// Project:    Zip CPU backend for the GNU Compiler Collection
+//
+// Purpose:
+//
+// Creator:    Dan Gisselquist, Ph.D.
+//             Gisselquist Technology, LLC
+//
+////////////////////////////////////////////////////////////////////////////////
+//
+// Copyright (C) 2016, Gisselquist Technology, LLC
+//
+// This program is free software (firmware): you can redistribute it and/or
+// modify it under the terms of  the GNU General Public License as published
+// by the Free Software Foundation, either version 3 of the License, or (at
+// your option) any later version.
+//
+// This program is distributed in the hope that it will be useful, but WITHOUT
+// ANY WARRANTY; without even the implied warranty of MERCHANTIBILITY or
+// FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+// for more details.
+//
+// You should have received a copy of the GNU General Public License along
+// with this program.  (It's in the $(ROOT)/doc directory, run make with no
+// target there if the PDF file isn't present.)  If not, see
+// <http://www.gnu.org/licenses/> for a copy.
+//
+// License:    GPL, v3, as defined and found on www.gnu.org,
+//             http://www.gnu.org/licenses/gpl.html
+//
+//
+////////////////////////////////////////////////////////////////////////////////
+#ifndef        GCC_ZIP_H
+#define        GCC_ZIP_H
+
+
+//
+//
+// Zip CPU configuration registers
+//
+//
+#define        ZIP_USER        0        // Assume we are in supervisor mode
+#define        ZIP_MULTIPLY    1       // Assume we have multiply instructions
+#define        ZIP_DIVIDE      1       // Assume we have divide instructions
+#define        ZIP_FPU         0        // Assume we have no floating point instructions
+#define        ZIP_PIPELINED   1       // Assume our instructions are pipelined
+#define        ZIP_VLIW        1       // Assume we have the VLIW feature
+#define        ZIP_ATOMIC      ((ZIP_PIPELINED)&&(ZIP_VLIW))
+#define        ZIP_PIC         0        // Attempting to produce PIC code, with GOT
+#define        ZIP_HAS_DI      1
+
+// Zip has 16 registers in each user mode.
+//     Register 15 is the program counter (PC)
+//     Register 14 is the condition codes (CC)
+//     Register 13 is the stack pointer   (SP)
+//     Register 12 (may be) the Global Offset Table pointer (GOT)
+//     Register  0 (may be) the return address pointer
+// Registers 16-31 may only be used in supervisor mode.
+#define        is_ZIP_GENERAL_REG(REGNO)       ((REGNO)<13)
+#define        is_ZIP_REG(REGNO)               ((REGNO)<16)
+
+// #define     zip_FP_PSEUDO   16
+#define        zip_PC          15
+#define        zip_CC          14
+#define        zip_SP          13
+#define        zip_FP          12
+#define        zip_GOT         11
+#define        zip_AP          10
+#define        zip_R1          1
+#define        zip_R0          0
+
+#define        ZIP_FIRST_ARG_REGNO     1
+#define        ZIP_LAST_ARG_REGNO      5
+#define        NUM_ARG_REGS            (ZIP_LAST_ARG_REGNO-ZIP_FIRST_ARG_REGNO+1)
+#define        MAX_PARM_REGS           (ZIP_LAST_ARG_REGNO-ZIP_FIRST_ARG_REGNO+1)
+
+/* The overall framework of an assembler file */
+
+#define        ASM_COMMENT_START       ";"
+#define        ASM_APP_ON              ""
+#define        ASM_APP_OFF             ""
+
+#define        FILE_ASM_OP             "\t.file\n"
+
+/* Output and Generation of Labels */
+#define        GLOBAL_ASM_OP           "\t.global\t"
+
+#undef BITS_PER_UNIT
+#define        BITS_PER_UNIT   (32)
+
+/* Assembler Commands for Alignment */
+#define        ASM_OUTPUT_ALIGN(STREAM,POWER)  \
+               { int pwr = POWER; fprintf(STREAM, "\t.p2align %d\n", (pwr<2)?2:pwr); }
+
+
+/* A C compound statement to output to stdio stream STREAM the assembler syntax
+ * for an instruction operand X. */
+#define        PRINT_OPERAND(STREAM, X, CODE)  zip_print_operand(STREAM, X, CODE)
+#define        PRINT_OPERAND_ADDRESS(STREAM, X) zip_print_operand_address(STREAM, X)
+
+/* Passing arguments in registers */
+#define        FUNCTION_VALUE_REGNO_P(REGNO)   ((REGNO)==zip_R1)
+
+/* Define how to find the value returned by a function.  VALTYPE is the data
+ * type of the value (as a tree).  If the precise function being called is known
+ * FUNC is its FUNCTION_DECL; otherwise, FUNC is 0. */
+#define        FUNCTION_VALUE(VALTYPE, FUNC) gen_rtx_REG(TYPE_MODE(VALTYPE), zip_R1)
+
+/* Define how to find the value returned by a library function assuming the
+ * value has mode MODE.
+ */
+#define        LIBCALL_VALUE(MODE)     gen_rtx_REG(MODE, zip_R1)
+
+
+/* STACK AND CALLING */
+
+
+/* Define this macro as a C expression that is nonzero for registers that are
+ * used by the epilogue or the return pattern.  The stack and frame pointer
+ * registers are already assumed to be used as needed.
+ */
+#define        EPILOGUE_USES(R)        (R == RETURN_ADDRESS_REGNUM)
+
+
+/* Normal alignment required for function parameters on the stack, in bits.  All
+ * stack parameters receive at leaswt this much alignment regardless of data
+ * type. */
+#define        PARM_BOUNDARY   32
+
+/* Alignment of field after 'int : 0' in a structure. */
+#define        EMPTY_FIELD_BOUNDARY    32
+
+/* No data type wants to be aligned rounder than this. */
+#define        BIGGEST_ALIGNMENT       32
+
+/* The best alignment to use in cases where we have a choice. */
+#define        FASTEST_ALIGNMENT       32
+
+/* Every structures size must be a multiple of 32-bits. */
+#define        STRUCTURE_SIZE_BOUNDARY 32
+
+/* PCC_BITFIELD_TYPE_MATTERS -- define this if you wish to imitate the the way
+ * other C compilers handle alignment of bit-fields and the structures that
+ * contain them.
+ *
+ * The behavior is that the type written for a named bit-field (int, short, or
+ * other integer type) imposes an alignment for the entire structure, as if the
+ * structure really did contain an ordinary field of that type.  In addition,
+ * the bit-field is placed within the structure so that it would fit within
+ * such a field, not crossing a boundary for it.
+ *
+ * Thus, no most machines, a named bit-field whose type is written as int would
+ * not cross a four-byte boundary, and would force four-byte alignment for the
+ * whole structure.  (The alignment used may not be four bytes; it is controlled
+ * by other alignment parameters.)
+ *
+ * An unnamed bit-field will not affect the alignment of the containing
+ * structure.
+ *
+ * If thhe macro is defined, its definition should be a C expression, a non
+ * zero value for the expression enables this behavior.
+ * Look at the fundamental type that is used for a bit-field and use that to
+ * impose alignment on the enclosing structure.  struct s{int a:8}; should
+ * have the same alignment as 'int', not 'char'.
+ */
+#undef PCC_BITFIELD_TYPE_MATTERS
+#define        PCC_BITFIELD_TYPE_MATTERS       0
+
+/* MAX_FIXED_MODE_SIZE -- An integer expression for the size in bits of the
+ * largest integer machine mode that should actually be used.  All integer
+ * machine modes of this size and smaller can be used for structures and unions
+ * with the appropriate sizes.  If this macro is undefined,
+ * GET_MODE_BITSIZE(DImode) is assumed.
+ *
+ * ZipCPU -- The default looks good enough for us.
+ */
+
+/* Make strings word-aligned so strcpy from constants will be faster. */
+#define        CONSTANT_ALIGNMENT(EXP, ALIGN)  (((TREE_CODE(EXP)==STRING_CST)  \
+       && ((ALIGN) < FASTEST_ALIGNMENT)) ? FASTEST_ALIGNMENT : (ALIGN))
+
+/* Make arrays of chars word-aligned for the same reasons. */
+#define        DATA_ALIGNMENT(TYPE, ALIGN)     ((TREE_CODE(TYPE) == ARRAY_TYPE) \
+       && (TYPE_MODE(TREE_TYPE(TYPE)) == QImode)               \
+       && ((ALIGN < FASTEST_ALIGNMENT) ? FASTEST_ALIGNMENT : (ALIGN)))
+
+/* Generate Code for Profiling
+ */
+#define        FUNCTION_PROFILER(FILE,LABELNO)         (abort(), 0)
+
+
+/* A C expression which is nonzero if register number NUM is suitable for use
+ * as an index register in operand addresses.
+ */
+#define        REGNO_OK_FOR_INDEX_P(NUM)       0
+
+
+/* A C compound statement with a conditional 'goto LABEL;' executed if X
+ * (an RTX) is a legitimate memory address on the target machine for a memory
+ * operand of mode MODE.
+ */
+/* 17.03 Controlling the Compilation Driver, 'gcc' */
+// DRIVER_SELF_SPECS
+// OPTION_DEFAULT_SPECS
+// CPP_SPEC
+// CPLUSPLUS_CPP_SPEC
+// CC1_SPEC
+// CC1PLUS_SPEC
+/* ASM_SPEC ... A C string constant that tells the GCC driver program options
+ * to pass to the assembler.  It can also specify how to translate options you
+ * give to GCC into options for GCC to pass to the assembler.  See the file
+ * 'sun3.h' for an example of this.
+ *
+ * Do not define thismacro if it does not need to do anything.
+ */
+// #undef      ASM_SPEC
+// ASM_FINAL_SPEC
+// ASM_NEEDS_DASH_FOR_PIPED_INPUT
+
+/* LINK_SPEC ... A C string constant that tells the GCC driver program options
+ * to pass to the linker.  It can also specify how to translate options you give
+ * to GCC into options for GCC to pass to the linker.
+ *
+ * Do not define this macro if it does not need to do anything.
+ */
+
+/* LIB_SPEC ... Another C string constant very much like LINK_SPEC.  The
+ * difference between the two is that LIB_SPEC is used at the end of the
+ * command given to the linker.
+ *
+ * If this macro is not defined, a default is provided that loads the standard
+ * C library from the usual place.  See 'gcc.c'.
+ */
+#undef LIB_SPEC
+// #define     LIB_SPEC        "%{!g:-lc} %{g:-lg} -lzip"
+#define        LIB_SPEC        ""
+
+/* LIBGCC_SPEC ... Another C string constant that tells the GCC driver program
+ * hoow and when to place a reference to 'libgcc.a' into the linker command
+ * line.  This constant is placed both before and after the value of LIB_SPEC.
+ *
+ * If this macro is not defined, the GCC driver provides a default that passes
+ * the string '-lgcc' to the linker.
+ */
+#undef LIBGCC_SPEC
+#define        LIBGCC_SPEC     ""
+
+/* REAL_LIBGCC_SPEC ... By default, if ENABLE_SHARED_LIBGCC is defined, the
+ * LIBGCC_SPEC is not directly used by the driver program but is instead
+ * modified to refer to different versions of 'libgcc.a' depending on the
+ * values of the command line flags '-static', '-shared', '-static-libgcc',
+ * and '-shared-libgcc'.  On targets where these modifications are
+ * inappropriate, define REAL_LIBGCC_SPEC instead.  REAL_LIBGCC_SPEC tells the
+ * driver how to place a reference to 'libgcc' on the link command line, but
+ * unlike LIBGCC_SPEC, it is used unmodified.
+ */
+#define        REAL_LIBGCC_SPEC        ""
+
+// USE_LD_AS_NEEDED
+// LINK_EH_SPEC
+
+/* STARTFILE_SPEC ... Another C string constant used much like LINK_SPEC.  The
+ * difference between the two is that STARTFILE_SPEC is used at the very
+ * beginning of the command given to the linker.
+ *
+ * If this macro is not defined, a default is provided that loads the standard
+ * C startup file from the usual place.  See 'gcc.c'
+ */
+#undef STARTFILE_SPEC
+#define        STARTFILE_SPEC  ""
+
+/* ENDFILE_SPEC ... Another C string constant used much like LINK_SPEC.  The
+ * difference between the two is that ENDFILE_SPEC is used at the very end
+ * of the command given to the linker.
+ *
+ * Do not define this macro if it does not do anything.
+ */
+// #undef      ENDFILE_SPEC
+// #define     ENDFILE_SPEC    ""
+
+// THREAD_MODEL_SPEC
+// SYSROOT_SUFFIX_SPEC
+// SYSROOT_HEADERS_SUFFIX_SPEC
+// EXTRA_SPECS
+// LINK_LIBGCC_SPECIAL_1
+// LINK_GCC_C_SEQUENCE_SPEC
+// LINK_COMMAND_SPEC
+// TARGET_ALWAYS_STRIP_DOTDOT
+// MULTILIB_DEFAULTS
+// RELATIVE_PREFIX_NOT_LINKDIR
+// MD_EXEC_PREFIX
+// STANDARD_STARTFILE_PREFIX
+// STANDARD_STARTFILE_PREFIX_1
+// STANDARD_STARTFILE_PREFIX_2
+// MD_STARTFILE_PREFIX
+// MD_STARTFILE_PREFIX_1
+// INIT_ENVIRONMENT
+// LOCAL_INCLUDE_DIR
+#undef LOCAL_INCLUDE_DIR
+
+// NATIVE_SYSTEM_HEADER_COMPONENT
+// INCLUDE_DEFAULTS
+
+/* 17.03 Run-time Target Specification */
+
+/* TARGET_CPU_CPP_BUILTINS() ... This function-like macro expands to a block of
+ * code that defines built-in preprocessor macros and assertions for the target
+ * CPU, using the functions builtin_define, builtin_define_std, and
+ * builtin_assert.  When the front end calls this macro it provides a trailing
+ * semicolon, and since it has finished command line option proccessing your
+ * code can use those results freely.
+ *
+ * ZipCPU --- We should probably capture in this macro what capabilities the
+ * command line parameters we've been given indicate that our CPU has.  That
+ * way, code can be adjusted depending upon the CPU's capabilities.
+ */
+#define        TARGET_CPU_CPP_BUILTINS()                       \
+       { builtin_define("__ZIPCPU__");                 \
+       if (ZIP_FPU) builtin_define("__ZIPFPU__");      \
+       if (ZIP_ATOMIC) builtin_define("__ZIPATOMIC__");        \
+       }
+       // If (zip_param_has_fpu)  builtin_define("__ZIPFPU__");
+       // If (zip_param_has_div)  builtin_define("__ZIPDIV__");
+       // If (zip_param_has_mpy)  builtin_define("__ZIPMPY__");
+       // If (zip_param_has_lock) builtin_define("__ZIPLOCK__");
+       // If (zip_param_supervisor) builtin_define("__ZIPUREGS__");
+       // If (we support int64s) builtin_define("___int64_t_defined");
+
+/* TARGET_OS_CPP_BUILTINS() ... Similarly to TARGET_CPU_CPP_BUILTINS but this
+ * macro is optional and is used for the target operating system instead.
+ */
+
+/* Option macros: (we need to define these eventually ... )
+ *
+ *     TARGET_HANDLE_OPTION
+ *     TARGET_HANDLE_C_OPTION
+ *     TARGET_OBJ_CONSTRUCT_STRING_OBJECT
+ *     TARGET_OBJ_DECLARE_UNRESOLVED_CLASS_REFERENCE
+ *     TARGET_OBJ_DECLARE_CLASS_DEFINITION
+ *     TARGET_STRING_OBJECT_REF_TYPE_P
+ *     TARGET_CHECK_STRING_OBJECT_FORMAT_ARG
+ *     TARGET_OVERRIDE_OPTIONS_AFTER_CHANGE(VOID)
+ *     C_COMMON_OVERRIDE_OTPTIONS
+ *     TARGET_OPTION_OPTIMIZATION_TABLE
+ *     TARGET_OPTION_INIT_STRUCT
+ *     TARGET_OPTION_DEFAULT_PARAMS
+ */
+
+/* SWITCHABLE_TARGET
+ *
+ * Zip CPU doesn't need this, so it defaults to zero.  No need to change it
+ * here.
+ */
+
+/* TARGET_FLOAT_EXCEPTIONS_ROUNDING_SUPPORTED_P(VOID) ... Returns true if the
+ * target supports IEEE 754 floating-point exceptions and rounding modes, false
+ * otherwise.  This is intended to relate to the float and double types, but not
+ * necessarily "long double".  By default, returns true if the adddf3
+ * instruction pattern is available and false otherwise, on the assumption that
+ * hardware floating point supports exceptions and rounding modes but software
+ * floating point does not.
+ *
+ * ZipCPU floating point is barely going to be functional, I doubt it will
+ * support all of these bells and whistles when full functionality is even
+ * achieved.  Therefore, we won't support these modes.  However, we can't just
+ * set this to zero, so let's come back to this.
+ */
+// #warning "Wrong answer encoded to date"
+// #undef      TARGET_FLOAT_EXCEPTIONS_ROUNDING_SUPPORTED_P
+// #define     TARGET_FLOAT_EXCEPTIONS_ROUNDING_SUPPORTED_P(X) 0
+
+/* 17.04 Defining data structures for per-function information */
+
+/* INIT_EXPANDERS ... Macro called to initialize any target specific
+ * information.  This macro is called once per function, before generation of
+ * any RTL has begun.  The intention is to allow the initialization of the
+ * function pointer init_machine_status.
+ */
+// #warning "I may need to define this to handle function return addresses ..."
+
+/* 17.05 Storage Layout */
+
+/* Storage Layout */
+#define        BITS_BIG_ENDIAN         0        // MSB has highest number
+#define        BYTES_BIG_ENDIAN        1       // 1 if MSB is lowest number
+#define        WORDS_BIG_ENDIAN        1       // 1 if MSW is lowest number
+#define        FLOAT_WORDS_BIG_ENDIAN  1
+#define        BITS_PER_WORD           32
+// #define     MAX_BITS_PER_WORD       // defaults to BITS_PER_WORD
+#define        UNITS_PER_WORD          1       // Storage units in a word, pwr of 2:1-8
+#define        MIN_UNITS_PER_WORD      1       // Default is UNITS_PER_WORD
+/* POINTER_SIZE ... Width of a pointer in bits.  You must specify a value no
+ * wider than the width of Pmode.  If it is not equal to the width of Pmode,
+ * you must define POINTERS_EXTEND_UNSIGNED. If you do not specify a value the
+ * default is BITS_PER_WORD.
+ *
+ * ZipCPU --- All of our pointers are 32-bits, the width of our address bus.
+ */
+#define        POINTER_SIZE            32      // Ptr width in bits
+/* POINTERS_EXTEND_UNSIGNED ... A C expression that determines how pointers
+ * should be extended from ptr_mode to either Pmode or word_mode.  It is greater
+ * than zero if pointers should be zero-extended, zero if they should be sign
+ * extended, and negative if some other conversion is needed.  In the last case,
+ * the extension is done by the target's ptr_extend instruction.
+ *
+ * You need not define this macro if the ptr_mode, Pmode, and word_mode are all
+ * the same width.
+ *
+ * ZipCPU --- While we shouldn't need this, QImode and HImode have the same
+ * number of bits as SImode.  Therefore, one might wish to convert between the
+ * two.  Hence, we specify how we would do that here.
+ */
+#define        POINTERS_EXTEND_UNSIGNED        0
+
+/* PROMOTE_MODE(m,unsignedp,type) ... A macro to update m and unsignedp when an
+ * object whose type is type and which has he specified mode and signedness is
+ * to be stored in a register.  This macro is only called when type is a scalar
+ * type.
+ *
+ * On most RISC machines, which only have operations that operate on a full
+ * register, define this macro to set m to word_mode if m is an integer mode
+ * narrower than BITS_PER_WORD.  In most cases, only integer modes should be
+ * widened because wider precision floating-point operations are usually more
+ * expensive than their narrower counterparts.
+ *
+ * For most machines, the macro definition does not change unsigndep.  However,
+ * some machines, have instructions that preferentially handle either signed or
+ * unsigned quantities of certain modes.  For example, on the DEC Alpha, 32-bit
+ * loads from memory and 32-bit add instructions sign-extend the result to
+ * 64-bits. On such machines, set unsignedp according to which kind of extension
+ * is more efficient.
+ *
+ * Do not define this macro if it would never modify m.
+ *
+ * ZipCPU --- We need to always (if possible) promote everything to SImode where
+ * we can handle things.  HImode and QImode just don't make sense on this CPU.
+ */
+#define        PROMOTE_MODE(M,U,T)     if ((GET_MODE_CLASS(M)==MODE_INT)&&(GET_MODE_SIZE(M)<2)) (M)=SImode;
+
+// TARGET_PROMOTE_FUNCTION_MODE
+/* PARM_BOUNDARY ... Normal alignment required for function parameters on the
+ * stack, in bits.  All stack parameters receive at least this much alignment
+ * regardless of data type.  On most machines, this is the same as the size of
+ * an integer.
+ */
+#define        PARM_BOUNDARY   32
+
+/* STACK_BOUNDARY ... Define this macro to the minimum alignment enforced by
+ * hardware for the stack pointer on this machine.  The definition is a C
+ * expression for the desired alignment (measured in bits).  This value is used
+ * as a default if PREFERRED_STACK_BOUNDARY is not defined.  On most machines,
+ * this should be the same as PARM_BOUNDARY.
+ */
+#define        STACK_BOUNDARY  PARM_BOUNDARY
+
+/* PREFERRED_STACK_BOUNDARY ... Define this ... */
+
+/* INCOMING_STACK_BOUNDARY
+ */
+
+/* FUNCTION_BOUNDARY ... Alignment required for a function entry point, in bits.
+ */
+#define        FUNCTION_BOUNDARY       32
+
+/* BIGGEST_ALIGNMENT ... Biggest alignment that any data type can require on
+ * this machine, in bits.  Note that this is not the biggest alignment that is
+ * supported, just the biggest alignment that, when violated, may cause a fault.
+ */
+#define BIGGEST_ALIGNMENT      32
+
+/* MINIMUM_ATOMIC_ALIGNMENT ... If defined, the smallest alignment, that can be
+ * given to an object that can be referenced in one operation, without
+ * disturbing any nearby object.  Normally, this is BITS_PER_UNIT, but may be
+ * larger on machines that don't have byte or halfword store operations.
+ */
+#define        MINIMUM_ATOMIC_ALIGNMENT        BITS_PER_UNIT
+
+/* STRICT_ALIGNMENT ... Set this nonzero if move instructions will actually
+ * fail to work when given unaligned data.  If instructions will merely go
+ * slower in that case, define this macro as 0.
+ */
+#define        STRICT_ALIGNMENT        1
+
+/* MAX_FIXED_MODE_SIZE ... An integer expression for the size in bits of the
+ * largest integer machine mode that should actually be used.  All integer
+ * machine modes of this size or smaller can be used for structures and unions
+ * with the appropriate sizes.  If this macro is undefined,
+ * GET_MODE_BITSIZE(DImode) is assumed.
+ *
+ * ZipCPU ... Get_MOD_BITSIZE(DImode) will be 64, and this is really not the
+ * size on bits of the largest integer machine mode.  However, that's the case
+ * with most DI implementations: A long is two words, spliced together.  We'd
+ * like to support that eventually, but we need to get there.  Hence, let's use
+ * compile time flag (ZIP_HAS_DI) that we can enable when we're ready.
+ */
+#if (ZIP_HAS_DI != 0)
+#define        MAX_FIXED_MODE_SIZE     64
+#else
+#define        MAX_FIXED_MODE_SIZE     32
+#endif
+
+
+/* 17.06 Layout of Source Language Data Types */
+
+#undef CHAR_TYPE_SIZE
+#undef SHORT_TYPE_SIZE
+#undef INT_TYPE_SIZE
+#undef LONG_TYPE_SIZE
+#undef LONG_LONG_TYPE_SIZE
+//
+#define        CHAR_TYPE_SIZE  32
+#define        SHORT_TYPE_SIZE 32
+#define        INT_TYPE_SIZE   32
+#define        LONG_TYPE_SIZE  32
+#define        LONG_LONG_TYPE_SIZE     64
+// BOOL_TYPE_SIZE defaults to CHAR_TYPE_SIZE
+#undef FLOAT_TYPE_SIZE
+#undef DOUBLE_TYPE_SIZE
+#undef LONG_DOUBLE_TYPE_SIZE
+#define        FLOAT_TYPE_SIZE         32
+#define        DOUBLE_TYPE_SIZE        FLOAT_TYPE_SIZE // Zip CPU doesn't support dbls
+#define        LONG_DOUBLE_TYPE_SIZE   64      // This'll need to be done via emulation
+// SHORT_FRAC_TYPE_SIZE
+// LONG_FFRACT_TYPE_SIZE
+// LONG_LONG_FRACT_TIME_SIZE
+#undef SHORT_ACCUM_TYPE_SIZE
+#undef ACCUM_TYPE_SIZE
+#undef LONG_ACCUM_TYPE_SIZE
+#define        SHORT_ACCUM_TYPE_SIZE   SHORT_TYPE_SIZE
+#define        ACCUM_TYPE_SIZE         INT_TYPE_SIZE
+#define        LONG_ACCUM_TYPE_SIZE    LONG_TYPE_SIZE
+
+/* LIBGCC2_GNU_PREFIX ... This macro corresponds to the TARGET_GNU_PREFIX target
+ * hook and should be defined if that hook is overriden to be true.  It causes
+ * function names in libgcc to be changed to use a __gnu_ prefix for their name
+ * rather than the default __.  A port which uses this macro should also arrange
+ * to use t-gnu-prefix in the libgcc config.host.
+ *
+ * ZipCPU -- I see no reason to define and therefore change this behavior.
+ */
+
+/* TARGET_FLT_EVAL_METHOD ... A C expression for the value for FLT_EVAL_METHOD
+ * in float.h,, assuming, if applicable, that the floating-point control word
+ * is in its default state.  If you do not define this macro the value of
+ * FLT_EVAL_METHOD will be zero.
+ *
+ * ZipCPU --- ???
+ */
+
+/* WIDEST_HARDWARE_FP_SIZE ... A C expression for the size in bits of the widest
+ * floating-point format supported by the hardware.  If you define this macro,
+ * you must specify a value less than or equal to the value of LONG_DOUBLE_...
+ * If you do not define this macro, the value of LONG_DOUBLE_TYPE_SIZE is the
+ * default.
+ *
+ * ZipCPU supports 32-bit IEEE floats--IF THE SUPPORT IS COMPILED IN!  This
+ * really needs to be determined, then, based upon a compile time parameter
+ * where the one compiling the code states whether or not the H/W even has
+ * floating point support.
+ *
+ * For now, we'll assume it does--but once we implement GCC parameters, we'll
+ * need to change this.
+ */
+#undef WIDEST_HARDWARE_FP_SIZE
+// #warning "Definition needs to change if no FPU present"
+#define        WIDEST_HARDWARE_FP_SIZE FLOAT_TYPE_SIZE
+
+/* DEFAULT_SIGNED_CHAR ... An expression whose value is 1 or 0, according to
+ * whether the type char should be signed or unsigned by default.  The user
+ * can always override this default with the options -fsigned-char and
+ * -funsigned-char.
+ *
+ * ZipCPU--let's go with the default behavior.
+ */
+#define        DEFAULT_SIGNED_CHAR     1
+
+/* TARGET_DEFAULT_SHORT_ENUMS(VOID) ... This target hook should return true if
+ * the compiler should give an enum type only as many bytes as it takes to
+ * represent the range of possible values of that type.  It should return
+ * false if all enum types should be allocated like int.
+ *
+ * The default is to return false.  This is what the ZipCPU needs, so we won't
+ * override it.
+ */
+
+/* SIZE_TYPE ... A C expression for a string describing the name of the data
+ * type to use for size values.  The typedef name size_t is defined using the
+ * contents of the string.
+ *
+ * If you don't define this macro, the default is "long unsigned int".  Since
+ * on the ZipCPU this is a 32-bit number, and all ZipCPU values are 32-bits,
+ * the default seems perfect for us.
+ */
+#define        SIZE_TYPE       "unsigned int"
+
+/* SIZETYPE ... GCC defines internal types () for expressions dealing with size.
+ * This macro is a C expression for a string describing the name of the data
+ * type from which the precision of sizetype is extracted.  The string has the
+ * same restrictions as SIZE_TYPE string.  If you don't define this macro, the
+ * default is SIZE_TYPE --- which seems good enough for us.
+ */
+
+/* PTRDIFF_TYPE ... A C expression for a string describing the name of the data
+ * type to use fo rthe result of subtracting two pointers.  The typedef name
+ * ptrdiff_t is defined using the contents of the string.  See SIZE_TYPE for
+ * more information.
+ *
+ * The default is "long int" which for the ZipCPU is 32-bits---still good enough
+ * for us.
+ */
+#define        PTRDIFF_TYPE    "int"
+
+/* WCHAR_TYPE ... A C expression for a string describing the name of the data
+ * type to use for wide characters.  The typedef name wchar_t is defined using
+ * the contents of  the string.  If you don't define this macro, the default is
+ * 'int'--good enough for ZipCPU.
+ */
+
+/* WCHAR_TYPE_SIZE ... A C expression for the size in bits of the data type for
+ * wide characters.  This is used in cpp, which cannot make use of WCHAR_TYPE.
+ */
+#undef WCHAR_TYPE_SIZE
+#define        WCHAR_TYPE_SIZE 32
+
+/* WINT_TYPE ... A C expression for a string describing the name of the data
+ * type to use for wide characters passed to printf and returned from getwc.
+ * The typedef name wint_t is defined using the contents of the string.  See
+ *
+ * ZipCPU -- If you don't define this macro, the default is "unsigned int"--also
+ * best for us again.
+ */
+
+/* INTMAX_TYPE ... A C expression for a string describing the name of the
+ * data type that can represent any value of any standard or extended signed
+ * integer type.  The typedef name intmax_t is defined using the contents of
+ * the string.
+ *
+ * If you don't define this macro, the default is the first of "int", "long int"
+ * or "long long int" that has as much precision as "long long int".
+ */
+
+/* UINTMAX_TYPE ... same as INTMAX_TYPE, but for unsigned
+ */
+
+#undef SIG_ATOMIC_TYPE
+#if (ZIP_ATOMIC != 0)
+#define        SIG_ATOMIC_TYPE "int"
+#else
+#define        SIG_ATOMIC_TYPE NULL    // We have no atomic types, but registers
+#endif
+#undef INT8_TYPE
+#define        INT8_TYPE               NULL    // We have no 8-bit integer type
+#undef INT16_TYPE
+#define        INT16_TYPE              NULL
+#undef INT32_TYPE
+#define        INT32_TYPE              "int"
+#undef UINT8_TYPE
+#define        UINT8_TYPE              NULL
+#undef UINT16_TYPE
+#define        UINT16_TYPE             NULL
+#undef UINT32_TYPE
+#define        UINT32_TYPE             "unsigned int"
+#undef INT_LEAST8_TYPE
+#define        INT_LEAST8_TYPE         "int"
+#undef INT_LEAST16_TYPE
+#define        INT_LEAST16_TYPE        "int"
+#undef INT_LEAST32_TYPE
+#define        INT_LEAST32_TYPE        "int"
+#undef UINT_LEAST8_TYPE
+#define        UINT_LEAST8_TYPE        "unsigned int"
+#undef UINT_LEAST16_TYPE
+#define        UINT_LEAST16_TYPE       "unsigned int"
+#undef UINT_LEAST32_TYPE
+#define        UINT_LEAST32_TYPE       "unsigned int"
+#undef INT_FAST8_TYPE
+#define        INT_FAST8_TYPE          "int"
+#undef INT_FAST16_TYPE
+#define        INT_FAST16_TYPE         "int"
+#undef INT_FAST32_TYPE
+#define        INT_FAST32_TYPE         "int"
+#undef UINT_FAST8_TYPE
+#define        UINT_FAST8_TYPE         "unsigned int"
+#undef UINT_FAST16_TYPE
+#define        UINT_FAST16_TYPE        "unsigned int"
+#undef UINT_FAST32_TYPE
+#define        UINT_FAST32_TYPE        "unsigned int"
+#undef INTPTR_TYPE
+#define        INTPTR_TYPE             "unsigned int"
+#undef UINTPTR_TYPE
+#define        UINTPTR_TYPE            "unsigned int"
+
+#undef INT64_TYPE
+#undef UINT64_TYPE
+#undef INT_LEAST64_TYPE
+#undef UINT_LEAST64_TYPE
+#undef INT_FAST64_TYPE
+#undef UINT_FAST64_TYPE
+
+#if (ZIP_HAS_DI != 0)
+#define        INT64_TYPE              "long int"
+#define        UINT64_TYPE             "long unsigned int"
+#define        INT_LEAST64_TYPE        "long int"
+#define        UINT_LEAST64_TYPE       "long unsigned int"
+#define        INT_FAST64_TYPE         "long int"
+#define        UINT_FAST64_TYPE        "long unsigned int"
+#else
+#define        INT64_TYPE              NULL
+#define        UINT64_TYPE             NULL
+#define        INT_LEAST64_TYPE        NULL
+#define        UINT_LEAST64_TYPE       NULL
+#define        INT_FAST64_TYPE         NULL
+#define        UINT_FAST64_TYPE        NULL
+#endif
+
+#define        TARGET_PTRMEMFUNC_VBI_LOCATION  ptrmemfunc_vbit_in_pfn
+
+
+/* 17.07 Register Usage / Register definitions */
+
+/* FIRST_PSEUDO_REGISTER ... Number of hardware registers known to the compiler.
+ * They receive numbers 0 through FIRST_PSEUDO_REGISTER-1; thus the first
+ * pseudo register's numbrer really is assigned the number
+ * FIRST_PSEUDO_REGISTER.
+ *
+ * ZipCPU---There are 16 registers in the ZipCPU, numbered 0-15 with the CC
+ * and PC register being numbered 14 and 15 respectively.  Therefore, the
+ * compiler can take register number 16 and above and do whatever it wants
+ * with it.
+ */
+#ifdef DEFINE_USER_REGS
+#  define      FIRST_PSEUDO_REGISTER   32
+#else
+#  ifdef       zip_FP_PSEUDO
+#    define    FIRST_PSEUDO_REGISTER   (zip_FP_PSEUDO+1)
+#  else
+#    define    FIRST_PSEUDO_REGISTER   16
+#  endif
+#endif
+
+/* FIXED_REGISTERS ... An initializer that says which registers are used for
+ * fixed purposes all throughout the compiled code and are therefore not
+ * available for general allocation.  These would include the stack pointer, the
+ * frame pointer (except on machines where that can be used as a general
+ * register when no frame pointer is needed), the program counter on machines
+ * where that is considered one of the addressable registers, and any other
+ * numbered register with a standard use.
+ *
+ * This information is expressed as a sequence of numbers, separated by commas,
+ * and surrounded by braces.  The nth number is 1 if register n is fixed, 0
+ * otherwise.
+ *
+ * For the Zip CPU, we have three fixed registers that are not available for
+ * general allocation:
+ *
+ *     SP      The stack pointer
+ *     CC      The condition codes and CPU state register
+ *     PC      The program counter
+ *
+ * Other registers, such as FP (the frame pointer) or GBL (the global offset
+ * table pointer) are registers that we hope will not be so fixed.
+ */
+#ifdef zip_FP_PSEUDO
+#  define      FIXED_REGISTERS         { 0,0,0,0,0,0,0,0,0,0,0,0,0,1,1,1,1 }
+#else
+#  define      FIXED_REGISTERS         { 0,0,0,0,0,0,0,0,0,0,0,0,0,1,1,1 }
+#endif
+
+/* CALL_USED_REGISTERS ... like FIXED_REGISTERS but has 1 for each register
+ * that is clobbered (in general) by function calls as well as for fixed
+ * registers.  This macro therefore identifies the registers that are not
+ * available for general allocation of values that must live across function
+ * calls.
+ *
+ * If a register has 0 in CALL_USED_REGISTERS, the compiler automatically saves
+ * it on function entry and restores it on function exit, if the register is
+ * used within the function.
+ *
+ * On the Zip CPU, we must save R0 (the return address), and (let's pick) any
+ * register above R5.
+ */
+#ifdef zip_FP_PSEUDO
+#  define      CALL_USED_REGISTERS     { 0,1,1,1,1,0,0,0,0,0,0,0,0,1,1,1,1 }
+#else
+#  define      CALL_USED_REGISTERS     { 0,1,1,1,1,0,0,0,0,0,0,0,0,1,1,1 }
+#endif
+
+/* CALL_REALLY_USED_REGISTERS ...  optional macro that, if not defined, defaults
+ * to the value of CALL_USED_REGISTERS.
+ */
+
+/* HARD_REGNO_CALL_PART_CLOBBERED(REGNO,MODE) ... A C expression that is nonzero
+ * if it is not permissible to store a value of mode MODE in hard register REGNO
+ * across a call without some part of it being clobbbered.  For most machines,
+ * this macro need not be defined.  It is only required for machines that do
+ * not preserve the entire contents of a register across a call.
+ *
+ * In the Zip CPU, we clobber R0 with our return address during a call, so let's
+ * make sure this gets included here.
+ */
+#define        HARD_REGNO_CALL_PART_CLOBBERED(REGNO,MODE)      (REGNO==0)
+
+/* TARGET_CONDITIONAL_REGISTER_USAGE(VOID) ... This hook may conditionally
+ * modify five variables fixed_regs, call_used_regs, global_regs, reg_names, and
+ * reg_class_contents, to take into account any dependence of these register
+ * sets on target flags.  The first three of these are of type char[]
+ * (interpreted as Boolean vectors).  global_regs is a const char *[] and
+ * reg_class_contents is a HARD_REG_SET.  Before the macro is called,
+ * fixed_regs, call_used_regs, reg_class_contents, and reg_names have been
+ * initialized from FIXED_REGISTERS, CALL_USED_REGISTERS, REG_CLASS_CONTENTS,
+ * and REGISTER_NAMES, respectively.  global_regs has been cleared, and any
+ * -ffixed-reg, -fcall-used-reg, and -fcall-saved-reg command options have been
+ * applied.
+ *
+ * ZipCPU -- I may need to return and define this depending upon how FP and
+ * GBL register allocation go.  But for now, we'll leave this at its default
+ * value.
+ */
+// #warning "Revisit me after FP and GBL allocation"
+
+/* INCOMING_REGNO(out) ... Define this macro if the target machine has register
+ * windows. ...
+ *
+ * Zip CPU has no register windows.
+ */
+
+/* OUTGOING_REGNO ... same thing.
+ */
+
+/* LOCAL_REGNO ... same thing.
+ */
+
+/* PC_REGNUM ... If the program counter has a register number, define this as
+ * that register number.  Otherwise do not define it.
+ */
+#define        PC_REGNUM       zip_PC
+
+
+/* REG_ALLOC_ORDER ... If defined, an initializer for a vector of integers,
+ * containing the number of hard registers in the order in which GCC should
+ * prefer to use them (from most preferred to least.
+ *
+ * If this macro is not defined, registers are used lowest numbered first (all
+ * else being equal).
+ *
+ * Since the default is the ZipCPU desired case, we won't define this here.
+ */
+
+/* ADJUST_REG_ALLOC_ORDER ... on most machines it is not necessary to define
+ * this macro, so we won't either.
+ */
+
+/* HONOR_REG_ALLOC_ORDER ...
+ */
+
+/* HONOR_REG_ALLOC_ORDER ... on most machines it is not necessary to define
+ * this macro, so we won't either.
+ */
+
+/* HARD_REGNO_NREGS(REGNO, MODE) ... A C expression for the number of
+ * consecutive hard registers, starting at register number REGNO, required to
+ * hold a value of mode MODE.
+ *
+ * On a machine where all registers are exactly one word, a suitable definition
+ * is given of ((GET_MODE_SIZE(MODE)+UNITS_PER_WORD-1)/UNITS_PER_WORD.
+ *
+ * On ZipCPU, we might do
+ *     ((((MODE)==DImode)||((MODE)==DFmode))?2:1)
+ * but I think the default (above) code should work as well.  Hence, let's stick
+ * with the default, lest someone try to create larger modes (TImode, OImode,
+ * XImode) and expect us to follow them properly some how.
+ *
+ * Okay, now in hind sight, we know that the default doesn't work for our
+ * architecture, since GET_MODE_SIZE(SImode)=4, not 1.  Thus, let's rearrange
+ * this expression to work in bits rather than in bytes and we'll know more
+ * of what we are doing.
+ */
+#undef HARD_REGNO_NREGS
+#define        HARD_REGNO_NREGS(REGNO, MODE)   ((GET_MODE_SIZE(MODE)+UNITS_PER_WORD-1)\
+               / (UNITS_PER_WORD))
+
+/* HARD_REGNO_NREGS_HAS_PADDING(REGNO,MODE) ... A C expression that is nonzero
+ * if a value of mode MODE, stored in memory, ends with padding that causes it
+ * to take up more space than in registers starting at register number REGNO
+ * (as determined by multiplying GCC's notion of the size of the register when
+ * containing this mode by the number of registers returned by HARD_REGNO_NREGS)
+ * By default this is zero.
+ *
+ * Zip CPU --- The default looks good enough to me.
+ */
+
+/* HARD_REGNO_NREGS_WITH_PADDING(REGNO, MODE)
+ *
+ * ZipCPU ---
+ */
+
+/* REGMODE_NATURAL_SIZE(MODE) -- Define this macro if the natural size of
+ * registers that hold values of mode mode is not the word size.  It is a C
+ * expression that should give the natural size in bytes for the specified mode.
+ * It is used by the register allocator to try to optimize its results.
+ *
+ * ZipCPU ---
+ */
+// #define     REGMODE_NATURAL_SIZE(MODE)      (((MODE)==DImode)?2:1)
+
+/* HARD_REGNO_MODE_OK ... A C expression that is nonzero if it is permissible
+ * to store a value of mode MODE in a hard register number REGNO (or in several
+ * registers starting with that one).  For a machine where all registers are
+ * equivalent, a suitable definition is '1'.  You need not include code to check
+ * for the numbers of fixed registers, because the allocation mechanism
+ * considered them to be always occupied.
+ *
+ * ZipCPU --- As long as you are already avoiding the fixed registers, the
+ * suitable default definition mentioned above should be sufficient.
+ */
+#undef HARD_REGNO_MODE_OK
+#define        HARD_REGNO_MODE_OK(R,M) (R<zip_CC)
+
+/* HARD_REGNO_RENAME_OK(FROM,TO) ... A C expression that is nonzero if it is
+ * okay to rename a hard register FROM to another hard register TO.  One common
+ * use of this macro is to prevernt renaming of a register to another register
+ * that is not saved by a prologue in an interrupt handler.  The default is
+ * always nonzero.
+ *
+ * ZipCPU --- The default looks good enough to us.
+ */
+#undef HARD_REGNO_RENAME_OK
+#define        HARD_REGNO_RENAME_OK(FROM,TO)   ((is_ZIP_GENERAL_REG(FROM))&&(is_ZIP_GENERAL_REG(TO)))
+
+
+/* MODES_TIABLE_P(M1, M2) ... A C expression that is nonzero if a value of mode
+ * M1 is accessible in mode M2 without copying.
+ *
+ * ZipCPU --- well, that's true for us (although we support scant few modes) ...
+ * so lets' set to one.
+ */
+#define        MODES_TIEABLE_P(M1,M2)  1
+
+/* TARGET_HARD_REGNO_SCRATCH_OK(REGNO)
+ * This target hook should return true if it is OK to use a hard register
+ * REGNO has a scratch register in peephole2.  One common use of this macro is
+ * to prevent using of a register that is not saved by a prologue in an
+ * interrupt handler.  The default version of this hook always returns true.
+ *
+ * ZipCPU --- the default works for us as well.  If you are in an interrupt
+ * context, you have an entirely new set of registers (the supervisor set), so
+ * this is a non-issue.
+ */
+
+/* AVOID_CCMODE_COPIES ... define this macro if the compiler should avoid
+ * copies to/from CCmode register(s).  You should only define this macro if
+ * support for copying to/from CCmode is incomplete.
+ *
+ * ZipCPU --- CCmode register copies work like any other, so we'll keep with the
+ * default definition.
+ */
+
+/* STACK_REGS ... Define this if the machine has any stack-like registers.
+ *
+ * Zip CPU has no stack-like registers, as their definition is different from
+ * the ZipCPU stack pointer register.
+ */
+
+#define        ZIP_REG_BYTE_SIZE       1
+
+/* 17.08 Register Classes */
+
+/* enum reg_class ... An enumerate type that must be defined with all the
+ * register class names as enumerated values.  NO_REGS must be first.  ALL_REGS
+ * must be the last register class, followed by one more enumerated value,
+ * LIM_REG_CLASSES, which is not a register class but rather tells how many
+ * classes there are.
+ *
+ * ZipCPU --- We'll defined register 0-13 as general registers, 14-15 in
+ * all_regs, and go from there.
+ */
+enum   reg_class {
+       NO_REGS, GENERAL_REGS,
+#ifdef DEFINE_USER_REGS
+       USER_REGS,
+#endif
+       ALL_REGS, LIM_REG_CLASSES
+};
+
+/* N_REG_CLASSES ... the number of distinct register classes, defined as follows
+ */
+#define        N_REG_CLASSES   (int)LIM_REG_CLASSES
+
+/* REG_CLASS_NAMES ... An initializer containing the names of the register
+ * classes as C string constants.  These names are used in writing some of the
+ * debugging dumps.
+ */
+#define        REG_CLASS_NAMES { "NO_REGS", "GENERAL_REGS", "ALL_REGS" }
+
+/* REG_CLASS_CONTENTS ... An initializer containing the contents of the register
+ * classes, as integerss which are bit masks.  The nth integer specifies the
+ * contents of class n.  That way the integer mask is interpreted as that
+ * register r is in the class if (mask&(1<<r)) is 1.
+ *
+ * When the machine has more than 32 registers ... that's not us.
+ *
+ * ZipCPU --- This is straight forward, three register classes, etc.
+ */
+#ifdef zip_FP_PSEUDO
+#define        REG_CLASS_CONTENTS { { 0x00000}, {0x13fff}, {0x1ffff} }
+#else
+#define        REG_CLASS_CONTENTS { { 0x00000}, {0x03fff}, {0x0ffff} }
+#endif
+
+#ifdef DEFINE_USER_REGS
+#define        REG_CLASS_NAMES { "NO_REGS", "GENERAL_REGS", "USER_REGS", "ALL_REGS" }
+#define        REG_CLASS_CONTENTS { { 0x00000},{0x03fff},{0x0ffff0000},{0x0ffffffff} }
+#define        FIXED_REGISTERS         { 0,0,0,0,0,0,0,0,0,0,0,0,0,1,1,1,  1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1 }
+#define        CALL_USED_REGISTERS     { 0,1,1,1,1,0,0,0,0,0,0,0,0,1,1,1,  1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1 }
+#endif
+
+/* REGNO_REG_CLASS ... A C expression whose value is a register class
+ * containing hard register REGNO.  In general there is more than one such
+ * class;  Choose a class which is minimal, meaning that no smaller class also
+ * contains the register.
+ */
+#undef REGNO_REG_CLASS
+#ifdef zip_FP_PSEUDO
+#define        REGNO_REG_CLASS(R)      (is_ZIP_REG(R)?((((R)<=13)||((R)==zip_FP_PSEUDO))?GENERAL_REGS:ALL_REGS):NO_REGS)
+#else
+#define        REGNO_REG_CLASS(R)      (is_ZIP_REG(R)?((R<=13)?GENERAL_REGS:ALL_REGS):NO_REGS)
+#endif
+
+/* BASE_REG_CLASS ... A macro whose definition is the name of the class to which
+ * a valid base register must belong.  A base register is one used in an address
+ * which is the register value plus a displacement.
+ */
+#undef BASE_REG_CLASS
+#define        BASE_REG_CLASS  GENERAL_REGS
+
+/* MODE_BASE_CLASS(MODE) ... This is a variation of the BASE_REG_CLASS macro
+ * which allows the selection of a bse register in a mode dependent manner.  If
+ * mode is VOIDmode then it should return the same value as BASE_REG_CLASS.
+ */
+#undef MODE_BASE_CLASS
+#define        MODE_BASE_CLASS(MODE)   GENERAL_REGS
+
+/* MODE_BASE_REG_REG_CLASS(MODE) ... A C expression whose value is the register
+ * class to which a valid base register must belong in order to be used in a
+ * base plus index register address.  You should define this macro if base plus
+ * index addresses have different requirements than other base register uses.
+ *
+ * Zip CPU does not support the base plus index addressing mode, thus ...
+ */
+// #undef      MODE_BASE_REG_REG_CLASS
+// #define     MODE_BASE_REG_REG_CLASS(MODE)   NO_REGS
+
+/* INDEX_REG_CLASS ... A macro whose definition is the name of the class to
+ * which a valid index register must belong.  An index register is one used in
+ * an address where its value is either multiplied by a scale factor or added
+ * to another register (as well as added to a displacement).
+ *
+ * ZipCPU -- Has no index registers.
+ */
+#undef INDEX_REG_CLASS
+#define        INDEX_REG_CLASS NO_REGS
+
+/* REGNO_OK_FOR_BASE_P(NUM) ... A C expression which is nonzero if register
+ * number num is suitable for use as a base register in operand addresses.
+ */
+#undef REGNO_OK_FOR_BASE_P
+#ifdef DEFINE_USER_REGS
+# define REGNO_OK_FOR_BASE_P(NUM)      ((NUM != zip_CC)&&(NUM < 16))
+#else
+# define REGNO_OK_FOR_BASE_P(NUM)      (NUM != zip_CC)
+#endif
+
+/* REGNO_MODE_OK_FOR_BASE_P ... A C expressison that is just like
+ * REGNO_OK_FOR_BASE_P, except that that expression may examine the mode of the
+ * memory reference in MODE.  You should define this macro if the mode of the
+ * memory reference affects whether a register may be used as a base register.
+ *
+ * ZipCPU --- the mode doesn't affect anything, so we don't define this.
+ */
+
+/* REGNO_MODE_OK_FOR_REG_BASE_P(NUM, MODE) ... base plus index operand
+ * addresses, accessing memory in mode mode.
+ *
+ * Use of this macro is deprecated.
+ */
+
+/* REGNO_MODE_CODE_OK_FOR_BASE_P(N,M,AS,OC,IC) ... A C expression which is
+ * nonzero if a register number N is suitable for use as a base register in
+ * operand addresses, accessing memory in mode M in address space AS.  This is
+ * similar to REGNO_MODE_OK_FOR_BASE_P, except that the expression may examine
+ * the context in which the register appears in the memory reference.
+ *
+ * ZipCPU---We aren't specific in how we use our registers.
+ */
+#define        REGNO_MODE_CODE_OK_FOR_BASE_P(N,M,AS,OC,IC) REGNO_OK_FOR_BASE_P(N)
+
+/* REGNO_OK_FOR_INDEX_P(REGNO) ... A C expression which is nonzero if register
+ * num is suitable for use as an index register in opernad addressess.  It may
+ * be either a suitable hard register or a pseudo register that has been
+ * allocated such as a hard register.
+ *
+ * ZipCPU has no index registers, therefore we declare this to be zero.
+ */
+#undef REGNO_OK_FOR_INDEX_P
+#define        REGNO_OK_FOR_INDEX_P(REGNO)     0
+
+/* TARGET_PREFERRED_RENAME_CLASS(RCLASS) ... A target hook that places
+ * additional preference on the register class to use when it is necessary to
+ * rename a register in class RCLASS to another class, or perhaps NO_REGS, if no
+ * preferred register class is found or hook preferred_rename_class is not
+ * implemented.  SOmething returning a more restrictive class makes better code.
+ * For example, on ARM, thumb-2 instructions using LO_REGS may be smaller than
+ * instructions using GENERIC_REGS.  By returning LO_REGS from
+ * preferred_rename_class, code size can be reduced.
+ */
+// #undef TARGET_PREFERRED_RENAME_CLASS
+// #define     TARGET_PREFERRED_RENAME_CLASS(RCLASS)   RCLASS
+
+/* TARGET_PREFERRED_RELOAD_CLASS(X,RC) ... A target hook that places additional
+ * restri tions on the register class to use when it is necessary to copy value
+ * X into a register in class RC.  The value is a register class; rehaps RC, or
+ * perhaps a smaller class.
+ *
+ * The default fversion of this hook always returns value of RC argument, which
+ * sounds quite appropriate for the ZipCPU.
+ */
+
+/* PREFERRED_RELOAD_CLASS(X,CLASS) ... A C expression that places additional
+ * restrictions on the register class to use when it is necessary to copy
+ * value X into a register in class CLASS.  On many machines, the following
+ * definition is safe: PREFERRED_RELOAD_CLASS(X,CLASS) (CLASS)
+ * Sometimes returning a more restrictive class makes better code.  For example,
+ * on the 68k, when x is an integer constant that is in range for a moveq
+ * instruction, the value of this macro is always DATA_REGS as long as CLASS
+ * includes the data registers.  Requiring a data register guarantees that a
+ * 'moveq' will be used.
+ *
+ * ZipCPU --- you can't load certain values into all members of ALL_REGS.  For
+ * example, loading (sleep and !gie) into the CC register could halt the CPU.
+ * Hence, we only allow loads into the GENERAL_REG class.
+ */
+#define        PREFERRED_RELOAD_CLASS(X, CLASS)        GENERAL_REGS
+
+/* TARGET_PREFERRED_OUTPUT_RELOAD_CLASS(RTX,RCLASS) ... Like TARGET_PREFERRED_..
+ * RELOAD_CLASS, but for output instead of input reloads.
+ *
+ * ZipCPU --- there's gotta be a valid default behaviour for this.
+ */
+
+/* LIMIT_RELOAD_CLASS(MODE, CL) ...
+ *
+ * Don't define this macro unless the target machine has limitations which
+ * require the macro to do something nontrivial.  ZipCPU doesn't, so we won't.
+ */
+
+/* TARGET_SECONDARY_RELOAD
+ * SECONDARY_ ...
+ * Don't think we need these ...
+ */
+
+/* CLASS_MAX_NREGS(CLASS,MODE) ... A C expression for the maximum number of
+ * consecutive registers of class CLASS needed to hold a value of mode MODE.
+ *
+ * This is closely related to the macro HARD_REGNO_NREGS.  In fact, the value
+ * of the macro CLASS_MAX_REGS(CL,M) should be the maximum value of
+ * HARD_REGNO_NREGS(REGNO,MODE) for all REGNO values in the class CLASS.
+ *
+ * This macro helps control the handling of multiple word values in the reload
+ * pass.
+ *
+ * ZipCPU --- We'll just use HARDNO_REGNO_NREGS, since CLASS is independent for
+ * us.  We'll also choose register R0, since ... well, since it simply doesn't
+ * matter.  (HARD_REGNO_NREGS ignores this anyway)
+ */
+#define        CLASS_MAX_NREGS(CLASS, MODE)    HARD_REGNO_NREGS(0,MODE)
+
+/* CANNOT_CHANGE_MODE_CLASS
+ * ???
+ */
+
+/* TARGET_IRA_CHANGE_PSEUDO_ALLOCNO_CLASS
+ */
+
+/* TARRGET_LRA_P
+ * Default looks good.
+ */
+
+/* TARGET_REGISTER_PRIORITY(INT) ... A target hook which returns the register
+ * priority number to which the register HARD_REGNO belongs to.  The bigger the
+ * number
+ *
+ * The default version of this target hook returns always zero---good enough for
+ * the ZipCPU.
+ */
+
+/* TARGET_REGISTER_USAGE_LEVELING_P(VOID) ... A target hook which returns true
+ * if we need register usage leveling.  That means if a few hard registers are
+ * equally good for the assignment, we choose the least used hard register.  The
+ * register usage leveling may be profitable for some targets.  Don't use usage
+ * leveling for targets with conditional execution or targets with big register
+ * files as it hurts if-conversion and cross-jumping optimizations.  The default
+ * version of this target hook returns always false.
+ *
+ * ZipCPU --- Default is the right answer.
+ */
+
+/* TARGET_DIFFERENT_ADDR_DISPLACEMENT_P ...
+ * Default looks good.
+ */
+
+/* TARGET_CANNOT_SUBSTITUTE_MEM_EQUIV_P ...
+ * Default looks good.
+ */
+
+/* TARGET_LEGITIMIZE_ADDRESS_DISPLACEMENT ....
+ */
+
+/* TARGET_SPILL_CLASS
+ *
+ * ZipCPU --- If we were running in supervisor mode only, this might be the
+ * user set of registers.  However, we're not building for that mode (now),
+ * so we'll leave this at the default of NO_REGS.
+ */
+
+/* TARGET_CSTORE_MODE(ICODE) ... Defines the machine mode to use for the
+ * boolean result of conditional store patterns.  The OCIDE argument is the
+ * instruction code for the cstore being performed.  Not defining this hook is
+ * the same as accepting the mode encoded into operand 0 of the cstore expander
+ * patterns.
+ *
+ * ??? ZipCPU --- I don't follow this documentation.  We'll leave this at the
+ * default therefore.
+ */
+
+/* 17.09 Stack Layout and Calling Conventions */
+
+
+/* STACK_GROWS_DOWNWARD ... Define this macro if pushing a word onto the stack
+ * moves the stack pointer to a smaller address, and false otherwise.
+ *
+ * ZipCPU ... well, our stack does grow downward, but it doesn't do so auto-
+ * magically.  We have to move the stack pointer ourselves.  However, since this
+ * is our convention, we'll define it as such.
+ */
+#undef STACK_GROWS_DOWNWARD
+#define        STACK_GROWS_DOWNWARD    1
+
+/* STACK_PUSH_CODE ... This macro defines the operation used when something is
+ * pushed on the stack.  In RTL, a push operation will be
+ * (set (mem( STACK_PUSH_CODE(reg sp))) ...) The choiecs are PRE_DEC, POST_DEC,
+ * PRE_INC, and POST_INC.  Which of these is correct depends on the stack
+ * direction and on whether the stack pointer points to the last item on the
+ * stack or whether it points to the space for the next item on the stack.
+ * The default is PRE_DECC when STACK_GROWS_DOWNWARD is true, which is almost
+ * always right, and PRE_INC otherwise, which is often wrong.
+ *
+ * ZipCPU --- None of these is right, so let's leave this at the default and
+ * see how badly we get mangled.  In particular, ZipCPU doesn't have any of the
+ * PRE_DEC, POST_DEC, PRE_INC, or POST_INC addressing modes used here.
+ */
+
+/* FRAME_GROWS_DOWNWARD ... Define this macro to nonzero if the addresses of
+ * local variable slots are at negative offsets from the frame pointer.
+ *
+ * ZipCPU --- If the frame pointer is defined as the stack pointer upon the
+ * start of function execution, and that stack pointer grows downward, then
+ * this should be the case as well.
+ */
+#undef FRAME_GROWS_DOWNWARD
+#define        FRAME_GROWS_DOWNWARD    1
+// #define     FRAME_GROWS_DOWNWARD    0        // This was ECO32's value
+
+
+/* ARGS_GROW_DOWNWARD ... Define this macro if successive arguments to a
+ * function occupy decreasing addresses on the stack.
+ *
+ * ZipCPU -- we can leave this up to the compiler's preferred implementation,
+ * it is of no consequence to the hardware.
+ */
+
+/* STARTING_FRAME_OFFSET ... Offset from the frame pointer to the first local
+ * variable slot to be allocated.  If FRAME_GROWS_DOWNWARD, find the next slot's
+ * offset by subtracting the firstt slot's length from STARTING_FRAME_OFFSET.
+ * Otherwise it is found by adding the length of the first slot to the value
+ * START_FRAME_OFFSET.
+ *
+ * ZipCPU --- I'm not certain on this, let's come back after we look at how
+ * the code is getting generated.  However, the ECO32 code I am copying from
+ * suggests that 0 is the right value, so we'll use that here.
+ */
+// #warning "Re-evaluate me"
+#define        STARTING_FRAME_OFFSET   0
+
+/* STACK_ALIGNMENT_NEEDED ... Define to zero to disable final alignment of the
+ * stack during reload.  The nonzero default for this macro is suitable for most
+ * ports.
+ *
+ * ZipCPU --- we'll leave this at the default, although if any alignment code
+ * shows up on the stack we may need to adjust it.
+ */
+
+/* STACK_POINTER_OFFSET ... Offset from the SP register to the first location at
+ * which outgoing arguments are placed.  If not specified, the default value
+ * of zero is used.  This is the proper value for most machines.
+ */
+#define        STACK_POINTER_OFFSET    0
+
+/* FIRST_PARM_OFFSET ... Offset from the argument pointer register to the first
+ * argument's address.  On some machines it may depend on the data type of the
+ * function.
+ */
+#define        FIRST_PARM_OFFSET(F)    0
+
+/* STACK_DYNAMIC_OFFSET(F) ... Offset from the stack pointer register to an item
+ * dynamically allocated on the stack, e.g., by alloca.  The default value for
+ * this macro is STACK_POINTER_OFFSET plus the length of the outgoing arguments.
+ * The default is correct for most machines, ...
+ *
+ * ZipCPU --- so we'll use it for the ZipCPU.
+ */
+
+/* INITIAL_FRAME_ADDRESS_RTX ... A C expression whose value is RTL representing
+ * the address of the initial stack frame.  This address is passed to
+ * RETURN_ADDR_RTX and DYNAMIC_CHAIN_ADDRESS.  If you don't define this macro,
+ * a reasonable default value will be used.  Define this macro in order to make
+ * frame pointer elimination work in the presence of __builtin_frame_address(C)
+ * and __builtin_return_address(C) for (C) not equal to zero.
+ *
+ * ZipCPU --- Let's try the reasonable default and see what happens.
+ */
+
+/* SETUP_FRAME_ADDRESSES ... A C expression that produces the machine-specific
+ * code to setup the stack so that arbitrary frames can be accessed.  For
+ * example, on the SPARC, we must flush all of the register windows to the stack
+ * before we can access arbitrary stack frames.  You will seldom need to define
+ * this macro.  The default is to do nothing.
+ *
+ * ZipCPU --- which is what we shall do here.
+ */
+
+/* TARGET_BUILTIN_SETJMP_FRAME_VALUE(VOID) ... This target hook should return
+ * an RTX that is used to store the address of the current frame into the
+ * builtin setjmp buffer.  The default value, virtual_stack_vars_rtx, is correct
+ * for most machines.  One reason you may need to define this target hook is if
+ * hard_frame_pointer_rtx is the appropriate value on your machine.
+ *
+ * ZipCPU --- leave this undefined, since the default value should be correct
+ * for "most" machines.
+ */
+
+/* FRAME_ADDR_RTX ... most machines do not need to define it.
+ */
+
+/* RETURN_ADDR_RTX(COUNT,FRAMEADDR) ... A C expression whose value is RTL
+ * representing the value of the return address for the frame COUNT steps up
+ * from the current frame, after the prologue.  FRAMEADDR is the frame pointer
+ * of the COUNT frame, or the frame pointer of the COUNT-1 frame if
+ * RETURN_ADDR_IN_PREVIOUS_FRAME is nonzero.  The value of the expression must
+ * always be the correct address when COUNT is nonzero, but may be NULL_RTX if
+ * there is no way to determine the return address of other frames.
+ *
+ * ZipCPU --- I have no idea how we'd do this, so let's just return NULL_RTX.
+ */
+#undef RETURN_ADDR_RTX
+#define        RETURN_ADDR_RTX(COUNT,FRAMEADDR)        NULL_RTX
+
+/* RETURN_ADDR_IN_PREVIOUS_FRAME ... Define this macro to nonzero value if the
+ * return address of a particular stack frame is accessed from the frame pointer
+ * of the previous stack frame.  The zero default for this macro is suitable
+ * for most ports.
+ *
+ * ZipCPU---Default works here as well.
+ */
+
+/* INCOMING_RETURN_ADDR_RTX ... A C expression whose value is RTL representing
+ * the location of the incoming return address at the beginning of any function,
+ * before the prologue.  This RTL is either a REG, indicating that the return
+ * value is saved in 'REG', or a MEM representing the location in the stack.
+ * If this RTL is a REG, you should define DWARF_RETURN_COLUMN to
+ * DWARF_FRAME_REGNUM(REGNO).
+ *
+ * ZipCPU --- While our incoming return address could theoretically be in any
+ * register, our machine description file is going to place it into register
+ * R0, so that's what we return here.
+ */
+#undef INCOMING_RETURN_ADDR_RTX
+#define        INCOMING_RETURN_ADDR_RTX        gen_rtx_REG(SImode, zip_R0)
+
+
+/* DWARF_ALT_FRAME_RETURN_COLUMN
+ */
+
+/* DWARF_ZERO_REG ... A C exrpession whose value is an integer giving a DWARF2
+ * register number that is considered to always have the value zero.  This
+ * should only be defined if the target has an architected zero register (ZipCPU
+ * does not), and someone decided it was a good idea to use that register number
+ * to terminate the stack backtrace.  New ports should avoid this (so the
+ * ZipCPU port will avoid it as well).
+ *
+ */
+
+/* TARGET_DWARF_HANDLE_FRAME_UNSPEC
+ */
+
+/* INCOMING_FRAME_SP_OFFSET
+ */
+#define        INCOMING_FRAME_SP_OFFSET        0
+
+/* ARG_POINTER_CFA_OFFSET
+ */
+
+/* FRAME_POINTER_CFA_OFFSET
+ */
+
+/* CFA_FRAME_BASE_OFFSET
+ */
+
+/* 17.09.02 Exception handling support */
+
+/* EH_RETURN_DATA_REGNO(N) ... A C expression whose value is the Nth register
+ * number used for data by exception handlers, or INVALID_REGNUM if fewer than
+ * N registers are usable.  The exception handling library routines communicate
+ * with the exception handlers via a set of agreed upon registers.  Ideally
+ * these registers should be call clobbered; it is possible to use call-saved
+ * registers, but may negatively impact code size.  The target must support at
+ * least 2 data registers, but should define 4 if their are enough free
+ * registers.
+ *
+ * You must define this macro if you want to support call frame exception
+ * handling like that provided by DWARF 2.
+ */
+#define        EH_RETURN_DATA_REGNO(N) (((N<ZIP_FIRST_ARG_REGNO)||(N>ZIP_LAST_ARG_REGNO))?(N-1):INVALID_REGNUM)
+
+/* EH_RETURN_STACKADJ_RTX ... A C expression whose value is RTL representing
+ * a location in which to store a stack adjustment to be applied before function
+ * return.  This is used to unwind the stack to an exception handler's call
+ * frame.  It will be assigned zero on code paths that return normally.
+ *
+ * Do not define this macro if the stack pointer is saved and restored by the
+ * regular prolog and epilog code in the call frame itself (which it is for the
+ * ZipCPU); in this case, the exception handling library routines will update
+ * the stack location to be restored in place.  Otherwise, you must define this
+ * macro if you want to support call frame exception handling like that provided
+ * by DWARF 2.
+ *
+ */
+
+/* EH_RETURN_HANDLER_RTX ... A C expression whose value is RTL representing a
+ * location in which to store the address of an exception handler to which we
+ * should return.  It will not be assigned on code paths that return normally.
+ *
+ * Typcally this is the location in the call frame at which the normal return
+ * address is stored.  For targets that return by popping an address of the
+ * stack, this might be a memory address just below the target callf rame
+ * rather than inside the current call frame.  If defined,
+ * EH_RETURN_STACKADJ_RTX will have already been assigned, so it may be used
+ * to calculate the location of the target call frame.
+ *
+ * If you want to support call frame exception handling, you must define either
+ * this macro or the eh_return instruction pattern.
+ */
+// #warning "I don't know what to do here."
+
+/*
+ *
+ *
+ *
+ *   REST OF SECTION SKIPPED ...
+ *
+ *
+ *
+ */
+
+/* 17.09.03 Specifying how stack checking is done */
+
+/* STACK_CHECK_BUILTIN ... a non-zero value if stack checking is done by the
+ * configuration files in a machine-dependent manner.  You should define this
+ * macro if stack checking is required by the ABI of your machine or if you
+ * would like to do stack checking in some more efficient way than the generic
+ * appraoch.  The default value of this macro is zero.
+ *
+ * ZipCPU --- The default makes sense for us.
+ */
+// #define STACK_CHECK_BUILTIN 0
+
+/* STACK_CHECK_STATIC_BUILTIN ... A nonzero value if static stack checking is
+ * done by the configuration files in a machine-dependent manner.  You should
+ * define this macro if you would like to do static stack checking in some more
+ * efficient way than the generic approach.  The default value of this macro
+ * is zero.
+ *
+ * ZipCPU --- The default makes sense for us.
+ */
+
+/* STACK_CHECK_PROBE_INTERVAL_EXP ...  An integer specifying the interval at
+ * which GCC must generate stack probe instructions, defined as 2 raised to this
+ * interval.  You will normally define this macro so that the interval is no
+ * larger than the size of the "guard pages" at the end of a stack area.  The

Line No.	Rev	Author	Line
1	102	dgisselq	`diff -Naur '--exclude=*.swp' gcc-5.3.0-original/config.sub gcc-5.3.0-zip/config.sub`
2			`--- gcc-5.3.0-original/config.sub 2015-01-02 04:30:21.000000000 -0500`
3			`+++ gcc-5.3.0-zip/config.sub 2016-01-30 12:27:56.023073747 -0500`
4			`@@ -316,7 +316,7 @@`
5			`\| visium \`
6			`\| we32k \`
7			`\| x86 \| xc16x \| xstormy16 \| xtensa \`
8			`- \| z8k \| z80)`
9			`+ \| z8k \| z80 \| zip)`
10			`basic_machine=$basic_machine-unknown`
11			`;;`
12			`c54x)`
13			`@@ -1547,6 +1547,9 @@`
14			`# system, and we'll never get to this point.`
15
16			`case $basic_machine in`
17			`+ zip-*)`
18			`+ os=-elf`
19			`+ ;;`
20			`score-*)`
21			`os=-elf`
22			`;;`
23			`diff -Naur '--exclude=*.swp' gcc-5.3.0-original/configure gcc-5.3.0-zip/configure`
24			`--- gcc-5.3.0-original/configure 2015-05-03 13:29:57.000000000 -0400`
25			`+++ gcc-5.3.0-zip/configure 2016-01-30 16:19:48.264867231 -0500`
26			`@@ -3927,6 +3927,8 @@`
27			`vax--)`
28			`noconfigdirs="$noconfigdirs target-newlib target-libgloss"`
29			`;;`
30			`+ zip*)`
31			`+ noconfigdirs="$noconfigdirs target-libffi target-boehm-gc gdb gprof"`
32			`esac`
33
34			`# If we aren't building newlib, then don't build libgloss, since libgloss`
35			`diff -Naur '--exclude=*.swp' gcc-5.3.0-original/configure.ac gcc-5.3.0-zip/configure.ac`
36			`--- gcc-5.3.0-original/configure.ac 2015-05-03 13:29:57.000000000 -0400`
37			`+++ gcc-5.3.0-zip/configure.ac 2016-02-12 10:47:23.847194843 -0500`
38			`@@ -1274,6 +1274,10 @@`
39			`vax--)`
40			`noconfigdirs="$noconfigdirs target-newlib target-libgloss"`
41			`;;`
42			`+ zip*)`
43			`+ noconfigdirs="$noconfigdirs target-libffi target-boehm-gc gdb gprof"`
44			`+ unsupported_languages="$unsupported_languages fortran java"`
45			`+ ;;`
46			`esac`
47
48			`# If we aren't building newlib, then don't build libgloss, since libgloss`
49	117	dgisselq	`diff -Naur '--exclude=*.swp' gcc-5.3.0-original/gcc/cfgexpand.c gcc-5.3.0-zip/gcc/cfgexpand.c`
50			`--- gcc-5.3.0-original/gcc/cfgexpand.c 2015-07-23 06:39:26.000000000 -0400`
51			`+++ gcc-5.3.0-zip/gcc/cfgexpand.c 2016-04-01 06:40:17.288326711 -0400`
52			`@@ -108,6 +108,14 @@`
53			`#include "tree-chkp.h"`
54			`#include "rtl-chkp.h"`
55
56			`+#ifdef DO_ZIP_DEBUGS`
57			`+#include <stdio.h>`
58			`+#define ZIP_DEBUG_LINE(STR,RTX) do{fprintf(stderr,"%s:%d/%s\n",__FILE__,__LINE__,STR); zip_debug_rtx(RTX);} while(0)`
59			`+extern void zip_debug_rtx(const_rtx);`
60			`+#else`
61			`+#define ZIP_DEBUG_LINE(STR,RTX)`
62			`+#endif`
63			`+`
64			`/* Some systems use __main in a way incompatible with its use in gcc, in these`
65			`cases use the macros NAME__MAIN to give a quoted symbol and SYMBOL__MAIN to`
66			`give the same symbol without quotes for an alternative entry point. You`
67	111	dgisselq	`diff -Naur '--exclude=*.swp' gcc-5.3.0-original/gcc/cgraphbuild.c gcc-5.3.0-zip/gcc/cgraphbuild.c`
68			`--- gcc-5.3.0-original/gcc/cgraphbuild.c 2015-01-09 15:18:42.000000000 -0500`
69			`+++ gcc-5.3.0-zip/gcc/cgraphbuild.c 2016-03-24 22:13:24.815287808 -0400`
70			`@@ -62,6 +62,13 @@`
71			`#include "ipa-prop.h"`
72			`#include "ipa-inline.h"`
73
74			`+#ifdef DO_ZIP_DEBUGS`
75			`+extern void zip_debug_rtx(const_rtx);`
76			`+#define ZIP_DEBUG_LINE(STR,RTX) do { fprintf(stderr, "%s:%d/%s\n", __FILE__,__LINE__,STR); zip_debug_rtx(RTX); } while(0)`
77			`+#else`
78			`+#define ZIP_DEBUG_LINE(STR,RTX)`
79			`+#endif`
80			`+`
81			`/* Context of record_reference. */`
82			`struct record_reference_ctx`
83			`{`
84	102	dgisselq	`diff -Naur '--exclude=*.swp' gcc-5.3.0-original/gcc/common/config/zip/zip-common.c gcc-5.3.0-zip/gcc/common/config/zip/zip-common.c`
85			`--- gcc-5.3.0-original/gcc/common/config/zip/zip-common.c 1969-12-31 19:00:00.000000000 -0500`
86			`+++ gcc-5.3.0-zip/gcc/common/config/zip/zip-common.c 2016-02-14 00:54:31.821055716 -0500`
87			`@@ -0,0 +1,52 @@`
88			`+////////////////////////////////////////////////////////////////////////////////`
89			`+//`
90			`+// Filename: common/config/zip/zip-common.c`
91			`+//`
92			`+// Project: Zip CPU backend for the GNU Compiler Collection`
93			`+//`
94			`+// Purpose: To eliminate the frame register automatically.`
95			`+//`
96			`+// Creator: Dan Gisselquist, Ph.D.`
97			`+// Gisselquist Technology, LLC`
98			`+//`
99			`+////////////////////////////////////////////////////////////////////////////////`
100			`+//`
101			`+// Copyright (C) 2016, Gisselquist Technology, LLC`
102			`+//`
103			`+// This program is free software (firmware): you can redistribute it and/or`
104			`+// modify it under the terms of the GNU General Public License as published`
105			`+// by the Free Software Foundation, either version 3 of the License, or (at`
106			`+// your option) any later version.`
107			`+//`
108			`+// This program is distributed in the hope that it will be useful, but WITHOUT`
109			`+// ANY WARRANTY; without even the implied warranty of MERCHANTIBILITY or`
110			`+// FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License`
111			`+// for more details.`
112			`+//`
113			`+// You should have received a copy of the GNU General Public License along`
114			`+// with this program. (It's in the $(ROOT)/doc directory, run make with no`
115			`+// target there if the PDF file isn't present.) If not, see`
116			`+// <http://www.gnu.org/licenses/> for a copy.`
117			`+//`
118			`+// License: GPL, v3, as defined and found on www.gnu.org,`
119			`+// http://www.gnu.org/licenses/gpl.html`
120			`+//`
121			`+//`
122			`+////////////////////////////////////////////////////////////////////////////////`
123			`+#include "config.h"`
124			`+#include "system.h"`
125			`+#include "coretypes.h"`
126			`+#include "tm.h"`
127			`+#include "common/common-target.h"`
128			`+#include "common/common-target-def.h"`
129			`+`
130			`+static const struct default_options zip_option_optimization_table[] =`
131			`+ {`
132			`+ { OPT_LEVELS_1_PLUS, OPT_fomit_frame_pointer, NULL, 1 },`
133			`+ { OPT_LEVELS_NONE, 0, NULL, 0 }`
134			`+ };`
135			`+`
136			`+#undef TARGET_OPTION_OPTIMIZATION_TABLE`
137			`+#define TARGET_OPTION_OPTIMIZATION_TABLE zip_option_optimization_table`
138			`+`
139			`+struct gcc_targetm_common targetm_common = TARGETM_COMMON_INITIALIZER;`
140			`diff -Naur '--exclude=*.swp' gcc-5.3.0-original/gcc/config/aarch64/aarch64-linux.h gcc-5.3.0-zip/gcc/config/aarch64/aarch64-linux.h`
141	117	dgisselq	`--- gcc-5.3.0-original/gcc/config/aarch64/aarch64-linux.h 2016-04-02 11:53:47.213604913 -0400`
142	102	dgisselq	`+++ gcc-5.3.0-zip/gcc/config/aarch64/aarch64-linux.h 2015-07-24 12:00:26.000000000 -0400`
143			`@@ -21,7 +21,7 @@`
144			`#ifndef GCC_AARCH64_LINUX_H`
145			`#define GCC_AARCH64_LINUX_H`
146
147			`-#define GLIBC_DYNAMIC_LINKER "/tools/lib/ld-linux-aarch64%{mbig-endian:_be}%{mabi=ilp32:_ilp32}.so.1"`
148			`+#define GLIBC_DYNAMIC_LINKER "/lib/ld-linux-aarch64%{mbig-endian:_be}%{mabi=ilp32:_ilp32}.so.1"`
149
150			`#undef ASAN_CC1_SPEC`
151			`#define ASAN_CC1_SPEC "%{%:sanitize(address):-funwind-tables}"`
152			`diff -Naur '--exclude=*.swp' gcc-5.3.0-original/gcc/config/alpha/linux-elf.h gcc-5.3.0-zip/gcc/config/alpha/linux-elf.h`
153	117	dgisselq	`--- gcc-5.3.0-original/gcc/config/alpha/linux-elf.h 2016-04-02 11:53:47.213604913 -0400`
154	102	dgisselq	`+++ gcc-5.3.0-zip/gcc/config/alpha/linux-elf.h 2015-01-05 07:33:28.000000000 -0500`
155			`@@ -23,8 +23,8 @@`
156			`#define EXTRA_SPECS \`
157			`{ "elf_dynamic_linker", ELF_DYNAMIC_LINKER },`
158
159			`-#define GLIBC_DYNAMIC_LINKER "/tools/lib/ld-linux.so.2"`
160			`-#define UCLIBC_DYNAMIC_LINKER "/tools/lib/ld-uClibc.so.0"`
161			`+#define GLIBC_DYNAMIC_LINKER "/lib/ld-linux.so.2"`
162			`+#define UCLIBC_DYNAMIC_LINKER "/lib/ld-uClibc.so.0"`
163			`#if DEFAULT_LIBC == LIBC_UCLIBC`
164			`#define CHOOSE_DYNAMIC_LINKER(G, U) "%{mglibc:" G ";:" U "}"`
165			`#elif DEFAULT_LIBC == LIBC_GLIBC`
166			`diff -Naur '--exclude=*.swp' gcc-5.3.0-original/gcc/config/arm/linux-eabi.h gcc-5.3.0-zip/gcc/config/arm/linux-eabi.h`
167	117	dgisselq	`--- gcc-5.3.0-original/gcc/config/arm/linux-eabi.h 2016-04-02 11:53:47.213604913 -0400`
168	102	dgisselq	`+++ gcc-5.3.0-zip/gcc/config/arm/linux-eabi.h 2015-01-05 07:33:28.000000000 -0500`
169			`@@ -68,8 +68,8 @@`
170			`GLIBC_DYNAMIC_LINKER_DEFAULT and TARGET_DEFAULT_FLOAT_ABI. */`
171
172			`#undef GLIBC_DYNAMIC_LINKER`
173			`-#define GLIBC_DYNAMIC_LINKER_SOFT_FLOAT "/tools/lib/ld-linux.so.3"`
174			`-#define GLIBC_DYNAMIC_LINKER_HARD_FLOAT "/tools/lib/ld-linux-armhf.so.3"`
175			`+#define GLIBC_DYNAMIC_LINKER_SOFT_FLOAT "/lib/ld-linux.so.3"`
176			`+#define GLIBC_DYNAMIC_LINKER_HARD_FLOAT "/lib/ld-linux-armhf.so.3"`
177			`#define GLIBC_DYNAMIC_LINKER_DEFAULT GLIBC_DYNAMIC_LINKER_SOFT_FLOAT`
178
179			`#define GLIBC_DYNAMIC_LINKER \`
180			`diff -Naur '--exclude=*.swp' gcc-5.3.0-original/gcc/config/arm/linux-elf.h gcc-5.3.0-zip/gcc/config/arm/linux-elf.h`
181	117	dgisselq	`--- gcc-5.3.0-original/gcc/config/arm/linux-elf.h 2016-04-02 11:53:47.213604913 -0400`
182	102	dgisselq	`+++ gcc-5.3.0-zip/gcc/config/arm/linux-elf.h 2015-06-23 05:26:54.000000000 -0400`
183			`@@ -62,7 +62,7 @@`
184
185			`#define LIBGCC_SPEC "%{mfloat-abi=soft*:-lfloat} -lgcc"`
186
187			`-#define GLIBC_DYNAMIC_LINKER "/tools/lib/ld-linux.so.2"`
188			`+#define GLIBC_DYNAMIC_LINKER "/lib/ld-linux.so.2"`
189
190			`#define LINUX_TARGET_LINK_SPEC "%{h*} \`
191			`%{static:-Bstatic} \`
192			`diff -Naur '--exclude=*.swp' gcc-5.3.0-original/gcc/config/bfin/linux.h gcc-5.3.0-zip/gcc/config/bfin/linux.h`
193	117	dgisselq	`--- gcc-5.3.0-original/gcc/config/bfin/linux.h 2016-04-02 11:53:47.213604913 -0400`
194	102	dgisselq	`+++ gcc-5.3.0-zip/gcc/config/bfin/linux.h 2015-01-05 07:33:28.000000000 -0500`
195			`@@ -45,7 +45,7 @@`
196			`%{shared:-G -Bdynamic} \`
197			`%{!shared: %{!static: \`
198			`%{rdynamic:-export-dynamic} \`
199			`- -dynamic-linker /tools/lib/ld-uClibc.so.0} \`
200			`+ -dynamic-linker /lib/ld-uClibc.so.0} \`
201			`%{static}} -init __init -fini __fini"`
202
203			`#undef TARGET_SUPPORTS_SYNC_CALLS`
204			`diff -Naur '--exclude=*.swp' gcc-5.3.0-original/gcc/config/cris/linux.h gcc-5.3.0-zip/gcc/config/cris/linux.h`
205	117	dgisselq	`--- gcc-5.3.0-original/gcc/config/cris/linux.h 2016-04-02 11:53:47.213604913 -0400`
206	102	dgisselq	`+++ gcc-5.3.0-zip/gcc/config/cris/linux.h 2015-01-05 07:33:28.000000000 -0500`
207			`@@ -102,7 +102,7 @@`
208			`#undef CRIS_DEFAULT_CPU_VERSION`
209			`#define CRIS_DEFAULT_CPU_VERSION CRIS_CPU_NG`
210
211			`-#define GLIBC_DYNAMIC_LINKER "/tools/lib/ld.so.1"`
212			`+#define GLIBC_DYNAMIC_LINKER "/lib/ld.so.1"`
213
214			`#undef CRIS_LINK_SUBTARGET_SPEC`
215			`#define CRIS_LINK_SUBTARGET_SPEC \`
216			`diff -Naur '--exclude=*.swp' gcc-5.3.0-original/gcc/config/freebsd-spec.h gcc-5.3.0-zip/gcc/config/freebsd-spec.h`
217	117	dgisselq	`--- gcc-5.3.0-original/gcc/config/freebsd-spec.h 2016-04-02 11:53:47.213604913 -0400`
218	102	dgisselq	`+++ gcc-5.3.0-zip/gcc/config/freebsd-spec.h 2015-06-25 13:53:14.000000000 -0400`
219			`@@ -129,9 +129,9 @@`
220			`#endif`
221
222			`#if FBSD_MAJOR < 6`
223			`-#define FBSD_DYNAMIC_LINKER "/tools/libexec/ld-elf.so.1"`
224			`+#define FBSD_DYNAMIC_LINKER "/usr/libexec/ld-elf.so.1"`
225			`#else`
226			`-#define FBSD_DYNAMIC_LINKER "/tools/libexec/ld-elf.so.1"`
227			`+#define FBSD_DYNAMIC_LINKER "/libexec/ld-elf.so.1"`
228			`#endif`
229
230			`/* NOTE: The freebsd-spec.h header is included also for various`
231			`diff -Naur '--exclude=*.swp' gcc-5.3.0-original/gcc/config/frv/linux.h gcc-5.3.0-zip/gcc/config/frv/linux.h`
232	117	dgisselq	`--- gcc-5.3.0-original/gcc/config/frv/linux.h 2016-04-02 11:53:47.213604913 -0400`
233	102	dgisselq	`+++ gcc-5.3.0-zip/gcc/config/frv/linux.h 2015-01-05 07:33:28.000000000 -0500`
234			`@@ -34,7 +34,7 @@`
235			`#define ENDFILE_SPEC \`
236			`"%{shared\|pie:crtendS.o%s;:crtend.o%s} crtn.o%s"`
237
238			`-#define GLIBC_DYNAMIC_LINKER "/tools/lib/ld.so.1"`
239			`+#define GLIBC_DYNAMIC_LINKER "/lib/ld.so.1"`
240
241			`#undef LINK_SPEC`
242			`#define LINK_SPEC "\`
243			`diff -Naur '--exclude=*.swp' gcc-5.3.0-original/gcc/config/i386/gnu.h gcc-5.3.0-zip/gcc/config/i386/gnu.h`
244	117	dgisselq	`--- gcc-5.3.0-original/gcc/config/i386/gnu.h 2016-04-02 11:53:47.213604913 -0400`
245	102	dgisselq	`+++ gcc-5.3.0-zip/gcc/config/i386/gnu.h 2015-01-05 07:33:28.000000000 -0500`
246			`@@ -22,7 +22,7 @@`
247			`#define GNU_USER_LINK_EMULATION "elf_i386"`
248
249			`#undef GNU_USER_DYNAMIC_LINKER`
250			`-#define GNU_USER_DYNAMIC_LINKER "/tools/lib/ld.so"`
251			`+#define GNU_USER_DYNAMIC_LINKER "/lib/ld.so"`
252
253			`#undef STARTFILE_SPEC`
254			`#if defined HAVE_LD_PIE`
255			`diff -Naur '--exclude=*.swp' gcc-5.3.0-original/gcc/config/i386/kfreebsd-gnu64.h gcc-5.3.0-zip/gcc/config/i386/kfreebsd-gnu64.h`
256	117	dgisselq	`--- gcc-5.3.0-original/gcc/config/i386/kfreebsd-gnu64.h 2016-04-02 11:53:47.213604913 -0400`
257	102	dgisselq	`+++ gcc-5.3.0-zip/gcc/config/i386/kfreebsd-gnu64.h 2015-01-05 07:33:28.000000000 -0500`
258			`@@ -22,6 +22,6 @@`
259			`#define GNU_USER_LINK_EMULATION64 "elf_x86_64_fbsd"`
260			`#define GNU_USER_LINK_EMULATIONX32 "elf32_x86_64_fbsd"`
261
262			`-#define GLIBC_DYNAMIC_LINKER32 "/tools/lib/ld.so.1"`
263			`-#define GLIBC_DYNAMIC_LINKER64 "/tools/lib/ld-kfreebsd-x86-64.so.1"`
264			`-#define GLIBC_DYNAMIC_LINKERX32 "/tools/lib/ld-kfreebsd-x32.so.1"`
265			`+#define GLIBC_DYNAMIC_LINKER32 "/lib/ld.so.1"`
266			`+#define GLIBC_DYNAMIC_LINKER64 "/lib/ld-kfreebsd-x86-64.so.1"`
267			`+#define GLIBC_DYNAMIC_LINKERX32 "/lib/ld-kfreebsd-x32.so.1"`
268			`diff -Naur '--exclude=*.swp' gcc-5.3.0-original/gcc/config/i386/kfreebsd-gnu.h gcc-5.3.0-zip/gcc/config/i386/kfreebsd-gnu.h`
269	117	dgisselq	`--- gcc-5.3.0-original/gcc/config/i386/kfreebsd-gnu.h 2016-04-02 11:53:47.213604913 -0400`
270	102	dgisselq	`+++ gcc-5.3.0-zip/gcc/config/i386/kfreebsd-gnu.h 2015-01-05 07:33:28.000000000 -0500`
271			`@@ -19,4 +19,4 @@`
272			`<http://www.gnu.org/licenses/>. */`
273
274			`#define GNU_USER_LINK_EMULATION "elf_i386_fbsd"`
275			`-#define GLIBC_DYNAMIC_LINKER "/tools/lib/ld.so.1"`
276			`+#define GLIBC_DYNAMIC_LINKER "/lib/ld.so.1"`
277			`diff -Naur '--exclude=*.swp' gcc-5.3.0-original/gcc/config/i386/linux64.h gcc-5.3.0-zip/gcc/config/i386/linux64.h`
278	117	dgisselq	`--- gcc-5.3.0-original/gcc/config/i386/linux64.h 2016-04-02 11:53:47.213604913 -0400`
279	102	dgisselq	`+++ gcc-5.3.0-zip/gcc/config/i386/linux64.h 2015-01-05 07:33:28.000000000 -0500`
280			`@@ -27,6 +27,6 @@`
281			`#define GNU_USER_LINK_EMULATION64 "elf_x86_64"`
282			`#define GNU_USER_LINK_EMULATIONX32 "elf32_x86_64"`
283
284			`-#define GLIBC_DYNAMIC_LINKER32 "/tools/lib/ld-linux.so.2"`
285			`-#define GLIBC_DYNAMIC_LINKER64 "/tools/lib64/ld-linux-x86-64.so.2"`
286			`-#define GLIBC_DYNAMIC_LINKERX32 "/tools/libx32/ld-linux-x32.so.2"`
287			`+#define GLIBC_DYNAMIC_LINKER32 "/lib/ld-linux.so.2"`
288			`+#define GLIBC_DYNAMIC_LINKER64 "/lib64/ld-linux-x86-64.so.2"`
289			`+#define GLIBC_DYNAMIC_LINKERX32 "/libx32/ld-linux-x32.so.2"`
290			`diff -Naur '--exclude=*.swp' gcc-5.3.0-original/gcc/config/i386/linux.h gcc-5.3.0-zip/gcc/config/i386/linux.h`
291	117	dgisselq	`--- gcc-5.3.0-original/gcc/config/i386/linux.h 2016-04-02 11:53:47.213604913 -0400`
292	102	dgisselq	`+++ gcc-5.3.0-zip/gcc/config/i386/linux.h 2015-01-05 07:33:28.000000000 -0500`
293			`@@ -20,4 +20,4 @@`
294			`<http://www.gnu.org/licenses/>. */`
295
296			`#define GNU_USER_LINK_EMULATION "elf_i386"`
297			`-#define GLIBC_DYNAMIC_LINKER "/tools/lib/ld-linux.so.2"`
298			`+#define GLIBC_DYNAMIC_LINKER "/lib/ld-linux.so.2"`
299			`diff -Naur '--exclude=*.swp' gcc-5.3.0-original/gcc/config/ia64/linux.h gcc-5.3.0-zip/gcc/config/ia64/linux.h`
300	117	dgisselq	`--- gcc-5.3.0-original/gcc/config/ia64/linux.h 2016-04-02 11:53:47.213604913 -0400`
301	102	dgisselq	`+++ gcc-5.3.0-zip/gcc/config/ia64/linux.h 2015-01-05 07:33:28.000000000 -0500`
302			`@@ -55,7 +55,7 @@`
303			`/* Define this for shared library support because it isn't in the main`
304			`linux.h file. */`
305
306			`-#define GLIBC_DYNAMIC_LINKER "/tools/lib/ld-linux-ia64.so.2"`
307			`+#define GLIBC_DYNAMIC_LINKER "/lib/ld-linux-ia64.so.2"`
308
309			`#undef LINK_SPEC`
310			`#define LINK_SPEC "\`
311			`diff -Naur '--exclude=*.swp' gcc-5.3.0-original/gcc/config/knetbsd-gnu.h gcc-5.3.0-zip/gcc/config/knetbsd-gnu.h`
312	117	dgisselq	`--- gcc-5.3.0-original/gcc/config/knetbsd-gnu.h 2016-04-02 11:53:47.213604913 -0400`
313	102	dgisselq	`+++ gcc-5.3.0-zip/gcc/config/knetbsd-gnu.h 2015-01-05 07:33:28.000000000 -0500`
314			`@@ -32,4 +32,4 @@`
315
316
317			`#undef GNU_USER_DYNAMIC_LINKER`
318			`-#define GNU_USER_DYNAMIC_LINKER "/tools/lib/ld.so.1"`
319			`+#define GNU_USER_DYNAMIC_LINKER "/lib/ld.so.1"`
320			`diff -Naur '--exclude=*.swp' gcc-5.3.0-original/gcc/config/kopensolaris-gnu.h gcc-5.3.0-zip/gcc/config/kopensolaris-gnu.h`
321	117	dgisselq	`--- gcc-5.3.0-original/gcc/config/kopensolaris-gnu.h 2016-04-02 11:53:47.213604913 -0400`
322	102	dgisselq	`+++ gcc-5.3.0-zip/gcc/config/kopensolaris-gnu.h 2015-01-05 07:33:28.000000000 -0500`
323			`@@ -31,5 +31,4 @@`
324			`while (0)`
325
326			`#undef GNU_USER_DYNAMIC_LINKER`
327			`-#define GNU_USER_DYNAMIC_LINKER "/tools/lib/ld.so.1"`
328			`-`
329			`+#define GNU_USER_DYNAMIC_LINKER "/lib/ld.so.1"`
330			`diff -Naur '--exclude=*.swp' gcc-5.3.0-original/gcc/config/linux.h gcc-5.3.0-zip/gcc/config/linux.h`
331	117	dgisselq	`--- gcc-5.3.0-original/gcc/config/linux.h 2016-04-02 11:53:47.213604913 -0400`
332	102	dgisselq	`+++ gcc-5.3.0-zip/gcc/config/linux.h 2015-01-05 07:33:28.000000000 -0500`
333			`@@ -73,10 +73,10 @@`
334			`GLIBC_DYNAMIC_LINKER must be defined for each target using them, or`
335			`GLIBC_DYNAMIC_LINKER32 and GLIBC_DYNAMIC_LINKER64 for targets`
336			`supporting both 32-bit and 64-bit compilation. */`
337			`-#define UCLIBC_DYNAMIC_LINKER "/tools/lib/ld-uClibc.so.0"`
338			`-#define UCLIBC_DYNAMIC_LINKER32 "/tools/lib/ld-uClibc.so.0"`
339			`-#define UCLIBC_DYNAMIC_LINKER64 "/tools/lib/ld64-uClibc.so.0"`
340			`-#define UCLIBC_DYNAMIC_LINKERX32 "/tools/lib/ldx32-uClibc.so.0"`
341			`+#define UCLIBC_DYNAMIC_LINKER "/lib/ld-uClibc.so.0"`
342			`+#define UCLIBC_DYNAMIC_LINKER32 "/lib/ld-uClibc.so.0"`
343			`+#define UCLIBC_DYNAMIC_LINKER64 "/lib/ld64-uClibc.so.0"`
344			`+#define UCLIBC_DYNAMIC_LINKERX32 "/lib/ldx32-uClibc.so.0"`
345			`#define BIONIC_DYNAMIC_LINKER "/system/bin/linker"`
346			`#define BIONIC_DYNAMIC_LINKER32 "/system/bin/linker"`
347			`#define BIONIC_DYNAMIC_LINKER64 "/system/bin/linker64"`
348			`diff -Naur '--exclude=*.swp' gcc-5.3.0-original/gcc/config/lm32/uclinux-elf.h gcc-5.3.0-zip/gcc/config/lm32/uclinux-elf.h`
349	117	dgisselq	`--- gcc-5.3.0-original/gcc/config/lm32/uclinux-elf.h 2016-04-02 11:53:47.213604913 -0400`
350	102	dgisselq	`+++ gcc-5.3.0-zip/gcc/config/lm32/uclinux-elf.h 2015-01-05 07:33:28.000000000 -0500`
351			`@@ -67,7 +67,7 @@`
352			`%{shared:-shared} \`
353			`%{symbolic:-Bsymbolic} \`
354			`%{rdynamic:-export-dynamic} \`
355			`- -dynamic-linker /tools/lib/ld-linux.so.2"`
356			`+ -dynamic-linker /lib/ld-linux.so.2"`
357
358			`#define TARGET_OS_CPP_BUILTINS() GNU_USER_TARGET_OS_CPP_BUILTINS()`
359
360			`diff -Naur '--exclude=*.swp' gcc-5.3.0-original/gcc/config/m68k/linux.h gcc-5.3.0-zip/gcc/config/m68k/linux.h`
361	117	dgisselq	`--- gcc-5.3.0-original/gcc/config/m68k/linux.h 2016-04-02 11:53:47.213604913 -0400`
362	102	dgisselq	`+++ gcc-5.3.0-zip/gcc/config/m68k/linux.h 2015-01-05 07:33:28.000000000 -0500`
363			`@@ -71,7 +71,7 @@`
364			`When the -shared link option is used a final link is not being`
365			`done. */`
366
367			`-#define GLIBC_DYNAMIC_LINKER "/tools/lib/ld.so.1"`
368			`+#define GLIBC_DYNAMIC_LINKER "/lib/ld.so.1"`
369
370			`#undef LINK_SPEC`
371			`#define LINK_SPEC "-m m68kelf %{shared} \`
372			`diff -Naur '--exclude=*.swp' gcc-5.3.0-original/gcc/config/microblaze/linux.h gcc-5.3.0-zip/gcc/config/microblaze/linux.h`
373	117	dgisselq	`--- gcc-5.3.0-original/gcc/config/microblaze/linux.h 2016-04-02 11:53:47.213604913 -0400`
374	102	dgisselq	`+++ gcc-5.3.0-zip/gcc/config/microblaze/linux.h 2015-05-28 10:08:19.000000000 -0400`
375			`@@ -28,7 +28,7 @@`
376			`#undef TLS_NEEDS_GOT`
377			`#define TLS_NEEDS_GOT 1`
378
379			`-#define DYNAMIC_LINKER "/tools/lib/ld.so.1"`
380			`+#define DYNAMIC_LINKER "/lib/ld.so.1"`
381			`#undef SUBTARGET_EXTRA_SPECS`
382			`#define SUBTARGET_EXTRA_SPECS \`
383			`{ "dynamic_linker", DYNAMIC_LINKER }`
384			`diff -Naur '--exclude=*.swp' gcc-5.3.0-original/gcc/config/mips/linux.h gcc-5.3.0-zip/gcc/config/mips/linux.h`
385	117	dgisselq	`--- gcc-5.3.0-original/gcc/config/mips/linux.h 2016-04-02 11:53:47.213604913 -0400`
386	102	dgisselq	`+++ gcc-5.3.0-zip/gcc/config/mips/linux.h 2015-01-05 07:33:28.000000000 -0500`
387			`@@ -22,20 +22,20 @@`
388			`#define GNU_USER_LINK_EMULATIONN32 "elf32%{EB:b}%{EL:l}tsmipn32"`
389
390			`#define GLIBC_DYNAMIC_LINKER32 \`
391			`- "%{mnan=2008:/tools/lib/ld-linux-mipsn8.so.1;:/tools/lib/ld.so.1}"`
392			`+ "%{mnan=2008:/lib/ld-linux-mipsn8.so.1;:/lib/ld.so.1}"`
393			`#define GLIBC_DYNAMIC_LINKER64 \`
394			`- "%{mnan=2008:/tools/lib64/ld-linux-mipsn8.so.1;:/tools/lib64/ld.so.1}"`
395			`+ "%{mnan=2008:/lib64/ld-linux-mipsn8.so.1;:/lib64/ld.so.1}"`
396			`#define GLIBC_DYNAMIC_LINKERN32 \`
397			`- "%{mnan=2008:/tools/lib32/ld-linux-mipsn8.so.1;:/tools/lib32/ld.so.1}"`
398			`+ "%{mnan=2008:/lib32/ld-linux-mipsn8.so.1;:/lib32/ld.so.1}"`
399
400			`#undef UCLIBC_DYNAMIC_LINKER32`
401			`#define UCLIBC_DYNAMIC_LINKER32 \`
402			`- "%{mnan=2008:/tools/lib/ld-uClibc-mipsn8.so.0;:/tools/lib/ld-uClibc.so.0}"`
403			`+ "%{mnan=2008:/lib/ld-uClibc-mipsn8.so.0;:/lib/ld-uClibc.so.0}"`
404			`#undef UCLIBC_DYNAMIC_LINKER64`
405			`#define UCLIBC_DYNAMIC_LINKER64 \`
406			`- "%{mnan=2008:/tools/lib/ld64-uClibc-mipsn8.so.0;:/tools/lib/ld64-uClibc.so.0}"`
407			`+ "%{mnan=2008:/lib/ld64-uClibc-mipsn8.so.0;:/lib/ld64-uClibc.so.0}"`
408			`#define UCLIBC_DYNAMIC_LINKERN32 \`
409			`- "%{mnan=2008:/tools/lib32/ld-uClibc-mipsn8.so.0;:/tools/lib32/ld-uClibc.so.0}"`
410			`+ "%{mnan=2008:/lib32/ld-uClibc-mipsn8.so.0;:/lib32/ld-uClibc.so.0}"`
411
412			`#define BIONIC_DYNAMIC_LINKERN32 "/system/bin/linker32"`
413			`#define GNU_USER_DYNAMIC_LINKERN32 \`
414			`diff -Naur '--exclude=*.swp' gcc-5.3.0-original/gcc/config/mn10300/linux.h gcc-5.3.0-zip/gcc/config/mn10300/linux.h`
415	117	dgisselq	`--- gcc-5.3.0-original/gcc/config/mn10300/linux.h 2016-04-02 11:53:47.213604913 -0400`
416	102	dgisselq	`+++ gcc-5.3.0-zip/gcc/config/mn10300/linux.h 2015-01-05 07:33:28.000000000 -0500`
417			`@@ -32,7 +32,7 @@`
418			`#undef ASM_SPEC`
419			`#define ASM_SPEC ""`
420
421			`-#define GLIBC_DYNAMIC_LINKER "/tools/lib/ld.so.1"`
422			`+#define GLIBC_DYNAMIC_LINKER "/lib/ld.so.1"`
423
424			`#undef LINK_SPEC`
425			`#define LINK_SPEC "%{mrelax:--relax} %{shared:-shared} \`
426			`diff -Naur '--exclude=*.swp' gcc-5.3.0-original/gcc/config/pa/pa-linux.h gcc-5.3.0-zip/gcc/config/pa/pa-linux.h`
427	117	dgisselq	`--- gcc-5.3.0-original/gcc/config/pa/pa-linux.h 2016-04-02 11:53:47.217604879 -0400`
428	102	dgisselq	`+++ gcc-5.3.0-zip/gcc/config/pa/pa-linux.h 2015-09-24 20:04:26.000000000 -0400`
429			`@@ -37,7 +37,7 @@`
430			`/* Define this for shared library support because it isn't in the main`
431			`linux.h file. */`
432
433			`-#define GLIBC_DYNAMIC_LINKER "/tools/lib/ld.so.1"`
434			`+#define GLIBC_DYNAMIC_LINKER "/lib/ld.so.1"`
435
436			`#undef LINK_SPEC`
437			`#define LINK_SPEC "\`
438			`diff -Naur '--exclude=*.swp' gcc-5.3.0-original/gcc/config/rs6000/linux64.h gcc-5.3.0-zip/gcc/config/rs6000/linux64.h`
439	117	dgisselq	`--- gcc-5.3.0-original/gcc/config/rs6000/linux64.h 2016-04-02 11:53:47.217604879 -0400`
440	102	dgisselq	`+++ gcc-5.3.0-zip/gcc/config/rs6000/linux64.h 2015-03-09 19:18:57.000000000 -0400`
441			`@@ -357,14 +357,14 @@`
442			`#undef LINK_OS_DEFAULT_SPEC`
443			`#define LINK_OS_DEFAULT_SPEC "%(link_os_linux)"`
444
445			`-#define GLIBC_DYNAMIC_LINKER32 "/tools/lib/ld.so.1"`
446			`+#define GLIBC_DYNAMIC_LINKER32 "/lib/ld.so.1"`
447			`#ifdef LINUX64_DEFAULT_ABI_ELFv2`
448			`-#define GLIBC_DYNAMIC_LINKER64 "%{mabi=elfv1:/tools/lib64/ld64.so.1;:/tools/lib64/ld64.so.2}"`
449			`+#define GLIBC_DYNAMIC_LINKER64 "%{mabi=elfv1:/lib64/ld64.so.1;:/lib64/ld64.so.2}"`
450			`#else`
451			`-#define GLIBC_DYNAMIC_LINKER64 "%{mabi=elfv2:/tools/lib64/ld64.so.2;:/tools/lib64/ld64.so.1}"`
452			`+#define GLIBC_DYNAMIC_LINKER64 "%{mabi=elfv2:/lib64/ld64.so.2;:/lib64/ld64.so.1}"`
453			`#endif`
454			`-#define UCLIBC_DYNAMIC_LINKER32 "/tools/lib/ld-uClibc.so.0"`
455			`-#define UCLIBC_DYNAMIC_LINKER64 "/tools/lib/ld64-uClibc.so.0"`
456			`+#define UCLIBC_DYNAMIC_LINKER32 "/lib/ld-uClibc.so.0"`
457			`+#define UCLIBC_DYNAMIC_LINKER64 "/lib/ld64-uClibc.so.0"`
458			`#if DEFAULT_LIBC == LIBC_UCLIBC`
459			`#define CHOOSE_DYNAMIC_LINKER(G, U) "%{mglibc:" G ";:" U "}"`
460			`#elif DEFAULT_LIBC == LIBC_GLIBC`
461			`diff -Naur '--exclude=*.swp' gcc-5.3.0-original/gcc/config/rs6000/sysv4.h gcc-5.3.0-zip/gcc/config/rs6000/sysv4.h`
462	117	dgisselq	`--- gcc-5.3.0-original/gcc/config/rs6000/sysv4.h 2016-04-02 11:53:47.217604879 -0400`
463	102	dgisselq	`+++ gcc-5.3.0-zip/gcc/config/rs6000/sysv4.h 2015-09-24 09:46:45.000000000 -0400`
464			`@@ -757,8 +757,8 @@`
465
466			`#define LINK_START_LINUX_SPEC ""`
467
468			`-#define GLIBC_DYNAMIC_LINKER "/tools/lib/ld.so.1"`
469			`-#define UCLIBC_DYNAMIC_LINKER "/tools/lib/ld-uClibc.so.0"`
470			`+#define GLIBC_DYNAMIC_LINKER "/lib/ld.so.1"`
471			`+#define UCLIBC_DYNAMIC_LINKER "/lib/ld-uClibc.so.0"`
472			`#if DEFAULT_LIBC == LIBC_UCLIBC`
473			`#define CHOOSE_DYNAMIC_LINKER(G, U) "%{mglibc:" G ";:" U "}"`
474			`#elif !defined (DEFAULT_LIBC) \|\| DEFAULT_LIBC == LIBC_GLIBC`
475			`diff -Naur '--exclude=*.swp' gcc-5.3.0-original/gcc/config/s390/linux.h gcc-5.3.0-zip/gcc/config/s390/linux.h`
476	117	dgisselq	`--- gcc-5.3.0-original/gcc/config/s390/linux.h 2016-04-02 11:53:47.217604879 -0400`
477	102	dgisselq	`+++ gcc-5.3.0-zip/gcc/config/s390/linux.h 2015-05-11 03:14:10.000000000 -0400`
478			`@@ -60,8 +60,8 @@`
479			`#define MULTILIB_DEFAULTS { "m31" }`
480			`#endif`
481
482			`-#define GLIBC_DYNAMIC_LINKER32 "/tools/lib/ld.so.1"`
483			`-#define GLIBC_DYNAMIC_LINKER64 "/tools/lib/ld64.so.1"`
484			`+#define GLIBC_DYNAMIC_LINKER32 "/lib/ld.so.1"`
485			`+#define GLIBC_DYNAMIC_LINKER64 "/lib/ld64.so.1"`
486
487			`#undef LINK_SPEC`
488			`#define LINK_SPEC \`
489			`diff -Naur '--exclude=*.swp' gcc-5.3.0-original/gcc/config/sh/linux.h gcc-5.3.0-zip/gcc/config/sh/linux.h`
490	117	dgisselq	`--- gcc-5.3.0-original/gcc/config/sh/linux.h 2016-04-02 11:53:47.217604879 -0400`
491	102	dgisselq	`+++ gcc-5.3.0-zip/gcc/config/sh/linux.h 2015-01-05 07:33:28.000000000 -0500`
492			`@@ -43,7 +43,7 @@`
493
494			`#define TARGET_ASM_FILE_END file_end_indicate_exec_stack`
495
496			`-#define GLIBC_DYNAMIC_LINKER "/tools/lib/ld-linux.so.2"`
497			`+#define GLIBC_DYNAMIC_LINKER "/lib/ld-linux.so.2"`
498
499			`#undef SUBTARGET_LINK_EMUL_SUFFIX`
500			`#define SUBTARGET_LINK_EMUL_SUFFIX "_linux"`

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