OpenCores
URL https://opencores.org/ocsvn/zipcpu/zipcpu/trunk

Subversion Repositories zipcpu

[/] [zipcpu/] [trunk/] [sw/] [gcc-zippatch.patch] - Blame information for rev 122

Go to most recent revision | Details | Compare with Previous | View Log

Line No. Rev Author Line
1 102 dgisselq
diff -Naur '--exclude=*.swp' gcc-5.3.0-original/config.sub gcc-5.3.0-zip/config.sub
2
--- gcc-5.3.0-original/config.sub       2015-01-02 04:30:21.000000000 -0500
3
+++ gcc-5.3.0-zip/config.sub    2016-01-30 12:27:56.023073747 -0500
4
@@ -316,7 +316,7 @@
5
        | visium \
6
        | we32k \
7
        | x86 | xc16x | xstormy16 | xtensa \
8
-       | z8k | z80)
9
+       | z8k | z80 | zip)
10
                basic_machine=$basic_machine-unknown
11
                ;;
12
        c54x)
13
@@ -1547,6 +1547,9 @@
14
 # system, and we'll never get to this point.
15
 
16
 case $basic_machine in
17
+       zip-*)
18
+               os=-elf
19
+               ;;
20
        score-*)
21
                os=-elf
22
                ;;
23
diff -Naur '--exclude=*.swp' gcc-5.3.0-original/configure gcc-5.3.0-zip/configure
24
--- gcc-5.3.0-original/configure        2015-05-03 13:29:57.000000000 -0400
25
+++ gcc-5.3.0-zip/configure     2016-01-30 16:19:48.264867231 -0500
26
@@ -3927,6 +3927,8 @@
27
   vax-*-*)
28
     noconfigdirs="$noconfigdirs target-newlib target-libgloss"
29
     ;;
30
+  zip*)
31
+    noconfigdirs="$noconfigdirs target-libffi target-boehm-gc gdb gprof"
32
 esac
33
 
34
 # If we aren't building newlib, then don't build libgloss, since libgloss
35
diff -Naur '--exclude=*.swp' gcc-5.3.0-original/configure.ac gcc-5.3.0-zip/configure.ac
36
--- gcc-5.3.0-original/configure.ac     2015-05-03 13:29:57.000000000 -0400
37
+++ gcc-5.3.0-zip/configure.ac  2016-02-12 10:47:23.847194843 -0500
38
@@ -1274,6 +1274,10 @@
39
   vax-*-*)
40
     noconfigdirs="$noconfigdirs target-newlib target-libgloss"
41
     ;;
42
+  zip*)
43
+    noconfigdirs="$noconfigdirs target-libffi target-boehm-gc gdb gprof"
44
+    unsupported_languages="$unsupported_languages fortran java"
45
+    ;;
46
 esac
47
 
48
 # If we aren't building newlib, then don't build libgloss, since libgloss
49 117 dgisselq
diff -Naur '--exclude=*.swp' gcc-5.3.0-original/gcc/cfgexpand.c gcc-5.3.0-zip/gcc/cfgexpand.c
50
--- gcc-5.3.0-original/gcc/cfgexpand.c  2015-07-23 06:39:26.000000000 -0400
51
+++ gcc-5.3.0-zip/gcc/cfgexpand.c       2016-04-01 06:40:17.288326711 -0400
52
@@ -108,6 +108,14 @@
53
 #include "tree-chkp.h"
54
 #include "rtl-chkp.h"
55
 
56
+#ifdef DO_ZIP_DEBUGS
57
+#include <stdio.h>
58
+#define ZIP_DEBUG_LINE(STR,RTX) do{fprintf(stderr,"%s:%d/%s\n",__FILE__,__LINE__,STR); zip_debug_rtx(RTX);} while(0)
59
+extern void    zip_debug_rtx(const_rtx);
60
+#else
61
+#define        ZIP_DEBUG_LINE(STR,RTX)
62
+#endif
63
+
64
 /* Some systems use __main in a way incompatible with its use in gcc, in these
65
    cases use the macros NAME__MAIN to give a quoted symbol and SYMBOL__MAIN to
66
    give the same symbol without quotes for an alternative entry point.  You
67 111 dgisselq
diff -Naur '--exclude=*.swp' gcc-5.3.0-original/gcc/cgraphbuild.c gcc-5.3.0-zip/gcc/cgraphbuild.c
68
--- gcc-5.3.0-original/gcc/cgraphbuild.c        2015-01-09 15:18:42.000000000 -0500
69
+++ gcc-5.3.0-zip/gcc/cgraphbuild.c     2016-03-24 22:13:24.815287808 -0400
70
@@ -62,6 +62,13 @@
71
 #include "ipa-prop.h"
72
 #include "ipa-inline.h"
73
 
74
+#ifdef DO_ZIP_DEBUGS
75
+extern void zip_debug_rtx(const_rtx);
76
+#define        ZIP_DEBUG_LINE(STR,RTX) do { fprintf(stderr, "%s:%d/%s\n", __FILE__,__LINE__,STR); zip_debug_rtx(RTX); } while(0)
77
+#else
78
+#define        ZIP_DEBUG_LINE(STR,RTX)
79
+#endif
80
+
81
 /* Context of record_reference.  */
82
 struct record_reference_ctx
83
 {
84 102 dgisselq
diff -Naur '--exclude=*.swp' gcc-5.3.0-original/gcc/common/config/zip/zip-common.c gcc-5.3.0-zip/gcc/common/config/zip/zip-common.c
85
--- gcc-5.3.0-original/gcc/common/config/zip/zip-common.c       1969-12-31 19:00:00.000000000 -0500
86
+++ gcc-5.3.0-zip/gcc/common/config/zip/zip-common.c    2016-02-14 00:54:31.821055716 -0500
87
@@ -0,0 +1,52 @@
88
+////////////////////////////////////////////////////////////////////////////////
89
+//
90
+// Filename:   common/config/zip/zip-common.c
91
+//
92
+// Project:    Zip CPU backend for the GNU Compiler Collection
93
+//
94
+// Purpose:    To eliminate the frame register automatically.
95
+//
96
+// Creator:    Dan Gisselquist, Ph.D.
97
+//             Gisselquist Technology, LLC
98
+//
99
+////////////////////////////////////////////////////////////////////////////////
100
+//
101
+// Copyright (C) 2016, Gisselquist Technology, LLC
102
+//
103
+// This program is free software (firmware): you can redistribute it and/or
104
+// modify it under the terms of  the GNU General Public License as published
105
+// by the Free Software Foundation, either version 3 of the License, or (at
106
+// your option) any later version.
107
+//
108
+// This program is distributed in the hope that it will be useful, but WITHOUT
109
+// ANY WARRANTY; without even the implied warranty of MERCHANTIBILITY or
110
+// FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
111
+// for more details.
112
+//
113
+// You should have received a copy of the GNU General Public License along
114
+// with this program.  (It's in the $(ROOT)/doc directory, run make with no
115
+// target there if the PDF file isn't present.)  If not, see
116
+// <http://www.gnu.org/licenses/> for a copy.
117
+//
118
+// License:    GPL, v3, as defined and found on www.gnu.org,
119
+//             http://www.gnu.org/licenses/gpl.html
120
+//
121
+//
122
+////////////////////////////////////////////////////////////////////////////////
123
+#include "config.h"
124
+#include "system.h"
125
+#include "coretypes.h"
126
+#include "tm.h"
127
+#include "common/common-target.h"
128
+#include "common/common-target-def.h"
129
+
130
+static const struct default_options zip_option_optimization_table[] =
131
+  {
132
+    { OPT_LEVELS_1_PLUS, OPT_fomit_frame_pointer, NULL, 1 },
133
+    { OPT_LEVELS_NONE, 0, NULL, 0 }
134
+  };
135
+
136
+#undef TARGET_OPTION_OPTIMIZATION_TABLE
137
+#define        TARGET_OPTION_OPTIMIZATION_TABLE        zip_option_optimization_table
138
+
139
+struct gcc_targetm_common      targetm_common = TARGETM_COMMON_INITIALIZER;
140
diff -Naur '--exclude=*.swp' gcc-5.3.0-original/gcc/config/aarch64/aarch64-linux.h gcc-5.3.0-zip/gcc/config/aarch64/aarch64-linux.h
141 122 dgisselq
--- gcc-5.3.0-original/gcc/config/aarch64/aarch64-linux.h       2016-04-06 17:56:01.475918570 -0400
142 102 dgisselq
+++ gcc-5.3.0-zip/gcc/config/aarch64/aarch64-linux.h    2015-07-24 12:00:26.000000000 -0400
143
@@ -21,7 +21,7 @@
144
 #ifndef GCC_AARCH64_LINUX_H
145
 #define GCC_AARCH64_LINUX_H
146
 
147
-#define GLIBC_DYNAMIC_LINKER "/tools/lib/ld-linux-aarch64%{mbig-endian:_be}%{mabi=ilp32:_ilp32}.so.1"
148
+#define GLIBC_DYNAMIC_LINKER "/lib/ld-linux-aarch64%{mbig-endian:_be}%{mabi=ilp32:_ilp32}.so.1"
149
 
150
 #undef  ASAN_CC1_SPEC
151
 #define ASAN_CC1_SPEC "%{%:sanitize(address):-funwind-tables}"
152
diff -Naur '--exclude=*.swp' gcc-5.3.0-original/gcc/config/alpha/linux-elf.h gcc-5.3.0-zip/gcc/config/alpha/linux-elf.h
153 122 dgisselq
--- gcc-5.3.0-original/gcc/config/alpha/linux-elf.h     2016-04-06 17:56:01.475918570 -0400
154 102 dgisselq
+++ gcc-5.3.0-zip/gcc/config/alpha/linux-elf.h  2015-01-05 07:33:28.000000000 -0500
155
@@ -23,8 +23,8 @@
156
 #define EXTRA_SPECS \
157
 { "elf_dynamic_linker", ELF_DYNAMIC_LINKER },
158
 
159
-#define GLIBC_DYNAMIC_LINKER   "/tools/lib/ld-linux.so.2"
160
-#define UCLIBC_DYNAMIC_LINKER "/tools/lib/ld-uClibc.so.0"
161
+#define GLIBC_DYNAMIC_LINKER   "/lib/ld-linux.so.2"
162
+#define UCLIBC_DYNAMIC_LINKER "/lib/ld-uClibc.so.0"
163
 #if DEFAULT_LIBC == LIBC_UCLIBC
164
 #define CHOOSE_DYNAMIC_LINKER(G, U) "%{mglibc:" G ";:" U "}"
165
 #elif DEFAULT_LIBC == LIBC_GLIBC
166
diff -Naur '--exclude=*.swp' gcc-5.3.0-original/gcc/config/arm/linux-eabi.h gcc-5.3.0-zip/gcc/config/arm/linux-eabi.h
167 122 dgisselq
--- gcc-5.3.0-original/gcc/config/arm/linux-eabi.h      2016-04-06 17:56:01.475918570 -0400
168 102 dgisselq
+++ gcc-5.3.0-zip/gcc/config/arm/linux-eabi.h   2015-01-05 07:33:28.000000000 -0500
169
@@ -68,8 +68,8 @@
170
    GLIBC_DYNAMIC_LINKER_DEFAULT and TARGET_DEFAULT_FLOAT_ABI.  */
171
 
172
 #undef  GLIBC_DYNAMIC_LINKER
173
-#define GLIBC_DYNAMIC_LINKER_SOFT_FLOAT "/tools/lib/ld-linux.so.3"
174
-#define GLIBC_DYNAMIC_LINKER_HARD_FLOAT "/tools/lib/ld-linux-armhf.so.3"
175
+#define GLIBC_DYNAMIC_LINKER_SOFT_FLOAT "/lib/ld-linux.so.3"
176
+#define GLIBC_DYNAMIC_LINKER_HARD_FLOAT "/lib/ld-linux-armhf.so.3"
177
 #define GLIBC_DYNAMIC_LINKER_DEFAULT GLIBC_DYNAMIC_LINKER_SOFT_FLOAT
178
 
179
 #define GLIBC_DYNAMIC_LINKER \
180
diff -Naur '--exclude=*.swp' gcc-5.3.0-original/gcc/config/arm/linux-elf.h gcc-5.3.0-zip/gcc/config/arm/linux-elf.h
181 122 dgisselq
--- gcc-5.3.0-original/gcc/config/arm/linux-elf.h       2016-04-06 17:56:01.475918570 -0400
182 102 dgisselq
+++ gcc-5.3.0-zip/gcc/config/arm/linux-elf.h    2015-06-23 05:26:54.000000000 -0400
183
@@ -62,7 +62,7 @@
184
 
185
 #define LIBGCC_SPEC "%{mfloat-abi=soft*:-lfloat} -lgcc"
186
 
187
-#define GLIBC_DYNAMIC_LINKER "/tools/lib/ld-linux.so.2"
188
+#define GLIBC_DYNAMIC_LINKER "/lib/ld-linux.so.2"
189
 
190
 #define LINUX_TARGET_LINK_SPEC  "%{h*} \
191
    %{static:-Bstatic} \
192
diff -Naur '--exclude=*.swp' gcc-5.3.0-original/gcc/config/bfin/linux.h gcc-5.3.0-zip/gcc/config/bfin/linux.h
193 122 dgisselq
--- gcc-5.3.0-original/gcc/config/bfin/linux.h  2016-04-06 17:56:01.475918570 -0400
194 102 dgisselq
+++ gcc-5.3.0-zip/gcc/config/bfin/linux.h       2015-01-05 07:33:28.000000000 -0500
195
@@ -45,7 +45,7 @@
196
   %{shared:-G -Bdynamic} \
197
   %{!shared: %{!static: \
198
    %{rdynamic:-export-dynamic} \
199
-   -dynamic-linker /tools/lib/ld-uClibc.so.0} \
200
+   -dynamic-linker /lib/ld-uClibc.so.0} \
201
    %{static}} -init __init -fini __fini"
202
 
203
 #undef TARGET_SUPPORTS_SYNC_CALLS
204
diff -Naur '--exclude=*.swp' gcc-5.3.0-original/gcc/config/cris/linux.h gcc-5.3.0-zip/gcc/config/cris/linux.h
205 122 dgisselq
--- gcc-5.3.0-original/gcc/config/cris/linux.h  2016-04-06 17:56:01.475918570 -0400
206 102 dgisselq
+++ gcc-5.3.0-zip/gcc/config/cris/linux.h       2015-01-05 07:33:28.000000000 -0500
207
@@ -102,7 +102,7 @@
208
 #undef CRIS_DEFAULT_CPU_VERSION
209
 #define CRIS_DEFAULT_CPU_VERSION CRIS_CPU_NG
210
 
211
-#define GLIBC_DYNAMIC_LINKER "/tools/lib/ld.so.1"
212
+#define GLIBC_DYNAMIC_LINKER "/lib/ld.so.1"
213
 
214
 #undef CRIS_LINK_SUBTARGET_SPEC
215
 #define CRIS_LINK_SUBTARGET_SPEC \
216
diff -Naur '--exclude=*.swp' gcc-5.3.0-original/gcc/config/freebsd-spec.h gcc-5.3.0-zip/gcc/config/freebsd-spec.h
217 122 dgisselq
--- gcc-5.3.0-original/gcc/config/freebsd-spec.h        2016-04-06 17:56:01.475918570 -0400
218 102 dgisselq
+++ gcc-5.3.0-zip/gcc/config/freebsd-spec.h     2015-06-25 13:53:14.000000000 -0400
219
@@ -129,9 +129,9 @@
220
 #endif
221
 
222
 #if FBSD_MAJOR < 6
223
-#define FBSD_DYNAMIC_LINKER "/tools/libexec/ld-elf.so.1"
224
+#define FBSD_DYNAMIC_LINKER "/usr/libexec/ld-elf.so.1"
225
 #else
226
-#define FBSD_DYNAMIC_LINKER "/tools/libexec/ld-elf.so.1"
227
+#define FBSD_DYNAMIC_LINKER "/libexec/ld-elf.so.1"
228
 #endif
229
 
230
 /* NOTE: The freebsd-spec.h header is included also for various
231
diff -Naur '--exclude=*.swp' gcc-5.3.0-original/gcc/config/frv/linux.h gcc-5.3.0-zip/gcc/config/frv/linux.h
232 122 dgisselq
--- gcc-5.3.0-original/gcc/config/frv/linux.h   2016-04-06 17:56:01.475918570 -0400
233 102 dgisselq
+++ gcc-5.3.0-zip/gcc/config/frv/linux.h        2015-01-05 07:33:28.000000000 -0500
234
@@ -34,7 +34,7 @@
235
 #define ENDFILE_SPEC \
236
   "%{shared|pie:crtendS.o%s;:crtend.o%s} crtn.o%s"
237
 
238
-#define GLIBC_DYNAMIC_LINKER "/tools/lib/ld.so.1"
239
+#define GLIBC_DYNAMIC_LINKER "/lib/ld.so.1"
240
 
241
 #undef LINK_SPEC
242
 #define LINK_SPEC "\
243
diff -Naur '--exclude=*.swp' gcc-5.3.0-original/gcc/config/i386/gnu.h gcc-5.3.0-zip/gcc/config/i386/gnu.h
244 122 dgisselq
--- gcc-5.3.0-original/gcc/config/i386/gnu.h    2016-04-06 17:56:01.475918570 -0400
245 102 dgisselq
+++ gcc-5.3.0-zip/gcc/config/i386/gnu.h 2015-01-05 07:33:28.000000000 -0500
246
@@ -22,7 +22,7 @@
247
 #define GNU_USER_LINK_EMULATION "elf_i386"
248
 
249
 #undef GNU_USER_DYNAMIC_LINKER
250
-#define GNU_USER_DYNAMIC_LINKER "/tools/lib/ld.so"
251
+#define GNU_USER_DYNAMIC_LINKER "/lib/ld.so"
252
 
253
 #undef STARTFILE_SPEC
254
 #if defined HAVE_LD_PIE
255
diff -Naur '--exclude=*.swp' gcc-5.3.0-original/gcc/config/i386/kfreebsd-gnu64.h gcc-5.3.0-zip/gcc/config/i386/kfreebsd-gnu64.h
256 122 dgisselq
--- gcc-5.3.0-original/gcc/config/i386/kfreebsd-gnu64.h 2016-04-06 17:56:01.475918570 -0400
257 102 dgisselq
+++ gcc-5.3.0-zip/gcc/config/i386/kfreebsd-gnu64.h      2015-01-05 07:33:28.000000000 -0500
258
@@ -22,6 +22,6 @@
259
 #define GNU_USER_LINK_EMULATION64 "elf_x86_64_fbsd"
260
 #define GNU_USER_LINK_EMULATIONX32 "elf32_x86_64_fbsd"
261
 
262
-#define GLIBC_DYNAMIC_LINKER32 "/tools/lib/ld.so.1"
263
-#define GLIBC_DYNAMIC_LINKER64 "/tools/lib/ld-kfreebsd-x86-64.so.1"
264
-#define GLIBC_DYNAMIC_LINKERX32 "/tools/lib/ld-kfreebsd-x32.so.1"
265
+#define GLIBC_DYNAMIC_LINKER32 "/lib/ld.so.1"
266
+#define GLIBC_DYNAMIC_LINKER64 "/lib/ld-kfreebsd-x86-64.so.1"
267
+#define GLIBC_DYNAMIC_LINKERX32 "/lib/ld-kfreebsd-x32.so.1"
268
diff -Naur '--exclude=*.swp' gcc-5.3.0-original/gcc/config/i386/kfreebsd-gnu.h gcc-5.3.0-zip/gcc/config/i386/kfreebsd-gnu.h
269 122 dgisselq
--- gcc-5.3.0-original/gcc/config/i386/kfreebsd-gnu.h   2016-04-06 17:56:01.475918570 -0400
270 102 dgisselq
+++ gcc-5.3.0-zip/gcc/config/i386/kfreebsd-gnu.h        2015-01-05 07:33:28.000000000 -0500
271
@@ -19,4 +19,4 @@
272
 <http://www.gnu.org/licenses/>.  */
273
 
274
 #define GNU_USER_LINK_EMULATION "elf_i386_fbsd"
275
-#define GLIBC_DYNAMIC_LINKER "/tools/lib/ld.so.1"
276
+#define GLIBC_DYNAMIC_LINKER "/lib/ld.so.1"
277
diff -Naur '--exclude=*.swp' gcc-5.3.0-original/gcc/config/i386/linux64.h gcc-5.3.0-zip/gcc/config/i386/linux64.h
278 122 dgisselq
--- gcc-5.3.0-original/gcc/config/i386/linux64.h        2016-04-06 17:56:01.475918570 -0400
279 102 dgisselq
+++ gcc-5.3.0-zip/gcc/config/i386/linux64.h     2015-01-05 07:33:28.000000000 -0500
280
@@ -27,6 +27,6 @@
281
 #define GNU_USER_LINK_EMULATION64 "elf_x86_64"
282
 #define GNU_USER_LINK_EMULATIONX32 "elf32_x86_64"
283
 
284
-#define GLIBC_DYNAMIC_LINKER32 "/tools/lib/ld-linux.so.2"
285
-#define GLIBC_DYNAMIC_LINKER64 "/tools/lib64/ld-linux-x86-64.so.2"
286
-#define GLIBC_DYNAMIC_LINKERX32 "/tools/libx32/ld-linux-x32.so.2"
287
+#define GLIBC_DYNAMIC_LINKER32 "/lib/ld-linux.so.2"
288
+#define GLIBC_DYNAMIC_LINKER64 "/lib64/ld-linux-x86-64.so.2"
289
+#define GLIBC_DYNAMIC_LINKERX32 "/libx32/ld-linux-x32.so.2"
290
diff -Naur '--exclude=*.swp' gcc-5.3.0-original/gcc/config/i386/linux.h gcc-5.3.0-zip/gcc/config/i386/linux.h
291 122 dgisselq
--- gcc-5.3.0-original/gcc/config/i386/linux.h  2016-04-06 17:56:01.475918570 -0400
292 102 dgisselq
+++ gcc-5.3.0-zip/gcc/config/i386/linux.h       2015-01-05 07:33:28.000000000 -0500
293
@@ -20,4 +20,4 @@
294
 <http://www.gnu.org/licenses/>.  */
295
 
296
 #define GNU_USER_LINK_EMULATION "elf_i386"
297
-#define GLIBC_DYNAMIC_LINKER "/tools/lib/ld-linux.so.2"
298
+#define GLIBC_DYNAMIC_LINKER "/lib/ld-linux.so.2"
299
diff -Naur '--exclude=*.swp' gcc-5.3.0-original/gcc/config/ia64/linux.h gcc-5.3.0-zip/gcc/config/ia64/linux.h
300 122 dgisselq
--- gcc-5.3.0-original/gcc/config/ia64/linux.h  2016-04-06 17:56:01.475918570 -0400
301 102 dgisselq
+++ gcc-5.3.0-zip/gcc/config/ia64/linux.h       2015-01-05 07:33:28.000000000 -0500
302
@@ -55,7 +55,7 @@
303
 /* Define this for shared library support because it isn't in the main
304
    linux.h file.  */
305
 
306
-#define GLIBC_DYNAMIC_LINKER "/tools/lib/ld-linux-ia64.so.2"
307
+#define GLIBC_DYNAMIC_LINKER "/lib/ld-linux-ia64.so.2"
308
 
309
 #undef LINK_SPEC
310
 #define LINK_SPEC "\
311
diff -Naur '--exclude=*.swp' gcc-5.3.0-original/gcc/config/knetbsd-gnu.h gcc-5.3.0-zip/gcc/config/knetbsd-gnu.h
312 122 dgisselq
--- gcc-5.3.0-original/gcc/config/knetbsd-gnu.h 2016-04-06 17:56:01.475918570 -0400
313 102 dgisselq
+++ gcc-5.3.0-zip/gcc/config/knetbsd-gnu.h      2015-01-05 07:33:28.000000000 -0500
314
@@ -32,4 +32,4 @@
315
 
316
 
317
 #undef GNU_USER_DYNAMIC_LINKER
318
-#define GNU_USER_DYNAMIC_LINKER "/tools/lib/ld.so.1"
319
+#define GNU_USER_DYNAMIC_LINKER "/lib/ld.so.1"
320
diff -Naur '--exclude=*.swp' gcc-5.3.0-original/gcc/config/kopensolaris-gnu.h gcc-5.3.0-zip/gcc/config/kopensolaris-gnu.h
321 122 dgisselq
--- gcc-5.3.0-original/gcc/config/kopensolaris-gnu.h    2016-04-06 17:56:01.475918570 -0400
322 102 dgisselq
+++ gcc-5.3.0-zip/gcc/config/kopensolaris-gnu.h 2015-01-05 07:33:28.000000000 -0500
323
@@ -31,5 +31,4 @@
324
   while (0)
325
 
326
 #undef GNU_USER_DYNAMIC_LINKER
327
-#define GNU_USER_DYNAMIC_LINKER "/tools/lib/ld.so.1"
328
-
329
+#define GNU_USER_DYNAMIC_LINKER "/lib/ld.so.1"
330
diff -Naur '--exclude=*.swp' gcc-5.3.0-original/gcc/config/linux.h gcc-5.3.0-zip/gcc/config/linux.h
331 122 dgisselq
--- gcc-5.3.0-original/gcc/config/linux.h       2016-04-06 17:56:01.475918570 -0400
332 102 dgisselq
+++ gcc-5.3.0-zip/gcc/config/linux.h    2015-01-05 07:33:28.000000000 -0500
333
@@ -73,10 +73,10 @@
334
    GLIBC_DYNAMIC_LINKER must be defined for each target using them, or
335
    GLIBC_DYNAMIC_LINKER32 and GLIBC_DYNAMIC_LINKER64 for targets
336
    supporting both 32-bit and 64-bit compilation.  */
337
-#define UCLIBC_DYNAMIC_LINKER "/tools/lib/ld-uClibc.so.0"
338
-#define UCLIBC_DYNAMIC_LINKER32 "/tools/lib/ld-uClibc.so.0"
339
-#define UCLIBC_DYNAMIC_LINKER64 "/tools/lib/ld64-uClibc.so.0"
340
-#define UCLIBC_DYNAMIC_LINKERX32 "/tools/lib/ldx32-uClibc.so.0"
341
+#define UCLIBC_DYNAMIC_LINKER "/lib/ld-uClibc.so.0"
342
+#define UCLIBC_DYNAMIC_LINKER32 "/lib/ld-uClibc.so.0"
343
+#define UCLIBC_DYNAMIC_LINKER64 "/lib/ld64-uClibc.so.0"
344
+#define UCLIBC_DYNAMIC_LINKERX32 "/lib/ldx32-uClibc.so.0"
345
 #define BIONIC_DYNAMIC_LINKER "/system/bin/linker"
346
 #define BIONIC_DYNAMIC_LINKER32 "/system/bin/linker"
347
 #define BIONIC_DYNAMIC_LINKER64 "/system/bin/linker64"
348
diff -Naur '--exclude=*.swp' gcc-5.3.0-original/gcc/config/lm32/uclinux-elf.h gcc-5.3.0-zip/gcc/config/lm32/uclinux-elf.h
349 122 dgisselq
--- gcc-5.3.0-original/gcc/config/lm32/uclinux-elf.h    2016-04-06 17:56:01.475918570 -0400
350 102 dgisselq
+++ gcc-5.3.0-zip/gcc/config/lm32/uclinux-elf.h 2015-01-05 07:33:28.000000000 -0500
351
@@ -67,7 +67,7 @@
352
    %{shared:-shared} \
353
    %{symbolic:-Bsymbolic} \
354
    %{rdynamic:-export-dynamic} \
355
-   -dynamic-linker /tools/lib/ld-linux.so.2"
356
+   -dynamic-linker /lib/ld-linux.so.2"
357
 
358
 #define TARGET_OS_CPP_BUILTINS() GNU_USER_TARGET_OS_CPP_BUILTINS()
359
 
360
diff -Naur '--exclude=*.swp' gcc-5.3.0-original/gcc/config/m68k/linux.h gcc-5.3.0-zip/gcc/config/m68k/linux.h
361 122 dgisselq
--- gcc-5.3.0-original/gcc/config/m68k/linux.h  2016-04-06 17:56:01.475918570 -0400
362 102 dgisselq
+++ gcc-5.3.0-zip/gcc/config/m68k/linux.h       2015-01-05 07:33:28.000000000 -0500
363
@@ -71,7 +71,7 @@
364
    When the -shared link option is used a final link is not being
365
    done.  */
366
 
367
-#define GLIBC_DYNAMIC_LINKER "/tools/lib/ld.so.1"
368
+#define GLIBC_DYNAMIC_LINKER "/lib/ld.so.1"
369
 
370
 #undef LINK_SPEC
371
 #define LINK_SPEC "-m m68kelf %{shared} \
372
diff -Naur '--exclude=*.swp' gcc-5.3.0-original/gcc/config/microblaze/linux.h gcc-5.3.0-zip/gcc/config/microblaze/linux.h
373 122 dgisselq
--- gcc-5.3.0-original/gcc/config/microblaze/linux.h    2016-04-06 17:56:01.475918570 -0400
374 102 dgisselq
+++ gcc-5.3.0-zip/gcc/config/microblaze/linux.h 2015-05-28 10:08:19.000000000 -0400
375
@@ -28,7 +28,7 @@
376
 #undef TLS_NEEDS_GOT
377
 #define TLS_NEEDS_GOT 1
378
 
379
-#define DYNAMIC_LINKER "/tools/lib/ld.so.1"
380
+#define DYNAMIC_LINKER "/lib/ld.so.1"
381
 #undef  SUBTARGET_EXTRA_SPECS
382
 #define SUBTARGET_EXTRA_SPECS \
383
   { "dynamic_linker", DYNAMIC_LINKER }
384
diff -Naur '--exclude=*.swp' gcc-5.3.0-original/gcc/config/mips/linux.h gcc-5.3.0-zip/gcc/config/mips/linux.h
385 122 dgisselq
--- gcc-5.3.0-original/gcc/config/mips/linux.h  2016-04-06 17:56:01.479918541 -0400
386 102 dgisselq
+++ gcc-5.3.0-zip/gcc/config/mips/linux.h       2015-01-05 07:33:28.000000000 -0500
387
@@ -22,20 +22,20 @@
388
 #define GNU_USER_LINK_EMULATIONN32 "elf32%{EB:b}%{EL:l}tsmipn32"
389
 
390
 #define GLIBC_DYNAMIC_LINKER32 \
391
-  "%{mnan=2008:/tools/lib/ld-linux-mipsn8.so.1;:/tools/lib/ld.so.1}"
392
+  "%{mnan=2008:/lib/ld-linux-mipsn8.so.1;:/lib/ld.so.1}"
393
 #define GLIBC_DYNAMIC_LINKER64 \
394
-  "%{mnan=2008:/tools/lib64/ld-linux-mipsn8.so.1;:/tools/lib64/ld.so.1}"
395
+  "%{mnan=2008:/lib64/ld-linux-mipsn8.so.1;:/lib64/ld.so.1}"
396
 #define GLIBC_DYNAMIC_LINKERN32 \
397
-  "%{mnan=2008:/tools/lib32/ld-linux-mipsn8.so.1;:/tools/lib32/ld.so.1}"
398
+  "%{mnan=2008:/lib32/ld-linux-mipsn8.so.1;:/lib32/ld.so.1}"
399
 
400
 #undef UCLIBC_DYNAMIC_LINKER32
401
 #define UCLIBC_DYNAMIC_LINKER32 \
402
-  "%{mnan=2008:/tools/lib/ld-uClibc-mipsn8.so.0;:/tools/lib/ld-uClibc.so.0}"
403
+  "%{mnan=2008:/lib/ld-uClibc-mipsn8.so.0;:/lib/ld-uClibc.so.0}"
404
 #undef UCLIBC_DYNAMIC_LINKER64
405
 #define UCLIBC_DYNAMIC_LINKER64 \
406
-  "%{mnan=2008:/tools/lib/ld64-uClibc-mipsn8.so.0;:/tools/lib/ld64-uClibc.so.0}"
407
+  "%{mnan=2008:/lib/ld64-uClibc-mipsn8.so.0;:/lib/ld64-uClibc.so.0}"
408
 #define UCLIBC_DYNAMIC_LINKERN32 \
409
-  "%{mnan=2008:/tools/lib32/ld-uClibc-mipsn8.so.0;:/tools/lib32/ld-uClibc.so.0}"
410
+  "%{mnan=2008:/lib32/ld-uClibc-mipsn8.so.0;:/lib32/ld-uClibc.so.0}"
411
 
412
 #define BIONIC_DYNAMIC_LINKERN32 "/system/bin/linker32"
413
 #define GNU_USER_DYNAMIC_LINKERN32 \
414
diff -Naur '--exclude=*.swp' gcc-5.3.0-original/gcc/config/mn10300/linux.h gcc-5.3.0-zip/gcc/config/mn10300/linux.h
415 122 dgisselq
--- gcc-5.3.0-original/gcc/config/mn10300/linux.h       2016-04-06 17:56:01.479918541 -0400
416 102 dgisselq
+++ gcc-5.3.0-zip/gcc/config/mn10300/linux.h    2015-01-05 07:33:28.000000000 -0500
417
@@ -32,7 +32,7 @@
418
 #undef  ASM_SPEC
419
 #define ASM_SPEC ""
420
 
421
-#define GLIBC_DYNAMIC_LINKER "/tools/lib/ld.so.1"
422
+#define GLIBC_DYNAMIC_LINKER "/lib/ld.so.1"
423
 
424
 #undef  LINK_SPEC
425
 #define LINK_SPEC "%{mrelax:--relax} %{shared:-shared} \
426
diff -Naur '--exclude=*.swp' gcc-5.3.0-original/gcc/config/pa/pa-linux.h gcc-5.3.0-zip/gcc/config/pa/pa-linux.h
427 122 dgisselq
--- gcc-5.3.0-original/gcc/config/pa/pa-linux.h 2016-04-06 17:56:01.479918541 -0400
428 102 dgisselq
+++ gcc-5.3.0-zip/gcc/config/pa/pa-linux.h      2015-09-24 20:04:26.000000000 -0400
429
@@ -37,7 +37,7 @@
430
 /* Define this for shared library support because it isn't in the main
431
    linux.h file.  */
432
 
433
-#define GLIBC_DYNAMIC_LINKER "/tools/lib/ld.so.1"
434
+#define GLIBC_DYNAMIC_LINKER "/lib/ld.so.1"
435
 
436
 #undef LINK_SPEC
437
 #define LINK_SPEC "\
438
diff -Naur '--exclude=*.swp' gcc-5.3.0-original/gcc/config/rs6000/linux64.h gcc-5.3.0-zip/gcc/config/rs6000/linux64.h
439 122 dgisselq
--- gcc-5.3.0-original/gcc/config/rs6000/linux64.h      2016-04-06 17:56:01.479918541 -0400
440 102 dgisselq
+++ gcc-5.3.0-zip/gcc/config/rs6000/linux64.h   2015-03-09 19:18:57.000000000 -0400
441
@@ -357,14 +357,14 @@
442
 #undef LINK_OS_DEFAULT_SPEC
443
 #define LINK_OS_DEFAULT_SPEC "%(link_os_linux)"
444
 
445
-#define GLIBC_DYNAMIC_LINKER32 "/tools/lib/ld.so.1"
446
+#define GLIBC_DYNAMIC_LINKER32 "/lib/ld.so.1"
447
 #ifdef LINUX64_DEFAULT_ABI_ELFv2
448
-#define GLIBC_DYNAMIC_LINKER64 "%{mabi=elfv1:/tools/lib64/ld64.so.1;:/tools/lib64/ld64.so.2}"
449
+#define GLIBC_DYNAMIC_LINKER64 "%{mabi=elfv1:/lib64/ld64.so.1;:/lib64/ld64.so.2}"
450
 #else
451
-#define GLIBC_DYNAMIC_LINKER64 "%{mabi=elfv2:/tools/lib64/ld64.so.2;:/tools/lib64/ld64.so.1}"
452
+#define GLIBC_DYNAMIC_LINKER64 "%{mabi=elfv2:/lib64/ld64.so.2;:/lib64/ld64.so.1}"
453
 #endif
454
-#define UCLIBC_DYNAMIC_LINKER32 "/tools/lib/ld-uClibc.so.0"
455
-#define UCLIBC_DYNAMIC_LINKER64 "/tools/lib/ld64-uClibc.so.0"
456
+#define UCLIBC_DYNAMIC_LINKER32 "/lib/ld-uClibc.so.0"
457
+#define UCLIBC_DYNAMIC_LINKER64 "/lib/ld64-uClibc.so.0"
458
 #if DEFAULT_LIBC == LIBC_UCLIBC
459
 #define CHOOSE_DYNAMIC_LINKER(G, U) "%{mglibc:" G ";:" U "}"
460
 #elif DEFAULT_LIBC == LIBC_GLIBC
461
diff -Naur '--exclude=*.swp' gcc-5.3.0-original/gcc/config/rs6000/sysv4.h gcc-5.3.0-zip/gcc/config/rs6000/sysv4.h
462 122 dgisselq
--- gcc-5.3.0-original/gcc/config/rs6000/sysv4.h        2016-04-06 17:56:01.479918541 -0400
463 102 dgisselq
+++ gcc-5.3.0-zip/gcc/config/rs6000/sysv4.h     2015-09-24 09:46:45.000000000 -0400
464
@@ -757,8 +757,8 @@
465
 
466
 #define LINK_START_LINUX_SPEC ""
467
 
468
-#define GLIBC_DYNAMIC_LINKER "/tools/lib/ld.so.1"
469
-#define UCLIBC_DYNAMIC_LINKER "/tools/lib/ld-uClibc.so.0"
470
+#define GLIBC_DYNAMIC_LINKER "/lib/ld.so.1"
471
+#define UCLIBC_DYNAMIC_LINKER "/lib/ld-uClibc.so.0"
472
 #if DEFAULT_LIBC == LIBC_UCLIBC
473
 #define CHOOSE_DYNAMIC_LINKER(G, U) "%{mglibc:" G ";:" U "}"
474
 #elif !defined (DEFAULT_LIBC) || DEFAULT_LIBC == LIBC_GLIBC
475
diff -Naur '--exclude=*.swp' gcc-5.3.0-original/gcc/config/s390/linux.h gcc-5.3.0-zip/gcc/config/s390/linux.h
476 122 dgisselq
--- gcc-5.3.0-original/gcc/config/s390/linux.h  2016-04-06 17:56:01.479918541 -0400
477 102 dgisselq
+++ gcc-5.3.0-zip/gcc/config/s390/linux.h       2015-05-11 03:14:10.000000000 -0400
478
@@ -60,8 +60,8 @@
479
 #define MULTILIB_DEFAULTS { "m31" }
480
 #endif
481
 
482
-#define GLIBC_DYNAMIC_LINKER32 "/tools/lib/ld.so.1"
483
-#define GLIBC_DYNAMIC_LINKER64 "/tools/lib/ld64.so.1"
484
+#define GLIBC_DYNAMIC_LINKER32 "/lib/ld.so.1"
485
+#define GLIBC_DYNAMIC_LINKER64 "/lib/ld64.so.1"
486
 
487
 #undef  LINK_SPEC
488
 #define LINK_SPEC \
489
diff -Naur '--exclude=*.swp' gcc-5.3.0-original/gcc/config/sh/linux.h gcc-5.3.0-zip/gcc/config/sh/linux.h
490 122 dgisselq
--- gcc-5.3.0-original/gcc/config/sh/linux.h    2016-04-06 17:56:01.479918541 -0400
491 102 dgisselq
+++ gcc-5.3.0-zip/gcc/config/sh/linux.h 2015-01-05 07:33:28.000000000 -0500
492
@@ -43,7 +43,7 @@
493
 
494
 #define TARGET_ASM_FILE_END file_end_indicate_exec_stack
495
 
496
-#define GLIBC_DYNAMIC_LINKER "/tools/lib/ld-linux.so.2"
497
+#define GLIBC_DYNAMIC_LINKER "/lib/ld-linux.so.2"
498
 
499
 #undef SUBTARGET_LINK_EMUL_SUFFIX
500
 #define SUBTARGET_LINK_EMUL_SUFFIX "_linux"
501
diff -Naur '--exclude=*.swp' gcc-5.3.0-original/gcc/config/sparc/linux64.h gcc-5.3.0-zip/gcc/config/sparc/linux64.h
502 122 dgisselq
--- gcc-5.3.0-original/gcc/config/sparc/linux64.h       2016-04-06 17:56:01.479918541 -0400
503 102 dgisselq
+++ gcc-5.3.0-zip/gcc/config/sparc/linux64.h    2015-01-05 07:33:28.000000000 -0500
504
@@ -84,8 +84,8 @@
505
    When the -shared link option is used a final link is not being
506
    done.  */
507
 
508
-#define GLIBC_DYNAMIC_LINKER32 "/tools/lib/ld-linux.so.2"
509
-#define GLIBC_DYNAMIC_LINKER64 "/tools/lib64/ld-linux.so.2"
510
+#define GLIBC_DYNAMIC_LINKER32 "/lib/ld-linux.so.2"
511
+#define GLIBC_DYNAMIC_LINKER64 "/lib64/ld-linux.so.2"
512
 
513
 #ifdef SPARC_BI_ARCH
514
 
515
@@ -193,7 +193,7 @@
516
 #else /* !SPARC_BI_ARCH */
517
 
518
 #undef LINK_SPEC
519
-#define LINK_SPEC "-m elf64_sparc -Y P,%R/tools/lib64 %{shared:-shared} \
520
+#define LINK_SPEC "-m elf64_sparc -Y P,%R/usr/lib64 %{shared:-shared} \
521
   %{!shared: \
522
     %{!static: \
523
       %{rdynamic:-export-dynamic} \
524
diff -Naur '--exclude=*.swp' gcc-5.3.0-original/gcc/config/sparc/linux.h gcc-5.3.0-zip/gcc/config/sparc/linux.h
525 122 dgisselq
--- gcc-5.3.0-original/gcc/config/sparc/linux.h 2016-04-06 17:56:01.479918541 -0400
526 102 dgisselq
+++ gcc-5.3.0-zip/gcc/config/sparc/linux.h      2015-01-05 07:33:28.000000000 -0500
527
@@ -83,7 +83,7 @@
528
    When the -shared link option is used a final link is not being
529
    done.  */
530
 
531
-#define GLIBC_DYNAMIC_LINKER "/tools/lib/ld-linux.so.2"
532
+#define GLIBC_DYNAMIC_LINKER "/lib/ld-linux.so.2"
533
 
534
 #undef  LINK_SPEC
535
 #define LINK_SPEC "-m elf32_sparc %{shared:-shared} \
536
diff -Naur '--exclude=*.swp' gcc-5.3.0-original/gcc/config/vax/linux.h gcc-5.3.0-zip/gcc/config/vax/linux.h
537 122 dgisselq
--- gcc-5.3.0-original/gcc/config/vax/linux.h   2016-04-06 17:56:01.479918541 -0400
538 102 dgisselq
+++ gcc-5.3.0-zip/gcc/config/vax/linux.h        2015-01-05 07:33:28.000000000 -0500
539
@@ -41,7 +41,7 @@
540
   %{!shared: \
541
     %{!static: \
542
       %{rdynamic:-export-dynamic} \
543
-      -dynamic-linker /tools/lib/ld.so.1} \
544
+      -dynamic-linker /lib/ld.so.1} \
545
     %{static:-static}}"
546
 
547
 #undef  WCHAR_TYPE
548
diff -Naur '--exclude=*.swp' gcc-5.3.0-original/gcc/config/xtensa/linux.h gcc-5.3.0-zip/gcc/config/xtensa/linux.h
549 122 dgisselq
--- gcc-5.3.0-original/gcc/config/xtensa/linux.h        2016-04-06 17:56:01.479918541 -0400
550 102 dgisselq
+++ gcc-5.3.0-zip/gcc/config/xtensa/linux.h     2015-01-05 07:33:28.000000000 -0500
551
@@ -44,7 +44,7 @@
552
   %{mlongcalls:--longcalls} \
553
   %{mno-longcalls:--no-longcalls}"
554
 
555
-#define GLIBC_DYNAMIC_LINKER "/tools/lib/ld.so.1"
556
+#define GLIBC_DYNAMIC_LINKER "/lib/ld.so.1"
557
 
558
 #undef LINK_SPEC
559
 #define LINK_SPEC \
560
diff -Naur '--exclude=*.swp' gcc-5.3.0-original/gcc/config/zip/netbsd.h gcc-5.3.0-zip/gcc/config/zip/netbsd.h
561
--- gcc-5.3.0-original/gcc/config/zip/netbsd.h  1969-12-31 19:00:00.000000000 -0500
562
+++ gcc-5.3.0-zip/gcc/config/zip/netbsd.h       2016-01-30 15:04:14.796899050 -0500
563
@@ -0,0 +1,82 @@
564
+////////////////////////////////////////////////////////////////////////////////
565
+//
566
+// Filename:   netbsd.h
567
+//
568
+// Project:    Zip CPU backend for the GNU Compiler Collection
569
+//
570
+// Purpose:
571
+//
572
+// Creator:    Dan Gisselquist, Ph.D.
573
+//             Gisselquist Technology, LLC
574
+//
575
+////////////////////////////////////////////////////////////////////////////////
576
+//
577
+// Copyright (C) 2016, Gisselquist Technology, LLC
578
+//
579
+// This program is free software (firmware): you can redistribute it and/or
580
+// modify it under the terms of  the GNU General Public License as published
581
+// by the Free Software Foundation, either version 3 of the License, or (at
582
+// your option) any later version.
583
+//
584
+// This program is distributed in the hope that it will be useful, but WITHOUT
585
+// ANY WARRANTY; without even the implied warranty of MERCHANTIBILITY or
586
+// FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
587
+// for more details.
588
+//
589
+// You should have received a copy of the GNU General Public License along
590
+// with this program.  (It's in the $(ROOT)/doc directory, run make with no
591
+// target there if the PDF file isn't present.)  If not, see
592
+// <http://www.gnu.org/licenses/> for a copy.
593
+//
594
+// License:    GPL, v3, as defined and found on www.gnu.org,
595
+//             http://www.gnu.org/licenses/gpl.html
596
+//
597
+//
598
+////////////////////////////////////////////////////////////////////////////////
599
+#ifndef        ZIP_NETBSD_H
600
+#define        ZIP_NETBSD_H
601
+
602
+/* Define default target values. */
603
+
604
+#undef MACHINE_TYPE
605
+#define        MACHINE_TYPE    "NetBSD/Zip ELF"
606
+
607
+#undef TARGET_OS_CPP_BUILTINS
608
+#define        TARGET_OS_CPP_BUILTINS()        \
609
+       do { NETBSD_OS_CPP_BUILTINS_ELF();              \
610
+       builtin_define("__ZIPCPU__");                   \
611
+       builtin_assert("cpu=zip");                      \
612
+       builtin_assert("machine=zip");                  \
613
+       } while(0);
614
+
615
+#undef CPP_SPEC
616
+#define        CPP_SPEC        NETBSD_CPP_SPEC
617
+
618
+#undef STARTFILE_SPEC
619
+#define        STARTFILE_SPEC  NETBSD_STARTFILE_SPEC
620
+
621
+#undef ENDFILE_SPEC
622
+#define        ENDFILE_SPEC    NETBSD_ENDFILE_SPEC
623
+
624
+#undef LIB_SPEC
625
+#define        LIB_SPEC        NETBSD_LIB_SPEC
626
+
627
+#undef TARGET_VERSION
628
+#define        TARGET_VERSION  fprintf(stderr, " (%s)", MACHINE_TYPE);
629
+
630
+/* Make gcc agree with <machine/ansi.h> */
631
+
632
+#undef WCHAR_TYPE
633
+#define        WCHAR_TYPE      "int"
634
+
635
+#undef WCHAR_TYPE_SIZE
636
+#define        WCHAR_TYPE_SIZE 32
637
+
638
+#undef WINT_TYPE
639
+#define        WINT_TYPE       "int"
640
+
641
+/* Clean up after the generic Zip/ELF configuration. */
642
+#undef MD_EXEC_PREFIX
643
+#undef MD_STARTFILE_PREFIX
644
+
645
+#endif /* ZIP_NETBSD_H */
646
diff -Naur '--exclude=*.swp' gcc-5.3.0-original/gcc/config/zip/t-zip gcc-5.3.0-zip/gcc/config/zip/t-zip
647
--- gcc-5.3.0-original/gcc/config/zip/t-zip     1969-12-31 19:00:00.000000000 -0500
648
+++ gcc-5.3.0-zip/gcc/config/zip/t-zip  2016-02-04 19:00:59.939652587 -0500
649
@@ -0,0 +1,47 @@
650
+################################################################################
651
+##
652
+## Filename:   t-zip
653
+##
654
+## Project:    Zip CPU backend for the GNU Compiler Collection
655
+##
656
+## Purpose:
657
+##
658
+## Creator:    Dan Gisselquist, Ph.D.
659
+##             Gisselquist Technology, LLC
660
+##
661
+################################################################################
662
+##
663
+## Copyright (C) 2016, Gisselquist Technology, LLC
664
+##
665
+## This program is free software (firmware): you can redistribute it and/or
666
+## modify it under the terms of  the GNU General Public License as published
667
+## by the Free Software Foundation, either version 3 of the License, or (at
668
+## your option) any later version.
669
+##
670
+## This program is distributed in the hope that it will be useful, but WITHOUT
671
+## ANY WARRANTY; without even the implied warranty of MERCHANTIBILITY or
672
+## FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
673
+## for more details.
674
+##
675
+## You should have received a copy of the GNU General Public License along
676
+## with this program.  (It's in the $(ROOT)/doc directory, run make with no
677
+## target there if the PDF file isn't present.)  If not, see
678
+## <http://www.gnu.org/licenses/> for a copy.
679
+##
680
+## License:    GPL, v3, as defined and found on www.gnu.org,
681
+##             http://www.gnu.org/licenses/gpl.html
682
+##
683
+##
684
+################################################################################
685
+
686
+FPBIT = fp-bit.c
687
+DPBIT = dp-bit.c
688
+
689
+# dp-bit.c: $(srcdir)/config/fp-bit.c
690
+       # cat $(srcdir)/config/fp-bit.c > dp-bit.c
691
+#
692
+# fp-bit.c: $(srcdir)/config/fp-bit.c
693
+       # echo '#define FLOAT" > fp-bit.c
694
+       # cat $(srcdir)/config/fp-bit.c >> fp-bit.c
695
+
696
+
697
diff -Naur '--exclude=*.swp' gcc-5.3.0-original/gcc/config/zip/zip.c gcc-5.3.0-zip/gcc/config/zip/zip.c
698
--- gcc-5.3.0-original/gcc/config/zip/zip.c     1969-12-31 19:00:00.000000000 -0500
699 122 dgisselq
+++ gcc-5.3.0-zip/gcc/config/zip/zip.c  2016-04-06 17:47:47.255349663 -0400
700
@@ -0,0 +1,2099 @@
701 102 dgisselq
+////////////////////////////////////////////////////////////////////////////////
702
+//
703
+// Filename:   zip.c
704
+//
705
+// Project:    Zip CPU backend for the GNU Compiler Collection
706
+//
707
+// Purpose:
708
+//
709
+// Creator:    Dan Gisselquist, Ph.D.
710
+//             Gisselquist Technology, LLC
711
+//
712
+////////////////////////////////////////////////////////////////////////////////
713
+//
714
+// Copyright (C) 2016, Gisselquist Technology, LLC
715
+//
716
+// This program is free software (firmware): you can redistribute it and/or
717
+// modify it under the terms of  the GNU General Public License as published
718
+// by the Free Software Foundation, either version 3 of the License, or (at
719
+// your option) any later version.
720
+//
721
+// This program is distributed in the hope that it will be useful, but WITHOUT
722
+// ANY WARRANTY; without even the implied warranty of MERCHANTIBILITY or
723
+// FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
724
+// for more details.
725
+//
726
+// You should have received a copy of the GNU General Public License along
727
+// with this program.  (It's in the $(ROOT)/doc directory, run make with no
728
+// target there if the PDF file isn't present.)  If not, see
729
+// <http://www.gnu.org/licenses/> for a copy.
730
+//
731
+// License:    GPL, v3, as defined and found on www.gnu.org,
732
+//             http://www.gnu.org/licenses/gpl.html
733
+//
734
+//
735
+////////////////////////////////////////////////////////////////////////////////
736
+#include "config.h"
737
+#include "system.h"
738
+#include "coretypes.h"
739
+#include "tm.h"
740
+#include "rtl.h"
741
+#include "dominance.h"
742
+#include "cfg.h"
743
+#include "cfgrtl.h"
744
+#include "cfganal.h"
745
+#include "lcm.h"
746
+#include "cfgbuild.h"
747
+#include "cfgcleanup.h"
748
+#include "predict.h"
749
+#include "basic-block.h"
750
+#include "df.h"
751
+#include "hashtab.h"
752
+#include "hash-set.h"
753
+#include "machmode.h"
754
+#include "symtab.h"
755
+#include "rtlhash.h"
756
+#include "tree.h"
757
+#include "regs.h"
758
+#include "hard-reg-set.h"
759
+#include "real.h"
760
+#include "insn-config.h"
761
+#include "conditions.h"
762
+#include "output.h"
763
+#include "insn-attr.h"
764
+#include "flags.h"
765
+#include "expr.h"
766
+#include "function.h"
767
+#include "recog.h"
768
+#include "toplev.h"
769
+#include "ggc.h"
770
+#include "builtins.h"
771
+#include "calls.h"
772
+#include "langhooks.h"
773
+#include "optabs.h"
774
+#include "explow.h"
775
+#include "emit-rtl.h"
776 122 dgisselq
+#include "ifcvt.h"
777 102 dgisselq
+
778
+// #include "tmp_p.h"
779
+#include "target.h"
780
+#include "target-def.h"
781
+// #include "tm-constrs.h"
782 122 dgisselq
+#include "tm-preds.h"
783 102 dgisselq
+
784
+#include "diagnostic.h"
785
+// #include "integrate.h"
786
+
787
+// static int  zip_arg_partial_bytes(CUMULATIVE_ARGS *, enum machine_mode, tree, bool);
788
+// static      bool    zip_pass_by_reference(CUMULATIVE_ARGS *, enum machine_mode, const_tree, bool);
789
+static bool    zip_return_in_memory(const_tree, const_tree);
790
+static bool    zip_frame_pointer_required(void);
791
+
792
+static void zip_function_arg_advance(cumulative_args_t ca, enum machine_mode mode,
793
+               const_tree type, bool named);
794
+static rtx zip_function_arg(cumulative_args_t ca, enum machine_mode mode, const_tree type, bool named);
795
+
796
+static void    zip_asm_trampoline_template(FILE *);
797
+static void    zip_trampoline_init(rtx, tree, rtx);
798
+static void    zip_init_builtins(void);
799
+static tree zip_builtin_decl(unsigned, bool);
800
+// static void zip_asm_output_anchor(rtx x);
801
+       void    zip_asm_output_def(FILE *s, const char *n, const char *v);
802
+static rtx     zip_expand_builtin(tree exp, rtx target, rtx subtarget,
803
+                       enum machine_mode tmode, int    ignore);
804
+static bool    zip_scalar_mode_supported_p(enum machine_mode mode);
805
+static bool    zip_libgcc_floating_mode_supported_p(enum machine_mode mode);
806
+static int     zip_address_cost(rtx addr, enum machine_mode mode, addr_space_t as, bool spd);
807
+static bool    zip_mode_dependent_address_p(const_rtx addr, addr_space_t);
808
+static unsigned HOST_WIDE_INT  zip_const_anchor = 0x20000;
809 122 dgisselq
+static          HOST_WIDE_INT  zip_min_opb_imm = -0x20000;
810
+static          HOST_WIDE_INT  zip_max_opb_imm =  0x1ffff;
811 102 dgisselq
+static          HOST_WIDE_INT  zip_min_anchor_offset = -0x20000;
812
+static          HOST_WIDE_INT  zip_max_anchor_offset =  0x1ffff;
813
+static          HOST_WIDE_INT  zip_min_mov_offset = -0x1000;
814
+static          HOST_WIDE_INT  zip_max_mov_offset =  0x0fff;
815
+static int     zip_sched_issue_rate(void) { return 1; }
816
+static bool    zip_legitimate_address_p(machine_mode, rtx, bool);
817
+static bool    zip_legitimate_move_operand_p(machine_mode, rtx, bool);
818
+       void    zip_debug_rtx_pfx(const char *, const_rtx x);
819
+       void    zip_debug_rtx(const_rtx x);
820
+static void    zip_override_options(void);
821
+static bool    zip_can_eliminate(int from ATTRIBUTE_UNUSED, int to);
822
+static int     zip_memory_move_cost(machine_mode, reg_class_t, bool);
823 111 dgisselq
+static rtx     zip_legitimize_address(rtx x, rtx oldx, machine_mode mode);
824 117 dgisselq
+static bool    zip_cannot_modify_jumps_p(void);
825 122 dgisselq
+#ifdef HAVE_cc0
826
+       void    zip_update_cc_notice(rtx exp, rtx_insn *insn);
827
+#error "We're not supposed to have CC0 anymore"
828
+#else
829
+static bool    zip_fixed_condition_code_regs(unsigned int *a, unsigned int *b);
830
+#endif
831 102 dgisselq
+
832
+
833 103 dgisselq
+#define        ALL_DEBUG_OFF   false
834 102 dgisselq
+#define        ALL_DEBUG_ON    false
835
+
836
+enum ZIP_BUILTIN_ID_CODE {
837
+       ZIP_BUILTIN_RTU,
838
+       ZIP_BUILTIN_HALT,
839
+       ZIP_BUILTIN_IDLE,
840
+       ZIP_BUILTIN_SYSCALL,
841
+       ZIP_BUILTIN_SAVE_CONTEXT,
842
+       ZIP_BUILTIN_RESTORE_CONTEXT,
843
+       ZIP_BUILTIN_BITREV,
844
+       ZIP_BUILTIN_CC,
845 117 dgisselq
+       ZIP_BUILTIN_UCC,
846 102 dgisselq
+       ZIP_BUILTIN_MAX
847
+};
848
+
849
+static GTY (()) tree   zip_builtins[(int)ZIP_BUILTIN_MAX];
850
+static enum insn_code  zip_builtins_icode[(int)ZIP_BUILTIN_MAX];
851
+
852
+
853
+#include "gt-zip.h"
854
+
855
+/* The Global 'targetm' Variable. */
856
+struct gcc_target      targetm = TARGET_INITIALIZER;
857
+
858
+
859
+enum   reg_class zip_reg_class(int);
860
+
861
+#define        LOSE_AND_RETURN(msgid, x)               \
862
+       do {                                    \
863
+               zip_operand_lossage(msgid, x);  \
864
+               return;                         \
865
+       } while(0)
866
+
867
+/* Per-function machine data. */
868
+struct GTY(()) machine_function
869
+{
870
+       /* number of pretented arguments for varargs */
871
+       int     pretend_size;
872
+
873
+       /* Number of bytes saved on the stack for local variables. */
874
+       int     local_vars_size;
875
+
876
+       /* Number of bytes saved on stack for register save area */
877
+       int     saved_reg_size;
878
+       int     save_ret;
879
+
880
+       int     sp_fp_offset;
881
+       bool    fp_needed;
882
+       int     size_for_adjusting_sp;
883
+};
884
+
885
+/* Allocate a chunk of memory for per-function machine-dependent data. */
886
+
887
+static struct machine_function *
888
+zip_init_machine_status(void) {
889
+       return ggc_cleared_alloc<machine_function>();
890
+}
891
+
892
+static void
893
+zip_override_options(void)
894
+{
895
+       init_machine_status = zip_init_machine_status;
896
+}
897
+
898
+enum   reg_class
899
+zip_reg_class(int regno)
900
+{
901
+       if (is_ZIP_GENERAL_REG(regno)) {
902
+               return GENERAL_REGS;
903
+       } else if (is_ZIP_REG(regno)) {
904
+               return ALL_REGS;
905
+       } return NO_REGS;
906
+}
907
+
908
+/* Worker function for TARGET_RETURN_IN_MEMORY. */
909
+static bool
910
+zip_return_in_memory(const_tree type, const_tree fntype ATTRIBUTE_UNUSED) {
911
+       const   HOST_WIDE_INT size = int_size_in_bytes(type);
912
+       return (size == -1)||(size > UNITS_PER_WORD);
913
+}
914
+
915
+/* Emit an error emssage when we're in an asm, and a fatal error for "normal"
916
+ * insn.  Formatted output isn't easily implemented, since we use output operand
917
+ * lossage to output the actual message and handle the categorization of the
918
+ * error.  */
919
+
920
+static void
921
+zip_operand_lossage(const char *msgid, rtx op) {
922
+       fprintf(stderr, "Operand lossage??\n");
923
+       debug_rtx(op);
924
+       zip_debug_rtx(op);
925
+       output_operand_lossage("%s", msgid);
926
+}
927
+
928
+/* The PRINT_OPERAND_ADDRESS worker.   */
929
+void
930
+zip_print_operand_address(FILE *file, rtx x) {
931
+       const bool      dbg = ((ALL_DEBUG_ON)||(false))&&(!ALL_DEBUG_OFF);
932
+
933
+       if (dbg) zip_debug_rtx(x);
934
+       switch(GET_CODE(x)) {
935
+               case REG:
936
+                       fprintf(file, "(%s)", reg_names[REGNO(x)]);
937
+                       break;
938
+               case SYMBOL_REF:
939
+                       fprintf(file, "%s", XSTR(x,0));
940
+                       break;
941
+               case LABEL_REF:
942
+                       x = LABEL_REF_LABEL(x);
943
+               case CODE_LABEL:
944
+                       { char buf[256];
945
+                       ASM_GENERATE_INTERNAL_LABEL(buf, "L", CODE_LABEL_NUMBER(x));
946
+#ifdef ASM_OUTPUT_LABEL_REF
947
+                       ASM_OUTPUT_LABEL_REF(file, buf);
948
+#else
949
+                       assemble_name(file, buf);
950
+#endif
951
+                       }
952
+                       break;
953
+               case PLUS:
954 111 dgisselq
+                       if (!REG_P(XEXP(x, 0))) {
955
+                               fprintf(stderr, "Unsupported address construct\n");
956
+                               zip_debug_rtx(x);
957 102 dgisselq
+                               abort();
958 111 dgisselq
+                       } if (CONST_INT_P(XEXP(x, 1))) {
959 102 dgisselq
+                               if (INTVAL(XEXP(x,1))!=0) {
960
+                                       fprintf(file, "%ld(%s)",
961
+                                       INTVAL(XEXP(x, 1)),
962
+                                       reg_names[REGNO(XEXP(x, 0))]);
963
+                               } else {
964
+                                       fprintf(file, "(%s)",
965
+                                       reg_names[REGNO(XEXP(x, 0))]);
966
+                               }
967
+                       } else if (GET_CODE(XEXP(x,1)) == SYMBOL_REF) {
968
+                               fprintf(file, "%s(%s)", XSTR(x,0),
969
+                                       reg_names[REGNO(XEXP(x, 0))]);
970
+                       } else if ((GET_CODE(XEXP(x, 1)) == MINUS)
971
+                               && (GET_CODE(XEXP(XEXP(x, 1), 0))==SYMBOL_REF)
972
+                               && (GET_CODE(XEXP(XEXP(x, 1), 1))==SYMBOL_REF)) {
973
+                               fprintf(file, "%s-%s(%s)",
974
+                                       XSTR(XEXP(XEXP(x, 1),0),0),
975
+                                       XSTR(XEXP(XEXP(x, 1),1),0),
976
+                                       reg_names[REGNO(XEXP(x, 0))]);
977
+                       } else
978
+                               fprintf(file, "#INVALID(%s)",
979
+                                       reg_names[REGNO(XEXP(x, 0))]);
980
+                       /*
981
+                       else if (GET_CODE(XEXP(addr, 1)) == LABEL)
982
+                               fprintf(file, "%s(%s)",
983
+                                       GET_CODE(XEXP(addr, 1)),
984
+                                       reg_names[REGNO(GET_CODE(XEXP(addr, 0)))]);
985
+                       else if ((GET_CODE(XEXP(addr, 1)) == MINUS)
986
+                               && (GET_CODE(XEXP(GET_CODE(XEXP(addr, 1)), 0))==LABEL)
987
+                               && (GET_CODE(XEXP(GET_CODE(XEXP(addr, 1)), 1))==LABEL)) {
988
+                               fprintf(file, "%s-%s(%s)",
989
+                                       reg_names[REGNO(GET_CODE(XEXP(addr, 0)))]);
990
+                                       reg_names[REGNO(GET_CODE(XEXP(addr, 0)))]);
991
+                                       reg_names[REGNO(GET_CODE(XEXP(addr, 0)))]);
992
+                       }
993
+                       */
994
+                       break;
995
+               // We don't support direct memory addressing within our
996
+               // instruction set, even though the instructions themselves
997
+               // would support direct memory addressing of the lower 18 bits
998
+               // of memory space.
999
+               case MEM:
1000
+                       if (dbg) zip_debug_rtx(x);
1001
+                       zip_print_operand_address(file, XEXP(x, 0));
1002
+                       break;
1003 111 dgisselq
+               case CONST_INT:
1004
+                       fprintf(file, "%ld",INTVAL(x));
1005
+                       break;
1006 102 dgisselq
+               default:
1007 111 dgisselq
+                       fprintf(stderr, "Unknown address format\n");
1008
+                       zip_debug_rtx(x);
1009 102 dgisselq
+                       abort(); break;
1010
+                       // output_addr_const(file, x);
1011
+               break;
1012
+       }
1013
+}
1014
+
1015
+/* The PRINT_OPERAND worker. */
1016
+
1017
+void
1018
+zip_print_operand(FILE *file, rtx x, int code)
1019
+{
1020
+       rtx operand = x;
1021
+       int     rgoff = 0;
1022
+
1023
+       // fprintf(file, "Print Operand!\n");
1024
+
1025
+       /* New code entries should just be added to the switch below.  If
1026
+        * handling is finished, just return.  If handling was just a
1027
+        * modification of the operand, the modified operand should be put in
1028
+        * "operand", and then do a break to let default handling
1029
+        * (zero-modifier) output the operand.
1030
+        */
1031
+       switch(code) {
1032
+               case 0:
1033
+                       /* No code, print as usual. */
1034
+                       break;
1035
+               case 'L':
1036
+                       /* Lower of two registers, print one up */
1037
+                       rgoff = 1;
1038
+                       break;
1039
+               case 'R':
1040
+               case 'H':
1041
+                       /* Higher of a register pair, print normal */
1042
+                       break;
1043
+
1044
+               default:
1045
+                       LOSE_AND_RETURN("invalid operand modifier letter", x);
1046
+       }
1047
+
1048
+       /* Print an operand as without a modifier letter. */
1049
+       switch (GET_CODE(operand)) {
1050
+       case REG:
1051
+               if (REGNO(operand)+rgoff >= FIRST_PSEUDO_REGISTER)
1052
+                       internal_error("internal error: bad register: %d", REGNO(operand));
1053
+               fprintf(file, "%s", reg_names[REGNO(operand)+rgoff]);
1054
+               return;
1055
+       case SCRATCH:
1056
+               LOSE_AND_RETURN("Need a scratch register", x);
1057
+               return;
1058
+
1059
+       case CODE_LABEL:
1060
+       case LABEL_REF:
1061
+       case SYMBOL_REF:
1062
+       case PLUS:
1063
+               PRINT_OPERAND_ADDRESS(file, operand);
1064
+               return;
1065
+       case MEM:
1066
+               PRINT_OPERAND_ADDRESS(file, XEXP(operand, 0));
1067
+               return;
1068
+
1069
+       default:
1070
+               /* No need to handle all strange variants, let
1071
+                * output_addr_const do it for us.
1072
+                */
1073
+               if (CONSTANT_P(operand)) {
1074
+                       output_addr_const(file, operand);
1075
+                       return;
1076
+               }
1077
+
1078
+               LOSE_AND_RETURN("unexpected operand", x);
1079
+       }
1080
+}
1081
+
1082
+static bool
1083
+zip_frame_pointer_required(void)
1084
+{
1085
+       // This should really depend upon whether we have variable sized
1086
+       // arguments in our frame or not.  Once this fails, let's look
1087
+       // at what the problem was and then whether or not we can detect
1088
+       // it.
1089
+       //
1090
+       // Use a GCC global to determine our answer
1091 103 dgisselq
+       if (cfun->calls_alloca)
1092
+               return true;
1093 102 dgisselq
+       return (frame_pointer_needed);
1094
+/*
1095
+*/
1096
+}
1097
+
1098
+/* Determine whether or not a register needs to be saved on the stack or not.
1099
+ */
1100
+static bool
1101
+zip_save_reg(int regno) {
1102
+       if (regno == 0)
1103
+               return ((!crtl->is_leaf)
1104
+                       ||((df_regs_ever_live_p(0))&&(!call_used_regs[0])));
1105
+       else if ((regno == zip_GOT)&&(!ZIP_PIC))
1106
+               return  ((df_regs_ever_live_p(regno))
1107
+                               &&(!call_used_regs[regno]));
1108
+       else if (regno == zip_FP)
1109
+               return((zip_frame_pointer_required())||((df_regs_ever_live_p(regno))
1110
+                               &&(!call_used_regs[regno])));
1111
+       else if (regno < zip_FP)
1112
+               return  ((df_regs_ever_live_p(regno))
1113
+                               &&(!call_used_regs[regno]));
1114
+       return false;
1115
+}
1116
+
1117
+/* Compute the size of the local area and the size to be adjusted by the
1118
+ * prologue and epilogue.
1119
+ *
1120
+ * Here's what we are looking at (top is the current, bottom is the last ...)
1121
+ *
1122
+ *     Stack Pointer ->
1123
+ *                     Local variables (could be variable size)
1124
+ *     Frame Pointer ->        (= Stack Pointer + sp_fp_offset)
1125
+ *                     Saved return address, if saved
1126
+ *                     Other Saved registers
1127
+ *                     Saved frame pointer (if used)
1128
+ *                     Saved R12, if used
1129
+ *                     (Stack pointer is not saved)
1130
+ *     Original stack pointer ->       (= Stack_Pointer +size_for_adjusting_sp)
1131
+ *                     Called arguments (not passed in registers)
1132
+ *                     Return arguments (not R1, args.pretend_args_size)
1133
+ *             (Prior function's stack frame ... )
1134
+ *
1135
+ */
1136
+static void
1137
+zip_compute_frame(void) {
1138
+       int     regno;
1139
+       int     args_size;
1140
+
1141
+       // gcc_assert(crtl);
1142
+       gcc_assert(cfun);
1143
+       gcc_assert(cfun->machine);
1144
+
1145
+       args_size=(ACCUMULATE_OUTGOING_ARGS ? crtl->outgoing_args_size : 0);
1146
+
1147
+       if(crtl->args.pretend_args_size > 0) {
1148
+               args_size += crtl->args.pretend_args_size;
1149
+               // printf("%s pretend_args_size : %d\n", current_function_name(),
1150
+                       // crtl->args.pretend_args_size);
1151
+               cfun->machine->pretend_size = crtl->args.pretend_args_size;
1152
+       }
1153
+
1154
+       cfun->machine->local_vars_size = get_frame_size();
1155
+
1156
+       // Save callee-saved registers.
1157
+       cfun->machine->saved_reg_size = 0;
1158
+       for(regno=0; regno < FIRST_PSEUDO_REGISTER; regno++) {
1159
+               if (zip_save_reg(regno))
1160
+                       cfun->machine->saved_reg_size ++;
1161
+       }
1162
+
1163
+       cfun->machine->fp_needed = (zip_frame_pointer_required());
1164
+
1165
+       if ((cfun->machine->fp_needed)&&
1166
+                       (!df_regs_ever_live_p(zip_FP))) {
1167
+               cfun->machine->saved_reg_size ++;
1168
+       }
1169
+
1170
+       cfun->machine->sp_fp_offset = args_size + cfun->machine->local_vars_size;
1171
+       cfun->machine->size_for_adjusting_sp = cfun->machine->local_vars_size
1172
+                       + cfun->machine->saved_reg_size
1173
+                       + args_size;
1174
+
1175
+}
1176
+
1177
+void
1178
+zip_expand_prologue(void) {
1179
+       rtx     insn;
1180
+
1181
+       const bool      dbg = ((ALL_DEBUG_ON)||(false))&&(!ALL_DEBUG_OFF);
1182
+       zip_compute_frame();
1183
+
1184 103 dgisselq
+       if (dbg)  fprintf(stderr, "Computing Prologue instructions\n");
1185 102 dgisselq
+       if (cfun->machine->size_for_adjusting_sp != 0) {
1186
+               insn = emit_insn(gen_subsi3(stack_pointer_rtx,
1187
+                               stack_pointer_rtx,
1188
+                       gen_int_mode(cfun->machine->size_for_adjusting_sp,
1189
+                               SImode)));
1190
+                       // cfun->machine->sp_fp_offset
1191
+
1192
+               RTX_FRAME_RELATED_P(insn) = 1;
1193
+       }
1194
+
1195
+       {
1196
+               int offset = 0, regno;
1197
+               for(regno=0; regno < FIRST_PSEUDO_REGISTER; regno++) {
1198
+                       if (zip_save_reg(regno)) {
1199
+                               insn=emit_insn(gen_movsi_sto(
1200
+                                       gen_rtx_MEM(SImode, plus_constant(
1201
+                                               Pmode, stack_pointer_rtx,
1202
+                                               cfun->machine->sp_fp_offset
1203
+                                               +offset++, true)),
1204
+                                       gen_rtx_REG(SImode, regno)));
1205
+                               RTX_FRAME_RELATED_P(insn) = 1;
1206
+                       }
1207
+               }
1208 103 dgisselq
+               if (dbg)  fprintf(stderr, "%d registers saved%s\n", offset,
1209
+                       (crtl->saves_all_registers)?", should be all of them":", less than all");
1210 102 dgisselq
+       }
1211
+
1212
+       if (cfun->machine->fp_needed) {
1213
+               if (dbg) zip_debug_rtx(stack_pointer_rtx);
1214
+               if (dbg) zip_debug_rtx(frame_pointer_rtx);
1215
+               insn = emit_insn(gen_movsi_reg_off(frame_pointer_rtx,
1216
+                               stack_pointer_rtx, gen_int_mode(
1217
+                                               cfun->machine->sp_fp_offset,
1218
+                                               SImode)));
1219
+               RTX_FRAME_RELATED_P(insn) = 1;
1220 103 dgisselq
+               if (dbg)  fprintf(stderr, "sp_fp_offset is %d\n", cfun->machine->sp_fp_offset);
1221 102 dgisselq
+       }
1222
+}
1223
+
1224
+bool
1225
+zip_use_return_insn(void)
1226
+{
1227
+       if ((!reload_completed)||(cfun->machine->fp_needed)
1228
+                       ||(get_frame_size()!=0)) {
1229
+               // If R0 ever gets pushed to the stack, then we cannot
1230
+               // use a master return from anywhere.  We need to clean up the
1231
+               // stack first.
1232
+               if ((!crtl->is_leaf)||((df_regs_ever_live_p(0))
1233
+                                               &&(!call_used_regs[0]))) {
1234
+                       return false;
1235
+               }
1236
+       }
1237
+       zip_compute_frame();
1238
+       return (cfun->machine->size_for_adjusting_sp == 0);
1239
+}
1240
+
1241
+/* As per the notes in M68k.c, quote the function epilogue should not depend
1242
+ * upon the current stack pointer.  It should use the frame poitner only,
1243
+ * if there is a frame pointer.  This is mandatory because of alloca; we also
1244
+ * take advantage of it to omit stack adjustments before returning ...
1245
+ *
1246
+ * Let's see if we can use their approach here.
1247
+ *
1248
+ * We can't.  Consider our choices:
1249
+ *     LOD (FP),R0
1250
+ *     LOD 1(FP),R4
1251
+ *     LOD 2(FP),R5
1252
+ *     LOD 3(FP),R6
1253
+ *     LOD 4(FP),FP
1254
+ *     ... Then what is the stack pointer?
1255
+ * or
1256
+ *     LOD (FP),R0
1257
+ *     LOD 1(FP),R4
1258
+ *     LOD 2(FP),R5
1259
+ *     LOD 3(FP),R6
1260
+ *     MOV FP,SP
1261
+ *     LOD 4(SP),FP
1262
+ *     ... Which suffers unnecessary pipeline stalls, and certainly doesn't
1263
+ *     exploit our pipeline memory function
1264
+ * or
1265
+ *     MOV FP,SP
1266
+ *     LOD (SP),R0
1267
+ *     LOD 1(SP),R4
1268
+ *     LOD 2(SP),R5
1269
+ *     LOD 3(SP),R6
1270
+ *     LOD 4(SP),FP
1271
+ * Which will be our choice.  Note that we do use the stack pointer, eventually.
1272
+ *
1273
+ */
1274
+void
1275
+zip_expand_epilogue(void) {
1276
+       int     regno, offset;
1277
+       const bool      dbg = ((ALL_DEBUG_ON)||(false))&&(!ALL_DEBUG_OFF);
1278
+
1279
+       zip_compute_frame();
1280
+
1281
+       if (dbg) fprintf(stderr, "EPILOG::\n");
1282
+       if (cfun->machine->fp_needed) {
1283
+               if (dbg) fprintf(stderr, "EPILOG::Moving frame pointer to stack register\n");
1284
+               emit_insn(gen_movsi_reg(stack_pointer_rtx, frame_pointer_rtx));
1285
+       }
1286
+
1287
+       if (cfun->machine->saved_reg_size != 0) {
1288
+               offset =  (cfun->machine->size_for_adjusting_sp -
1289
+                               cfun->machine->sp_fp_offset
1290
+                       - cfun->machine->saved_reg_size);
1291
+               if (dbg) fprintf(stderr, "EPILOG::Saved_REG_Size = %d\n", cfun->machine->saved_reg_size);
1292
+               for(regno=0; regno < FIRST_PSEUDO_REGISTER; regno++) {
1293
+                       if (zip_save_reg(regno)) {
1294
+                               if (dbg) fprintf(stderr, "EPILOG::RESTORING R%d\n", regno);
1295
+                               emit_insn(gen_movsi_lod(
1296
+                                               gen_rtx_REG(SImode, regno),
1297
+                                       gen_rtx_MEM(SImode, plus_constant( SImode,
1298
+                                               stack_pointer_rtx, offset++, true))));
1299
+                       }
1300
+               }
1301
+       }
1302
+
1303
+       if (cfun->machine->size_for_adjusting_sp != 0) {
1304
+               if (dbg) fprintf(stderr, "EPILOG::ADDSI3(StackPtr, %d)\n",
1305
+                               cfun->machine->size_for_adjusting_sp);
1306
+               emit_insn(gen_addsi3(stack_pointer_rtx, stack_pointer_rtx,
1307
+                       gen_int_mode(
1308
+                               cfun->machine->size_for_adjusting_sp
1309
+                               -cfun->machine->sp_fp_offset, SImode)));
1310
+       }
1311
+       if (dbg) fprintf(stderr, "EPILOG::EMITTING-RETURN\n");
1312
+
1313
+       emit_jump_insn(ret_rtx);
1314
+}
1315
+
1316
+/* Implement RETURN_ADDR_RTX(COUNT, FRAMEADDR).
1317
+ *
1318
+ * We currently only support calculating the return address for the current
1319
+ * frame.
1320
+ */
1321
+
1322
+/*
1323
+rtx
1324
+zip_return_addr_rtx(int count, rtx frame ATTRIBUTE_UNUSED)
1325
+{
1326
+       if (count)
1327
+               return NULL_RTX;
1328
+
1329
+       zip_compute_frame();
1330
+
1331
+       // saved return address for current function is at fp - 1
1332
+       if (cfun->machine->save_ret)
1333
+               return gen_rtx_MEM(Pmode, plus_constant(frame_pointer_rtx,
1334
+                               -UNITS_PER_WORD));
1335
+       return get_hard_reg_initial_val(Pmode, RETURN_ADDRESS_REGNUM);
1336
+}
1337
+*/
1338
+
1339
+/* Implements the macro INITIAL_ELIMINATION_OFFSET,
1340
+ * return the OFFSET.
1341
+ */
1342
+int
1343
+zip_initial_elimination_offset(int from, int to) {
1344
+       int     ret = 0;
1345
+       zip_compute_frame();
1346
+
1347
+       if (((from) == FRAME_POINTER_REGNUM)&&((to) == STACK_POINTER_REGNUM)) {
1348
+               ret = cfun->machine->sp_fp_offset;
1349 117 dgisselq
+       } else if (((from)=ARG_POINTER_REGNUM)&&((to)==STACK_POINTER_REGNUM)) {
1350
+               ret = cfun->machine->sp_fp_offset;
1351 102 dgisselq
+       } else if (((from)=ARG_POINTER_REGNUM)&&((to)==FRAME_POINTER_REGNUM)) {
1352 117 dgisselq
+               // ret = cfun->machine->local_vars_size;
1353
+               ret = 0;
1354 102 dgisselq
+       } else {
1355
+               abort();
1356
+       }
1357
+
1358
+       return ret;
1359
+}
1360
+
1361
+/*
1362
+ * Code taken from m68k ...
1363
+ */
1364
+static bool
1365
+zip_can_eliminate(int from, int to)
1366
+{
1367
+       // fprintf(stderr, "CAN_ELIMINATE::QUERYING(%d,%d)\n", from, to);
1368
+       if ((from == zip_FP)&&(to == zip_SP))
1369
+               return !cfun->machine->fp_needed;
1370
+       return true;
1371
+}
1372
+
1373
+/*
1374
+static void
1375
+zip_basic_check(void)
1376
+{
1377
+       gcc_assert(mode_base_align[SImode]==4);
1378
+       if ((BITS_PER_UNIT != 32)
1379
+                       ||(GET_MODE_SIZE(SImode)!=1)
1380
+                       ||(GET_MODE_SIZE(DImode)!=1)
1381
+                       ||(HARD_REGNO_NREGS(0,SImode)!=1)) {
1382
+               printf("SIZEOF(SIMode) == %d\n", GET_MODE_SIZE(SImode));
1383
+               printf("BITS_PER_UNIT  == %d\n", BITS_PER_UNIT);
1384
+               gcc_assert(BITS_PER_UNIT==32);
1385
+               gcc_assert(GET_MODE_SIZE(SImode)==1);
1386
+               gcc_assert(HARD_REGNO_NREGS(0,SImode)==1);
1387
+       }
1388
+}
1389
+*/
1390
+
1391
+#define        zip_basic_check()
1392
+
1393
+/* Compute the number of word sized regiters needed to hold a function
1394
+ * argument of mode INT_MODE and tree type TYPE.
1395
+ */
1396
+int
1397
+zip_num_arg_regs(enum machine_mode mode, const_tree type) {
1398
+       int     size;
1399
+
1400
+       zip_basic_check();
1401
+
1402
+       if (targetm.calls.must_pass_in_stack(mode, type))
1403
+               return 0;
1404
+
1405
+       if ((type)&&(mode == BLKmode))
1406
+               size = int_size_in_bytes(type);
1407
+       else
1408
+               size = GET_MODE_SIZE(mode);
1409
+
1410
+       return (size + UNITS_PER_WORD - 1)/UNITS_PER_WORD;
1411
+}
1412
+
1413
+/* pushed in function prologue */
1414
+/*
1415
+static int
1416
+zip_arg_partial_bytes(CUMULATIVE_ARGS *cum, enum machine_mode mode,
1417
+               tree type, bool name ATTRIBUTE_UNUSED) {
1418
+       int     words;
1419
+       unsigned int    regs = zip_num_arg_regs(mode, type);
1420
+
1421
+       if (*cum >= ZIP_LAST_ARG_REGNO + 1)
1422
+               words = 0;
1423
+       else if ((*cum + regs) > ZIP_LAST_ARG_REGNO + 1)
1424
+               words = (*cum + regs) - ZIP_LAST_ARG_REGNO + 1;
1425
+       else
1426
+               words = 0;
1427
+
1428
+       return words * UNITS_PER_WORD;
1429
+}
1430
+*/
1431
+
1432
+static void
1433
+zip_function_arg_advance(cumulative_args_t ca, machine_mode mode,
1434
+               const_tree type, bool named ATTRIBUTE_UNUSED) {
1435
+       CUMULATIVE_ARGS *cum;
1436
+       int     nreg;
1437
+
1438
+       zip_basic_check();
1439
+
1440
+       cum = get_cumulative_args(ca);
1441
+       nreg = zip_num_arg_regs(mode, type);
1442
+       if (((*cum)+nreg) > NUM_ARG_REGS)
1443
+               (*cum) = NUM_ARG_REGS;
1444
+       else
1445
+               (*cum) += nreg;
1446
+}
1447
+
1448
+static rtx
1449
+zip_function_arg(cumulative_args_t ca, machine_mode mode,
1450
+               const_tree type ATTRIBUTE_UNUSED, bool named) {
1451
+       CUMULATIVE_ARGS *cum;
1452
+
1453
+       zip_basic_check();
1454
+
1455
+
1456
+       if (!named)
1457
+               return NULL_RTX;
1458
+       //if (targetm.calls.must_pass_in_stack(mode, type))
1459
+               //return NULL_RTX;
1460
+       cum = get_cumulative_args(ca);
1461
+
1462
+       if ((*cum) >= NUM_ARG_REGS)
1463
+               return NULL_RTX;
1464
+       return
1465
+               gen_rtx_REG(mode, (*cum)+1);
1466
+}
1467
+
1468 122 dgisselq
+#ifdef HAVE_cc0
1469 102 dgisselq
+/* NOTICE_UPDATE_CC sends us here
1470
+ */
1471
+void
1472
+zip_update_cc_notice(rtx exp, rtx_insn *insn)
1473
+{
1474 122 dgisselq
+#error "The CC0 code was supposed to be removed"
1475 102 dgisselq
+       const bool      dbg = ((ALL_DEBUG_ON)||(false))&&(!ALL_DEBUG_OFF);
1476
+       enum    attr_ccresult  ccr;
1477
+       enum    attr_conditional  conditionally_executed;
1478
+
1479
+       // The default is that nothing has changed.
1480
+       // cc_status = cc_status_prev;
1481
+       rtx     src, dest;
1482
+
1483
+       if (dbg) fprintf(stderr, "CC-NOTICE ...\n");
1484
+       if (dbg) zip_debug_rtx_pfx("CC :", exp);
1485
+       if (dbg) debug_rtx(exp);
1486
+
1487
+       ccr = get_attr_ccresult(insn);
1488
+       if (ccr == CCRESULT_UNKNOWN) {
1489
+               CC_STATUS_INIT;
1490
+               if (dbg) fprintf(stderr, "\tINIT-CC\n");
1491
+               return;
1492
+       }
1493
+
1494
+       if ((GET_CODE(exp) == PARALLEL)&&(GET_CODE(XVECEXP(exp, 0, 0))==SET)) {
1495
+               // This works up and until we add cc0 parallel instructions
1496
+               // to our instruction set.
1497
+               dest = SET_DEST(XVECEXP(exp, 0, 0));
1498
+               src  = SET_SRC (XVECEXP(exp, 0, 0));
1499
+       } else if (GET_CODE(exp) == SET) {
1500
+               dest = SET_DEST(exp);
1501
+               src  = SET_SRC (exp);
1502
+       } else {
1503
+               // First, do nothing if we haven't touched the condition codes.
1504
+               // Condition codes can only be changed as a result of a set
1505
+               // expression ...?
1506
+               if (dbg) fprintf(stderr, "Non-set expression, doesn\'t touch condition codes\n");
1507
+               return;
1508
+       }
1509
+
1510 111 dgisselq
+
1511
+       if (ccr == CCRESULT_UNCHANGED) {
1512
+               if (dbg) fprintf(stderr, "\tUnchanged CC\n");
1513
+
1514
+               // We can't just run away here ... even though the CC result
1515
+               // hasn't changed, GCC's ability to recognize it as a valid
1516
+               // result has changed.  In other words, if we just 'set' a
1517
+               // value contained within either value1 or value2, then we'll
1518
+               // need to update those values so that they are no longer looked
1519
+               // upon as potentially containing the current CC values.
1520
+
1521
+               if (dest) {
1522
+                       if (dest == cc0_rtx)
1523
+                               CC_STATUS_INIT;
1524
+                       else if ((REG_P(dest))&&(dest != pc_rtx)) {
1525
+                               // An example here might be a load instruction
1526
+                               if (reg_mentioned_p(dest, cc_status.value1))
1527
+                                       cc_status.value1 = NULL_RTX;
1528
+                               if (reg_mentioned_p(dest, cc_status.value2))
1529
+                                       cc_status.value2 = NULL_RTX;
1530
+                       }
1531
+               }
1532
+               return;
1533
+       }
1534
+
1535 102 dgisselq
+       // Gotta wait on this test, until we know whether or not the
1536
+       // conditionally executed instruction was designed to set the
1537
+       // CC0 register.
1538
+       conditionally_executed = get_attr_conditional(insn);
1539
+       if ((conditionally_executed == CONDITIONAL_YES)&&(dest != cc0_rtx)) {
1540
+               // cc_status is unchanged
1541 111 dgisselq
+               // However, GCC's vision of it may have changed
1542
+               //
1543
+               // Initialize CC_STATUS
1544 102 dgisselq
+               if (dbg) fprintf(stderr, "\tCC -- unchanged (conditional exec)\n");
1545 111 dgisselq
+               CC_STATUS_INIT;
1546 102 dgisselq
+               return;
1547 111 dgisselq
+       } else if (GET_CODE(src)==IF_THEN_ELSE) {
1548
+               // Same thing as above
1549
+               CC_STATUS_INIT;
1550
+               return;
1551 102 dgisselq
+       }
1552
+
1553
+       if (ccr == CCRESULT_VALIDZN)
1554
+               cc_status.flags = CC_NO_OVERFLOW;
1555
+       else
1556
+               cc_status.flags = 0;
1557
+       cc_status.value1 = dest;
1558
+       if (dest == cc0_rtx)
1559
+               cc_status.value2 = src;
1560
+       else if((REG_P(dest))&&(!reg_mentioned_p(dest, src)))
1561
+               cc_status.value2 = src;
1562
+       else if((SUBREG_P(dest))&&(!reg_mentioned_p(XEXP(dest,0), src)))
1563
+               cc_status.value2 = src;
1564
+       else
1565
+               cc_status.value2 = 0;
1566
+       if (dbg) fprintf(stderr, "\tCC -- Set flags for\n");
1567
+       if (dbg) zip_debug_rtx_pfx("V1: ", dest);
1568
+       if ((dbg)&&(cc_status.value2)) zip_debug_rtx_pfx("V2: ", src);
1569
+       else if (dbg)   fprintf(stderr, "V2: (No SRC)\n");
1570
+       if ((dbg)&&(REG_P(dest))) fprintf(stderr, "src refers to dest ?? %s\n",
1571
+               refers_to_regno_p(REGNO(dest),REGNO(dest),src,NULL)?"Yes":"No");
1572
+       if ((dbg)&&(REG_P(dest))) fprintf(stderr, "Occurrs %d times\n",
1573
+               count_occurrences(dest,src,0));
1574
+       if ((dbg)&&(REG_P(dest))) fprintf(stderr, "%s mentioned\n",
1575
+               reg_mentioned_p(dest,src)?"Is":"Is not");
1576
+       if ((dbg)&&(REG_P(dest))) fprintf(stderr, "%s referenced\n",
1577
+               reg_referenced_p(dest,src)?"Is":"Is not");
1578
+
1579
+//
1580
+// These results are only used in final.c, where they are used to remove
1581
+// compare instructions if the optimizer is on.  If I produce nothing, no
1582
+// compare instructions will be removed.  If I produce something, a smart
1583
+// decision may be made to remove compare instructions.
1584
+//
1585
+// cc_status will be compared  with subsequent
1586
+//     (set (cc0) (something)) (i.e. compare only) instructions
1587
+//
1588
+//     (set (cc0) (compare (x) (y)))
1589
+//     dst = cc0 -- the destination of the set is ignored, save that it must be
1590
+//             cc0
1591
+//     src1 = (compare (x) (y))
1592
+//     if (src1 == compare)&&(y == (const_int 0))
1593
+//             src2 = (x)
1594
+//     else
1595
+//             src2 = null
1596
+//
1597
+//     Four conditions:
1598
+//     1. if (val1)&&(src1 == val1)
1599
+//             This would be true if I had seen a (set (val1) (src1)) insn
1600
+//             If I have seen a (set (val1) (src1))
1601
+//                     or equivalently a (set (val1) (compare (x) (y)))
1602
+//     or
1603
+//     2. if (val2)&&(src1 == val2)
1604
+//             This would be true if I had seen a (set (val1) (src1)) insn,
1605
+//             and only if val2 was still valid.
1606
+//     or
1607
+//     3. if (src2)&&(value1)&&(src2 == value1)
1608
+//             This would be true if we are comparing against zero, and the
1609
+//             number we are comparing against zero is value 1
1610
+//     or
1611
+//     4. if (src2)&&(value2)&&(src2 == value2)
1612
+//             ... or value2.  This is the common ZipCPU case.
1613
+//
1614
+//             then delete the compare.
1615
+//
1616
+}
1617 122 dgisselq
+#else
1618 102 dgisselq
+
1619 122 dgisselq
+void   zip_canonicalize_comparison(int *code, rtx *op0, rtx *op1,
1620
+               bool preserve_op0)
1621
+{
1622
+       const bool      dbg = ((ALL_DEBUG_ON)||(false))&&(!ALL_DEBUG_OFF);
1623 102 dgisselq
+
1624 122 dgisselq
+       if (dbg) fprintf(stderr, "CANONICALIZE ...%s\n", (preserve_op0)?"(Preserve Op0)":"");
1625
+       if (dbg) zip_debug_rtx_pfx("CODE", gen_rtx_fmt_ee((rtx_code)*code, VOIDmode, gen_rtx_REG(CCmode,zip_CC), const0_rtx));
1626
+       if (dbg) zip_debug_rtx_pfx("OP0 ", *op0);
1627
+       if (dbg) zip_debug_rtx_pfx("OP1 ", *op1);
1628
+
1629
+       if ((!preserve_op0)&&((*code == LE)||(*code == GTU)||(*code == GEU))) {
1630
+               rtx tem = *op0;
1631
+               *op0 = *op1;
1632
+               *op1 = tem;
1633
+               *code = (int)swap_condition((enum rtx_code)*code);
1634
+       }
1635
+
1636
+       if ((*code == LE)||(*code == LEU)||(*code == GTU)) {
1637
+               int offset = 1; // (*code == GTU) ? 1 : -1;
1638
+               bool    swap = false;
1639
+
1640
+               if (CONST_INT_P(*op1)) {
1641
+                       *op1 = GEN_INT(INTVAL(*op1)+offset);
1642
+                       swap = true;
1643
+               } else if (REG_P(*op1)) {
1644
+                       *op1 = plus_constant(SImode, *op1, offset, true);
1645
+                       swap = true;
1646
+               } else if ((GET_CODE(*op1)==PLUS)&&(CONST_INT_P(XEXP(*op1,1)))){
1647
+                       *op1 = plus_constant(GET_MODE(*op1),XEXP(*op1,0),
1648
+                               INTVAL(XEXP(*op1,1))+offset);
1649
+                       swap = true;
1650
+               } if (swap) {
1651
+                       if (*code == LE)
1652
+                               (*code)= LT;
1653
+                       else if (*code == LEU)
1654
+                               (*code)= LTU;
1655
+                       else // (*code == GTU)
1656
+                               (*code) = GEU;
1657
+               }
1658
+       }
1659
+}
1660
+
1661
+static bool
1662
+zip_fixed_condition_code_regs(unsigned int *a, unsigned int *b) {
1663
+       *a = zip_CC;
1664
+       *b = INVALID_REGNUM;
1665
+       return true;
1666
+}
1667
+
1668
+#endif
1669
+
1670
+
1671 102 dgisselq
+/* totally buggy - we can't return pointers to nested functions */
1672
+static void
1673
+zip_asm_trampoline_template(FILE *f) {
1674
+       // Whereas at one time I thought I wouldn't need it, now I know I
1675
+       // need this trampoline function, although it is for a completely
1676
+       // different purpose than the one I was familiar with.
1677
+       fprintf(f, "\tldihi 0,r1\n");
1678
+       fprintf(f, "\tldilo 0,r1\n");
1679
+       fprintf(f, "\tjmp r1\n");
1680
+}
1681
+
1682
+/* Worker function for TARGET_TRAMPOLINE_INIT. */
1683
+static void
1684
+zip_trampoline_init(rtx m_tramp ATTRIBUTE_UNUSED,
1685
+       tree fndecl ATTRIBUTE_UNUSED,
1686
+       rtx chain_value ATTRIBUTE_UNUSED) {
1687
+// #warning "This needs to be filled out"
1688
+       abort();
1689
+}
1690
+
1691
+static tree
1692
+def_builtin(const char *name, enum insn_code icode, enum ZIP_BUILTIN_ID_CODE code,
1693
+       tree type)
1694
+{
1695
+       tree t = add_builtin_function(name,type,code,BUILT_IN_MD, NULL, NULL_TREE);
1696
+       zip_basic_check();
1697
+
1698
+       if(t) {
1699
+               zip_builtins[code] = t;
1700
+               zip_builtins_icode[code] = icode;
1701
+       }
1702
+
1703
+       return t;
1704
+
1705
+}
1706
+
1707
+void   zip_init_builtins(void) {
1708
+       zip_basic_check();
1709
+
1710
+  tree void_ftype_void = build_function_type_list(void_type_node, NULL_TREE);
1711
+#ifdef HAVE_zip_rtu
1712
+  def_builtin("zip_rtu", CODE_FOR_zip_rtu, ZIP_BUILTIN_RTU, void_ftype_void);
1713
+#endif
1714
+#ifdef HAVE_zip_halt
1715
+  def_builtin("zip_halt",  CODE_FOR_zip_halt,  ZIP_BUILTIN_HALT, void_ftype_void);
1716
+#endif
1717
+#ifdef HAVE_zip_idle
1718
+  def_builtin("zip_idle", CODE_FOR_zip_idle, ZIP_BUILTIN_IDLE, void_ftype_void);
1719
+#endif
1720
+
1721
+#ifdef HAVE_zip_syscall
1722
+// Support int SYSCALL(callID, int a, int b, int c);
1723
+  def_builtin("zip_syscall", CODE_FOR_zip_syscall, ZIP_BUILTIN_SYSCALL,
1724
+                       build_function_type_list(void_type_node, NULL_TREE));
1725
+#endif
1726
+
1727
+#ifdef HAVE_zip_save_context
1728
+  def_builtin("zip_save_context", CODE_FOR_zip_save_context, ZIP_BUILTIN_SAVE_CONTEXT,
1729
+               build_function_type_list(void_type_node, ptr_type_node, 0));
1730
+#endif
1731
+
1732
+#ifdef HAVE_zip_restore_context
1733
+  def_builtin("zip_restore_context", CODE_FOR_zip_restore_context, ZIP_BUILTIN_RESTORE_CONTEXT,
1734
+       build_function_type_list(void_type_node, ptr_type_node, 0));
1735
+#endif
1736
+
1737
+#ifdef HAVE_zip_bitrev
1738
+  def_builtin("zip_bitrev", CODE_FOR_zip_bitrev, ZIP_BUILTIN_BITREV,
1739
+       build_function_type_list(unsigned_type_node, unsigned_type_node,
1740
+               NULL_TREE));
1741
+#endif
1742
+
1743
+#ifdef HAVE_zip_cc
1744
+  def_builtin("zip_cc", CODE_FOR_zip_cc, ZIP_BUILTIN_CC,
1745
+       build_function_type_list(unsigned_type_node, NULL_TREE));
1746
+#endif
1747
+
1748 117 dgisselq
+#ifdef HAVE_zip_ucc
1749
+  def_builtin("zip_ucc", CODE_FOR_zip_ucc, ZIP_BUILTIN_UCC,
1750
+       build_function_type_list(unsigned_type_node, NULL_TREE));
1751
+#endif
1752
+
1753 102 dgisselq
+}
1754
+
1755
+static tree
1756
+zip_builtin_decl(unsigned zip_builtin_code, bool initialize_p ATTRIBUTE_UNUSED)
1757
+{
1758
+  if (zip_builtin_code >= ZIP_BUILTIN_MAX)
1759
+    return error_mark_node;
1760
+
1761
+  return zip_builtins[zip_builtin_code];
1762
+}
1763
+
1764
+static rtx
1765
+zip_expand_builtin(tree exp, rtx target,
1766
+               rtx subtarget ATTRIBUTE_UNUSED,
1767
+               machine_mode tmode ATTRIBUTE_UNUSED,
1768
+               int     ignore ATTRIBUTE_UNUSED) {
1769
+
1770
+       tree    fndecl = TREE_OPERAND(CALL_EXPR_FN(exp), 0);
1771
+       bool    nonvoid = (TREE_TYPE(TREE_TYPE(fndecl)) != void_type_node);
1772
+       enum    ZIP_BUILTIN_ID_CODE code=(enum ZIP_BUILTIN_ID_CODE)DECL_FUNCTION_CODE(fndecl);
1773
+       enum    insn_code icode = zip_builtins_icode[code];
1774
+       rtx     pat, op[5];
1775
+       call_expr_arg_iterator  iter;
1776
+       tree    arg;
1777
+
1778
+       if ((code == ZIP_BUILTIN_SAVE_CONTEXT)
1779
+                       ||(code == ZIP_BUILTIN_RESTORE_CONTEXT)) {
1780
+               arg = first_call_expr_arg(exp, &iter);
1781
+               if (arg == error_mark_node)
1782
+                       return NULL_RTX;
1783
+               op[0] = expand_normal(arg);
1784
+               if (GET_CODE(op[0]) != REG)
1785
+                       op[0] = force_reg(Pmode, op[0]);
1786
+               pat = GEN_FCN(icode)(op[0]);
1787
+       } else if (code == ZIP_BUILTIN_BITREV) {
1788
+               arg = first_call_expr_arg(exp, &iter);
1789
+               if (arg == error_mark_node) {
1790
+                       return NULL_RTX;
1791
+               }
1792
+               op[0] = expand_normal(arg);
1793
+               if (!target)
1794
+                       target = gen_reg_rtx(SImode);
1795
+               pat = GEN_FCN(icode)(target, op[0]);
1796 117 dgisselq
+       } else if ((code == ZIP_BUILTIN_CC)||(code == ZIP_BUILTIN_UCC)) {
1797 102 dgisselq
+               if (!target)
1798
+                       target = gen_reg_rtx(SImode);
1799
+               pat = GEN_FCN(icode)(target);
1800
+       } else // RTU, HALT, IDLE
1801
+               pat = GEN_FCN(icode)();
1802
+       if (!pat)
1803
+               return NULL_RTX;
1804
+       emit_insn(pat);
1805
+       return (nonvoid ? target : const0_rtx);
1806
+}
1807
+
1808
+static bool
1809
+zip_scalar_mode_supported_p(enum machine_mode mode) {
1810
+       zip_basic_check();
1811
+
1812
+       return ((mode)==SImode)||((mode)==DImode); // ||((mode)==SFmode);
1813
+}
1814
+
1815
+static bool
1816
+zip_libgcc_floating_mode_supported_p(enum machine_mode mode) {
1817
+       return ((mode)==SFmode)||((mode)==DFmode);
1818
+}
1819
+
1820
+static int
1821
+zip_address_cost(rtx addr ATTRIBUTE_UNUSED,
1822
+       enum machine_mode mode ATTRIBUTE_UNUSED,
1823
+       addr_space_t as ATTRIBUTE_UNUSED, bool spd ATTRIBUTE_UNUSED) {
1824
+       return 1;
1825
+}
1826
+
1827
+static bool
1828
+zip_mode_dependent_address_p(const_rtx addr ATTRIBUTE_UNUSED,
1829
+       addr_space_t as ATTRIBUTE_UNUSED) {
1830
+       return false;
1831
+}
1832
+
1833
+/*
1834
+static void
1835
+zip_asm_output_anchor(rtx x) {
1836
+       printf("ANCHOR: OP(%d)\n", GET_CODE(x));
1837
+}
1838
+*/
1839
+
1840
+static void
1841
+zip_debug_print(const char *pfx, int lvl, const char *str) {
1842
+       int     i;
1843
+       i = lvl;
1844
+       if ((true)||(lvl == 0))
1845
+               fprintf(stderr, "%s", pfx);
1846
+       else
1847
+               i += strlen(pfx);
1848
+       while(i-->0)
1849
+               fprintf(stderr, "  ");
1850
+       fprintf(stderr, "%s\n", str);
1851
+}
1852
+
1853
+static void
1854
+zip_debug_print_m(const char *pfx, int lvl, const char *str, enum machine_mode m) {
1855
+       int     i;
1856
+
1857
+       i = lvl;
1858
+       if ((true)||(lvl == 0))
1859
+               fprintf(stderr, "%s", pfx);
1860
+       else
1861
+               i = lvl+strlen(pfx);
1862
+       while(i-->0)
1863
+               fprintf(stderr, "  ");
1864
+       switch(m) {
1865
+               case VOIDmode:
1866
+                       fprintf(stderr, "%s:V\n", str);
1867
+                       break;
1868
+               case BLKmode:
1869
+                       fprintf(stderr, "%s:BLK\n", str);
1870
+                       break;
1871
+               case BImode:
1872
+                       fprintf(stderr, "%s:BI\n", str);
1873
+                       break;
1874
+#ifdef HAVE_QImode
1875
+               case QImode:
1876
+                       fprintf(stderr, "%s:QI\n", str);
1877
+                       break;
1878
+#endif
1879
+#ifdef HAVE_HImode
1880
+               case HImode:
1881
+                       fprintf(stderr, "%s:HI\n", str);
1882
+                       break;
1883
+#endif
1884
+               case SImode:
1885
+                       fprintf(stderr, "%s:SI\n", str);
1886
+                       break;
1887 122 dgisselq
+               case CCmode:
1888
+                       fprintf(stderr, "%s:CC\n", str);
1889
+                       break;
1890 102 dgisselq
+               case DImode:
1891
+                       fprintf(stderr, "%s:DI\n", str);
1892
+                       break;
1893
+               default:
1894
+                       fprintf(stderr, "%s:?\n", str);
1895
+       }
1896
+}
1897
+
1898
+static void
1899
+zip_debug_rtx_1(const char *pfx, const_rtx x, int lvl) {
1900
+       if (x == NULL_RTX) {
1901
+               zip_debug_print(pfx, lvl, "(NULL-RTX)");
1902
+               return;
1903
+       } else if (GET_CODE(x) > NUM_RTX_CODE) {
1904
+               char    buf[64];
1905
+               sprintf(buf, "(BAD-RTX-CODE %d)", GET_CODE(x));
1906
+               zip_debug_print(pfx, lvl, buf);
1907 117 dgisselq
+               gcc_assert(0 && "Bad RTX Code");
1908 102 dgisselq
+               return;
1909
+       } switch(GET_CODE(x)) { // rtl.def
1910 122 dgisselq
+       case PARALLEL:
1911
+               zip_debug_print(pfx, lvl, "(PARALLEL");
1912
+               for(int j=0; j<XVECLEN(x,0);j++)
1913
+                       zip_debug_rtx_1(pfx, XVECEXP(x,0,j), lvl+1);
1914
+               zip_debug_print(pfx, lvl, ")");
1915
+               debug_rtx(x);
1916
+               break;
1917 102 dgisselq
+       case INT_LIST: zip_debug_print(pfx, lvl, "(INT-LIST"); break;
1918 122 dgisselq
+       case SEQUENCE:
1919
+               zip_debug_print(pfx, lvl, "(SEQUENCE");
1920
+               for(int j=0; j<XVECLEN(x,0);j++)
1921
+                       zip_debug_rtx_1(pfx, XVECEXP(x,0,j), lvl+1);
1922
+               zip_debug_print(pfx, lvl, ")");
1923
+               debug_rtx(x);
1924
+               break;
1925 102 dgisselq
+       case ADDRESS: zip_debug_print(pfx, lvl, "(ADDRESS"); break;
1926
+       case DEBUG_INSN: zip_debug_print(pfx, lvl, "(DEBUG-INSN"); break;
1927
+       case INSN:
1928
+               zip_debug_print(pfx, lvl, "(INSN");
1929
+               /*
1930
+               { const rtx_insn *tmp_rtx;
1931
+               for(tmp_rtx = as_a <const rtx_insn *>(x); tmp_rtx != 0; tmp_rtx = NEXT_INSN(tmp_rtx)) {
1932
+                       zip_debug_rtx_1(tmp_rtx, lvl+1);
1933
+               }}
1934
+               */
1935
+               zip_debug_rtx_1(pfx, PATTERN(x), lvl+1);
1936
+               zip_debug_print(pfx, lvl, ")");
1937 117 dgisselq
+               debug_rtx(x);
1938 102 dgisselq
+               break;
1939
+       case JUMP_INSN: zip_debug_print(pfx, lvl, "(JUMP-INSN");
1940 111 dgisselq
+               zip_debug_rtx_1(pfx, PATTERN(x), lvl+1);
1941
+               zip_debug_print(pfx, lvl, ")");
1942
+               /*
1943 102 dgisselq
+               if (JUMP_LABEL(x)) {
1944 111 dgisselq
+                       if (GET_CODE(JUMP_LABEL(x)) == LABEL_REF) {
1945
+                               char    buf[64];
1946
+                               sprintf(buf, "(LABEL *.L%d))", CODE_LABEL_NUMBER(LABEL_REF_LABEL(JUMP_LABEL(x))));
1947
+                               zip_debug_print(pfx, lvl+1, buf);
1948
+                       } else if (GET_CODE(JUMP_LABEL(x))==CODE_LABEL) {
1949
+                               char    buf[64];
1950
+                               sprintf(buf, "(CODE_LABEL *.L%d))", CODE_LABEL_NUMBER(JUMP_LABEL(x)));
1951
+                               zip_debug_print(pfx, lvl+1, buf);
1952
+                       } else
1953
+                       zip_debug_print(pfx, lvl+1, "(w/Label))");
1954 102 dgisselq
+               } else
1955 111 dgisselq
+                       zip_debug_print(pfx, lvl+1, "(NO label))");
1956
+               debug_rtx(x);
1957
+               */
1958 102 dgisselq
+               break;
1959
+       case CALL:
1960
+               zip_debug_print(pfx, lvl, "(CALL (Adr) (Args)");
1961
+               zip_debug_rtx_1(pfx, XEXP(x,0), lvl+1);
1962
+               zip_debug_rtx_1(pfx, XEXP(x,1), lvl+1);
1963
+               zip_debug_print(pfx, lvl, ")");
1964
+               break;
1965
+       case CALL_INSN: zip_debug_print(pfx, lvl, "(CALL-INSN");
1966
+               debug_rtx(x);
1967
+               break;
1968
+       case BARRIER: zip_debug_print(pfx, lvl, "(BARRIER)"); break;
1969
+       case RETURN: zip_debug_print(pfx, lvl, "(RETURN)"); break;
1970
+       case NOTE:
1971
+               {       char buf[128];
1972
+                       sprintf(buf, "(NOTE %s)", GET_REG_NOTE_NAME(GET_MODE(x)));
1973
+                       zip_debug_print(pfx, lvl, buf);
1974
+               }break;
1975
+       case COND_EXEC: zip_debug_print(pfx, lvl, "(COND_EXEC)");
1976
+               debug_rtx(x);
1977
+               break;
1978
+       case ASM_INPUT: zip_debug_print(pfx, lvl, "(ASM INPUT)"); break;
1979
+       case ASM_OPERANDS: zip_debug_print(pfx, lvl, "(ASM OPERANDS)"); break;
1980
+       case UNSPEC: zip_debug_print(pfx, lvl, "(UNSPEC)"); break;
1981
+       case UNSPEC_VOLATILE: zip_debug_print(pfx, lvl, "(UNSPEC_VOLATILE)"); break;
1982
+       case CODE_LABEL:
1983
+               {
1984
+                       char    buf[64];
1985 111 dgisselq
+                       sprintf(buf, "(CODE_LABEL *.L%d)", CODE_LABEL_NUMBER(x));
1986 102 dgisselq
+                       zip_debug_print_m(pfx, lvl, buf, GET_MODE(x));
1987
+               } break;
1988
+       case SET:
1989
+               zip_debug_print_m(pfx, lvl, "(SET", GET_MODE(x));
1990 117 dgisselq
+               zip_debug_rtx_1(pfx, SET_DEST(x),lvl+1);
1991
+               zip_debug_rtx_1(pfx, SET_SRC(x),lvl+1);
1992 102 dgisselq
+               zip_debug_print(pfx, lvl, ")");
1993 117 dgisselq
+               debug_rtx(x);
1994 102 dgisselq
+               break;
1995 122 dgisselq
+       case REG: {
1996
+               char buf[25];
1997 102 dgisselq
+               if (REGNO(x) == zip_PC)
1998 122 dgisselq
+                       sprintf(buf, "(PC)");
1999 102 dgisselq
+               else if (REGNO(x) == zip_CC)
2000 122 dgisselq
+                       sprintf(buf, "(CC)");
2001 102 dgisselq
+               else if (REGNO(x) == zip_SP)
2002 122 dgisselq
+                       sprintf(buf, "(SP)");
2003 102 dgisselq
+               else if (REGNO(x) == zip_FP)
2004 122 dgisselq
+                       sprintf(buf, "(REG FP)");
2005 102 dgisselq
+               else if (REGNO(x) == zip_GOT)
2006 122 dgisselq
+                       sprintf(buf, "(REG GBL)");
2007 102 dgisselq
+               else if (FUNCTION_VALUE_REGNO_P(REGNO(x)))
2008 122 dgisselq
+                       sprintf(buf, "(REG RTN-VL)");
2009 102 dgisselq
+               else if (REGNO(x) == RETURN_ADDRESS_REGNUM)
2010 122 dgisselq
+                       sprintf(buf, "(REG RTN-AD)");
2011
+               else
2012
+                       sprintf(buf, "(REG %d)", REGNO(x));
2013 102 dgisselq
+               zip_debug_print_m(pfx, lvl, buf, GET_MODE(x));
2014
+               } break;
2015
+       case IF_THEN_ELSE: // 51
2016
+               zip_debug_print(pfx, lvl, "(IF-THEN-ELSE");
2017
+               zip_debug_rtx_1(pfx, XEXP(x,0),lvl+1);
2018
+               zip_debug_rtx_1(pfx, XEXP(x,1),lvl+1);
2019
+               zip_debug_rtx_1(pfx, XEXP(x,2),lvl+1);
2020
+               zip_debug_print(pfx, lvl, ")");
2021
+               break;
2022
+       case PC:
2023
+               zip_debug_print(pfx, lvl, "(PC)");
2024
+               break;
2025
+       case CC0:
2026
+               zip_debug_print(pfx, lvl, "(CC0)");
2027
+               break;
2028
+       case COMPARE:
2029
+               zip_debug_print(pfx, lvl, "(COMPARE");
2030
+               zip_debug_rtx_1(pfx, XEXP(x,0),lvl+1);
2031
+               zip_debug_rtx_1(pfx, XEXP(x,1),lvl+1);
2032
+               zip_debug_print(pfx, lvl, ")");
2033
+               break;
2034 111 dgisselq
+       case CONST:
2035
+               zip_debug_print_m(pfx, lvl, "(CONST", GET_MODE(x));
2036
+               zip_debug_rtx_1(pfx, XEXP(x,0),lvl+1);
2037
+               zip_debug_print(pfx, lvl, ")");
2038
+               break;
2039 102 dgisselq
+       case CONST_INT:
2040
+               { char buf[25];
2041
+               if (GET_MODE(x)==SImode)
2042 111 dgisselq
+                       sprintf(buf, "(CONST_INT:SI %ld)", INTVAL(x));
2043 102 dgisselq
+               else if (GET_MODE(x)==VOIDmode)
2044 111 dgisselq
+                       sprintf(buf, "(CONST_INT:V %ld)", INTVAL(x));
2045 102 dgisselq
+               else
2046 111 dgisselq
+                       sprintf(buf, "(CONST_INT:? %ld)", INTVAL(x));
2047 102 dgisselq
+               zip_debug_print(pfx, lvl, buf);
2048
+               } break;
2049
+       case LABEL_REF:
2050 122 dgisselq
+               { char buf[256];
2051 111 dgisselq
+               sprintf(buf, "(LABEL *.L%d)", CODE_LABEL_NUMBER(LABEL_REF_LABEL(x)));
2052
+               zip_debug_print(pfx, lvl, buf);
2053
+               }
2054 102 dgisselq
+               break;
2055
+       case SYMBOL_REF:
2056
+               {
2057
+                       char buf[64];
2058
+                       sprintf(buf, "(SYMBOL: %s)", XSTR(x,0));
2059
+                       // fprintf(file, "%s", XSTR(x,0));
2060
+                       zip_debug_print(pfx, lvl, buf);
2061
+               }
2062
+               break;
2063
+       case MEM:
2064
+               zip_debug_print_m(pfx, lvl, "(MEM", GET_MODE(x));
2065
+               zip_debug_rtx_1(pfx, XEXP(x,0),lvl+1);
2066
+               zip_debug_print(pfx, lvl, ")");
2067
+               break;
2068
+       /*
2069
+       case VALUE:
2070
+               {
2071
+                       char buf[64];
2072
+                       sprintf(buf, "(VALUE: %d)", INTVAL(XEXP,0));
2073
+                       zip_debug_print_m(pfx, lvl, "buf", GET_MODE(x));
2074
+               }
2075
+               break;
2076
+       */
2077
+       case PLUS:
2078
+               zip_debug_print_m(pfx, lvl, "(PLUS", GET_MODE(x));
2079
+               zip_debug_rtx_1(pfx, XEXP(x,0),lvl+1);
2080
+               zip_debug_rtx_1(pfx, XEXP(x,1),lvl+1);
2081
+               zip_debug_print(pfx, lvl, ")");
2082
+               break;
2083
+       case MINUS:
2084
+               zip_debug_print_m(pfx, lvl, "(MINUS", GET_MODE(x));
2085
+               zip_debug_rtx_1(pfx, XEXP(x,0),lvl+1);
2086
+               zip_debug_rtx_1(pfx, XEXP(x,1),lvl+1);
2087
+               zip_debug_print(pfx, lvl, ")");
2088
+               break;
2089
+       case AND:
2090
+               zip_debug_print_m(pfx, lvl, "(AND", GET_MODE(x));
2091
+               zip_debug_rtx_1(pfx, XEXP(x,0),lvl+1);
2092
+               zip_debug_rtx_1(pfx, XEXP(x,1),lvl+1);
2093
+               zip_debug_print(pfx, lvl, ")");
2094
+               break;
2095
+       case IOR:
2096
+               zip_debug_print_m(pfx, lvl, "(OR", GET_MODE(x));
2097
+               zip_debug_rtx_1(pfx, XEXP(x,0),lvl+1);
2098
+               zip_debug_rtx_1(pfx, XEXP(x,1),lvl+1);
2099
+               zip_debug_print(pfx, lvl, ")");
2100
+               break;
2101
+       case XOR:
2102
+               zip_debug_print_m(pfx, lvl, "(XOR", GET_MODE(x));
2103
+               zip_debug_rtx_1(pfx, XEXP(x,0),lvl+1);
2104
+               zip_debug_rtx_1(pfx, XEXP(x,1),lvl+1);
2105
+               zip_debug_print(pfx, lvl, ")");
2106
+               break;
2107
+       case MULT:
2108
+               zip_debug_print_m(pfx, lvl, "(MULT", GET_MODE(x));
2109
+               zip_debug_rtx_1(pfx, XEXP(x,0),lvl+1);
2110
+               zip_debug_rtx_1(pfx, XEXP(x,1),lvl+1);
2111
+               zip_debug_print(pfx, lvl, ")");
2112
+               break;
2113
+       case EQ:        //
2114
+               zip_debug_print_m(pfx, lvl, "(EQ", GET_MODE(x));
2115
+               zip_debug_rtx_1(pfx, XEXP(x,0),lvl+1);
2116
+               zip_debug_rtx_1(pfx, XEXP(x,1),lvl+1);
2117
+               zip_debug_print(pfx, lvl, ")");
2118
+               break;
2119
+       case NE:        //
2120
+               zip_debug_print_m(pfx, lvl, "(NE", GET_MODE(x));
2121
+               zip_debug_rtx_1(pfx, XEXP(x,0),lvl+1);
2122
+               zip_debug_rtx_1(pfx, XEXP(x,1),lvl+1);
2123
+               zip_debug_print(pfx, lvl, ")");
2124
+               break;
2125
+       case GE:        //
2126
+               zip_debug_print_m(pfx, lvl, "(GE", GET_MODE(x));
2127
+               zip_debug_rtx_1(pfx, XEXP(x,0),lvl+1);
2128
+               zip_debug_rtx_1(pfx, XEXP(x,1),lvl+1);
2129
+               zip_debug_print(pfx, lvl, ")");
2130
+               break;
2131
+       case GT:        //
2132
+               zip_debug_print_m(pfx, lvl, "(GT", GET_MODE(x));
2133
+               zip_debug_rtx_1(pfx, XEXP(x,0),lvl+1);
2134
+               zip_debug_rtx_1(pfx, XEXP(x,1),lvl+1);
2135
+               zip_debug_print(pfx, lvl, ")");
2136
+               break;
2137
+       case LE:        //
2138
+               zip_debug_print_m(pfx, lvl, "(LE", GET_MODE(x));
2139
+               zip_debug_rtx_1(pfx, XEXP(x,0),lvl+1);
2140
+               zip_debug_rtx_1(pfx, XEXP(x,1),lvl+1);
2141
+               zip_debug_print(pfx, lvl, ")");
2142
+               break;
2143
+       case LT:        //
2144
+               zip_debug_print_m(pfx, lvl, "(LT", GET_MODE(x));
2145
+               zip_debug_rtx_1(pfx, XEXP(x,0),lvl+1);
2146
+               zip_debug_rtx_1(pfx, XEXP(x,1),lvl+1);
2147
+               zip_debug_print(pfx, lvl, ")");
2148
+               break;
2149
+       case GEU:       //
2150
+               zip_debug_print_m(pfx, lvl, "(GEU", GET_MODE(x));
2151
+               zip_debug_rtx_1(pfx, XEXP(x,0),lvl+1);
2152
+               zip_debug_rtx_1(pfx, XEXP(x,1),lvl+1);
2153
+               zip_debug_print(pfx, lvl, ")");
2154
+               break;
2155
+       case GTU:       //
2156
+               zip_debug_print_m(pfx, lvl, "(GTU", GET_MODE(x));
2157
+               zip_debug_rtx_1(pfx, XEXP(x,0),lvl+1);
2158
+               zip_debug_rtx_1(pfx, XEXP(x,1),lvl+1);
2159
+               zip_debug_print(pfx, lvl, ")");
2160
+               break;
2161
+       case LEU:       //
2162
+               zip_debug_print_m(pfx, lvl, "(LEU", GET_MODE(x));
2163
+               zip_debug_rtx_1(pfx, XEXP(x,0),lvl+1);
2164
+               zip_debug_rtx_1(pfx, XEXP(x,1),lvl+1);
2165
+               zip_debug_print(pfx, lvl, ")");
2166
+               break;
2167
+       case LTU:       //
2168
+               zip_debug_print_m(pfx, lvl, "(LTU", GET_MODE(x));
2169
+               zip_debug_rtx_1(pfx, XEXP(x,0),lvl+1);
2170
+               zip_debug_rtx_1(pfx, XEXP(x,1),lvl+1);
2171
+               zip_debug_print(pfx, lvl, ")");
2172
+               break;
2173
+       case SCRATCH:   //
2174
+               zip_debug_print_m(pfx, lvl, "(SCRATCH)", GET_MODE(x));
2175
+               break;
2176
+       case SUBREG:
2177
+               { char buf[25];
2178 111 dgisselq
+               if (REG_P(XEXP(x,0))) {
2179
+                       sprintf(buf, "(SUBREG %d/%d)", REGNO(XEXP(x,0)),
2180
+                               SUBREG_BYTE(x));
2181
+                       zip_debug_print(pfx, lvl, buf);
2182
+               } else if (MEM_P(XEXP(x,0))) {
2183
+                       sprintf(buf, "(SUBREG /%d", SUBREG_BYTE(x));
2184
+                       zip_debug_print(pfx, lvl, buf);
2185
+                       zip_debug_rtx_1(pfx, XEXP(x,0),lvl+1);
2186
+                       zip_debug_print(pfx, lvl, ")");
2187
+               } else {
2188
+                       sprintf(buf, "(SUBREG UNK /%d", SUBREG_BYTE(x));
2189
+                       zip_debug_print(pfx, lvl, buf);
2190
+                       zip_debug_rtx_1(pfx, XEXP(x,0),lvl+1);
2191
+                       zip_debug_print(pfx, lvl, ")");
2192
+               }}
2193
+               break;
2194 102 dgisselq
+       default:
2195 111 dgisselq
+               { char buf[128];
2196 102 dgisselq
+               sprintf(buf, "(? = %d) -- calling DEBUG-RTX", GET_CODE(x));
2197
+               zip_debug_print(pfx, lvl, buf);
2198
+               debug_rtx(x);
2199
+               } break;
2200
+       }
2201
+}
2202
+
2203
+void
2204
+zip_debug_rtx_pfx(const char *pfx, const_rtx x) {
2205
+       zip_debug_rtx_1(pfx, x, 0);
2206
+}
2207
+
2208
+void
2209
+zip_debug_rtx(const_rtx x) {
2210
+       zip_debug_rtx_pfx("", x);
2211
+}
2212
+
2213
+void
2214
+zip_debug_insn(rtx_insn *insn ATTRIBUTE_UNUSED) {
2215
+}
2216
+
2217
+void
2218
+zip_debug_bb(basic_block bb) {
2219
+       rtx_insn        *insn;
2220
+
2221
+       fprintf(stderr, "************ BASIC-BLOCK ***************\n");
2222
+       FOR_BB_INSNS(bb, insn)
2223
+       {
2224
+               zip_debug_rtx(insn);
2225
+       }
2226
+}
2227
+
2228
+
2229
+static bool
2230 122 dgisselq
+zip_legitimate_opb(rtx x, bool strict)
2231 102 dgisselq
+{
2232 103 dgisselq
+       const bool      dbg = ((ALL_DEBUG_ON)||(false))&&(!ALL_DEBUG_OFF);
2233 102 dgisselq
+
2234 111 dgisselq
+       if (dbg) fprintf(stderr, "ZIP-LEGITIMATE-OPB\n");
2235 102 dgisselq
+       if (dbg) zip_debug_rtx_pfx("Test: ", x);
2236
+
2237
+       if (NULL_RTX == x)
2238
+               return false;
2239 122 dgisselq
+       else if ((GET_MODE(x) != SImode)&&(GET_MODE(x) != VOIDmode)) {
2240
+               if (dbg) fprintf(stderr, "ZIP-LEGITIMATE-OPB -> Mode failure\n");
2241 102 dgisselq
+               return false;
2242 122 dgisselq
+       } else if ((strict)&&(REG_P(x))) {
2243
+               if (REGNO(x)<zip_CC) {
2244
+                       if (dbg) fprintf(stderr, "ZIP-LEGITIMATE-OPB -> (Reg)\n");
2245
+                       return true;
2246
+               } else return false;
2247
+       } else if (register_operand(x, GET_MODE(x))) {
2248
+               // This also handles subregs
2249
+               if (dbg) fprintf(stderr, "ZIP-LEGITIMATE-OPB -> (Reg)\n");
2250
+               return true;
2251 111 dgisselq
+       } else if ((CONST_INT_P(x))
2252
+               &&(INTVAL(x) >= zip_min_opb_imm)
2253
+               &&(INTVAL(x) <= zip_max_opb_imm)) {
2254 122 dgisselq
+               if (dbg) fprintf(stderr, "ZIP-LEGITIMATE-OPB -> YES! (Const) %ld <= %ld <= %ld\n", zip_min_opb_imm, INTVAL(x), zip_max_opb_imm);
2255 111 dgisselq
+               return true;
2256 122 dgisselq
+       // } else if ((GET_CODE(x) == LABEL_REF)||(GET_CODE(x)==CODE_LABEL)) {
2257
+               // return true;
2258 102 dgisselq
+       } else if (GET_CODE(x) == PLUS) {
2259
+               // Is it a valid register?
2260 122 dgisselq
+               if ((!strict)&&(!register_operand((rtx)XEXP((rtx)x,0), GET_MODE(x)))) {
2261 111 dgisselq
+                       if (dbg) fprintf(stderr, "ZIP-LEGITIMATE-OPB -> No (No reg in +%s)\n",
2262 102 dgisselq
+                       (GET_CODE(XEXP(x,1))==REG)?", reg in op[1]":"");
2263
+                       return false;
2264 122 dgisselq
+               } else if ((strict)&&((!REG_P(XEXP(x,0)))||(REGNO(XEXP(x,0))>=zip_CC))) {
2265 102 dgisselq
+                       return false;
2266
+               } if ((GET_CODE(XEXP(x, 1)) == CONST_INT)
2267
+                       &&(INTVAL(XEXP(x, 1)) <= zip_max_anchor_offset)
2268
+                       &&(INTVAL(XEXP(x, 1)) >= zip_min_anchor_offset)) {
2269 111 dgisselq
+                       if (dbg) fprintf(stderr, "ZIP-LEGITIMATE-OPB -> YES! (reg+int)\n");
2270 103 dgisselq
+                       // if((INTVAL(XEXP(x,1))<0)&&(REGNO(XEXP(x,0))==zip_SP))
2271
+                               // gcc_unreachable();
2272 102 dgisselq
+                       return true;
2273
+               } if ((GET_CODE(XEXP(x, 1)) == LABEL_REF)
2274 122 dgisselq
+                       ||(GET_CODE(XEXP(x, 1)) == CODE_LABEL)
2275 102 dgisselq
+                       ||(GET_CODE(XEXP(x, 1)) == SYMBOL_REF)) {
2276
+                       // While we can technically support this, the problem
2277
+                       // is that the symbol address could be anywhere, and we
2278
+                       // have no way of recovering if it's outside of our
2279
+                       // 14 allowable bits.
2280 111 dgisselq
+                       if (dbg) fprintf(stderr, "ZIP-LEGITIMATE-OPB -> No. (reg+lbl)\n");
2281 102 dgisselq
+                       return false;
2282
+               }
2283
+       }
2284
+
2285 111 dgisselq
+       if (dbg) fprintf(stderr, "ZIP-LEGITIMATE-OPB -> No\n");
2286 102 dgisselq
+       if (dbg) zip_debug_rtx(x);
2287
+       return false;
2288
+}
2289
+
2290
+static bool
2291
+zip_legitimate_move_operand_p(machine_mode mode ATTRIBUTE_UNUSED, rtx x, bool strict) {
2292
+       const bool      dbg = ((ALL_DEBUG_ON)||(false))&&(!ALL_DEBUG_OFF);
2293
+
2294
+       if (dbg) fprintf(stderr, "ZIP-VALID-MOVE-OPERAND\n");
2295
+       if (dbg) zip_debug_rtx_pfx("VMov?: ", x);
2296
+
2297 122 dgisselq
+       if (!zip_legitimate_opb(x, strict))
2298 102 dgisselq
+               return false;
2299 122 dgisselq
+       else if ((GET_CODE(x)==PLUS)&&(CONST_INT_P(XEXP(x,1)))) {
2300
+               if ((INTVAL(XEXP(x, 1)) > zip_max_mov_offset)
2301
+                       ||(INTVAL(XEXP(x, 1)) < zip_min_mov_offset)) {
2302
+                       if (dbg) fprintf(stderr, "ZIP-VALID-MOVE-OPERAND -> NO! (reg+int), int out of bounds: %d\n", INTVAL(XEXP(x,1)));
2303 102 dgisselq
+                       return false;
2304
+               }
2305
+       }
2306
+
2307 122 dgisselq
+       if (dbg) fprintf(stderr, "ZIP-VALID-MOVE-OPERAND -> Yes\n");
2308 102 dgisselq
+       if (dbg) zip_debug_rtx(x);
2309 122 dgisselq
+       return true;
2310 102 dgisselq
+}
2311
+
2312
+int
2313
+zip_pd_mov_operand(rtx op)
2314
+{
2315
+       const bool      dbg = ((ALL_DEBUG_ON)||(false))&&(!ALL_DEBUG_OFF);
2316
+
2317
+       if (dbg) fprintf(stderr, "ZIP-VALID-MOV(predicate) for OPERAND\n");
2318
+       return zip_legitimate_move_operand_p(VOIDmode, op, !can_create_pseudo_p());
2319
+}
2320
+
2321
+int
2322 111 dgisselq
+zip_pd_mvimm_operand(rtx op)
2323
+{
2324
+       const bool      dbg = ((ALL_DEBUG_ON)||(false))&&(!ALL_DEBUG_OFF);
2325
+
2326
+       if (dbg) fprintf(stderr, "ZIP-VALID-MVIMM(predicate) for OPERAND\n");
2327
+       if (!CONST_INT_P(op))
2328
+               return false;
2329
+       if (INTVAL(op) > zip_max_mov_offset)
2330
+               return false;
2331
+       if (INTVAL(op) < zip_min_mov_offset)
2332
+               return false;
2333
+       return true;
2334
+}
2335
+
2336
+int
2337
+zip_pd_imm_operand(rtx op)
2338
+{
2339
+       const bool      dbg = ((ALL_DEBUG_ON)||(false))&&(!ALL_DEBUG_OFF);
2340
+
2341
+       if (dbg) fprintf(stderr, "ZIP-VALID-IMM(predicate) for OPERAND\n");
2342
+       if (!CONST_INT_P(op))
2343
+               return false;
2344
+       if (INTVAL(op) > zip_max_anchor_offset)
2345
+               return false;
2346
+       if (INTVAL(op) < zip_min_anchor_offset)
2347
+               return false;
2348
+       return true;
2349
+}
2350
+
2351
+int
2352 102 dgisselq
+zip_address_operand(rtx op)
2353
+{
2354
+       const bool      dbg = ((ALL_DEBUG_ON)||(false))&&(!ALL_DEBUG_OFF);
2355
+
2356
+       if (dbg) fprintf(stderr, "ZIP-ADDRESS for OPERAND\n");
2357 111 dgisselq
+       if ((REG_P(op))&&(REGNO(op)==zip_CC))
2358
+               return false;
2359
+       else if ((GET_CODE(op) == PLUS)&&(REG_P(XEXP(op,0)))
2360
+                       &&(REGNO(XEXP(op,0))==zip_CC))
2361
+               return false;
2362
+       else
2363
+               return zip_legitimate_opb(op, !can_create_pseudo_p());
2364 102 dgisselq
+}
2365
+
2366
+int
2367 111 dgisselq
+zip_pd_opb_operand(rtx op)
2368 102 dgisselq
+{
2369
+       const bool      dbg = ((ALL_DEBUG_ON)||(false))&&(!ALL_DEBUG_OFF);
2370
+
2371 111 dgisselq
+       if (dbg) fprintf(stderr, "ZIP-OPB(predicate) for OPERAND\n");
2372 122 dgisselq
+       return zip_legitimate_opb(op, false); //, !can_create_pseudo_p());
2373 102 dgisselq
+}
2374
+
2375
+int
2376
+zip_ct_address_operand(rtx op)
2377
+{
2378
+       const bool      dbg = ((ALL_DEBUG_ON)||(false))&&(!ALL_DEBUG_OFF);
2379
+
2380
+       if (dbg) fprintf(stderr, "ZIP-ADDRESS(constraint) for OPERAND\n");
2381 111 dgisselq
+       return zip_legitimate_opb(op, !can_create_pseudo_p());
2382 102 dgisselq
+}
2383
+
2384
+int
2385
+zip_const_address_operand(rtx x) {
2386
+       const bool      dbg = ((ALL_DEBUG_ON)||(false))&&(!ALL_DEBUG_OFF);
2387
+
2388
+       if (dbg) fprintf(stderr, "is ZIP-CONST-ADDRESS?\n");
2389
+       if (dbg) zip_debug_rtx(x);
2390
+       if ((GET_MODE(x) != SImode)&&(GET_MODE(x) != VOIDmode))
2391
+               return false;
2392
+       if ((GET_CODE(x) == LABEL_REF)
2393
+                       ||(GET_CODE(x) == CODE_LABEL)
2394
+                       ||(GET_CODE(x) == SYMBOL_REF)) {
2395
+               if (dbg) fprintf(stderr, "is ZIP-CONST-ADDRESS? -> YES!\n");
2396
+               return true;
2397
+       } else if (CONST_INT_P(x)) {
2398
+               if (dbg) fprintf(stderr, "is ZIP-CONST-ADDRESS? -> YES!\n");
2399
+               return true;
2400
+       } else if (GET_CODE(x) == PLUS) {
2401
+               if (dbg) fprintf(stderr, "is ZIP-CONST-ADDRESS(PLUS)\n");
2402
+               return ((zip_const_address_operand(XEXP(x,0)))
2403
+                       &&(CONST_INT_P(XEXP(x,1))));
2404
+       } else if (GET_CODE(x) == MINUS) {
2405
+               if (dbg) fprintf(stderr, "is ZIP-CONST-ADDRESS(MINUS)\n");
2406
+               return ((zip_const_address_operand(XEXP(x,0)))
2407
+                       &&(zip_const_address_operand(XEXP(x,1))));
2408
+       }
2409
+
2410
+       if (dbg) fprintf(stderr, "is ZIP-CONST-ADDRESS? -> No\n");
2411
+       if (dbg) zip_debug_rtx(x);
2412
+       return false;
2413
+}
2414
+
2415
+int
2416
+zip_ct_const_address_operand(rtx x) {
2417
+       const bool      dbg = ((ALL_DEBUG_ON)||(false))&&(!ALL_DEBUG_OFF);
2418
+
2419
+       if (dbg) fprintf(stderr, "ZIP-CONST-ADDRESS(constraint)\n");
2420
+       return zip_const_address_operand(x);
2421
+}
2422
+
2423
+int
2424
+zip_pd_const_address_operand(rtx x) {
2425
+       const bool      dbg = ((ALL_DEBUG_ON)||(false))&&(!ALL_DEBUG_OFF);
2426
+
2427
+       if (dbg) fprintf(stderr, "ZIP-CONST-ADDRESS(predicate)\n");
2428
+       return zip_const_address_operand(x);
2429
+}
2430
+
2431
+
2432
+static bool
2433
+zip_legitimate_address_p(machine_mode mode ATTRIBUTE_UNUSED, rtx x, bool strict)
2434
+{
2435
+       const bool      dbg = ((ALL_DEBUG_ON)||(false))&&(!ALL_DEBUG_OFF);
2436
+
2437
+       if (dbg) fprintf(stderr, "Zip-LEGITIMATE-ADDRESS-P\n");
2438
+       if (dbg) zip_debug_rtx(x);
2439
+
2440
+       // Only insist the register be a valid register if strict is true
2441 111 dgisselq
+       if (zip_legitimate_opb(x, strict))
2442 102 dgisselq
+               return true;
2443 111 dgisselq
+       // else if (zip_const_address_operand(x))
2444
+               // return true;
2445 102 dgisselq
+
2446
+       return false;
2447
+}
2448
+
2449 111 dgisselq
+static rtx
2450
+zip_legitimize_address(rtx x, rtx oldx ATTRIBUTE_UNUSED, machine_mode mode ATTRIBUTE_UNUSED) {
2451
+       const bool      dbg = ((ALL_DEBUG_ON)||(false))&&(!ALL_DEBUG_OFF);
2452
+
2453
+       if (dbg) zip_debug_rtx_pfx("LEGITIMIZE: ", x);
2454
+       if (zip_legitimate_address_p(mode, x, !can_create_pseudo_p()))
2455
+               return x;
2456
+
2457
+       if (GET_CODE(x)==PLUS) {
2458
+               if (!REG_P(XEXP(x,0)))
2459
+                       XEXP(x,0) = force_reg(GET_MODE(x),XEXP(x,0));
2460
+               if ((!zip_legitimate_address_p(mode, x, !can_create_pseudo_p()))
2461
+                       &&(!CONST_INT_P(XEXP(x,1))))
2462
+                       x = force_reg(GET_MODE(x),x);
2463
+       } else if (MEM_P(x))
2464
+               x = force_reg(GET_MODE(x),x);
2465
+
2466
+       if (dbg) zip_debug_rtx_pfx("LEGITIMATE: ", x);
2467
+       return x;
2468
+}
2469
+
2470 102 dgisselq
+void
2471
+zip_asm_output_def(FILE *stream, const char *name, const char *value)
2472
+{
2473
+       assemble_name(stream, name);
2474
+       fprintf(stream, "\t.equ ");
2475
+       assemble_name(stream, value);
2476
+       fputc('\n', stream);
2477
+}
2478
+
2479 111 dgisselq
+#define        USE_SUBREG
2480
+#ifdef USE_SUBREG
2481
+#define        SREG_P(RTX) ((SUBREG_P(RTX))&&(REG_P(XEXP(RTX,0))))
2482
+#define        SMEM_P(RTX) ((SUBREG_P(RTX))&&(MEM_P(XEXP(RTX,0))))
2483
+#else
2484
+#define        SREG_P(RTX)     false
2485
+#define        SMEM_P(RTX)     false
2486
+#endif
2487 102 dgisselq
+
2488
+const char *zip_set_zero_or_one(rtx condition, rtx dst) {
2489 103 dgisselq
+       const bool      dbg = ((ALL_DEBUG_ON)||(false))&&(!ALL_DEBUG_OFF);
2490 102 dgisselq
+       if (dbg) fprintf(stderr, "ZIP::SET-ZERO-OR-ONE\n");
2491
+       if (dbg) zip_debug_rtx_pfx("CND", condition);
2492
+       if (dbg) zip_debug_rtx_pfx("REG", dst);
2493
+       switch(GET_CODE(condition)) {
2494
+       case EQ:        return "LDI\t0,%0\n\tLDILO.Z\t1,%0";
2495
+       case NE:        return "LDI\t0,%0\n\tLDILO.NZ\t1,%0";
2496
+       case LT:        return "LDI\t0,%0\n\tLDILO.LT\t1,%0";
2497
+       case GT:        return "LDI\t0,%0\n\tLDILO.GT\t1,%0";
2498
+       case LE:        return "LDI\t1,%0\n\tLDILO.GT\t0,%0";
2499
+       case GE:        return "LDI\t0,%0\n\tLDILO.GE\t1,%0";
2500
+       case LTU:       return "LDI\t0,%0\n\tLDILO.C\t1,%0";
2501
+       case GTU:       return "LDI\t1,%0\n\tLDILO.C\t0,%0\n\tLDILO.Z\t0,%0";
2502
+       case LEU:       return "LDI\t0,%0\n\tLDILO.C\t1,%0\n\tLDILO.Z\t1,%0";
2503
+       case GEU:       return "LDI\t1,%0\n\tLDILO.C\t0,%0";
2504
+       default:
2505
+               zip_debug_rtx(condition);
2506
+               internal_error("CSTORE Unsupported condition");
2507
+               return NULL;
2508
+       }
2509
+}
2510
+
2511
+const char *zip_binary_movsicc(rtx_code condition, const char *op, const int opno) {
2512
+       static char     result[64] = "";
2513
+       switch(condition) {
2514
+               //
2515
+               // Result already exists in the iffalse register
2516
+               // Can't change it.  Therefore, on the
2517
+               // condition ... move true register to the
2518
+               // destination
2519
+               //
2520
+               case EQ:        sprintf(result, "%s.Z\t%%%d,%%0", op, opno); break;
2521
+               case NE:        sprintf(result, "%s.NZ\t%%%d,%%0", op, opno); break;
2522
+               case LT:        sprintf(result, "%s.LT\t%%%d,%%0", op, opno); break;
2523
+               case GT:        sprintf(result, "%s.GT\t%%%d,%%0", op, opno); break;
2524
+               // .LE doesn't exist on Zip CPU--turn this into two instructions
2525
+               case LE:        sprintf(result, "%s.LT\t%%%d,%%0\n\t%s.Z\t%%%d,%%0", op, opno, op, opno); break;
2526
+               case GE:        sprintf(result, "%s.GE\t%%%d,%%0", op, opno); break;
2527
+               case LTU:       sprintf(result, "%s.C\t%%%d,%%0", op, opno); break;
2528
+               //
2529
+               // .GTU doesn't exist on the Zip CPU either. We also note that
2530
+               // .C will never be set on an equal condition.  Therefore, we
2531
+               // turn this into a XOR.NZ 2,CC, which will set the .C condition
2532
+               // as long as .Z wasn't true.  We then undo this when we're
2533
+               // done.  This is possible since none of these instructions
2534
+               // (LDI/MOV/Lod conditional, nor Xor conditional) will ever set
2535
+               // the condition codes.
2536
+               //
2537
+               // This is obviously not very optimal.  Avoid this by all means
2538
+               // if you can
2539
+               case GTU:       sprintf(result, "XOR.NZ\t2,CC\n%s.C\t%%%d,%%0\n\tXOR.NZ\t2,CC", op, opno); break;
2540
+               // .LEU doesn't exist on Zip CPU either--turn this into another
2541
+               // two instructions
2542
+               case LEU:       sprintf(result, "%s.C\t%%%d,%%0\n\t%s.Z\t%%%d,%%0", op, opno, op, opno); break;
2543
+               //
2544
+               // .GEU doesn't exist on Zip CPU.  Implementing it her is
2545
+               // painful.  We can change the condition codes to make it so,
2546
+               // but the instruction requires the condition codes not be
2547
+               // changed.  Hence, we must change them back if we do so.
2548
+               //
2549
+               // .C will be set on less than but not equal.  Hence !.C will
2550
+               // be true on greater than or equal.
2551
+               case GEU:       sprintf(result, "XOR\t2,CC\n%s.C\t%%%d,%%0\n\tXOR\t2,CC", op, opno); break;
2552
+               default:
2553
+                       internal_error("MOVSICC(BINARY) Unsupported condition");
2554
+                       return NULL;
2555
+       } return result;
2556
+}
2557
+
2558
+const char *zip_tertiary_movsicc(rtx condition, const char *optrue, const char *opfalse) {
2559
+       static  char    result[64] = "";
2560
+       switch(GET_CODE(condition)) {
2561
+               case EQ:        sprintf(result,"%s\t%%3,%%0\n\t%s.Z\t%%2,%%0", opfalse, optrue); break;
2562
+               case NE:        sprintf(result,"%s\t%%3,%%0\n\t%s.NZ\t%%2,%%0", opfalse, optrue); break;
2563
+               case LT:        sprintf(result,"%s\t%%3,%%0\n\t%s.LT\t%%2,%%0", opfalse, optrue); break;
2564
+               case GT:        sprintf(result,"%s\t%%3,%%0\n\t%s.GT\t%%2,%%0", opfalse, optrue); break;
2565
+               // LE doesn't exist on a Zip CPU.  Accomplish this by
2566
+               // reversing the condition: i.e., load the false value into
2567
+               // the register, and the on condition load the true value.
2568
+               case LE:        sprintf(result,"%s\t%%2,%%0\n\t%s.GT\t%%3,%%0", optrue, opfalse); break;
2569
+               case GE:        sprintf(result,"%s\t%%3,%%0\n\t%s.GE\t%%2,%%0", opfalse, optrue); break;
2570
+               case LTU:       sprintf(result,"%s\t%%3,%%0\n\t%s.C\t%%2,%%0", opfalse, optrue); break;
2571
+               //
2572
+               case GTU:       sprintf(result,"%s\t%%2,%%0\n\t%s.C\t%%3,%%0\n\t%s.Z\t%%3,%%0", optrue, opfalse, opfalse); break;
2573
+               case LEU:       sprintf(result,"%s\t%%3,%%0\n\t%s.C\t%%2,%%0\n\t%s.Z\t%%2,%%0", opfalse, optrue, optrue); break;
2574
+               case GEU:       sprintf(result,"%s\t%%2,%%0\n\t%s.C\t%%3,%%0\n", optrue, opfalse); break;
2575
+               default:
2576
+                       internal_error("MOVSICC Unsupported condition");
2577
+                       return NULL;
2578
+       } return result;
2579
+}
2580
+
2581
+const char *zip_movsicc(rtx dst, rtx condition, rtx iftrue, rtx iffalse) {
2582 103 dgisselq
+       const bool      dbg = ((ALL_DEBUG_ON)||(false))&&(!ALL_DEBUG_OFF);
2583 102 dgisselq
+       if (dbg) fprintf(stderr, "ZIP::MOVSICC\n");
2584
+       if (dbg) zip_debug_rtx_pfx("DST", dst);
2585
+       if (dbg) zip_debug_rtx_pfx("CND", condition);
2586
+       if (dbg) zip_debug_rtx_pfx("TRU", iftrue);
2587
+       if (dbg) zip_debug_rtx_pfx("FAL", iffalse);
2588
+       if ((REG_P(iftrue))&&(REGNO(dst)==REGNO(iftrue))) {
2589
+               if (dbg) fprintf(stderr, "ZIP::MOVSICC -- CASE if(X) -> R\n");
2590
+               if (zip_legitimate_move_operand_p(SImode, iffalse, true))
2591
+                       return zip_binary_movsicc(reverse_condition(GET_CODE(condition)), "MOV", 3);
2592
+               else if (zip_const_address_operand(iffalse))
2593
+                       return zip_binary_movsicc(reverse_condition(GET_CODE(condition)), "LDI", 3);
2594
+               else if (zip_const_address_operand(iffalse))
2595
+                       return zip_binary_movsicc(reverse_condition(GET_CODE(condition)), "LDI", 3);
2596 111 dgisselq
+               else if ((MEM_P(iffalse))&&(zip_legitimate_opb(XEXP(iffalse,0), true)))
2597 102 dgisselq
+                       return zip_binary_movsicc(reverse_condition(GET_CODE(condition)), "LOD", 3);
2598
+               else {
2599
+                       internal_error("MOVSICC Unsupported mode");
2600
+                       return NULL;
2601
+               }
2602
+       } if ((REG_P(iftrue))&&(REGNO(dst)==REGNO(iftrue))) {
2603
+               if (dbg) fprintf(stderr, "ZIP::MOVSICC -- CASE if(!X) -> R\n");
2604
+               if (zip_legitimate_move_operand_p(SImode, iftrue, true))
2605
+                       return zip_binary_movsicc(GET_CODE(condition), "MOV",2);
2606
+               else if (zip_const_address_operand(iffalse))
2607
+                       return zip_binary_movsicc(GET_CODE(condition), "LDI",2);
2608
+               else if (zip_const_address_operand(iffalse))
2609
+                       return zip_binary_movsicc(GET_CODE(condition), "LDI",2);
2610 111 dgisselq
+               else if ((MEM_P(iffalse))&&(zip_legitimate_opb(XEXP(iffalse,0), true)))
2611 102 dgisselq
+                       return zip_binary_movsicc(GET_CODE(condition), "LOD",2);
2612
+               else {
2613
+                       internal_error("MOVSICC Unsupported mode");
2614
+                       return NULL;
2615
+               }
2616
+       } if ((zip_const_address_operand(iftrue))&&(zip_const_address_operand(iffalse))) {
2617
+               if (dbg) fprintf(stderr, "ZIP::MOVSICC -- IF(X) #1 ELSE #2\n");
2618
+               return zip_tertiary_movsicc(condition, "LDI", "LDI");
2619
+       } if ((zip_const_address_operand(iftrue))&&(zip_legitimate_move_operand_p(SImode, iffalse, true))) {
2620
+               if (dbg) fprintf(stderr, "ZIP::MOVSICC -- IF(X) #1 ELSE A+B\n");
2621
+               return zip_tertiary_movsicc(condition, "LDI", "MOV");
2622
+       } if ((zip_legitimate_move_operand_p(SImode, iftrue, true))&&(zip_const_address_operand(iffalse))) {
2623
+               if (dbg) fprintf(stderr, "ZIP::MOVSICC -- IF(X) A+B ELSE #x\n");
2624
+               return zip_tertiary_movsicc(condition, "MOV", "LDI");
2625
+       } if ((zip_legitimate_move_operand_p(SImode, iftrue, true))
2626
+                       &&(zip_legitimate_move_operand_p(SImode, iffalse, true))) {
2627
+               if (dbg) fprintf(stderr, "ZIP::MOVSICC -- IF(X) A+B ELSE C+D\n");
2628
+               return zip_tertiary_movsicc(condition, "MOV", "MOV");
2629
+       }
2630
+       if ((MEM_P(iftrue))
2631 111 dgisselq
+               &&(zip_legitimate_opb(XEXP(iftrue,0), true))
2632 102 dgisselq
+               &&(zip_legitimate_move_operand_p(SImode, iffalse, true))) {
2633
+               if (dbg) fprintf(stderr, "ZIP::MOVSICC -- IF(X) A[B] ELSE C+D\n");
2634
+               return zip_tertiary_movsicc(condition, "LOD", "MOV");
2635
+       } if ((zip_legitimate_move_operand_p(SImode, iftrue, true))
2636 111 dgisselq
+               &&(MEM_P(iffalse))&&(zip_legitimate_opb(XEXP(iffalse,0), true))) {
2637 102 dgisselq
+               if (dbg) fprintf(stderr, "ZIP::MOVSICC -- IF(X) A+B ELSE C[D]\n");
2638
+               return zip_tertiary_movsicc(condition, "MOV", "LOD");
2639 111 dgisselq
+       } if ((MEM_P(iftrue))&&(zip_legitimate_opb(XEXP(iftrue,0), true))
2640
+               &&(MEM_P(iffalse))&&(zip_legitimate_opb(XEXP(iffalse,0), true))) {
2641 102 dgisselq
+               if (dbg) fprintf(stderr, "ZIP::MOVSICC -- IF(X) A[B] ELSE C[D]\n");
2642
+               return zip_tertiary_movsicc(condition, "LOD", "LOD");
2643 111 dgisselq
+       } if ((MEM_P(iftrue))
2644
+               &&(zip_legitimate_opb(XEXP(iftrue,0),true))
2645
+               &&(zip_const_address_operand(iffalse))) {
2646
+               if (dbg) fprintf(stderr, "ZIP::MOVSICC -- IF(X) A[B] ELSE #x\n");
2647
+               return zip_tertiary_movsicc(condition, "LOD", "LDI");
2648
+       } if ((MEM_P(iffalse))
2649
+               &&(zip_legitimate_opb(XEXP(iffalse,0),true))
2650
+               &&(zip_const_address_operand(iftrue))) {
2651
+               if (dbg) fprintf(stderr, "ZIP::MOVSICC -- IF(X) #x ELSE A[B]\n");
2652
+               return zip_tertiary_movsicc(condition, "LDI", "LOD");
2653 102 dgisselq
+       }
2654
+
2655
+       internal_error("MOVSICC Operands not supported");
2656
+}
2657
+
2658
+const char *zip_addsicc(rtx dst, rtx condition, rtx ifsrc, rtx addv ATTRIBUTE_UNUSED) {
2659
+       // We know upon entry that REG_P(dst) must be true
2660
+       if (!REG_P(dst))
2661
+               internal_error("%s","ADDSICC into something other than register");
2662
+       if ((REG_P(ifsrc))&&(REGNO(dst)==REGNO(ifsrc))) {
2663
+               switch (GET_CODE(condition)) {
2664
+               case EQ: return "ADD.Z\t%3,%0";
2665
+               case NE: return "ADD.NZ\t%3,%0";
2666
+               case LT: return "ADD.LT\t%3,%0";
2667
+               case GT: return "ADD.GT\t%3,%0";
2668
+               case LE: return "ADD.LT\t%3,%0\n\tADD.Z\t%3,%0";
2669
+               case GE: return "ADD.GE\t%3,%0";
2670
+               case LTU: return "ADD.C\t%3,%0";
2671
+               case LEU: return "ADD.C\t%3,%0\n\tADD.Z\t%3,%0";
2672
+               case GEU: return "XOR\t2,CC\n\tADD.C\t%3,%0\n\tXOR\t2,CC";
2673
+               // Can do a GEU comparison, and then undo on the Zero condition
2674
+               case GTU: return "XOR\t2,CC\n\tADD.C\t%3,%0\n\tSUB.Z\t%3,%0\n\tXOR\t2,CC";
2675
+               default:
2676
+                       internal_error("%s", "Zip/No usable addsi expansion");
2677
+                       break;
2678
+               }
2679
+       } else {
2680
+               // MOV A+REG,REG
2681
+               switch (GET_CODE(condition)) {
2682
+               case EQ: return "MOV.Z\t%3+%2,%0";
2683
+               case NE: return "MOV.NZ\t%3+%2,%0";
2684
+               case LT: return "MOV.LT\t%3+%2,%0";
2685
+               case GT: return "MOV.GT\t%3+%2,%0";
2686
+               case LE: return "MOV.LT\t%3+%2,%0\n\tMOV.Z\t%3+%2,%0";
2687
+               case GE: return "MOV.GE\t%3+%2,%0";
2688
+               case LTU: return "MOV.C\t%3+%2,%0";
2689
+               case LEU: return "MOV.C\t%3+%2,%0\n\tMOV.Z\t%3+%2,%0";
2690
+               case GEU: return "XOR\t2,CC\n\tMOV.C\t%3+%2,%0\n\tXOR\t2,CC";
2691
+               // Can do a GEU comparison, and then undo on the Zero condition
2692
+               // EXCEPT: with a move instruction, what's there to undo?  We
2693
+               // just clobbered our register!
2694
+               // case GTU: return "XOR\t2,CC\n\tMOV.C\t%3,%0\n\tSUB.Z\t%3,%0XOR\t2,CC";
2695
+               default:
2696
+                       internal_error("%s", "Zip/No usable addsi(reg,reg) expansion");
2697
+                       break;
2698
+               }
2699
+       }
2700
+
2701
+       return "BREAK";
2702
+}
2703
+
2704 103 dgisselq
+static int     zip_memory_move_cost(machine_mode mode, reg_class_t ATTRIBUTE_UNUSED, bool in ATTRIBUTE_UNUSED) {
2705 102 dgisselq
+       int     rv = 14;
2706
+       if ((mode == DImode)||(mode == DFmode))
2707
+               rv += 2;
2708
+       return rv;
2709
+}
2710
+
2711 103 dgisselq
+// #warning "How do we tell the compiler LDI label is expensive as 2 ops"?
2712 117 dgisselq
+static bool    zip_cannot_modify_jumps_p(void) {
2713
+       // Let's try their suggested approach, keeping us from modifying jumps
2714
+       // after reload.  This should also allow our peephole2 optimizations
2715
+       // to adjust things back to what they need to be if necessary.
2716
+       return (reload_completed || reload_in_progress);
2717
+}
2718 122 dgisselq
+
2719
+rtx_insn       *zip_ifcvt_info;
2720
+
2721
+void
2722
+zip_ifcvt_modify_tests(ce_if_block *ce_info ATTRIBUTE_UNUSED, rtx *true_expr, rtx *false_expr) {
2723
+       const bool      dbg = ((ALL_DEBUG_ON)||(false))&&(!ALL_DEBUG_OFF);
2724
+       if (dbg) fprintf(stderr, "IFCVT-MODIFY-TESTS\n");
2725
+       if (*true_expr) switch(GET_CODE(*true_expr)) {
2726
+               case LE:
2727
+               case GTU:
2728
+               case GEU:
2729
+               case LEU:
2730
+                       if (dbg) fprintf(stderr, "TRUE, missing expr\n");
2731
+                       if (dbg) zip_debug_rtx(*true_expr);
2732
+                       *true_expr = NULL_RTX;
2733
+                       break;
2734
+               default: // LT, GT, GTE, LTU, NE, EQ
2735
+                       break;
2736
+       }
2737
+
2738
+       if (*false_expr) switch(GET_CODE(*false_expr)) {
2739
+               case LE:
2740
+               case GTU:
2741
+               case GEU:
2742
+               case LEU:
2743
+                       if (dbg) fprintf(stderr, "FALSE, missing expr\n");
2744
+                       if (dbg) zip_debug_rtx(*false_expr);
2745
+                       *false_expr = NULL_RTX;
2746
+               default:
2747
+                       break;
2748
+       }
2749
+       if ((dbg)&&((!*true_expr)||(!*false_expr)))
2750
+               fprintf(stderr, "IFCVT-MODIFY-TESTS -- FAIL\n");
2751
+}
2752
+
2753
+void
2754
+zip_ifcvt_modify_cancel(struct ce_if_block *ceinfo ATTRIBUTE_UNUSED) {
2755
+/*
2756
+       fprintf(stderr, "IFCVT -- CANCEL\n");
2757
+       zip_ifcvt_info = NULL;
2758
+*/
2759
+}
2760
+
2761
+void
2762
+zip_ifcvt_modify_final(struct ce_if_block *ceinfo ATTRIBUTE_UNUSED) {
2763
+/*
2764
+rtx_insn *insn;
2765
+FOR_BB_INSNS(ceinfo->test_bb, insn)
2766
+       fprintf(stderr, "IFCVT -- FINAL\n");
2767
+       zip_debug_rtx_pfx("FINAL-TEST-BB", insn);
2768
+       zip_ifcvt_info = NULL;
2769
+*/
2770
+}
2771
+
2772
+void
2773
+zip_ifcvt_machdep_init(struct ce_if_block *ceinfo ATTRIBUTE_UNUSED) {
2774
+/*
2775
+       zip_ifcvt_info = NULL;
2776
+       rtx_insn *insn, *ifinsn = NULL;
2777
+       FOR_BB_INSNS(ceinfo->test_bb, insn) {
2778
+               rtx     p;
2779
+               p = single_set(insn);
2780
+               if (!p) continue;
2781
+               if (SET_DEST(p)==pc_rtx) {
2782
+                       ifinsn = insn;
2783
+               }
2784
+               if (!REG_P(SET_DEST(p)))
2785
+                       continue;
2786
+               if (GET_MODE(SET_DEST(p))!=CCmode)
2787
+                       continue;
2788
+               if (REGNO(SET_DEST(p))!=zip_CC)
2789
+                       continue;
2790
+               zip_ifcvt_info = insn;
2791
+       }
2792
+
2793
+       if (zip_ifcvt_info)
2794
+               zip_debug_rtx_pfx("PUTATIVE-CMP",zip_ifcvt_info);
2795
+       if (ifinsn)
2796
+               zip_debug_rtx_pfx("PRIOR-JMP",ifinsn);
2797
+*/
2798
+}
2799
+
2800 102 dgisselq
diff -Naur '--exclude=*.swp' gcc-5.3.0-original/gcc/config/zip/zip.h gcc-5.3.0-zip/gcc/config/zip/zip.h
2801
--- gcc-5.3.0-original/gcc/config/zip/zip.h     1969-12-31 19:00:00.000000000 -0500
2802 122 dgisselq
+++ gcc-5.3.0-zip/gcc/config/zip/zip.h  2016-04-04 18:41:58.074920257 -0400
2803
@@ -0,0 +1,3983 @@
2804 102 dgisselq
+////////////////////////////////////////////////////////////////////////////////
2805
+//
2806
+// Filename:   gcc/config/zip/zip.h
2807
+//
2808
+// Project:    Zip CPU backend for the GNU Compiler Collection
2809
+//
2810
+// Purpose:
2811
+//
2812
+// Creator:    Dan Gisselquist, Ph.D.
2813
+//             Gisselquist Technology, LLC
2814
+//
2815
+////////////////////////////////////////////////////////////////////////////////
2816
+//
2817
+// Copyright (C) 2016, Gisselquist Technology, LLC
2818
+//
2819
+// This program is free software (firmware): you can redistribute it and/or
2820
+// modify it under the terms of  the GNU General Public License as published
2821
+// by the Free Software Foundation, either version 3 of the License, or (at
2822
+// your option) any later version.
2823
+//
2824
+// This program is distributed in the hope that it will be useful, but WITHOUT
2825
+// ANY WARRANTY; without even the implied warranty of MERCHANTIBILITY or
2826
+// FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
2827
+// for more details.
2828
+//
2829
+// You should have received a copy of the GNU General Public License along
2830
+// with this program.  (It's in the $(ROOT)/doc directory, run make with no
2831
+// target there if the PDF file isn't present.)  If not, see
2832
+// <http://www.gnu.org/licenses/> for a copy.
2833
+//
2834
+// License:    GPL, v3, as defined and found on www.gnu.org,
2835
+//             http://www.gnu.org/licenses/gpl.html
2836
+//
2837
+//
2838
+////////////////////////////////////////////////////////////////////////////////
2839
+#ifndef        GCC_ZIP_H
2840
+#define        GCC_ZIP_H
2841
+
2842
+
2843
+//
2844
+//
2845
+// Zip CPU configuration registers
2846
+//
2847
+//
2848
+#define        ZIP_USER        0        // Assume we are in supervisor mode
2849
+#define        ZIP_MULTIPLY    1       // Assume we have multiply instructions
2850
+#define        ZIP_DIVIDE      1       // Assume we have divide instructions
2851
+#define        ZIP_FPU         0        // Assume we have no floating point instructions
2852
+#define        ZIP_PIPELINED   1       // Assume our instructions are pipelined
2853
+#define        ZIP_VLIW        1       // Assume we have the VLIW feature
2854
+#define        ZIP_ATOMIC      ((ZIP_PIPELINED)&&(ZIP_VLIW))
2855
+#define        ZIP_PIC         0        // Attempting to produce PIC code, with GOT
2856
+#define        ZIP_HAS_DI      1
2857
+
2858
+// Zip has 16 registers in each user mode.
2859
+//     Register 15 is the program counter (PC)
2860
+//     Register 14 is the condition codes (CC)
2861
+//     Register 13 is the stack pointer   (SP)
2862
+//     Register 12 (may be) the Global Offset Table pointer (GOT)
2863
+//     Register  0 (may be) the return address pointer
2864
+// Registers 16-31 may only be used in supervisor mode.
2865
+#define        is_ZIP_GENERAL_REG(REGNO)       ((REGNO)<13)
2866
+#define        is_ZIP_REG(REGNO)               ((REGNO)<16)
2867
+
2868 103 dgisselq
+// #define     zip_FP_PSEUDO   16
2869
+#define        zip_PC          15
2870
+#define        zip_CC          14
2871
+#define        zip_SP          13
2872
+#define        zip_FP          12
2873
+#define        zip_GOT         11
2874
+#define        zip_AP          10
2875
+#define        zip_R1          1
2876
+#define        zip_R0          0
2877 102 dgisselq
+
2878
+#define        ZIP_FIRST_ARG_REGNO     1
2879
+#define        ZIP_LAST_ARG_REGNO      5
2880 111 dgisselq
+#define        NUM_ARG_REGS            (ZIP_LAST_ARG_REGNO-ZIP_FIRST_ARG_REGNO+1)
2881
+#define        MAX_PARM_REGS           (ZIP_LAST_ARG_REGNO-ZIP_FIRST_ARG_REGNO+1)
2882 102 dgisselq
+
2883
+/* The overall framework of an assembler file */
2884
+
2885
+#define        ASM_COMMENT_START       ";"
2886
+#define        ASM_APP_ON              ""
2887
+#define        ASM_APP_OFF             ""
2888
+
2889
+#define        FILE_ASM_OP             "\t.file\n"
2890
+
2891
+/* Output and Generation of Labels */
2892
+#define        GLOBAL_ASM_OP           "\t.global\t"
2893
+
2894
+#undef BITS_PER_UNIT
2895
+#define        BITS_PER_UNIT   (32)
2896
+
2897
+/* Assembler Commands for Alignment */
2898
+#define        ASM_OUTPUT_ALIGN(STREAM,POWER)  \
2899
+               { int pwr = POWER; fprintf(STREAM, "\t.p2align %d\n", (pwr<2)?2:pwr); }
2900
+
2901
+
2902
+/* A C compound statement to output to stdio stream STREAM the assembler syntax
2903
+ * for an instruction operand X. */
2904
+#define        PRINT_OPERAND(STREAM, X, CODE)  zip_print_operand(STREAM, X, CODE)
2905
+#define        PRINT_OPERAND_ADDRESS(STREAM, X) zip_print_operand_address(STREAM, X)
2906
+
2907
+/* Passing arguments in registers */
2908
+#define        FUNCTION_VALUE_REGNO_P(REGNO)   ((REGNO)==zip_R1)
2909
+
2910
+/* Define how to find the value returned by a function.  VALTYPE is the data
2911
+ * type of the value (as a tree).  If the precise function being called is known
2912
+ * FUNC is its FUNCTION_DECL; otherwise, FUNC is 0. */
2913
+#define        FUNCTION_VALUE(VALTYPE, FUNC) gen_rtx_REG(TYPE_MODE(VALTYPE), zip_R1)
2914
+
2915
+/* Define how to find the value returned by a library function assuming the
2916
+ * value has mode MODE.
2917
+ */
2918
+#define        LIBCALL_VALUE(MODE)     gen_rtx_REG(MODE, zip_R1)
2919
+
2920
+
2921
+/* STACK AND CALLING */
2922
+
2923
+
2924
+/* Define this macro as a C expression that is nonzero for registers that are
2925
+ * used by the epilogue or the return pattern.  The stack and frame pointer
2926
+ * registers are already assumed to be used as needed.
2927
+ */
2928
+#define        EPILOGUE_USES(R)        (R == RETURN_ADDRESS_REGNUM)
2929
+
2930
+
2931
+/* Normal alignment required for function parameters on the stack, in bits.  All
2932
+ * stack parameters receive at leaswt this much alignment regardless of data
2933
+ * type. */
2934
+#define        PARM_BOUNDARY   32
2935
+
2936
+/* Alignment of field after 'int : 0' in a structure. */
2937
+#define        EMPTY_FIELD_BOUNDARY    32
2938
+
2939
+/* No data type wants to be aligned rounder than this. */
2940
+#define        BIGGEST_ALIGNMENT       32
2941
+
2942
+/* The best alignment to use in cases where we have a choice. */
2943
+#define        FASTEST_ALIGNMENT       32
2944
+
2945
+/* Every structures size must be a multiple of 32-bits. */
2946
+#define        STRUCTURE_SIZE_BOUNDARY 32
2947
+
2948
+/* PCC_BITFIELD_TYPE_MATTERS -- define this if you wish to imitate the the way
2949
+ * other C compilers handle alignment of bit-fields and the structures that
2950
+ * contain them.
2951
+ *
2952
+ * The behavior is that the type written for a named bit-field (int, short, or
2953
+ * other integer type) imposes an alignment for the entire structure, as if the
2954
+ * structure really did contain an ordinary field of that type.  In addition,
2955
+ * the bit-field is placed within the structure so that it would fit within
2956
+ * such a field, not crossing a boundary for it.
2957
+ *
2958
+ * Thus, no most machines, a named bit-field whose type is written as int would
2959
+ * not cross a four-byte boundary, and would force four-byte alignment for the
2960
+ * whole structure.  (The alignment used may not be four bytes; it is controlled
2961
+ * by other alignment parameters.)
2962
+ *
2963
+ * An unnamed bit-field will not affect the alignment of the containing
2964
+ * structure.
2965
+ *
2966
+ * If thhe macro is defined, its definition should be a C expression, a non
2967
+ * zero value for the expression enables this behavior.
2968
+ * Look at the fundamental type that is used for a bit-field and use that to
2969
+ * impose alignment on the enclosing structure.  struct s{int a:8}; should
2970
+ * have the same alignment as 'int', not 'char'.
2971
+ */
2972
+#undef PCC_BITFIELD_TYPE_MATTERS
2973
+#define        PCC_BITFIELD_TYPE_MATTERS       0
2974
+
2975
+/* MAX_FIXED_MODE_SIZE -- An integer expression for the size in bits of the
2976
+ * largest integer machine mode that should actually be used.  All integer
2977
+ * machine modes of this size and smaller can be used for structures and unions
2978
+ * with the appropriate sizes.  If this macro is undefined,
2979
+ * GET_MODE_BITSIZE(DImode) is assumed.
2980
+ *
2981
+ * ZipCPU -- The default looks good enough for us.
2982
+ */
2983
+
2984
+/* Make strings word-aligned so strcpy from constants will be faster. */
2985
+#define        CONSTANT_ALIGNMENT(EXP, ALIGN)  (((TREE_CODE(EXP)==STRING_CST)  \
2986
+       && ((ALIGN) < FASTEST_ALIGNMENT)) ? FASTEST_ALIGNMENT : (ALIGN))
2987
+
2988
+/* Make arrays of chars word-aligned for the same reasons. */
2989
+#define        DATA_ALIGNMENT(TYPE, ALIGN)     ((TREE_CODE(TYPE) == ARRAY_TYPE) \
2990
+       && (TYPE_MODE(TREE_TYPE(TYPE)) == QImode)               \
2991
+       && ((ALIGN < FASTEST_ALIGNMENT) ? FASTEST_ALIGNMENT : (ALIGN)))
2992
+
2993
+/* Generate Code for Profiling
2994
+ */
2995
+#define        FUNCTION_PROFILER(FILE,LABELNO)         (abort(), 0)
2996
+
2997
+
2998
+/* A C expression which is nonzero if register number NUM is suitable for use
2999
+ * as an index register in operand addresses.
3000
+ */
3001
+#define        REGNO_OK_FOR_INDEX_P(NUM)       0
3002
+
3003
+
3004
+/* A C compound statement with a conditional 'goto LABEL;' executed if X
3005
+ * (an RTX) is a legitimate memory address on the target machine for a memory
3006
+ * operand of mode MODE.
3007
+ */
3008 111 dgisselq
+/* 17.03 Controlling the Compilation Driver, 'gcc' */
3009
+// DRIVER_SELF_SPECS
3010
+// OPTION_DEFAULT_SPECS
3011
+// CPP_SPEC
3012
+// CPLUSPLUS_CPP_SPEC
3013
+// CC1_SPEC
3014
+// CC1PLUS_SPEC
3015
+/* ASM_SPEC ... A C string constant that tells the GCC driver program options
3016
+ * to pass to the assembler.  It can also specify how to translate options you
3017
+ * give to GCC into options for GCC to pass to the assembler.  See the file
3018
+ * 'sun3.h' for an example of this.
3019
+ *
3020
+ * Do not define thismacro if it does not need to do anything.
3021
+ */
3022
+// #undef      ASM_SPEC
3023
+// ASM_FINAL_SPEC
3024
+// ASM_NEEDS_DASH_FOR_PIPED_INPUT
3025
+
3026
+/* LINK_SPEC ... A C string constant that tells the GCC driver program options
3027
+ * to pass to the linker.  It can also specify how to translate options you give
3028
+ * to GCC into options for GCC to pass to the linker.
3029
+ *
3030
+ * Do not define this macro if it does not need to do anything.
3031
+ */
3032
+
3033
+/* LIB_SPEC ... Another C string constant very much like LINK_SPEC.  The
3034
+ * difference between the two is that LIB_SPEC is used at the end of the
3035
+ * command given to the linker.
3036
+ *
3037
+ * If this macro is not defined, a default is provided that loads the standard
3038
+ * C library from the usual place.  See 'gcc.c'.
3039
+ */
3040
+#undef LIB_SPEC
3041
+// #define     LIB_SPEC        "%{!g:-lc} %{g:-lg} -lzip"
3042
+#define        LIB_SPEC        ""
3043
+
3044
+/* LIBGCC_SPEC ... Another C string constant that tells the GCC driver program
3045
+ * hoow and when to place a reference to 'libgcc.a' into the linker command
3046
+ * line.  This constant is placed both before and after the value of LIB_SPEC.
3047
+ *
3048
+ * If this macro is not defined, the GCC driver provides a default that passes
3049
+ * the string '-lgcc' to the linker.
3050
+ */
3051
+#undef LIBGCC_SPEC
3052
+#define        LIBGCC_SPEC     ""
3053
+
3054
+/* REAL_LIBGCC_SPEC ... By default, if ENABLE_SHARED_LIBGCC is defined, the
3055
+ * LIBGCC_SPEC is not directly used by the driver program but is instead
3056
+ * modified to refer to different versions of 'libgcc.a' depending on the
3057
+ * values of the command line flags '-static', '-shared', '-static-libgcc',
3058
+ * and '-shared-libgcc'.  On targets where these modifications are
3059
+ * inappropriate, define REAL_LIBGCC_SPEC instead.  REAL_LIBGCC_SPEC tells the
3060
+ * driver how to place a reference to 'libgcc' on the link command line, but
3061
+ * unlike LIBGCC_SPEC, it is used unmodified.
3062
+ */
3063
+#define        REAL_LIBGCC_SPEC        ""
3064
+
3065
+// USE_LD_AS_NEEDED
3066
+// LINK_EH_SPEC
3067
+
3068
+/* STARTFILE_SPEC ... Another C string constant used much like LINK_SPEC.  The
3069
+ * difference between the two is that STARTFILE_SPEC is used at the very
3070
+ * beginning of the command given to the linker.
3071
+ *
3072
+ * If this macro is not defined, a default is provided that loads the standard
3073
+ * C startup file from the usual place.  See 'gcc.c'
3074
+ */
3075
+#undef STARTFILE_SPEC
3076
+#define        STARTFILE_SPEC  ""
3077
+
3078
+/* ENDFILE_SPEC ... Another C string constant used much like LINK_SPEC.  The
3079
+ * difference between the two is that ENDFILE_SPEC is used at the very end
3080
+ * of the command given to the linker.
3081
+ *
3082
+ * Do not define this macro if it does not do anything.
3083
+ */
3084
+// #undef      ENDFILE_SPEC
3085
+// #define     ENDFILE_SPEC    ""
3086
+
3087
+// THREAD_MODEL_SPEC
3088
+// SYSROOT_SUFFIX_SPEC
3089
+// SYSROOT_HEADERS_SUFFIX_SPEC
3090
+// EXTRA_SPECS
3091
+// LINK_LIBGCC_SPECIAL_1
3092
+// LINK_GCC_C_SEQUENCE_SPEC
3093
+// LINK_COMMAND_SPEC
3094
+// TARGET_ALWAYS_STRIP_DOTDOT
3095
+// MULTILIB_DEFAULTS
3096
+// RELATIVE_PREFIX_NOT_LINKDIR
3097
+// MD_EXEC_PREFIX
3098
+// STANDARD_STARTFILE_PREFIX
3099
+// STANDARD_STARTFILE_PREFIX_1
3100
+// STANDARD_STARTFILE_PREFIX_2
3101
+// MD_STARTFILE_PREFIX
3102
+// MD_STARTFILE_PREFIX_1
3103
+// INIT_ENVIRONMENT
3104
+// LOCAL_INCLUDE_DIR
3105
+#undef LOCAL_INCLUDE_DIR
3106
+
3107
+// NATIVE_SYSTEM_HEADER_COMPONENT
3108
+// INCLUDE_DEFAULTS
3109
+
3110 102 dgisselq
+/* 17.03 Run-time Target Specification */
3111
+
3112
+/* TARGET_CPU_CPP_BUILTINS() ... This function-like macro expands to a block of
3113
+ * code that defines built-in preprocessor macros and assertions for the target
3114
+ * CPU, using the functions builtin_define, builtin_define_std, and
3115
+ * builtin_assert.  When the front end calls this macro it provides a trailing
3116
+ * semicolon, and since it has finished command line option proccessing your
3117
+ * code can use those results freely.
3118
+ *
3119
+ * ZipCPU --- We should probably capture in this macro what capabilities the
3120
+ * command line parameters we've been given indicate that our CPU has.  That
3121
+ * way, code can be adjusted depending upon the CPU's capabilities.
3122
+ */
3123
+#define        TARGET_CPU_CPP_BUILTINS()                       \
3124
+       { builtin_define("__ZIPCPU__");                 \
3125
+       if (ZIP_FPU) builtin_define("__ZIPFPU__");      \
3126
+       if (ZIP_ATOMIC) builtin_define("__ZIPATOMIC__");        \
3127
+       }
3128
+       // If (zip_param_has_fpu)  builtin_define("__ZIPFPU__");
3129
+       // If (zip_param_has_div)  builtin_define("__ZIPDIV__");
3130
+       // If (zip_param_has_mpy)  builtin_define("__ZIPMPY__");
3131
+       // If (zip_param_has_lock) builtin_define("__ZIPLOCK__");
3132
+       // If (zip_param_supervisor) builtin_define("__ZIPUREGS__");
3133
+       // If (we support int64s) builtin_define("___int64_t_defined");
3134
+
3135
+/* TARGET_OS_CPP_BUILTINS() ... Similarly to TARGET_CPU_CPP_BUILTINS but this
3136
+ * macro is optional and is used for the target operating system instead.
3137
+ */
3138
+
3139
+/* Option macros: (we need to define these eventually ... )
3140
+ *
3141
+ *     TARGET_HANDLE_OPTION
3142
+ *     TARGET_HANDLE_C_OPTION
3143
+ *     TARGET_OBJ_CONSTRUCT_STRING_OBJECT
3144
+ *     TARGET_OBJ_DECLARE_UNRESOLVED_CLASS_REFERENCE
3145
+ *     TARGET_OBJ_DECLARE_CLASS_DEFINITION
3146
+ *     TARGET_STRING_OBJECT_REF_TYPE_P
3147
+ *     TARGET_CHECK_STRING_OBJECT_FORMAT_ARG
3148
+ *     TARGET_OVERRIDE_OPTIONS_AFTER_CHANGE(VOID)
3149
+ *     C_COMMON_OVERRIDE_OTPTIONS
3150
+ *     TARGET_OPTION_OPTIMIZATION_TABLE
3151
+ *     TARGET_OPTION_INIT_STRUCT
3152
+ *     TARGET_OPTION_DEFAULT_PARAMS
3153
+ */
3154
+
3155
+/* SWITCHABLE_TARGET
3156
+ *
3157
+ * Zip CPU doesn't need this, so it defaults to zero.  No need to change it
3158
+ * here.
3159
+ */
3160
+
3161
+/* TARGET_FLOAT_EXCEPTIONS_ROUNDING_SUPPORTED_P(VOID) ... Returns true if the
3162
+ * target supports IEEE 754 floating-point exceptions and rounding modes, false
3163
+ * otherwise.  This is intended to relate to the float and double types, but not
3164
+ * necessarily "long double".  By default, returns true if the adddf3
3165
+ * instruction pattern is available and false otherwise, on the assumption that
3166
+ * hardware floating point supports exceptions and rounding modes but software
3167
+ * floating point does not.
3168
+ *
3169
+ * ZipCPU floating point is barely going to be functional, I doubt it will
3170
+ * support all of these bells and whistles when full functionality is even
3171
+ * achieved.  Therefore, we won't support these modes.  However, we can't just
3172
+ * set this to zero, so let's come back to this.
3173
+ */
3174
+// #warning "Wrong answer encoded to date"
3175 103 dgisselq
+// #undef      TARGET_FLOAT_EXCEPTIONS_ROUNDING_SUPPORTED_P
3176 102 dgisselq
+// #define     TARGET_FLOAT_EXCEPTIONS_ROUNDING_SUPPORTED_P(X) 0
3177
+
3178
+/* 17.04 Defining data structures for per-function information */
3179
+
3180
+/* INIT_EXPANDERS ... Macro called to initialize any target specific
3181
+ * information.  This macro is called once per function, before generation of
3182
+ * any RTL has begun.  The intention is to allow the initialization of the
3183
+ * function pointer init_machine_status.
3184
+ */
3185
+// #warning "I may need to define this to handle function return addresses ..."
3186
+
3187
+/* 17.05 Storage Layout */
3188
+
3189
+/* Storage Layout */
3190
+#define        BITS_BIG_ENDIAN         0        // MSB has highest number
3191
+#define        BYTES_BIG_ENDIAN        1       // 1 if MSB is lowest number
3192
+#define        WORDS_BIG_ENDIAN        1       // 1 if MSW is lowest number
3193
+#define        FLOAT_WORDS_BIG_ENDIAN  1
3194
+#define        BITS_PER_WORD           32
3195
+// #define     MAX_BITS_PER_WORD       // defaults to BITS_PER_WORD
3196
+#define        UNITS_PER_WORD          1       // Storage units in a word, pwr of 2:1-8
3197
+#define        MIN_UNITS_PER_WORD      1       // Default is UNITS_PER_WORD
3198
+/* POINTER_SIZE ... Width of a pointer in bits.  You must specify a value no
3199
+ * wider than the width of Pmode.  If it is not equal to the width of Pmode,
3200
+ * you must define POINTERS_EXTEND_UNSIGNED. If you do not specify a value the
3201
+ * default is BITS_PER_WORD.
3202
+ *
3203
+ * ZipCPU --- All of our pointers are 32-bits, the width of our address bus.
3204
+ */
3205
+#define        POINTER_SIZE            32      // Ptr width in bits
3206
+/* POINTERS_EXTEND_UNSIGNED ... A C expression that determines how pointers
3207
+ * should be extended from ptr_mode to either Pmode or word_mode.  It is greater
3208
+ * than zero if pointers should be zero-extended, zero if they should be sign
3209
+ * extended, and negative if some other conversion is needed.  In the last case,
3210
+ * the extension is done by the target's ptr_extend instruction.
3211
+ *
3212
+ * You need not define this macro if the ptr_mode, Pmode, and word_mode are all
3213
+ * the same width.
3214
+ *
3215
+ * ZipCPU --- While we shouldn't need this, QImode and HImode have the same
3216
+ * number of bits as SImode.  Therefore, one might wish to convert between the
3217
+ * two.  Hence, we specify how we would do that here.
3218
+ */
3219
+#define        POINTERS_EXTEND_UNSIGNED        0
3220
+
3221
+/* PROMOTE_MODE(m,unsignedp,type) ... A macro to update m and unsignedp when an
3222
+ * object whose type is type and which has he specified mode and signedness is
3223
+ * to be stored in a register.  This macro is only called when type is a scalar
3224
+ * type.
3225
+ *
3226
+ * On most RISC machines, which only have operations that operate on a full
3227
+ * register, define this macro to set m to word_mode if m is an integer mode
3228
+ * narrower than BITS_PER_WORD.  In most cases, only integer modes should be
3229
+ * widened because wider precision floating-point operations are usually more
3230
+ * expensive than their narrower counterparts.
3231
+ *
3232
+ * For most machines, the macro definition does not change unsigndep.  However,
3233
+ * some machines, have instructions that preferentially handle either signed or
3234
+ * unsigned quantities of certain modes.  For example, on the DEC Alpha, 32-bit
3235
+ * loads from memory and 32-bit add instructions sign-extend the result to
3236
+ * 64-bits. On such machines, set unsignedp according to which kind of extension
3237
+ * is more efficient.
3238
+ *
3239
+ * Do not define this macro if it would never modify m.
3240
+ *
3241
+ * ZipCPU --- We need to always (if possible) promote everything to SImode where
3242
+ * we can handle things.  HImode and QImode just don't make sense on this CPU.
3243
+ */
3244
+#define        PROMOTE_MODE(M,U,T)     if ((GET_MODE_CLASS(M)==MODE_INT)&&(GET_MODE_SIZE(M)<2)) (M)=SImode;
3245
+
3246
+// TARGET_PROMOTE_FUNCTION_MODE
3247
+/* PARM_BOUNDARY ... Normal alignment required for function parameters on the
3248
+ * stack, in bits.  All stack parameters receive at least this much alignment
3249
+ * regardless of data type.  On most machines, this is the same as the size of
3250
+ * an integer.
3251
+ */
3252
+#define        PARM_BOUNDARY   32
3253
+
3254
+/* STACK_BOUNDARY ... Define this macro to the minimum alignment enforced by
3255
+ * hardware for the stack pointer on this machine.  The definition is a C
3256
+ * expression for the desired alignment (measured in bits).  This value is used
3257
+ * as a default if PREFERRED_STACK_BOUNDARY is not defined.  On most machines,
3258
+ * this should be the same as PARM_BOUNDARY.
3259
+ */
3260
+#define        STACK_BOUNDARY  PARM_BOUNDARY
3261
+
3262
+/* PREFERRED_STACK_BOUNDARY ... Define this ... */
3263
+
3264
+/* INCOMING_STACK_BOUNDARY
3265
+ */
3266
+
3267
+/* FUNCTION_BOUNDARY ... Alignment required for a function entry point, in bits.
3268
+ */
3269
+#define        FUNCTION_BOUNDARY       32
3270
+
3271
+/* BIGGEST_ALIGNMENT ... Biggest alignment that any data type can require on
3272
+ * this machine, in bits.  Note that this is not the biggest alignment that is
3273
+ * supported, just the biggest alignment that, when violated, may cause a fault.
3274
+ */
3275
+#define BIGGEST_ALIGNMENT      32
3276
+
3277
+/* MINIMUM_ATOMIC_ALIGNMENT ... If defined, the smallest alignment, that can be
3278
+ * given to an object that can be referenced in one operation, without
3279
+ * disturbing any nearby object.  Normally, this is BITS_PER_UNIT, but may be
3280
+ * larger on machines that don't have byte or halfword store operations.
3281
+ */
3282
+#define        MINIMUM_ATOMIC_ALIGNMENT        BITS_PER_UNIT
3283
+
3284
+/* STRICT_ALIGNMENT ... Set this nonzero if move instructions will actually
3285
+ * fail to work when given unaligned data.  If instructions will merely go
3286
+ * slower in that case, define this macro as 0.
3287
+ */
3288
+#define        STRICT_ALIGNMENT        1
3289
+
3290
+/* MAX_FIXED_MODE_SIZE ... An integer expression for the size in bits of the
3291
+ * largest integer machine mode that should actually be used.  All integer
3292
+ * machine modes of this size or smaller can be used for structures and unions
3293
+ * with the appropriate sizes.  If this macro is undefined,
3294
+ * GET_MODE_BITSIZE(DImode) is assumed.
3295
+ *
3296
+ * ZipCPU ... Get_MOD_BITSIZE(DImode) will be 64, and this is really not the
3297
+ * size on bits of the largest integer machine mode.  However, that's the case
3298
+ * with most DI implementations: A long is two words, spliced together.  We'd
3299
+ * like to support that eventually, but we need to get there.  Hence, let's use
3300
+ * compile time flag (ZIP_HAS_DI) that we can enable when we're ready.
3301
+ */
3302
+#if (ZIP_HAS_DI != 0)
3303
+#define        MAX_FIXED_MODE_SIZE     64
3304
+#else
3305
+#define        MAX_FIXED_MODE_SIZE     32
3306
+#endif
3307
+
3308
+
3309
+/* 17.06 Layout of Source Language Data Types */
3310
+
3311
+#undef CHAR_TYPE_SIZE
3312
+#undef SHORT_TYPE_SIZE
3313
+#undef INT_TYPE_SIZE
3314
+#undef LONG_TYPE_SIZE
3315
+#undef LONG_LONG_TYPE_SIZE
3316
+//
3317
+#define        CHAR_TYPE_SIZE  32
3318
+#define        SHORT_TYPE_SIZE 32
3319
+#define        INT_TYPE_SIZE   32
3320
+#define        LONG_TYPE_SIZE  32
3321
+#define        LONG_LONG_TYPE_SIZE     64
3322
+// BOOL_TYPE_SIZE defaults to CHAR_TYPE_SIZE
3323
+#undef FLOAT_TYPE_SIZE
3324
+#undef DOUBLE_TYPE_SIZE
3325
+#undef LONG_DOUBLE_TYPE_SIZE
3326
+#define        FLOAT_TYPE_SIZE         32
3327
+#define        DOUBLE_TYPE_SIZE        FLOAT_TYPE_SIZE // Zip CPU doesn't support dbls
3328
+#define        LONG_DOUBLE_TYPE_SIZE   64      // This'll need to be done via emulation
3329
+// SHORT_FRAC_TYPE_SIZE
3330
+// LONG_FFRACT_TYPE_SIZE
3331
+// LONG_LONG_FRACT_TIME_SIZE
3332
+#undef SHORT_ACCUM_TYPE_SIZE
3333
+#undef ACCUM_TYPE_SIZE
3334
+#undef LONG_ACCUM_TYPE_SIZE
3335
+#define        SHORT_ACCUM_TYPE_SIZE   SHORT_TYPE_SIZE
3336
+#define        ACCUM_TYPE_SIZE         INT_TYPE_SIZE
3337
+#define        LONG_ACCUM_TYPE_SIZE    LONG_TYPE_SIZE
3338
+
3339
+/* LIBGCC2_GNU_PREFIX ... This macro corresponds to the TARGET_GNU_PREFIX target
3340
+ * hook and should be defined if that hook is overriden to be true.  It causes
3341
+ * function names in libgcc to be changed to use a __gnu_ prefix for their name
3342
+ * rather than the default __.  A port which uses this macro should also arrange
3343
+ * to use t-gnu-prefix in the libgcc config.host.
3344
+ *
3345
+ * ZipCPU -- I see no reason to define and therefore change this behavior.
3346
+ */
3347
+
3348
+/* TARGET_FLT_EVAL_METHOD ... A C expression for the value for FLT_EVAL_METHOD
3349
+ * in float.h,, assuming, if applicable, that the floating-point control word
3350
+ * is in its default state.  If you do not define this macro the value of
3351
+ * FLT_EVAL_METHOD will be zero.
3352
+ *
3353
+ * ZipCPU --- ???
3354
+ */
3355
+
3356
+/* WIDEST_HARDWARE_FP_SIZE ... A C expression for the size in bits of the widest
3357
+ * floating-point format supported by the hardware.  If you define this macro,
3358
+ * you must specify a value less than or equal to the value of LONG_DOUBLE_...
3359
+ * If you do not define this macro, the value of LONG_DOUBLE_TYPE_SIZE is the
3360
+ * default.
3361
+ *
3362
+ * ZipCPU supports 32-bit IEEE floats--IF THE SUPPORT IS COMPILED IN!  This
3363
+ * really needs to be determined, then, based upon a compile time parameter
3364
+ * where the one compiling the code states whether or not the H/W even has
3365
+ * floating point support.
3366
+ *
3367
+ * For now, we'll assume it does--but once we implement GCC parameters, we'll
3368
+ * need to change this.
3369
+ */
3370
+#undef WIDEST_HARDWARE_FP_SIZE
3371
+// #warning "Definition needs to change if no FPU present"
3372
+#define        WIDEST_HARDWARE_FP_SIZE FLOAT_TYPE_SIZE
3373
+
3374
+/* DEFAULT_SIGNED_CHAR ... An expression whose value is 1 or 0, according to
3375
+ * whether the type char should be signed or unsigned by default.  The user
3376
+ * can always override this default with the options -fsigned-char and
3377
+ * -funsigned-char.
3378
+ *
3379
+ * ZipCPU--let's go with the default behavior.
3380
+ */
3381
+#define        DEFAULT_SIGNED_CHAR     1
3382
+
3383
+/* TARGET_DEFAULT_SHORT_ENUMS(VOID) ... This target hook should return true if
3384 103 dgisselq
+ * the compiler should give an enum type only as many bytes as it takes to
3385 102 dgisselq
+ * represent the range of possible values of that type.  It should return
3386
+ * false if all enum types should be allocated like int.
3387
+ *
3388
+ * The default is to return false.  This is what the ZipCPU needs, so we won't
3389
+ * override it.
3390
+ */
3391
+
3392
+/* SIZE_TYPE ... A C expression for a string describing the name of the data
3393
+ * type to use for size values.  The typedef name size_t is defined using the
3394
+ * contents of the string.
3395
+ *
3396
+ * If you don't define this macro, the default is "long unsigned int".  Since
3397
+ * on the ZipCPU this is a 32-bit number, and all ZipCPU values are 32-bits,
3398
+ * the default seems perfect for us.
3399
+ */
3400
+#define        SIZE_TYPE       "unsigned int"
3401
+
3402
+/* SIZETYPE ... GCC defines internal types () for expressions dealing with size.
3403
+ * This macro is a C expression for a string describing the name of the data
3404
+ * type from which the precision of sizetype is extracted.  The string has the
3405
+ * same restrictions as SIZE_TYPE string.  If you don't define this macro, the
3406
+ * default is SIZE_TYPE --- which seems good enough for us.
3407
+ */
3408
+
3409
+/* PTRDIFF_TYPE ... A C expression for a string describing the name of the data
3410
+ * type to use fo rthe result of subtracting two pointers.  The typedef name
3411
+ * ptrdiff_t is defined using the contents of the string.  See SIZE_TYPE for
3412
+ * more information.
3413
+ *
3414
+ * The default is "long int" which for the ZipCPU is 32-bits---still good enough
3415
+ * for us.
3416
+ */
3417
+#define        PTRDIFF_TYPE    "int"
3418
+
3419
+/* WCHAR_TYPE ... A C expression for a string describing the name of the data
3420
+ * type to use for wide characters.  The typedef name wchar_t is defined using
3421
+ * the contents of  the string.  If you don't define this macro, the default is
3422
+ * 'int'--good enough for ZipCPU.
3423
+ */
3424
+
3425
+/* WCHAR_TYPE_SIZE ... A C expression for the size in bits of the data type for
3426
+ * wide characters.  This is used in cpp, which cannot make use of WCHAR_TYPE.
3427
+ */
3428
+#undef WCHAR_TYPE_SIZE
3429
+#define        WCHAR_TYPE_SIZE 32
3430
+
3431
+/* WINT_TYPE ... A C expression for a string describing the name of the data
3432
+ * type to use for wide characters passed to printf and returned from getwc.
3433
+ * The typedef name wint_t is defined using the contents of the string.  See
3434
+ *
3435 103 dgisselq
+ * ZipCPU -- If you don't define this macro, the default is "unsigned int"--also
3436
+ * best for us again.
3437 102 dgisselq
+ */
3438
+
3439
+/* INTMAX_TYPE ... A C expression for a string describing the name of the
3440
+ * data type that can represent any value of any standard or extended signed
3441
+ * integer type.  The typedef name intmax_t is defined using the contents of
3442
+ * the string.
3443
+ *
3444
+ * If you don't define this macro, the default is the first of "int", "long int"
3445
+ * or "long long int" that has as much precision as "long long int".
3446
+ */
3447
+
3448
+/* UINTMAX_TYPE ... same as INTMAX_TYPE, but for unsigned
3449
+ */
3450
+
3451
+#undef SIG_ATOMIC_TYPE
3452
+#if (ZIP_ATOMIC != 0)
3453
+#define        SIG_ATOMIC_TYPE "int"
3454
+#else
3455
+#define        SIG_ATOMIC_TYPE NULL    // We have no atomic types, but registers
3456
+#endif
3457
+#undef INT8_TYPE
3458
+#define        INT8_TYPE               NULL    // We have no 8-bit integer type
3459
+#undef INT16_TYPE
3460
+#define        INT16_TYPE              NULL
3461
+#undef INT32_TYPE
3462
+#define        INT32_TYPE              "int"
3463
+#undef UINT8_TYPE
3464
+#define        UINT8_TYPE              NULL
3465
+#undef UINT16_TYPE
3466
+#define        UINT16_TYPE             NULL
3467
+#undef UINT32_TYPE
3468
+#define        UINT32_TYPE             "unsigned int"
3469
+#undef INT_LEAST8_TYPE
3470
+#define        INT_LEAST8_TYPE         "int"
3471
+#undef INT_LEAST16_TYPE
3472
+#define        INT_LEAST16_TYPE        "int"
3473
+#undef INT_LEAST32_TYPE
3474
+#define        INT_LEAST32_TYPE        "int"
3475
+#undef UINT_LEAST8_TYPE
3476
+#define        UINT_LEAST8_TYPE        "unsigned int"
3477
+#undef UINT_LEAST16_TYPE
3478
+#define        UINT_LEAST16_TYPE       "unsigned int"
3479
+#undef UINT_LEAST32_TYPE
3480
+#define        UINT_LEAST32_TYPE       "unsigned int"
3481
+#undef INT_FAST8_TYPE
3482
+#define        INT_FAST8_TYPE          "int"
3483
+#undef INT_FAST16_TYPE
3484
+#define        INT_FAST16_TYPE         "int"
3485
+#undef INT_FAST32_TYPE
3486
+#define        INT_FAST32_TYPE         "int"
3487
+#undef UINT_FAST8_TYPE
3488
+#define        UINT_FAST8_TYPE         "unsigned int"
3489
+#undef UINT_FAST16_TYPE
3490
+#define        UINT_FAST16_TYPE        "unsigned int"
3491
+#undef UINT_FAST32_TYPE
3492
+#define        UINT_FAST32_TYPE        "unsigned int"
3493
+#undef INTPTR_TYPE
3494
+#define        INTPTR_TYPE             "unsigned int"
3495
+#undef UINTPTR_TYPE
3496
+#define        UINTPTR_TYPE            "unsigned int"
3497
+
3498
+#undef INT64_TYPE
3499
+#undef UINT64_TYPE
3500
+#undef INT_LEAST64_TYPE
3501
+#undef UINT_LEAST64_TYPE
3502
+#undef INT_FAST64_TYPE
3503
+#undef UINT_FAST64_TYPE
3504
+
3505
+#if (ZIP_HAS_DI != 0)
3506
+#define        INT64_TYPE              "long int"
3507
+#define        UINT64_TYPE             "long unsigned int"
3508
+#define        INT_LEAST64_TYPE        "long int"
3509
+#define        UINT_LEAST64_TYPE       "long unsigned int"
3510
+#define        INT_FAST64_TYPE         "long int"
3511
+#define        UINT_FAST64_TYPE        "long unsigned int"
3512
+#else
3513
+#define        INT64_TYPE              NULL
3514
+#define        UINT64_TYPE             NULL
3515
+#define        INT_LEAST64_TYPE        NULL
3516
+#define        UINT_LEAST64_TYPE       NULL
3517
+#define        INT_FAST64_TYPE         NULL
3518
+#define        UINT_FAST64_TYPE        NULL
3519
+#endif
3520
+
3521
+#define        TARGET_PTRMEMFUNC_VBI_LOCATION  ptrmemfunc_vbit_in_pfn
3522
+
3523
+
3524
+/* 17.07 Register Usage / Register definitions */
3525
+
3526
+/* FIRST_PSEUDO_REGISTER ... Number of hardware registers known to the compiler.
3527
+ * They receive numbers 0 through FIRST_PSEUDO_REGISTER-1; thus the first
3528
+ * pseudo register's numbrer really is assigned the number
3529
+ * FIRST_PSEUDO_REGISTER.
3530
+ *
3531
+ * ZipCPU---There are 16 registers in the ZipCPU, numbered 0-15 with the CC
3532
+ * and PC register being numbered 14 and 15 respectively.  Therefore, the
3533
+ * compiler can take register number 16 and above and do whatever it wants
3534
+ * with it.
3535
+ */
3536
+#ifdef DEFINE_USER_REGS
3537 103 dgisselq
+#  define      FIRST_PSEUDO_REGISTER   32
3538 102 dgisselq
+#else
3539 103 dgisselq
+#  ifdef       zip_FP_PSEUDO
3540
+#    define    FIRST_PSEUDO_REGISTER   (zip_FP_PSEUDO+1)
3541
+#  else
3542
+#    define    FIRST_PSEUDO_REGISTER   16
3543
+#  endif
3544 102 dgisselq
+#endif
3545
+
3546
+/* FIXED_REGISTERS ... An initializer that says which registers are used for
3547
+ * fixed purposes all throughout the compiled code and are therefore not
3548
+ * available for general allocation.  These would include the stack pointer, the
3549
+ * frame pointer (except on machines where that can be used as a general
3550
+ * register when no frame pointer is needed), the program counter on machines
3551
+ * where that is considered one of the addressable registers, and any other
3552
+ * numbered register with a standard use.
3553
+ *
3554
+ * This information is expressed as a sequence of numbers, separated by commas,
3555
+ * and surrounded by braces.  The nth number is 1 if register n is fixed, 0
3556
+ * otherwise.
3557
+ *
3558
+ * For the Zip CPU, we have three fixed registers that are not available for
3559
+ * general allocation:
3560
+ *
3561
+ *     SP      The stack pointer
3562
+ *     CC      The condition codes and CPU state register
3563
+ *     PC      The program counter
3564
+ *
3565
+ * Other registers, such as FP (the frame pointer) or GBL (the global offset
3566
+ * table pointer) are registers that we hope will not be so fixed.
3567
+ */
3568 103 dgisselq
+#ifdef zip_FP_PSEUDO
3569
+#  define      FIXED_REGISTERS         { 0,0,0,0,0,0,0,0,0,0,0,0,0,1,1,1,1 }
3570
+#else
3571
+#  define      FIXED_REGISTERS         { 0,0,0,0,0,0,0,0,0,0,0,0,0,1,1,1 }
3572
+#endif
3573 102 dgisselq
+
3574
+/* CALL_USED_REGISTERS ... like FIXED_REGISTERS but has 1 for each register
3575
+ * that is clobbered (in general) by function calls as well as for fixed
3576
+ * registers.  This macro therefore identifies the registers that are not
3577
+ * available for general allocation of values that must live across function
3578
+ * calls.
3579
+ *
3580
+ * If a register has 0 in CALL_USED_REGISTERS, the compiler automatically saves
3581
+ * it on function entry and restores it on function exit, if the register is
3582
+ * used within the function.
3583
+ *
3584
+ * On the Zip CPU, we must save R0 (the return address), and (let's pick) any
3585
+ * register above R5.
3586
+ */
3587 103 dgisselq
+#ifdef zip_FP_PSEUDO
3588
+#  define      CALL_USED_REGISTERS     { 0,1,1,1,1,0,0,0,0,0,0,0,0,1,1,1,1 }
3589
+#else
3590
+#  define      CALL_USED_REGISTERS     { 0,1,1,1,1,0,0,0,0,0,0,0,0,1,1,1 }
3591
+#endif
3592 102 dgisselq
+
3593
+/* CALL_REALLY_USED_REGISTERS ...  optional macro that, if not defined, defaults
3594
+ * to the value of CALL_USED_REGISTERS.
3595
+ */
3596
+
3597
+/* HARD_REGNO_CALL_PART_CLOBBERED(REGNO,MODE) ... A C expression that is nonzero
3598
+ * if it is not permissible to store a value of mode MODE in hard register REGNO
3599
+ * across a call without some part of it being clobbbered.  For most machines,
3600
+ * this macro need not be defined.  It is only required for machines that do
3601 103 dgisselq
+ * not preserve the entire contents of a register across a call.
3602 102 dgisselq
+ *
3603
+ * In the Zip CPU, we clobber R0 with our return address during a call, so let's
3604
+ * make sure this gets included here.
3605
+ */
3606
+#define        HARD_REGNO_CALL_PART_CLOBBERED(REGNO,MODE)      (REGNO==0)
3607
+
3608
+/* TARGET_CONDITIONAL_REGISTER_USAGE(VOID) ... This hook may conditionally
3609
+ * modify five variables fixed_regs, call_used_regs, global_regs, reg_names, and
3610
+ * reg_class_contents, to take into account any dependence of these register
3611
+ * sets on target flags.  The first three of these are of type char[]
3612
+ * (interpreted as Boolean vectors).  global_regs is a const char *[] and
3613
+ * reg_class_contents is a HARD_REG_SET.  Before the macro is called,
3614
+ * fixed_regs, call_used_regs, reg_class_contents, and reg_names have been
3615
+ * initialized from FIXED_REGISTERS, CALL_USED_REGISTERS, REG_CLASS_CONTENTS,
3616
+ * and REGISTER_NAMES, respectively.  global_regs has been cleared, and any
3617
+ * -ffixed-reg, -fcall-used-reg, and -fcall-saved-reg command options have been
3618
+ * applied.
3619
+ *
3620
+ * ZipCPU -- I may need to return and define this depending upon how FP and
3621
+ * GBL register allocation go.  But for now, we'll leave this at its default
3622
+ * value.
3623
+ */
3624
+// #warning "Revisit me after FP and GBL allocation"
3625
+
3626
+/* INCOMING_REGNO(out) ... Define this macro if the target machine has register
3627
+ * windows. ...
3628
+ *
3629
+ * Zip CPU has no register windows.
3630
+ */
3631
+
3632
+/* OUTGOING_REGNO ... same thing.
3633
+ */
3634
+
3635
+/* LOCAL_REGNO ... same thing.
3636
+ */
3637
+
3638
+/* PC_REGNUM ... If the program counter has a register number, define this as
3639
+ * that register number.  Otherwise do not define it.
3640
+ */
3641
+#define        PC_REGNUM       zip_PC
3642
+
3643
+
3644
+/* REG_ALLOC_ORDER ... If defined, an initializer for a vector of integers,
3645
+ * containing the number of hard registers in the order in which GCC should
3646
+ * prefer to use them (from most preferred to least.
3647
+ *
3648 103 dgisselq
+ * If this macro is not defined, registers are used lowest numbered first (all
3649 102 dgisselq
+ * else being equal).
3650
+ *
3651
+ * Since the default is the ZipCPU desired case, we won't define this here.
3652
+ */
3653
+
3654
+/* ADJUST_REG_ALLOC_ORDER ... on most machines it is not necessary to define
3655
+ * this macro, so we won't either.
3656
+ */
3657
+
3658
+/* HONOR_REG_ALLOC_ORDER ...
3659
+ */
3660
+
3661
+/* HONOR_REG_ALLOC_ORDER ... on most machines it is not necessary to define
3662
+ * this macro, so we won't either.
3663
+ */
3664
+
3665
+/* HARD_REGNO_NREGS(REGNO, MODE) ... A C expression for the number of
3666
+ * consecutive hard registers, starting at register number REGNO, required to
3667
+ * hold a value of mode MODE.
3668
+ *
3669
+ * On a machine where all registers are exactly one word, a suitable definition
3670
+ * is given of ((GET_MODE_SIZE(MODE)+UNITS_PER_WORD-1)/UNITS_PER_WORD.
3671
+ *
3672
+ * On ZipCPU, we might do
3673
+ *     ((((MODE)==DImode)||((MODE)==DFmode))?2:1)
3674
+ * but I think the default (above) code should work as well.  Hence, let's stick
3675
+ * with the default, lest someone try to create larger modes (TImode, OImode,
3676
+ * XImode) and expect us to follow them properly some how.
3677
+ *
3678
+ * Okay, now in hind sight, we know that the default doesn't work for our
3679
+ * architecture, since GET_MODE_SIZE(SImode)=4, not 1.  Thus, let's rearrange
3680
+ * this expression to work in bits rather than in bytes and we'll know more
3681
+ * of what we are doing.
3682
+ */
3683
+#undef HARD_REGNO_NREGS
3684
+#define        HARD_REGNO_NREGS(REGNO, MODE)   ((GET_MODE_SIZE(MODE)+UNITS_PER_WORD-1)\
3685
+               / (UNITS_PER_WORD))
3686
+
3687
+/* HARD_REGNO_NREGS_HAS_PADDING(REGNO,MODE) ... A C expression that is nonzero
3688
+ * if a value of mode MODE, stored in memory, ends with padding that causes it
3689
+ * to take up more space than in registers starting at register number REGNO
3690
+ * (as determined by multiplying GCC's notion of the size of the register when
3691
+ * containing this mode by the number of registers returned by HARD_REGNO_NREGS)
3692
+ * By default this is zero.
3693
+ *
3694
+ * Zip CPU --- The default looks good enough to me.
3695
+ */
3696
+
3697
+/* HARD_REGNO_NREGS_WITH_PADDING(REGNO, MODE)
3698
+ *
3699
+ * ZipCPU ---
3700
+ */
3701
+
3702
+/* REGMODE_NATURAL_SIZE(MODE) -- Define this macro if the natural size of
3703
+ * registers that hold values of mode mode is not the word size.  It is a C
3704
+ * expression that should give the natural size in bytes for the specified mode.
3705
+ * It is used by the register allocator to try to optimize its results.
3706
+ *
3707
+ * ZipCPU ---
3708
+ */
3709
+// #define     REGMODE_NATURAL_SIZE(MODE)      (((MODE)==DImode)?2:1)
3710
+
3711
+/* HARD_REGNO_MODE_OK ... A C expression that is nonzero if it is permissible
3712 103 dgisselq
+ * to store a value of mode MODE in a hard register number REGNO (or in several
3713 102 dgisselq
+ * registers starting with that one).  For a machine where all registers are
3714
+ * equivalent, a suitable definition is '1'.  You need not include code to check
3715
+ * for the numbers of fixed registers, because the allocation mechanism
3716
+ * considered them to be always occupied.
3717
+ *
3718
+ * ZipCPU --- As long as you are already avoiding the fixed registers, the
3719
+ * suitable default definition mentioned above should be sufficient.
3720
+ */
3721
+#undef HARD_REGNO_MODE_OK
3722 103 dgisselq
+#define        HARD_REGNO_MODE_OK(R,M) (R<zip_CC)
3723 102 dgisselq
+
3724
+/* HARD_REGNO_RENAME_OK(FROM,TO) ... A C expression that is nonzero if it is
3725
+ * okay to rename a hard register FROM to another hard register TO.  One common
3726
+ * use of this macro is to prevernt renaming of a register to another register
3727
+ * that is not saved by a prologue in an interrupt handler.  The default is
3728
+ * always nonzero.
3729
+ *
3730
+ * ZipCPU --- The default looks good enough to us.
3731
+ */
3732
+#undef HARD_REGNO_RENAME_OK
3733
+#define        HARD_REGNO_RENAME_OK(FROM,TO)   ((is_ZIP_GENERAL_REG(FROM))&&(is_ZIP_GENERAL_REG(TO)))
3734
+
3735
+
3736
+/* MODES_TIABLE_P(M1, M2) ... A C expression that is nonzero if a value of mode
3737
+ * M1 is accessible in mode M2 without copying.
3738
+ *
3739
+ * ZipCPU --- well, that's true for us (although we support scant few modes) ...
3740
+ * so lets' set to one.
3741
+ */
3742
+#define        MODES_TIEABLE_P(M1,M2)  1
3743
+
3744
+/* TARGET_HARD_REGNO_SCRATCH_OK(REGNO)
3745
+ * This target hook should return true if it is OK to use a hard register
3746
+ * REGNO has a scratch register in peephole2.  One common use of this macro is
3747
+ * to prevent using of a register that is not saved by a prologue in an
3748
+ * interrupt handler.  The default version of this hook always returns true.
3749
+ *
3750
+ * ZipCPU --- the default works for us as well.  If you are in an interrupt
3751
+ * context, you have an entirely new set of registers (the supervisor set), so
3752
+ * this is a non-issue.
3753
+ */
3754
+
3755
+/* AVOID_CCMODE_COPIES ... define this macro if the compiler should avoid
3756
+ * copies to/from CCmode register(s).  You should only define this macro if
3757
+ * support for copying to/from CCmode is incomplete.
3758
+ *
3759
+ * ZipCPU --- CCmode register copies work like any other, so we'll keep with the
3760
+ * default definition.
3761
+ */
3762
+
3763
+/* STACK_REGS ... Define this if the machine has any stack-like registers.
3764
+ *
3765
+ * Zip CPU has no stack-like registers, as their definition is different from
3766
+ * the ZipCPU stack pointer register.
3767
+ */
3768
+
3769
+#define        ZIP_REG_BYTE_SIZE       1
3770
+
3771
+/* 17.08 Register Classes */
3772
+
3773
+/* enum reg_class ... An enumerate type that must be defined with all the
3774
+ * register class names as enumerated values.  NO_REGS must be first.  ALL_REGS
3775
+ * must be the last register class, followed by one more enumerated value,
3776
+ * LIM_REG_CLASSES, which is not a register class but rather tells how many
3777
+ * classes there are.
3778
+ *
3779
+ * ZipCPU --- We'll defined register 0-13 as general registers, 14-15 in
3780
+ * all_regs, and go from there.
3781
+ */
3782
+enum   reg_class {
3783
+       NO_REGS, GENERAL_REGS,
3784
+#ifdef DEFINE_USER_REGS
3785
+       USER_REGS,
3786
+#endif
3787
+       ALL_REGS, LIM_REG_CLASSES
3788
+};
3789
+
3790
+/* N_REG_CLASSES ... the number of distinct register classes, defined as follows
3791
+ */
3792
+#define        N_REG_CLASSES   (int)LIM_REG_CLASSES
3793
+
3794
+/* REG_CLASS_NAMES ... An initializer containing the names of the register
3795
+ * classes as C string constants.  These names are used in writing some of the
3796
+ * debugging dumps.
3797
+ */
3798
+#define        REG_CLASS_NAMES { "NO_REGS", "GENERAL_REGS", "ALL_REGS" }
3799
+
3800
+/* REG_CLASS_CONTENTS ... An initializer containing the contents of the register
3801
+ * classes, as integerss which are bit masks.  The nth integer specifies the
3802
+ * contents of class n.  That way the integer mask is interpreted as that
3803
+ * register r is in the class if (mask&(1<<r)) is 1.
3804
+ *
3805
+ * When the machine has more than 32 registers ... that's not us.
3806
+ *
3807
+ * ZipCPU --- This is straight forward, three register classes, etc.
3808
+ */
3809 103 dgisselq
+#ifdef zip_FP_PSEUDO
3810
+#define        REG_CLASS_CONTENTS { { 0x00000}, {0x13fff}, {0x1ffff} }
3811
+#else
3812 102 dgisselq
+#define        REG_CLASS_CONTENTS { { 0x00000}, {0x03fff}, {0x0ffff} }
3813 103 dgisselq
+#endif
3814 102 dgisselq
+
3815
+#ifdef DEFINE_USER_REGS
3816
+#define        REG_CLASS_NAMES { "NO_REGS", "GENERAL_REGS", "USER_REGS", "ALL_REGS" }
3817
+#define        REG_CLASS_CONTENTS { { 0x00000},{0x03fff},{0x0ffff0000},{0x0ffffffff} }
3818
+#define        FIXED_REGISTERS         { 0,0,0,0,0,0,0,0,0,0,0,0,0,1,1,1,  1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1 }
3819
+#define        CALL_USED_REGISTERS     { 0,1,1,1,1,0,0,0,0,0,0,0,0,1,1,1,  1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1 }
3820
+#endif
3821
+
3822
+/* REGNO_REG_CLASS ... A C expression whose value is a register class
3823
+ * containing hard register REGNO.  In general there is more than one such
3824
+ * class;  Choose a class which is minimal, meaning that no smaller class also
3825
+ * contains the register.
3826
+ */
3827
+#undef REGNO_REG_CLASS
3828 103 dgisselq
+#ifdef zip_FP_PSEUDO
3829
+#define        REGNO_REG_CLASS(R)      (is_ZIP_REG(R)?((((R)<=13)||((R)==zip_FP_PSEUDO))?GENERAL_REGS:ALL_REGS):NO_REGS)
3830
+#else
3831 102 dgisselq
+#define        REGNO_REG_CLASS(R)      (is_ZIP_REG(R)?((R<=13)?GENERAL_REGS:ALL_REGS):NO_REGS)
3832 103 dgisselq
+#endif
3833 102 dgisselq
+
3834
+/* BASE_REG_CLASS ... A macro whose definition is the name of the class to which
3835
+ * a valid base register must belong.  A base register is one used in an address
3836
+ * which is the register value plus a displacement.
3837
+ */
3838
+#undef BASE_REG_CLASS
3839
+#define        BASE_REG_CLASS  GENERAL_REGS
3840
+
3841
+/* MODE_BASE_CLASS(MODE) ... This is a variation of the BASE_REG_CLASS macro
3842
+ * which allows the selection of a bse register in a mode dependent manner.  If
3843
+ * mode is VOIDmode then it should return the same value as BASE_REG_CLASS.
3844
+ */
3845
+#undef MODE_BASE_CLASS
3846
+#define        MODE_BASE_CLASS(MODE)   GENERAL_REGS
3847
+
3848
+/* MODE_BASE_REG_REG_CLASS(MODE) ... A C expression whose value is the register
3849
+ * class to which a valid base register must belong in order to be used in a
3850
+ * base plus index register address.  You should define this macro if base plus
3851
+ * index addresses have different requirements than other base register uses.
3852
+ *
3853
+ * Zip CPU does not support the base plus index addressing mode, thus ...
3854
+ */
3855 111 dgisselq
+// #undef      MODE_BASE_REG_REG_CLASS
3856
+// #define     MODE_BASE_REG_REG_CLASS(MODE)   NO_REGS
3857 102 dgisselq
+
3858
+/* INDEX_REG_CLASS ... A macro whose definition is the name of the class to
3859
+ * which a valid index register must belong.  An index register is one used in
3860
+ * an address where its value is either multiplied by a scale factor or added
3861
+ * to another register (as well as added to a displacement).
3862
+ *
3863
+ * ZipCPU -- Has no index registers.
3864
+ */
3865
+#undef INDEX_REG_CLASS
3866
+#define        INDEX_REG_CLASS NO_REGS
3867
+
3868
+/* REGNO_OK_FOR_BASE_P(NUM) ... A C expression which is nonzero if register
3869
+ * number num is suitable for use as a base register in operand addresses.
3870
+ */
3871
+#undef REGNO_OK_FOR_BASE_P
3872
+#ifdef DEFINE_USER_REGS
3873
+# define REGNO_OK_FOR_BASE_P(NUM)      ((NUM != zip_CC)&&(NUM < 16))
3874
+#else
3875
+# define REGNO_OK_FOR_BASE_P(NUM)      (NUM != zip_CC)
3876
+#endif
3877
+
3878
+/* REGNO_MODE_OK_FOR_BASE_P ... A C expressison that is just like
3879
+ * REGNO_OK_FOR_BASE_P, except that that expression may examine the mode of the
3880 111 dgisselq
+ * memory reference in MODE.  You should define this macro if the mode of the
3881 102 dgisselq
+ * memory reference affects whether a register may be used as a base register.
3882
+ *
3883
+ * ZipCPU --- the mode doesn't affect anything, so we don't define this.
3884
+ */
3885
+
3886
+/* REGNO_MODE_OK_FOR_REG_BASE_P(NUM, MODE) ... base plus index operand
3887
+ * addresses, accessing memory in mode mode.
3888
+ *
3889
+ * Use of this macro is deprecated.
3890
+ */
3891
+
3892 111 dgisselq
+/* REGNO_MODE_CODE_OK_FOR_BASE_P(N,M,AS,OC,IC) ... A C expression which is
3893 102 dgisselq
+ * nonzero if a register number N is suitable for use as a base register in
3894
+ * operand addresses, accessing memory in mode M in address space AS.  This is
3895
+ * similar to REGNO_MODE_OK_FOR_BASE_P, except that the expression may examine
3896
+ * the context in which the register appears in the memory reference.
3897
+ *
3898
+ * ZipCPU---We aren't specific in how we use our registers.
3899
+ */
3900
+#define        REGNO_MODE_CODE_OK_FOR_BASE_P(N,M,AS,OC,IC) REGNO_OK_FOR_BASE_P(N)
3901
+
3902
+/* REGNO_OK_FOR_INDEX_P(REGNO) ... A C expression which is nonzero if register
3903
+ * num is suitable for use as an index register in opernad addressess.  It may
3904
+ * be either a suitable hard register or a pseudo register that has been
3905 111 dgisselq
+ * allocated such as a hard register.
3906 102 dgisselq
+ *
3907
+ * ZipCPU has no index registers, therefore we declare this to be zero.
3908
+ */
3909
+#undef REGNO_OK_FOR_INDEX_P
3910
+#define        REGNO_OK_FOR_INDEX_P(REGNO)     0
3911
+
3912
+/* TARGET_PREFERRED_RENAME_CLASS(RCLASS) ... A target hook that places
3913
+ * additional preference on the register class to use when it is necessary to
3914
+ * rename a register in class RCLASS to another class, or perhaps NO_REGS, if no
3915
+ * preferred register class is found or hook preferred_rename_class is not
3916
+ * implemented.  SOmething returning a more restrictive class makes better code.
3917
+ * For example, on ARM, thumb-2 instructions using LO_REGS may be smaller than
3918
+ * instructions using GENERIC_REGS.  By returning LO_REGS from
3919
+ * preferred_rename_class, code size can be reduced.
3920
+ */
3921
+// #undef TARGET_PREFERRED_RENAME_CLASS
3922
+// #define     TARGET_PREFERRED_RENAME_CLASS(RCLASS)   RCLASS
3923
+
3924
+/* TARGET_PREFERRED_RELOAD_CLASS(X,RC) ... A target hook that places additional
3925
+ * restri tions on the register class to use when it is necessary to copy value
3926
+ * X into a register in class RC.  The value is a register class; rehaps RC, or
3927
+ * perhaps a smaller class.
3928
+ *
3929
+ * The default fversion of this hook always returns value of RC argument, which
3930
+ * sounds quite appropriate for the ZipCPU.
3931
+ */
3932
+
3933
+/* PREFERRED_RELOAD_CLASS(X,CLASS) ... A C expression that places additional
3934
+ * restrictions on the register class to use when it is necessary to copy
3935
+ * value X into a register in class CLASS.  On many machines, the following
3936
+ * definition is safe: PREFERRED_RELOAD_CLASS(X,CLASS) (CLASS)
3937
+ * Sometimes returning a more restrictive class makes better code.  For example,
3938
+ * on the 68k, when x is an integer constant that is in range for a moveq
3939
+ * instruction, the value of this macro is always DATA_REGS as long as CLASS
3940 111 dgisselq
+ * includes the data registers.  Requiring a data register guarantees that a
3941 102 dgisselq
+ * 'moveq' will be used.
3942
+ *
3943
+ * ZipCPU --- you can't load certain values into all members of ALL_REGS.  For
3944
+ * example, loading (sleep and !gie) into the CC register could halt the CPU.
3945
+ * Hence, we only allow loads into the GENERAL_REG class.
3946
+ */
3947
+#define        PREFERRED_RELOAD_CLASS(X, CLASS)        GENERAL_REGS
3948
+
3949
+/* TARGET_PREFERRED_OUTPUT_RELOAD_CLASS(RTX,RCLASS) ... Like TARGET_PREFERRED_..
3950
+ * RELOAD_CLASS, but for output instead of input reloads.
3951
+ *
3952
+ * ZipCPU --- there's gotta be a valid default behaviour for this.
3953
+ */
3954
+
3955
+/* LIMIT_RELOAD_CLASS(MODE, CL) ...
3956
+ *
3957
+ * Don't define this macro unless the target machine has limitations which
3958
+ * require the macro to do something nontrivial.  ZipCPU doesn't, so we won't.
3959
+ */
3960
+
3961
+/* TARGET_SECONDARY_RELOAD
3962
+ * SECONDARY_ ...
3963
+ * Don't think we need these ...
3964
+ */
3965
+
3966
+/* CLASS_MAX_NREGS(CLASS,MODE) ... A C expression for the maximum number of
3967
+ * consecutive registers of class CLASS needed to hold a value of mode MODE.
3968
+ *
3969
+ * This is closely related to the macro HARD_REGNO_NREGS.  In fact, the value
3970
+ * of the macro CLASS_MAX_REGS(CL,M) should be the maximum value of
3971
+ * HARD_REGNO_NREGS(REGNO,MODE) for all REGNO values in the class CLASS.
3972
+ *
3973
+ * This macro helps control the handling of multiple word values in the reload
3974
+ * pass.
3975
+ *
3976
+ * ZipCPU --- We'll just use HARDNO_REGNO_NREGS, since CLASS is independent for
3977
+ * us.  We'll also choose register R0, since ... well, since it simply doesn't
3978
+ * matter.  (HARD_REGNO_NREGS ignores this anyway)
3979
+ */
3980
+#define        CLASS_MAX_NREGS(CLASS, MODE)    HARD_REGNO_NREGS(0,MODE)
3981
+
3982
+/* CANNOT_CHANGE_MODE_CLASS
3983
+ * ???
3984
+ */
3985
+
3986
+/* TARGET_IRA_CHANGE_PSEUDO_ALLOCNO_CLASS
3987
+ */
3988
+
3989
+/* TARRGET_LRA_P
3990
+ * Default looks good.
3991
+ */
3992
+
3993
+/* TARGET_REGISTER_PRIORITY(INT) ... A target hook which returns the register
3994 111 dgisselq
+ * priority number to which the register HARD_REGNO belongs to.  The bigger the
3995 102 dgisselq
+ * number
3996
+ *
3997
+ * The default version of this target hook returns always zero---good enough for
3998
+ * the ZipCPU.
3999
+ */
4000
+
4001
+/* TARGET_REGISTER_USAGE_LEVELING_P(VOID) ... A target hook which returns true
4002
+ * if we need register usage leveling.  That means if a few hard registers are
4003
+ * equally good for the assignment, we choose the least used hard register.  The
4004
+ * register usage leveling may be profitable for some targets.  Don't use usage
4005
+ * leveling for targets with conditional execution or targets with big register
4006
+ * files as it hurts if-conversion and cross-jumping optimizations.  The default
4007
+ * version of this target hook returns always false.
4008
+ *
4009
+ * ZipCPU --- Default is the right answer.
4010
+ */
4011
+
4012
+/* TARGET_DIFFERENT_ADDR_DISPLACEMENT_P ...
4013
+ * Default looks good.
4014
+ */
4015
+
4016
+/* TARGET_CANNOT_SUBSTITUTE_MEM_EQUIV_P ...
4017
+ * Default looks good.
4018
+ */
4019
+
4020
+/* TARGET_LEGITIMIZE_ADDRESS_DISPLACEMENT ....
4021
+ */
4022
+
4023
+/* TARGET_SPILL_CLASS
4024
+ *
4025
+ * ZipCPU --- If we were running in supervisor mode only, this might be the
4026
+ * user set of registers.  However, we're not building for that mode (now),
4027
+ * so we'll leave this at the default of NO_REGS.
4028
+ */
4029
+
4030
+/* TARGET_CSTORE_MODE(ICODE) ... Defines the machine mode to use for the
4031
+ * boolean result of conditional store patterns.  The OCIDE argument is the
4032
+ * instruction code for the cstore being performed.  Not defining this hook is
4033
+ * the same as accepting the mode encoded into operand 0 of the cstore expander
4034
+ * patterns.
4035
+ *
4036
+ * ??? ZipCPU --- I don't follow this documentation.  We'll leave this at the
4037
+ * default therefore.
4038
+ */
4039
+
4040
+/* 17.09 Stack Layout and Calling Conventions */
4041
+
4042
+
4043
+/* STACK_GROWS_DOWNWARD ... Define this macro if pushing a word onto the stack
4044
+ * moves the stack pointer to a smaller address, and false otherwise.
4045
+ *
4046
+ * ZipCPU ... well, our stack does grow downward, but it doesn't do so auto-
4047
+ * magically.  We have to move the stack pointer ourselves.  However, since this
4048
+ * is our convention, we'll define it as such.
4049
+ */
4050
+#undef STACK_GROWS_DOWNWARD
4051
+#define        STACK_GROWS_DOWNWARD    1
4052
+
4053
+/* STACK_PUSH_CODE ... This macro defines the operation used when something is
4054
+ * pushed on the stack.  In RTL, a push operation will be
4055
+ * (set (mem( STACK_PUSH_CODE(reg sp))) ...) The choiecs are PRE_DEC, POST_DEC,
4056
+ * PRE_INC, and POST_INC.  Which of these is correct depends on the stack
4057
+ * direction and on whether the stack pointer points to the last item on the
4058
+ * stack or whether it points to the space for the next item on the stack.
4059
+ * The default is PRE_DECC when STACK_GROWS_DOWNWARD is true, which is almost
4060
+ * always right, and PRE_INC otherwise, which is often wrong.
4061
+ *
4062
+ * ZipCPU --- None of these is right, so let's leave this at the default and
4063
+ * see how badly we get mangled.  In particular, ZipCPU doesn't have any of the
4064
+ * PRE_DEC, POST_DEC, PRE_INC, or POST_INC addressing modes used here.
4065
+ */
4066
+
4067
+/* FRAME_GROWS_DOWNWARD ... Define this macro to nonzero if the addresses of
4068
+ * local variable slots are at negative offsets from the frame pointer.
4069
+ *
4070
+ * ZipCPU --- If the frame pointer is defined as the stack pointer upon the
4071 103 dgisselq
+ * start of function execution, and that stack pointer grows downward, then
4072 102 dgisselq
+ * this should be the case as well.
4073
+ */
4074
+#undef FRAME_GROWS_DOWNWARD
4075
+#define        FRAME_GROWS_DOWNWARD    1
4076
+// #define     FRAME_GROWS_DOWNWARD    0        // This was ECO32's value
4077
+
4078
+
4079
+/* ARGS_GROW_DOWNWARD ... Define this macro if successive arguments to a
4080
+ * function occupy decreasing addresses on the stack.
4081
+ *
4082
+ * ZipCPU -- we can leave this up to the compiler's preferred implementation,
4083
+ * it is of no consequence to the hardware.
4084
+ */
4085
+
4086
+/* STARTING_FRAME_OFFSET ... Offset from the frame pointer to the first local
4087
+ * variable slot to be allocated.  If FRAME_GROWS_DOWNWARD, find the next slot's
4088
+ * offset by subtracting the firstt slot's length from STARTING_FRAME_OFFSET.
4089
+ * Otherwise it is found by adding the length of the first slot to the value
4090
+ * START_FRAME_OFFSET.
4091
+ *
4092
+ * ZipCPU --- I'm not certain on this, let's come back after we look at how
4093
+ * the code is getting generated.  However, the ECO32 code I am copying from
4094
+ * suggests that 0 is the right value, so we'll use that here.
4095
+ */
4096
+// #warning "Re-evaluate me"
4097
+#define        STARTING_FRAME_OFFSET   0
4098
+
4099
+/* STACK_ALIGNMENT_NEEDED ... Define to zero to disable final alignment of the
4100
+ * stack during reload.  The nonzero default for this macro is suitable for most
4101
+ * ports.
4102
+ *
4103
+ * ZipCPU --- we'll leave this at the default, although if any alignment code
4104
+ * shows up on the stack we may need to adjust it.
4105
+ */
4106
+
4107
+/* STACK_POINTER_OFFSET ... Offset from the SP register to the first location at
4108
+ * which outgoing arguments are placed.  If not specified, the default value
4109
+ * of zero is used.  This is the proper value for most machines.
4110
+ */
4111
+#define        STACK_POINTER_OFFSET    0
4112
+
4113
+/* FIRST_PARM_OFFSET ... Offset from the argument pointer register to the first
4114
+ * argument's address.  On some machines it may depend on the data type of the
4115
+ * function.
4116
+ */
4117
+#define        FIRST_PARM_OFFSET(F)    0
4118
+
4119
+/* STACK_DYNAMIC_OFFSET(F) ... Offset from the stack pointer register to an item
4120
+ * dynamically allocated on the stack, e.g., by alloca.  The default value for
4121
+ * this macro is STACK_POINTER_OFFSET plus the length of the outgoing arguments.
4122
+ * The default is correct for most machines, ...
4123
+ *
4124
+ * ZipCPU --- so we'll use it for the ZipCPU.
4125
+ */
4126
+
4127
+/* INITIAL_FRAME_ADDRESS_RTX ... A C expression whose value is RTL representing
4128
+ * the address of the initial stack frame.  This address is passed to
4129
+ * RETURN_ADDR_RTX and DYNAMIC_CHAIN_ADDRESS.  If you don't define this macro,
4130
+ * a reasonable default value will be used.  Define this macro in order to make
4131
+ * frame pointer elimination work in the presence of __builtin_frame_address(C)
4132
+ * and __builtin_return_address(C) for (C) not equal to zero.
4133
+ *
4134
+ * ZipCPU --- Let's try the reasonable default and see what happens.
4135
+ */
4136
+
4137
+/* SETUP_FRAME_ADDRESSES ... A C expression that produces the machine-specific
4138
+ * code to setup the stack so that arbitrary frames can be accessed.  For
4139
+ * example, on the SPARC, we must flush all of the register windows to the stack
4140
+ * before we can access arbitrary stack frames.  You will seldom need to define
4141
+ * this macro.  The default is to do nothing.
4142
+ *
4143
+ * ZipCPU --- which is what we shall do here.
4144
+ */
4145
+
4146
+/* TARGET_BUILTIN_SETJMP_FRAME_VALUE(VOID) ... This target hook should return
4147
+ * an RTX that is used to store the address of the current frame into the
4148
+ * builtin setjmp buffer.  The default value, virtual_stack_vars_rtx, is correct
4149
+ * for most machines.  One reason you may need to define this target hook is if
4150
+ * hard_frame_pointer_rtx is the appropriate value on your machine.
4151
+ *
4152
+ * ZipCPU --- leave this undefined, since the default value should be correct
4153
+ * for "most" machines.
4154
+ */
4155
+
4156
+/* FRAME_ADDR_RTX ... most machines do not need to define it.
4157
+ */
4158
+
4159
+/* RETURN_ADDR_RTX(COUNT,FRAMEADDR) ... A C expression whose value is RTL
4160
+ * representing the value of the return address for the frame COUNT steps up
4161
+ * from the current frame, after the prologue.  FRAMEADDR is the frame pointer
4162
+ * of the COUNT frame, or the frame pointer of the COUNT-1 frame if
4163
+ * RETURN_ADDR_IN_PREVIOUS_FRAME is nonzero.  The value of the expression must
4164
+ * always be the correct address when COUNT is nonzero, but may be NULL_RTX if
4165
+ * there is no way to determine the return address of other frames.
4166
+ *
4167
+ * ZipCPU --- I have no idea how we'd do this, so let's just return NULL_RTX.
4168
+ */
4169
+#undef RETURN_ADDR_RTX
4170
+#define        RETURN_ADDR_RTX(COUNT,FRAMEADDR)        NULL_RTX
4171
+
4172
+/* RETURN_ADDR_IN_PREVIOUS_FRAME ... Define this macro to nonzero value if the
4173
+ * return address of a particular stack frame is accessed from the frame pointer
4174
+ * of the previous stack frame.  The zero default for this macro is suitable
4175
+ * for most ports.
4176
+ *
4177
+ * ZipCPU---Default works here as well.
4178
+ */
4179
+
4180
+/* INCOMING_RETURN_ADDR_RTX ... A C expression whose value is RTL representing
4181
+ * the location of the incoming return address at the beginning of any function,
4182
+ * before the prologue.  This RTL is either a REG, indicating that the return
4183
+ * value is saved in 'REG', or a MEM representing the location in the stack.
4184
+ * If this RTL is a REG, you should define DWARF_RETURN_COLUMN to
4185
+ * DWARF_FRAME_REGNUM(REGNO).
4186
+ *
4187
+ * ZipCPU --- While our incoming return address could theoretically be in any
4188
+ * register, our machine description file is going to place it into register
4189
+ * R0, so that's what we return here.
4190
+ */
4191
+#undef INCOMING_RETURN_ADDR_RTX
4192
+#define        INCOMING_RETURN_ADDR_RTX        gen_rtx_REG(SImode, zip_R0)
4193
+
4194
+
4195
+/* DWARF_ALT_FRAME_RETURN_COLUMN
4196
+ */
4197
+
4198
+/* DWARF_ZERO_REG ... A C exrpession whose value is an integer giving a DWARF2
4199
+ * register number that is considered to always have the value zero.  This
4200
+ * should only be defined if the target has an architected zero register (ZipCPU
4201
+ * does not), and someone decided it was a good idea to use that register number
4202
+ * to terminate the stack backtrace.  New ports should avoid this (so the
4203
+ * ZipCPU port will avoid it as well).
4204
+ *
4205
+ */
4206
+
4207
+/* TARGET_DWARF_HANDLE_FRAME_UNSPEC
4208
+ */
4209
+
4210
+/* INCOMING_FRAME_SP_OFFSET
4211
+ */
4212
+#define        INCOMING_FRAME_SP_OFFSET        0
4213
+
4214
+/* ARG_POINTER_CFA_OFFSET
4215
+ */
4216
+
4217
+/* FRAME_POINTER_CFA_OFFSET
4218
+ */
4219
+
4220
+/* CFA_FRAME_BASE_OFFSET
4221
+ */
4222
+
4223
+/* 17.09.02 Exception handling support */
4224
+
4225
+/* EH_RETURN_DATA_REGNO(N) ... A C expression whose value is the Nth register
4226
+ * number used for data by exception handlers, or INVALID_REGNUM if fewer than
4227
+ * N registers are usable.  The exception handling library routines communicate
4228
+ * with the exception handlers via a set of agreed upon registers.  Ideally
4229
+ * these registers should be call clobbered; it is possible to use call-saved
4230
+ * registers, but may negatively impact code size.  The target must support at
4231
+ * least 2 data registers, but should define 4 if their are enough free
4232
+ * registers.
4233
+ *
4234
+ * You must define this macro if you want to support call frame exception
4235
+ * handling like that provided by DWARF 2.
4236
+ */
4237
+#define        EH_RETURN_DATA_REGNO(N) (((N<ZIP_FIRST_ARG_REGNO)||(N>ZIP_LAST_ARG_REGNO))?(N-1):INVALID_REGNUM)
4238
+
4239
+/* EH_RETURN_STACKADJ_RTX ... A C expression whose value is RTL representing
4240
+ * a location in which to store a stack adjustment to be applied before function
4241
+ * return.  This is used to unwind the stack to an exception handler's call
4242
+ * frame.  It will be assigned zero on code paths that return normally.
4243
+ *
4244
+ * Do not define this macro if the stack pointer is saved and restored by the
4245
+ * regular prolog and epilog code in the call frame itself (which it is for the
4246
+ * ZipCPU); in this case, the exception handling library routines will update
4247
+ * the stack location to be restored in place.  Otherwise, you must define this
4248
+ * macro if you want to support call frame exception handling like that provided
4249
+ * by DWARF 2.
4250
+ *
4251
+ */
4252
+
4253
+/* EH_RETURN_HANDLER_RTX ... A C expression whose value is RTL representing a
4254
+ * location in which to store the address of an exception handler to which we
4255
+ * should return.  It will not be assigned on code paths that return normally.
4256
+ *
4257
+ * Typcally this is the location in the call frame at which the normal return
4258
+ * address is stored.  For targets that return by popping an address of the
4259
+ * stack, this might be a memory address just below the target callf rame
4260
+ * rather than inside the current call frame.  If defined,
4261
+ * EH_RETURN_STACKADJ_RTX will have already been assigned, so it may be used
4262
+ * to calculate the location of the target call frame.
4263
+ *
4264
+ * If you want to support call frame exception handling, you must define either
4265
+ * this macro or the eh_return instruction pattern.
4266
+ */
4267
+// #warning "I don't know what to do here."
4268
+
4269
+/*
4270
+ *
4271
+ *
4272
+ *
4273
+ *   REST OF SECTION SKIPPED ...
4274
+ *
4275
+ *
4276
+ *
4277
+ */
4278
+
4279
+/* 17.09.03 Specifying how stack checking is done */
4280
+
4281
+/* STACK_CHECK_BUILTIN ... a non-zero value if stack checking is done by the
4282
+ * configuration files in a machine-dependent manner.  You should define this
4283
+ * macro if stack checking is required by the ABI of your machine or if you
4284
+ * would like to do stack checking in some more efficient way than the generic
4285
+ * appraoch.  The default value of this macro is zero.
4286
+ *
4287
+ * ZipCPU --- The default makes sense for us.
4288
+ */
4289
+// #define STACK_CHECK_BUILTIN 0
4290
+
4291
+/* STACK_CHECK_STATIC_BUILTIN ... A nonzero value if static stack checking is
4292
+ * done by the configuration files in a machine-dependent manner.  You should
4293
+ * define this macro if you would like to do static stack checking in some more
4294
+ * efficient way than the generic approach.  The default value of this macro
4295
+ * is zero.
4296
+ *
4297
+ * ZipCPU --- The default makes sense for us.
4298
+ */
4299
+
4300
+/* STACK_CHECK_PROBE_INTERVAL_EXP ...  An integer specifying the interval at
4301
+ * which GCC must generate stack probe instructions, defined as 2 raised to this
4302
+ * interval.  You will normally define this macro so that the interval is no
4303
+ * larger than the size of the "guard pages" at the end of a stack area.  The
4304
+ * default value of 12 (4096-byte interval) is suitable for most systems.
4305
+ *
4306
+ * ZipCPU --- Default.
4307
+ */
4308
+
4309
+/* STACK_CHECK_MOVING_SP ... An integer which is non-zero if GCC should move
4310
+ * the stack pointer page by page when doing probes.  This can be necessary
4311
+ * on systems where the stack pointer contains the bottom address of the memory
4312
+ * area accessible to the executing thread at any point in time.  In this
4313
+ * situation, an alternate signal stack is required in order to be able to
4314
+ * recover from a stack overflow.  The default value of this macro is zero.
4315
+ *
4316
+ * ZipCPU -- Default.
4317
+ */
4318
+
4319
+/* STACK_CHECK_PROTECT
4320
+ */
4321
+/* STACK_CHECK_MAX_FRAME_SIZE
4322
+ * ... you should normally not change the default value of this macro.
4323
+ */
4324
+/* STACK_CHECK_FIXED_FRAME_SIZE
4325
+ * ... you ... will normally use the default of four words.
4326
+ */
4327
+
4328
+/* STACK_CHECK_MAX_VAR_SIZE
4329
+ * ... you will normally not need to override that default.
4330
+ */
4331
+
4332
+/* 17.09.04 Registers that Address the Stack Frame*/
4333
+
4334
+/* STACK_POINTER_REGNUM ... The register number of the stack pointer register,
4335
+ * which must also be a fixed register according to FIXED_REGISTERS.  On most
4336
+ * machines, the hardware determines which register this is.
4337
+ */
4338
+#undef STACK_POINTER_REGNUM
4339
+#define        STACK_POINTER_REGNUM    zip_SP
4340
+
4341
+/* FRAME_POINTER_REGNUM ... The register number of the frame pointer register,
4342
+ * which is used to access certain automatic variables in the stack frame.  On
4343
+ * some machines, the hardware determines which register this is.  On other
4344
+ * machines you can choose any register you wish for this purpose.
4345
+ *
4346
+ * ZipCPU --- While I'd like to dump this pointer, since I don't really see
4347
+ * a need for it, alloca() requires it.  Therefore let's assine a register to
4348
+ * this purpose and watch what the compiler does with it.
4349
+ */
4350 103 dgisselq
+#ifdef zip_FP_PSEUDO
4351
+#define        FRAME_POINTER_REGNUM    zip_FP_PSEUDO
4352
+#else
4353 102 dgisselq
+#define        FRAME_POINTER_REGNUM    zip_FP
4354 103 dgisselq
+#endif
4355 102 dgisselq
+
4356
+/* HARD_FRAME_POINTER_REGNUM ... On some machines the offset between the frame
4357
+ * pointer and starting offset of the automatic variables is not known until
4358
+ * after register allocation has been done (for example, because the saved
4359
+ * registers are between these two locations).  On those machines, define
4360
+ * FRAME_POINTER_REGNUM the number of a special, fixed register to be used
4361
+ * internally until the offset is known, and define HARD_FRAME_POINTER_REGNUM
4362
+ * to be the actual hard register number used for the frame pointer.
4363
+ *
4364
+ * Do not define this macro if it would be the same as FRAME_POINTER_REGNUM
4365
+ *
4366
+ * ZipCPU --- we do not define this macro.
4367
+ */
4368 103 dgisselq
+#if (zip_FP == FRAME_POINTER_REGNUM)
4369
+#define HARD_FRAME_POINTER_REGNUM      zip_FP
4370
+#endif
4371 102 dgisselq
+
4372
+/* ARG_POINTER_REGNUM ... The register number of the arg pointer register, which
4373
+ * is used to access the function's argument list.  On some machines, this is
4374
+ * the same as the frame pointer register.  On some machines, the hardware
4375
+ * determines which register this is.  On other machines, you can choose any
4376
+ * register you wish for this purpose.  If this is not the same register as the
4377
+ * frame pointer register, then you must mark it as a fixed register according
4378
+ * to FIXED_REGISTERs, or arrange to be able to eliminate it.
4379
+ *
4380
+ * ZipCPU --- We really don't want to lose another register to something
4381
+ * pointless, so let's set this to be the frame pointer register.  Especially
4382
+ * given the ZipCPU's ease of accessing things via offsets of registers, this
4383
+ * should work for a rather large stack frame.
4384
+ */
4385 103 dgisselq
+#define ARG_POINTER_REGNUM     FRAME_POINTER_REGNUM
4386 102 dgisselq
+
4387
+/* HARD_FRAME_POINTER_IS_FRAME_POINTER ... define this to be a preprocessor
4388
+ * constant that is nonzero if hard_frame_pointer_rtx and frame_pointer_rtx
4389
+ * should be the same.  The default definition is sufficient for us.
4390
+ */
4391
+
4392
+/* HARD_FRAME_POINTER_IS_ARG_POINTER ...
4393
+ * ZipCPU doesn't need this macro
4394
+ */
4395
+
4396
+/* RETURN_ADDRESS_POINTER_REGNUM ... The register number of the return address
4397
+ * pointer register, which is used to access the current function's return
4398
+ * address from the stack.  On some machines, the return address is not at a
4399
+ * fixed offset from the frame pointer or stack pointer or argument pointer.
4400
+ * This register can be defined to point to the return address on the stack, and
4401
+ * then to be converted by ELIMINABLE_REGS into either the frame pointer or the
4402
+ * stack pointer.
4403
+ *
4404
+ * Do not define this macro unless there is no other way to get the return
4405
+ * address from the stack.
4406
+ *
4407
+ * ZipCPU---we need this.
4408
+ */
4409
+#define        RETURN_ADDRESS_REGNUM   zip_R0
4410
+
4411
+
4412
+/* STATIC_CHAIN_REGNUM ... Register numbers used for passing a function's
4413
+ * static chain pointer.  If register windows are used, the register number as
4414
+ * seen by the called function is STATIC_CHAIN_INCOMING_REGNUM, while the
4415
+ * register number as seen by the calling function is STATIC_CHAIN_REGNUM.  If
4416
+ * these register are the same, STATIC_CHAIN_INCOMING_REGNUM need not be
4417
+ * defined.
4418
+ *
4419
+ * ZipCPU doesn't have register windows, so we don't need to define this.
4420
+ */
4421
+// #warning "I have no reason to believe this will even work"
4422
+#define        STATIC_CHAIN_REGNUM     zip_GOT
4423
+
4424
+/* TARGET_STATIC_CHAIN ... This hook replaces the use of STATIC_CHAIN_REGNUM et
4425
+ * al for targets that may use different static chain locations for different
4426
+ * nested functions.  This may be required if the target has function attributes
4427
+ * that affect the calling conventions of the function and those calling
4428
+ * conventions use different static chain locations.
4429
+ *
4430
+ * ZipCPU --- don't need this.
4431
+ */
4432
+// #define     STATIC_CHAIN_REGNUM     zip_R11
4433
+
4434
+
4435
+/* DWARF_FRAME_REGISTERS ... This macro specifies  the maximum number of hard
4436
+ * registers that can be saved in a call frame.  This is used to size data
4437
+ * structures used in DWARF2 exception handling.
4438
+ *
4439
+ * Prior to GCC 3.0, this macro was needed in order to establish a stable
4440
+ * exception handling ABI in the face of adding new hard registers for ISA
4441
+ * extensions.  In GCC 3.0 and later, the EH ABI is insulated from changes in
4442
+ * the number of hard registers.  Nevertheless, this macro can still be used to
4443
+ * reduce the runtime memory requirements of the exception handling routines,
4444
+ * which can be substantial if the ISA contains a lot of registers that are not
4445
+ * call-saved.
4446
+ *
4447
+ * If this macro is not defined, it defaults to FIRST_PSEUDO_REGISTER.
4448
+ *
4449
+ * ZipCPU --- The default is not sufficient.  The CC and PC registers need to
4450
+ * be saved and examined as well in any debug/exception context.  Hence, we
4451
+ * define this to be all of our registers.
4452
+ */
4453
+#undef DWARF_FRAME_REGISTERS
4454
+#define        DWARF_FRAME_REGISTERS   16
4455
+
4456
+/* PRE_GCC3_DWARF_FRAME_REGISTERS ... This macro is similar to DWARF_FRAME_REG..
4457
+ * but is provided for backward compatibility in pre GCC 3.0 compiled code.
4458
+ *
4459
+ * If not defined, it defaults to DWARF_FRAME_REGISTERS---which is perfect for
4460
+ * the ZipCPU.
4461
+ */
4462
+
4463
+/* DWARF_REG_TO_UNWIND_COLUMN(REGNO) ... Define this macro if the target's
4464
+ * representation for dwarf registers is different than the internal
4465
+ * representation for unwind column.  Given a dwarf register, this macro should
4466
+ * return the unwind column number to use instead.
4467
+ *
4468
+ * ... ???
4469
+ */
4470
+
4471
+/* DWARF_FRAME_REGNUM(REGNO) ... Define this macro is the target's
4472
+ * representation for dwarf registers used in .eh_frame or .debug_frame is
4473
+ * different from that used in other debug info sections.  Given a GCC hard
4474
+ * register number, this macro should return the .eh_frame register number.
4475
+ * The default is DBX_REGISTER_NUMBER(REGNO).
4476
+ *
4477
+ * ZipCPU --- provided we define DBX_REGISTER_NUMBER(REGNO) well, this default
4478
+ * should still work for us.
4479
+ */
4480
+
4481
+/* DWARF2_FRAME_REG_OUT(REGNO, FOR_EH) ... Define this macro to map register
4482
+ * numbers held in the call frame info that GCC has collected using
4483
+ * DWARF_FRAME_REGNO to those that should be output in .debug_frame (for_eh is
4484
+ * zero) and .eh_frame (for_eh is non-zero). The default is to return REGNO.
4485
+ *
4486
+ * ZipCPU --- Default is good enough.
4487
+ */
4488
+
4489
+/* REG_VALUE_IN_UNWIND_CONTEXT ... Define this macro if the target stores
4490
+ * register values as _Unwind_Word type in unwind context.  It should be defined
4491
+ * if target register size is larger than the size of void *.  The default
4492
+ * is to store register values as void *type.
4493
+ *
4494
+ * ZipCPU --- Default is what we need.
4495
+ */
4496
+
4497
+/* ASSUME_EXTENDED_UNWIND_CONTEXT ... Define this macro to be 1 if the target
4498
+ * always uses extended unwind context with version, args_size, and by_value
4499
+ * fields.  If it is undefined, it will always be defined to 1 when REG_VALUE_IN_UNWIND_CONTEXT is defined and 0 otherwise.
4500
+ *
4501
+ */
4502
+
4503
+
4504
+/* 17.09.05 Eliminating Frame Pointer and Arg Pointer */
4505
+
4506
+/* TARGET_FRAME_POINTER_REQUIRED(VOID) ... This target hook should return true
4507
+ * if a function must have and use a frame pointer.  This target hook is
4508
+ * called in the reload pass.  If its return value is true, the function will
4509
+ * have a frame pointer.
4510
+ *
4511
+ * This target hook can in principle examine the current function and decide
4512
+ * according to the facts, but on most machines the constant false or the
4513
+ * constant true suffices.  Use false when the machine allows code to be
4514
+ * generated with no frame pointer, and doing so saves some time or space.
4515
+ * Use true when there is no possible advantage to avoiding a frame pointer.
4516
+ *
4517
+ * ZipCPU---if we add in a frame pointer, we become register starved.  Hence,
4518
+ * we'll treat this as a constant false--which is also the default value.
4519
+ */
4520
+#define        target_frame_pointer_required   zip_frame_pointer_required
4521
+
4522
+/* INITIAL_FRAME_POINTER_OFFSET ... A C statement to store in the variable
4523
+ * depth-var the difference between the frame pointer and the stack pointer
4524
+ * values immediately after the function prologue.  The value would be computed
4525
+ * from information such as the result of get_frame_size() and the tables of
4526
+ * registers regs_ever_live and call_used_regs.
4527
+ *
4528
+ * If ELIMINABLE_REGS is defined, this macro will not be used and need not be
4529
+ * defined.  Otherwise, it must be defined even if TARGET_FRAME_POINTER_REQD
4530
+ * always returns true; in that case you may set depth-var to anything.
4531
+ *
4532
+ * ZipCPU --- we intend to set ELIMINABLE_REGS, so this is not necessary.
4533
+ */
4534
+// #define     INITIAL_FRAME_POINTER_OFFSET(DEPTH)     (DEPTH) = 0
4535
+
4536
+
4537
+/* ELIMINABLE_REGS ... If defined, this macro specifies a table of register
4538
+ * pairs used to eliminate unneeded registers that point into the stack frame.
4539
+ * If it is not defined, the only elimination attempted by the compiler is to
4540
+ * replace references to the frame pointer with references to the stack pointer.
4541
+ *
4542
+ * On some machines, the position of the argument pointer is not known until
4543
+ * the compilation is completed.  In such a case, a separate hard register
4544
+ * must be used for the argument pointer.  This register can be eliminated by
4545
+ * replacing it with either the frame pointer or the argument pointer,
4546
+ * depending on whether or not the frame pointer has been eliminated.
4547
+ *
4548
+ * ZipCPU we'll take their suggestion and define this as:
4549
+ */
4550
+#undef ELIMINABLE_REGS
4551 103 dgisselq
+#ifdef zip_FP_PSEUDO
4552 102 dgisselq
+#define        ELIMINABLE_REGS \
4553 103 dgisselq
+        {{ ARG_POINTER_REGNUM, STACK_POINTER_REGNUM},          \
4554
+         { ARG_POINTER_REGNUM, HARD_FRAME_POINTER_REGNUM},     \
4555
+         { FRAME_POINTER_REGNUM, STACK_POINTER_REGNUM},        \
4556
+         { FRAME_POINTER_REGNUM, HARD_FRAME_POINTER_REGNUM}}
4557
+#else
4558
+# if (ARG_POINTER_REGNUM == FRAME_POINTER_REGNUM)
4559
+#  define      ELIMINABLE_REGS \
4560
+        {{ FRAME_POINTER_REGNUM, STACK_POINTER_REGNUM}}
4561
+# else
4562
+#  define      ELIMINABLE_REGS \