OpenCores
URL https://opencores.org/ocsvn/zipcpu/zipcpu/trunk

Subversion Repositories zipcpu

[/] [zipcpu/] [trunk/] [sw/] [gcc-zippatch.patch] - Blame information for rev 146

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Line No. Rev Author Line
1 102 dgisselq
diff -Naur '--exclude=*.swp' gcc-5.3.0-original/config.sub gcc-5.3.0-zip/config.sub
2
--- gcc-5.3.0-original/config.sub       2015-01-02 04:30:21.000000000 -0500
3
+++ gcc-5.3.0-zip/config.sub    2016-01-30 12:27:56.023073747 -0500
4
@@ -316,7 +316,7 @@
5
        | visium \
6
        | we32k \
7
        | x86 | xc16x | xstormy16 | xtensa \
8
-       | z8k | z80)
9
+       | z8k | z80 | zip)
10
                basic_machine=$basic_machine-unknown
11
                ;;
12
        c54x)
13
@@ -1547,6 +1547,9 @@
14
 # system, and we'll never get to this point.
15
 
16
 case $basic_machine in
17
+       zip-*)
18
+               os=-elf
19
+               ;;
20
        score-*)
21
                os=-elf
22
                ;;
23
diff -Naur '--exclude=*.swp' gcc-5.3.0-original/configure gcc-5.3.0-zip/configure
24
--- gcc-5.3.0-original/configure        2015-05-03 13:29:57.000000000 -0400
25
+++ gcc-5.3.0-zip/configure     2016-01-30 16:19:48.264867231 -0500
26
@@ -3927,6 +3927,8 @@
27
   vax-*-*)
28
     noconfigdirs="$noconfigdirs target-newlib target-libgloss"
29
     ;;
30
+  zip*)
31
+    noconfigdirs="$noconfigdirs target-libffi target-boehm-gc gdb gprof"
32
 esac
33
 
34
 # If we aren't building newlib, then don't build libgloss, since libgloss
35
diff -Naur '--exclude=*.swp' gcc-5.3.0-original/configure.ac gcc-5.3.0-zip/configure.ac
36
--- gcc-5.3.0-original/configure.ac     2015-05-03 13:29:57.000000000 -0400
37
+++ gcc-5.3.0-zip/configure.ac  2016-02-12 10:47:23.847194843 -0500
38
@@ -1274,6 +1274,10 @@
39
   vax-*-*)
40
     noconfigdirs="$noconfigdirs target-newlib target-libgloss"
41
     ;;
42
+  zip*)
43
+    noconfigdirs="$noconfigdirs target-libffi target-boehm-gc gdb gprof"
44
+    unsupported_languages="$unsupported_languages fortran java"
45
+    ;;
46
 esac
47
 
48
 # If we aren't building newlib, then don't build libgloss, since libgloss
49 117 dgisselq
diff -Naur '--exclude=*.swp' gcc-5.3.0-original/gcc/cfgexpand.c gcc-5.3.0-zip/gcc/cfgexpand.c
50
--- gcc-5.3.0-original/gcc/cfgexpand.c  2015-07-23 06:39:26.000000000 -0400
51
+++ gcc-5.3.0-zip/gcc/cfgexpand.c       2016-04-01 06:40:17.288326711 -0400
52
@@ -108,6 +108,14 @@
53
 #include "tree-chkp.h"
54
 #include "rtl-chkp.h"
55
 
56
+#ifdef DO_ZIP_DEBUGS
57
+#include <stdio.h>
58
+#define ZIP_DEBUG_LINE(STR,RTX) do{fprintf(stderr,"%s:%d/%s\n",__FILE__,__LINE__,STR); zip_debug_rtx(RTX);} while(0)
59
+extern void    zip_debug_rtx(const_rtx);
60
+#else
61
+#define        ZIP_DEBUG_LINE(STR,RTX)
62
+#endif
63
+
64
 /* Some systems use __main in a way incompatible with its use in gcc, in these
65
    cases use the macros NAME__MAIN to give a quoted symbol and SYMBOL__MAIN to
66
    give the same symbol without quotes for an alternative entry point.  You
67 111 dgisselq
diff -Naur '--exclude=*.swp' gcc-5.3.0-original/gcc/cgraphbuild.c gcc-5.3.0-zip/gcc/cgraphbuild.c
68
--- gcc-5.3.0-original/gcc/cgraphbuild.c        2015-01-09 15:18:42.000000000 -0500
69
+++ gcc-5.3.0-zip/gcc/cgraphbuild.c     2016-03-24 22:13:24.815287808 -0400
70
@@ -62,6 +62,13 @@
71
 #include "ipa-prop.h"
72
 #include "ipa-inline.h"
73
 
74
+#ifdef DO_ZIP_DEBUGS
75
+extern void zip_debug_rtx(const_rtx);
76
+#define        ZIP_DEBUG_LINE(STR,RTX) do { fprintf(stderr, "%s:%d/%s\n", __FILE__,__LINE__,STR); zip_debug_rtx(RTX); } while(0)
77
+#else
78
+#define        ZIP_DEBUG_LINE(STR,RTX)
79
+#endif
80
+
81
 /* Context of record_reference.  */
82
 struct record_reference_ctx
83
 {
84 102 dgisselq
diff -Naur '--exclude=*.swp' gcc-5.3.0-original/gcc/common/config/zip/zip-common.c gcc-5.3.0-zip/gcc/common/config/zip/zip-common.c
85
--- gcc-5.3.0-original/gcc/common/config/zip/zip-common.c       1969-12-31 19:00:00.000000000 -0500
86
+++ gcc-5.3.0-zip/gcc/common/config/zip/zip-common.c    2016-02-14 00:54:31.821055716 -0500
87
@@ -0,0 +1,52 @@
88
+////////////////////////////////////////////////////////////////////////////////
89
+//
90
+// Filename:   common/config/zip/zip-common.c
91
+//
92
+// Project:    Zip CPU backend for the GNU Compiler Collection
93
+//
94
+// Purpose:    To eliminate the frame register automatically.
95
+//
96
+// Creator:    Dan Gisselquist, Ph.D.
97
+//             Gisselquist Technology, LLC
98
+//
99
+////////////////////////////////////////////////////////////////////////////////
100
+//
101
+// Copyright (C) 2016, Gisselquist Technology, LLC
102
+//
103
+// This program is free software (firmware): you can redistribute it and/or
104
+// modify it under the terms of  the GNU General Public License as published
105
+// by the Free Software Foundation, either version 3 of the License, or (at
106
+// your option) any later version.
107
+//
108
+// This program is distributed in the hope that it will be useful, but WITHOUT
109
+// ANY WARRANTY; without even the implied warranty of MERCHANTIBILITY or
110
+// FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
111
+// for more details.
112
+//
113
+// You should have received a copy of the GNU General Public License along
114
+// with this program.  (It's in the $(ROOT)/doc directory, run make with no
115
+// target there if the PDF file isn't present.)  If not, see
116
+// <http://www.gnu.org/licenses/> for a copy.
117
+//
118
+// License:    GPL, v3, as defined and found on www.gnu.org,
119
+//             http://www.gnu.org/licenses/gpl.html
120
+//
121
+//
122
+////////////////////////////////////////////////////////////////////////////////
123
+#include "config.h"
124
+#include "system.h"
125
+#include "coretypes.h"
126
+#include "tm.h"
127
+#include "common/common-target.h"
128
+#include "common/common-target-def.h"
129
+
130
+static const struct default_options zip_option_optimization_table[] =
131
+  {
132
+    { OPT_LEVELS_1_PLUS, OPT_fomit_frame_pointer, NULL, 1 },
133
+    { OPT_LEVELS_NONE, 0, NULL, 0 }
134
+  };
135
+
136
+#undef TARGET_OPTION_OPTIMIZATION_TABLE
137
+#define        TARGET_OPTION_OPTIMIZATION_TABLE        zip_option_optimization_table
138
+
139
+struct gcc_targetm_common      targetm_common = TARGETM_COMMON_INITIALIZER;
140
diff -Naur '--exclude=*.swp' gcc-5.3.0-original/gcc/config/aarch64/aarch64-linux.h gcc-5.3.0-zip/gcc/config/aarch64/aarch64-linux.h
141 146 dgisselq
--- gcc-5.3.0-original/gcc/config/aarch64/aarch64-linux.h       2016-05-12 21:52:06.137764804 -0400
142 102 dgisselq
+++ gcc-5.3.0-zip/gcc/config/aarch64/aarch64-linux.h    2015-07-24 12:00:26.000000000 -0400
143
@@ -21,7 +21,7 @@
144
 #ifndef GCC_AARCH64_LINUX_H
145
 #define GCC_AARCH64_LINUX_H
146
 
147
-#define GLIBC_DYNAMIC_LINKER "/tools/lib/ld-linux-aarch64%{mbig-endian:_be}%{mabi=ilp32:_ilp32}.so.1"
148
+#define GLIBC_DYNAMIC_LINKER "/lib/ld-linux-aarch64%{mbig-endian:_be}%{mabi=ilp32:_ilp32}.so.1"
149
 
150
 #undef  ASAN_CC1_SPEC
151
 #define ASAN_CC1_SPEC "%{%:sanitize(address):-funwind-tables}"
152
diff -Naur '--exclude=*.swp' gcc-5.3.0-original/gcc/config/alpha/linux-elf.h gcc-5.3.0-zip/gcc/config/alpha/linux-elf.h
153 146 dgisselq
--- gcc-5.3.0-original/gcc/config/alpha/linux-elf.h     2016-05-12 21:52:06.141764778 -0400
154 102 dgisselq
+++ gcc-5.3.0-zip/gcc/config/alpha/linux-elf.h  2015-01-05 07:33:28.000000000 -0500
155
@@ -23,8 +23,8 @@
156
 #define EXTRA_SPECS \
157
 { "elf_dynamic_linker", ELF_DYNAMIC_LINKER },
158
 
159
-#define GLIBC_DYNAMIC_LINKER   "/tools/lib/ld-linux.so.2"
160
-#define UCLIBC_DYNAMIC_LINKER "/tools/lib/ld-uClibc.so.0"
161
+#define GLIBC_DYNAMIC_LINKER   "/lib/ld-linux.so.2"
162
+#define UCLIBC_DYNAMIC_LINKER "/lib/ld-uClibc.so.0"
163
 #if DEFAULT_LIBC == LIBC_UCLIBC
164
 #define CHOOSE_DYNAMIC_LINKER(G, U) "%{mglibc:" G ";:" U "}"
165
 #elif DEFAULT_LIBC == LIBC_GLIBC
166
diff -Naur '--exclude=*.swp' gcc-5.3.0-original/gcc/config/arm/linux-eabi.h gcc-5.3.0-zip/gcc/config/arm/linux-eabi.h
167 146 dgisselq
--- gcc-5.3.0-original/gcc/config/arm/linux-eabi.h      2016-05-12 21:52:06.141764778 -0400
168 102 dgisselq
+++ gcc-5.3.0-zip/gcc/config/arm/linux-eabi.h   2015-01-05 07:33:28.000000000 -0500
169
@@ -68,8 +68,8 @@
170
    GLIBC_DYNAMIC_LINKER_DEFAULT and TARGET_DEFAULT_FLOAT_ABI.  */
171
 
172
 #undef  GLIBC_DYNAMIC_LINKER
173
-#define GLIBC_DYNAMIC_LINKER_SOFT_FLOAT "/tools/lib/ld-linux.so.3"
174
-#define GLIBC_DYNAMIC_LINKER_HARD_FLOAT "/tools/lib/ld-linux-armhf.so.3"
175
+#define GLIBC_DYNAMIC_LINKER_SOFT_FLOAT "/lib/ld-linux.so.3"
176
+#define GLIBC_DYNAMIC_LINKER_HARD_FLOAT "/lib/ld-linux-armhf.so.3"
177
 #define GLIBC_DYNAMIC_LINKER_DEFAULT GLIBC_DYNAMIC_LINKER_SOFT_FLOAT
178
 
179
 #define GLIBC_DYNAMIC_LINKER \
180
diff -Naur '--exclude=*.swp' gcc-5.3.0-original/gcc/config/arm/linux-elf.h gcc-5.3.0-zip/gcc/config/arm/linux-elf.h
181 146 dgisselq
--- gcc-5.3.0-original/gcc/config/arm/linux-elf.h       2016-05-12 21:52:06.141764778 -0400
182 102 dgisselq
+++ gcc-5.3.0-zip/gcc/config/arm/linux-elf.h    2015-06-23 05:26:54.000000000 -0400
183
@@ -62,7 +62,7 @@
184
 
185
 #define LIBGCC_SPEC "%{mfloat-abi=soft*:-lfloat} -lgcc"
186
 
187
-#define GLIBC_DYNAMIC_LINKER "/tools/lib/ld-linux.so.2"
188
+#define GLIBC_DYNAMIC_LINKER "/lib/ld-linux.so.2"
189
 
190
 #define LINUX_TARGET_LINK_SPEC  "%{h*} \
191
    %{static:-Bstatic} \
192
diff -Naur '--exclude=*.swp' gcc-5.3.0-original/gcc/config/bfin/linux.h gcc-5.3.0-zip/gcc/config/bfin/linux.h
193 146 dgisselq
--- gcc-5.3.0-original/gcc/config/bfin/linux.h  2016-05-12 21:52:06.141764778 -0400
194 102 dgisselq
+++ gcc-5.3.0-zip/gcc/config/bfin/linux.h       2015-01-05 07:33:28.000000000 -0500
195
@@ -45,7 +45,7 @@
196
   %{shared:-G -Bdynamic} \
197
   %{!shared: %{!static: \
198
    %{rdynamic:-export-dynamic} \
199
-   -dynamic-linker /tools/lib/ld-uClibc.so.0} \
200
+   -dynamic-linker /lib/ld-uClibc.so.0} \
201
    %{static}} -init __init -fini __fini"
202
 
203
 #undef TARGET_SUPPORTS_SYNC_CALLS
204
diff -Naur '--exclude=*.swp' gcc-5.3.0-original/gcc/config/cris/linux.h gcc-5.3.0-zip/gcc/config/cris/linux.h
205 146 dgisselq
--- gcc-5.3.0-original/gcc/config/cris/linux.h  2016-05-12 21:52:06.141764778 -0400
206 102 dgisselq
+++ gcc-5.3.0-zip/gcc/config/cris/linux.h       2015-01-05 07:33:28.000000000 -0500
207
@@ -102,7 +102,7 @@
208
 #undef CRIS_DEFAULT_CPU_VERSION
209
 #define CRIS_DEFAULT_CPU_VERSION CRIS_CPU_NG
210
 
211
-#define GLIBC_DYNAMIC_LINKER "/tools/lib/ld.so.1"
212
+#define GLIBC_DYNAMIC_LINKER "/lib/ld.so.1"
213
 
214
 #undef CRIS_LINK_SUBTARGET_SPEC
215
 #define CRIS_LINK_SUBTARGET_SPEC \
216
diff -Naur '--exclude=*.swp' gcc-5.3.0-original/gcc/config/freebsd-spec.h gcc-5.3.0-zip/gcc/config/freebsd-spec.h
217 146 dgisselq
--- gcc-5.3.0-original/gcc/config/freebsd-spec.h        2016-05-12 21:52:06.141764778 -0400
218 102 dgisselq
+++ gcc-5.3.0-zip/gcc/config/freebsd-spec.h     2015-06-25 13:53:14.000000000 -0400
219
@@ -129,9 +129,9 @@
220
 #endif
221
 
222
 #if FBSD_MAJOR < 6
223
-#define FBSD_DYNAMIC_LINKER "/tools/libexec/ld-elf.so.1"
224
+#define FBSD_DYNAMIC_LINKER "/usr/libexec/ld-elf.so.1"
225
 #else
226
-#define FBSD_DYNAMIC_LINKER "/tools/libexec/ld-elf.so.1"
227
+#define FBSD_DYNAMIC_LINKER "/libexec/ld-elf.so.1"
228
 #endif
229
 
230
 /* NOTE: The freebsd-spec.h header is included also for various
231
diff -Naur '--exclude=*.swp' gcc-5.3.0-original/gcc/config/frv/linux.h gcc-5.3.0-zip/gcc/config/frv/linux.h
232 146 dgisselq
--- gcc-5.3.0-original/gcc/config/frv/linux.h   2016-05-12 21:52:06.141764778 -0400
233 102 dgisselq
+++ gcc-5.3.0-zip/gcc/config/frv/linux.h        2015-01-05 07:33:28.000000000 -0500
234
@@ -34,7 +34,7 @@
235
 #define ENDFILE_SPEC \
236
   "%{shared|pie:crtendS.o%s;:crtend.o%s} crtn.o%s"
237
 
238
-#define GLIBC_DYNAMIC_LINKER "/tools/lib/ld.so.1"
239
+#define GLIBC_DYNAMIC_LINKER "/lib/ld.so.1"
240
 
241
 #undef LINK_SPEC
242
 #define LINK_SPEC "\
243
diff -Naur '--exclude=*.swp' gcc-5.3.0-original/gcc/config/i386/gnu.h gcc-5.3.0-zip/gcc/config/i386/gnu.h
244 146 dgisselq
--- gcc-5.3.0-original/gcc/config/i386/gnu.h    2016-05-12 21:52:06.141764778 -0400
245 102 dgisselq
+++ gcc-5.3.0-zip/gcc/config/i386/gnu.h 2015-01-05 07:33:28.000000000 -0500
246
@@ -22,7 +22,7 @@
247
 #define GNU_USER_LINK_EMULATION "elf_i386"
248
 
249
 #undef GNU_USER_DYNAMIC_LINKER
250
-#define GNU_USER_DYNAMIC_LINKER "/tools/lib/ld.so"
251
+#define GNU_USER_DYNAMIC_LINKER "/lib/ld.so"
252
 
253
 #undef STARTFILE_SPEC
254
 #if defined HAVE_LD_PIE
255
diff -Naur '--exclude=*.swp' gcc-5.3.0-original/gcc/config/i386/kfreebsd-gnu64.h gcc-5.3.0-zip/gcc/config/i386/kfreebsd-gnu64.h
256 146 dgisselq
--- gcc-5.3.0-original/gcc/config/i386/kfreebsd-gnu64.h 2016-05-12 21:52:06.141764778 -0400
257 102 dgisselq
+++ gcc-5.3.0-zip/gcc/config/i386/kfreebsd-gnu64.h      2015-01-05 07:33:28.000000000 -0500
258
@@ -22,6 +22,6 @@
259
 #define GNU_USER_LINK_EMULATION64 "elf_x86_64_fbsd"
260
 #define GNU_USER_LINK_EMULATIONX32 "elf32_x86_64_fbsd"
261
 
262
-#define GLIBC_DYNAMIC_LINKER32 "/tools/lib/ld.so.1"
263
-#define GLIBC_DYNAMIC_LINKER64 "/tools/lib/ld-kfreebsd-x86-64.so.1"
264
-#define GLIBC_DYNAMIC_LINKERX32 "/tools/lib/ld-kfreebsd-x32.so.1"
265
+#define GLIBC_DYNAMIC_LINKER32 "/lib/ld.so.1"
266
+#define GLIBC_DYNAMIC_LINKER64 "/lib/ld-kfreebsd-x86-64.so.1"
267
+#define GLIBC_DYNAMIC_LINKERX32 "/lib/ld-kfreebsd-x32.so.1"
268
diff -Naur '--exclude=*.swp' gcc-5.3.0-original/gcc/config/i386/kfreebsd-gnu.h gcc-5.3.0-zip/gcc/config/i386/kfreebsd-gnu.h
269 146 dgisselq
--- gcc-5.3.0-original/gcc/config/i386/kfreebsd-gnu.h   2016-05-12 21:52:06.141764778 -0400
270 102 dgisselq
+++ gcc-5.3.0-zip/gcc/config/i386/kfreebsd-gnu.h        2015-01-05 07:33:28.000000000 -0500
271
@@ -19,4 +19,4 @@
272
 <http://www.gnu.org/licenses/>.  */
273
 
274
 #define GNU_USER_LINK_EMULATION "elf_i386_fbsd"
275
-#define GLIBC_DYNAMIC_LINKER "/tools/lib/ld.so.1"
276
+#define GLIBC_DYNAMIC_LINKER "/lib/ld.so.1"
277
diff -Naur '--exclude=*.swp' gcc-5.3.0-original/gcc/config/i386/linux64.h gcc-5.3.0-zip/gcc/config/i386/linux64.h
278 146 dgisselq
--- gcc-5.3.0-original/gcc/config/i386/linux64.h        2016-05-12 21:52:06.141764778 -0400
279 102 dgisselq
+++ gcc-5.3.0-zip/gcc/config/i386/linux64.h     2015-01-05 07:33:28.000000000 -0500
280
@@ -27,6 +27,6 @@
281
 #define GNU_USER_LINK_EMULATION64 "elf_x86_64"
282
 #define GNU_USER_LINK_EMULATIONX32 "elf32_x86_64"
283
 
284
-#define GLIBC_DYNAMIC_LINKER32 "/tools/lib/ld-linux.so.2"
285
-#define GLIBC_DYNAMIC_LINKER64 "/tools/lib64/ld-linux-x86-64.so.2"
286
-#define GLIBC_DYNAMIC_LINKERX32 "/tools/libx32/ld-linux-x32.so.2"
287
+#define GLIBC_DYNAMIC_LINKER32 "/lib/ld-linux.so.2"
288
+#define GLIBC_DYNAMIC_LINKER64 "/lib64/ld-linux-x86-64.so.2"
289
+#define GLIBC_DYNAMIC_LINKERX32 "/libx32/ld-linux-x32.so.2"
290
diff -Naur '--exclude=*.swp' gcc-5.3.0-original/gcc/config/i386/linux.h gcc-5.3.0-zip/gcc/config/i386/linux.h
291 146 dgisselq
--- gcc-5.3.0-original/gcc/config/i386/linux.h  2016-05-12 21:52:06.141764778 -0400
292 102 dgisselq
+++ gcc-5.3.0-zip/gcc/config/i386/linux.h       2015-01-05 07:33:28.000000000 -0500
293
@@ -20,4 +20,4 @@
294
 <http://www.gnu.org/licenses/>.  */
295
 
296
 #define GNU_USER_LINK_EMULATION "elf_i386"
297
-#define GLIBC_DYNAMIC_LINKER "/tools/lib/ld-linux.so.2"
298
+#define GLIBC_DYNAMIC_LINKER "/lib/ld-linux.so.2"
299
diff -Naur '--exclude=*.swp' gcc-5.3.0-original/gcc/config/ia64/linux.h gcc-5.3.0-zip/gcc/config/ia64/linux.h
300 146 dgisselq
--- gcc-5.3.0-original/gcc/config/ia64/linux.h  2016-05-12 21:52:06.141764778 -0400
301 102 dgisselq
+++ gcc-5.3.0-zip/gcc/config/ia64/linux.h       2015-01-05 07:33:28.000000000 -0500
302
@@ -55,7 +55,7 @@
303
 /* Define this for shared library support because it isn't in the main
304
    linux.h file.  */
305
 
306
-#define GLIBC_DYNAMIC_LINKER "/tools/lib/ld-linux-ia64.so.2"
307
+#define GLIBC_DYNAMIC_LINKER "/lib/ld-linux-ia64.so.2"
308
 
309
 #undef LINK_SPEC
310
 #define LINK_SPEC "\
311
diff -Naur '--exclude=*.swp' gcc-5.3.0-original/gcc/config/knetbsd-gnu.h gcc-5.3.0-zip/gcc/config/knetbsd-gnu.h
312 146 dgisselq
--- gcc-5.3.0-original/gcc/config/knetbsd-gnu.h 2016-05-12 21:52:06.141764778 -0400
313 102 dgisselq
+++ gcc-5.3.0-zip/gcc/config/knetbsd-gnu.h      2015-01-05 07:33:28.000000000 -0500
314
@@ -32,4 +32,4 @@
315
 
316
 
317
 #undef GNU_USER_DYNAMIC_LINKER
318
-#define GNU_USER_DYNAMIC_LINKER "/tools/lib/ld.so.1"
319
+#define GNU_USER_DYNAMIC_LINKER "/lib/ld.so.1"
320
diff -Naur '--exclude=*.swp' gcc-5.3.0-original/gcc/config/kopensolaris-gnu.h gcc-5.3.0-zip/gcc/config/kopensolaris-gnu.h
321 146 dgisselq
--- gcc-5.3.0-original/gcc/config/kopensolaris-gnu.h    2016-05-12 21:52:06.141764778 -0400
322 102 dgisselq
+++ gcc-5.3.0-zip/gcc/config/kopensolaris-gnu.h 2015-01-05 07:33:28.000000000 -0500
323
@@ -31,5 +31,4 @@
324
   while (0)
325
 
326
 #undef GNU_USER_DYNAMIC_LINKER
327
-#define GNU_USER_DYNAMIC_LINKER "/tools/lib/ld.so.1"
328
-
329
+#define GNU_USER_DYNAMIC_LINKER "/lib/ld.so.1"
330
diff -Naur '--exclude=*.swp' gcc-5.3.0-original/gcc/config/linux.h gcc-5.3.0-zip/gcc/config/linux.h
331 146 dgisselq
--- gcc-5.3.0-original/gcc/config/linux.h       2016-05-12 21:52:06.141764778 -0400
332 102 dgisselq
+++ gcc-5.3.0-zip/gcc/config/linux.h    2015-01-05 07:33:28.000000000 -0500
333
@@ -73,10 +73,10 @@
334
    GLIBC_DYNAMIC_LINKER must be defined for each target using them, or
335
    GLIBC_DYNAMIC_LINKER32 and GLIBC_DYNAMIC_LINKER64 for targets
336
    supporting both 32-bit and 64-bit compilation.  */
337
-#define UCLIBC_DYNAMIC_LINKER "/tools/lib/ld-uClibc.so.0"
338
-#define UCLIBC_DYNAMIC_LINKER32 "/tools/lib/ld-uClibc.so.0"
339
-#define UCLIBC_DYNAMIC_LINKER64 "/tools/lib/ld64-uClibc.so.0"
340
-#define UCLIBC_DYNAMIC_LINKERX32 "/tools/lib/ldx32-uClibc.so.0"
341
+#define UCLIBC_DYNAMIC_LINKER "/lib/ld-uClibc.so.0"
342
+#define UCLIBC_DYNAMIC_LINKER32 "/lib/ld-uClibc.so.0"
343
+#define UCLIBC_DYNAMIC_LINKER64 "/lib/ld64-uClibc.so.0"
344
+#define UCLIBC_DYNAMIC_LINKERX32 "/lib/ldx32-uClibc.so.0"
345
 #define BIONIC_DYNAMIC_LINKER "/system/bin/linker"
346
 #define BIONIC_DYNAMIC_LINKER32 "/system/bin/linker"
347
 #define BIONIC_DYNAMIC_LINKER64 "/system/bin/linker64"
348
diff -Naur '--exclude=*.swp' gcc-5.3.0-original/gcc/config/lm32/uclinux-elf.h gcc-5.3.0-zip/gcc/config/lm32/uclinux-elf.h
349 146 dgisselq
--- gcc-5.3.0-original/gcc/config/lm32/uclinux-elf.h    2016-05-12 21:52:06.141764778 -0400
350 102 dgisselq
+++ gcc-5.3.0-zip/gcc/config/lm32/uclinux-elf.h 2015-01-05 07:33:28.000000000 -0500
351
@@ -67,7 +67,7 @@
352
    %{shared:-shared} \
353
    %{symbolic:-Bsymbolic} \
354
    %{rdynamic:-export-dynamic} \
355
-   -dynamic-linker /tools/lib/ld-linux.so.2"
356
+   -dynamic-linker /lib/ld-linux.so.2"
357
 
358
 #define TARGET_OS_CPP_BUILTINS() GNU_USER_TARGET_OS_CPP_BUILTINS()
359
 
360
diff -Naur '--exclude=*.swp' gcc-5.3.0-original/gcc/config/m68k/linux.h gcc-5.3.0-zip/gcc/config/m68k/linux.h
361 146 dgisselq
--- gcc-5.3.0-original/gcc/config/m68k/linux.h  2016-05-12 21:52:06.141764778 -0400
362 102 dgisselq
+++ gcc-5.3.0-zip/gcc/config/m68k/linux.h       2015-01-05 07:33:28.000000000 -0500
363
@@ -71,7 +71,7 @@
364
    When the -shared link option is used a final link is not being
365
    done.  */
366
 
367
-#define GLIBC_DYNAMIC_LINKER "/tools/lib/ld.so.1"
368
+#define GLIBC_DYNAMIC_LINKER "/lib/ld.so.1"
369
 
370
 #undef LINK_SPEC
371
 #define LINK_SPEC "-m m68kelf %{shared} \
372
diff -Naur '--exclude=*.swp' gcc-5.3.0-original/gcc/config/microblaze/linux.h gcc-5.3.0-zip/gcc/config/microblaze/linux.h
373 146 dgisselq
--- gcc-5.3.0-original/gcc/config/microblaze/linux.h    2016-05-12 21:52:06.141764778 -0400
374 102 dgisselq
+++ gcc-5.3.0-zip/gcc/config/microblaze/linux.h 2015-05-28 10:08:19.000000000 -0400
375
@@ -28,7 +28,7 @@
376
 #undef TLS_NEEDS_GOT
377
 #define TLS_NEEDS_GOT 1
378
 
379
-#define DYNAMIC_LINKER "/tools/lib/ld.so.1"
380
+#define DYNAMIC_LINKER "/lib/ld.so.1"
381
 #undef  SUBTARGET_EXTRA_SPECS
382
 #define SUBTARGET_EXTRA_SPECS \
383
   { "dynamic_linker", DYNAMIC_LINKER }
384
diff -Naur '--exclude=*.swp' gcc-5.3.0-original/gcc/config/mips/linux.h gcc-5.3.0-zip/gcc/config/mips/linux.h
385 146 dgisselq
--- gcc-5.3.0-original/gcc/config/mips/linux.h  2016-05-12 21:52:06.141764778 -0400
386 102 dgisselq
+++ gcc-5.3.0-zip/gcc/config/mips/linux.h       2015-01-05 07:33:28.000000000 -0500
387
@@ -22,20 +22,20 @@
388
 #define GNU_USER_LINK_EMULATIONN32 "elf32%{EB:b}%{EL:l}tsmipn32"
389
 
390
 #define GLIBC_DYNAMIC_LINKER32 \
391
-  "%{mnan=2008:/tools/lib/ld-linux-mipsn8.so.1;:/tools/lib/ld.so.1}"
392
+  "%{mnan=2008:/lib/ld-linux-mipsn8.so.1;:/lib/ld.so.1}"
393
 #define GLIBC_DYNAMIC_LINKER64 \
394
-  "%{mnan=2008:/tools/lib64/ld-linux-mipsn8.so.1;:/tools/lib64/ld.so.1}"
395
+  "%{mnan=2008:/lib64/ld-linux-mipsn8.so.1;:/lib64/ld.so.1}"
396
 #define GLIBC_DYNAMIC_LINKERN32 \
397
-  "%{mnan=2008:/tools/lib32/ld-linux-mipsn8.so.1;:/tools/lib32/ld.so.1}"
398
+  "%{mnan=2008:/lib32/ld-linux-mipsn8.so.1;:/lib32/ld.so.1}"
399
 
400
 #undef UCLIBC_DYNAMIC_LINKER32
401
 #define UCLIBC_DYNAMIC_LINKER32 \
402
-  "%{mnan=2008:/tools/lib/ld-uClibc-mipsn8.so.0;:/tools/lib/ld-uClibc.so.0}"
403
+  "%{mnan=2008:/lib/ld-uClibc-mipsn8.so.0;:/lib/ld-uClibc.so.0}"
404
 #undef UCLIBC_DYNAMIC_LINKER64
405
 #define UCLIBC_DYNAMIC_LINKER64 \
406
-  "%{mnan=2008:/tools/lib/ld64-uClibc-mipsn8.so.0;:/tools/lib/ld64-uClibc.so.0}"
407
+  "%{mnan=2008:/lib/ld64-uClibc-mipsn8.so.0;:/lib/ld64-uClibc.so.0}"
408
 #define UCLIBC_DYNAMIC_LINKERN32 \
409
-  "%{mnan=2008:/tools/lib32/ld-uClibc-mipsn8.so.0;:/tools/lib32/ld-uClibc.so.0}"
410
+  "%{mnan=2008:/lib32/ld-uClibc-mipsn8.so.0;:/lib32/ld-uClibc.so.0}"
411
 
412
 #define BIONIC_DYNAMIC_LINKERN32 "/system/bin/linker32"
413
 #define GNU_USER_DYNAMIC_LINKERN32 \
414
diff -Naur '--exclude=*.swp' gcc-5.3.0-original/gcc/config/mn10300/linux.h gcc-5.3.0-zip/gcc/config/mn10300/linux.h
415 146 dgisselq
--- gcc-5.3.0-original/gcc/config/mn10300/linux.h       2016-05-12 21:52:06.141764778 -0400
416 102 dgisselq
+++ gcc-5.3.0-zip/gcc/config/mn10300/linux.h    2015-01-05 07:33:28.000000000 -0500
417
@@ -32,7 +32,7 @@
418
 #undef  ASM_SPEC
419
 #define ASM_SPEC ""
420
 
421
-#define GLIBC_DYNAMIC_LINKER "/tools/lib/ld.so.1"
422
+#define GLIBC_DYNAMIC_LINKER "/lib/ld.so.1"
423
 
424
 #undef  LINK_SPEC
425
 #define LINK_SPEC "%{mrelax:--relax} %{shared:-shared} \
426
diff -Naur '--exclude=*.swp' gcc-5.3.0-original/gcc/config/pa/pa-linux.h gcc-5.3.0-zip/gcc/config/pa/pa-linux.h
427 146 dgisselq
--- gcc-5.3.0-original/gcc/config/pa/pa-linux.h 2016-05-12 21:52:06.141764778 -0400
428 102 dgisselq
+++ gcc-5.3.0-zip/gcc/config/pa/pa-linux.h      2015-09-24 20:04:26.000000000 -0400
429
@@ -37,7 +37,7 @@
430
 /* Define this for shared library support because it isn't in the main
431
    linux.h file.  */
432
 
433
-#define GLIBC_DYNAMIC_LINKER "/tools/lib/ld.so.1"
434
+#define GLIBC_DYNAMIC_LINKER "/lib/ld.so.1"
435
 
436
 #undef LINK_SPEC
437
 #define LINK_SPEC "\
438
diff -Naur '--exclude=*.swp' gcc-5.3.0-original/gcc/config/rs6000/linux64.h gcc-5.3.0-zip/gcc/config/rs6000/linux64.h
439 146 dgisselq
--- gcc-5.3.0-original/gcc/config/rs6000/linux64.h      2016-05-12 21:52:06.141764778 -0400
440 102 dgisselq
+++ gcc-5.3.0-zip/gcc/config/rs6000/linux64.h   2015-03-09 19:18:57.000000000 -0400
441
@@ -357,14 +357,14 @@
442
 #undef LINK_OS_DEFAULT_SPEC
443
 #define LINK_OS_DEFAULT_SPEC "%(link_os_linux)"
444
 
445
-#define GLIBC_DYNAMIC_LINKER32 "/tools/lib/ld.so.1"
446
+#define GLIBC_DYNAMIC_LINKER32 "/lib/ld.so.1"
447
 #ifdef LINUX64_DEFAULT_ABI_ELFv2
448
-#define GLIBC_DYNAMIC_LINKER64 "%{mabi=elfv1:/tools/lib64/ld64.so.1;:/tools/lib64/ld64.so.2}"
449
+#define GLIBC_DYNAMIC_LINKER64 "%{mabi=elfv1:/lib64/ld64.so.1;:/lib64/ld64.so.2}"
450
 #else
451
-#define GLIBC_DYNAMIC_LINKER64 "%{mabi=elfv2:/tools/lib64/ld64.so.2;:/tools/lib64/ld64.so.1}"
452
+#define GLIBC_DYNAMIC_LINKER64 "%{mabi=elfv2:/lib64/ld64.so.2;:/lib64/ld64.so.1}"
453
 #endif
454
-#define UCLIBC_DYNAMIC_LINKER32 "/tools/lib/ld-uClibc.so.0"
455
-#define UCLIBC_DYNAMIC_LINKER64 "/tools/lib/ld64-uClibc.so.0"
456
+#define UCLIBC_DYNAMIC_LINKER32 "/lib/ld-uClibc.so.0"
457
+#define UCLIBC_DYNAMIC_LINKER64 "/lib/ld64-uClibc.so.0"
458
 #if DEFAULT_LIBC == LIBC_UCLIBC
459
 #define CHOOSE_DYNAMIC_LINKER(G, U) "%{mglibc:" G ";:" U "}"
460
 #elif DEFAULT_LIBC == LIBC_GLIBC
461
diff -Naur '--exclude=*.swp' gcc-5.3.0-original/gcc/config/rs6000/sysv4.h gcc-5.3.0-zip/gcc/config/rs6000/sysv4.h
462 146 dgisselq
--- gcc-5.3.0-original/gcc/config/rs6000/sysv4.h        2016-05-12 21:52:06.141764778 -0400
463 102 dgisselq
+++ gcc-5.3.0-zip/gcc/config/rs6000/sysv4.h     2015-09-24 09:46:45.000000000 -0400
464
@@ -757,8 +757,8 @@
465
 
466
 #define LINK_START_LINUX_SPEC ""
467
 
468
-#define GLIBC_DYNAMIC_LINKER "/tools/lib/ld.so.1"
469
-#define UCLIBC_DYNAMIC_LINKER "/tools/lib/ld-uClibc.so.0"
470
+#define GLIBC_DYNAMIC_LINKER "/lib/ld.so.1"
471
+#define UCLIBC_DYNAMIC_LINKER "/lib/ld-uClibc.so.0"
472
 #if DEFAULT_LIBC == LIBC_UCLIBC
473
 #define CHOOSE_DYNAMIC_LINKER(G, U) "%{mglibc:" G ";:" U "}"
474
 #elif !defined (DEFAULT_LIBC) || DEFAULT_LIBC == LIBC_GLIBC
475
diff -Naur '--exclude=*.swp' gcc-5.3.0-original/gcc/config/s390/linux.h gcc-5.3.0-zip/gcc/config/s390/linux.h
476 146 dgisselq
--- gcc-5.3.0-original/gcc/config/s390/linux.h  2016-05-12 21:52:06.141764778 -0400
477 102 dgisselq
+++ gcc-5.3.0-zip/gcc/config/s390/linux.h       2015-05-11 03:14:10.000000000 -0400
478
@@ -60,8 +60,8 @@
479
 #define MULTILIB_DEFAULTS { "m31" }
480
 #endif
481
 
482
-#define GLIBC_DYNAMIC_LINKER32 "/tools/lib/ld.so.1"
483
-#define GLIBC_DYNAMIC_LINKER64 "/tools/lib/ld64.so.1"
484
+#define GLIBC_DYNAMIC_LINKER32 "/lib/ld.so.1"
485
+#define GLIBC_DYNAMIC_LINKER64 "/lib/ld64.so.1"
486
 
487
 #undef  LINK_SPEC
488
 #define LINK_SPEC \
489
diff -Naur '--exclude=*.swp' gcc-5.3.0-original/gcc/config/sh/linux.h gcc-5.3.0-zip/gcc/config/sh/linux.h
490 146 dgisselq
--- gcc-5.3.0-original/gcc/config/sh/linux.h    2016-05-12 21:52:06.141764778 -0400
491 102 dgisselq
+++ gcc-5.3.0-zip/gcc/config/sh/linux.h 2015-01-05 07:33:28.000000000 -0500
492
@@ -43,7 +43,7 @@
493
 
494
 #define TARGET_ASM_FILE_END file_end_indicate_exec_stack
495
 
496
-#define GLIBC_DYNAMIC_LINKER "/tools/lib/ld-linux.so.2"
497
+#define GLIBC_DYNAMIC_LINKER "/lib/ld-linux.so.2"
498
 
499
 #undef SUBTARGET_LINK_EMUL_SUFFIX
500
 #define SUBTARGET_LINK_EMUL_SUFFIX "_linux"
501
diff -Naur '--exclude=*.swp' gcc-5.3.0-original/gcc/config/sparc/linux64.h gcc-5.3.0-zip/gcc/config/sparc/linux64.h
502 146 dgisselq
--- gcc-5.3.0-original/gcc/config/sparc/linux64.h       2016-05-12 21:52:06.141764778 -0400
503 102 dgisselq
+++ gcc-5.3.0-zip/gcc/config/sparc/linux64.h    2015-01-05 07:33:28.000000000 -0500
504
@@ -84,8 +84,8 @@
505
    When the -shared link option is used a final link is not being
506
    done.  */
507
 
508
-#define GLIBC_DYNAMIC_LINKER32 "/tools/lib/ld-linux.so.2"
509
-#define GLIBC_DYNAMIC_LINKER64 "/tools/lib64/ld-linux.so.2"
510
+#define GLIBC_DYNAMIC_LINKER32 "/lib/ld-linux.so.2"
511
+#define GLIBC_DYNAMIC_LINKER64 "/lib64/ld-linux.so.2"
512
 
513
 #ifdef SPARC_BI_ARCH
514
 
515
@@ -193,7 +193,7 @@
516
 #else /* !SPARC_BI_ARCH */
517
 
518
 #undef LINK_SPEC
519
-#define LINK_SPEC "-m elf64_sparc -Y P,%R/tools/lib64 %{shared:-shared} \
520
+#define LINK_SPEC "-m elf64_sparc -Y P,%R/usr/lib64 %{shared:-shared} \
521
   %{!shared: \
522
     %{!static: \
523
       %{rdynamic:-export-dynamic} \
524
diff -Naur '--exclude=*.swp' gcc-5.3.0-original/gcc/config/sparc/linux.h gcc-5.3.0-zip/gcc/config/sparc/linux.h
525 146 dgisselq
--- gcc-5.3.0-original/gcc/config/sparc/linux.h 2016-05-12 21:52:06.141764778 -0400
526 102 dgisselq
+++ gcc-5.3.0-zip/gcc/config/sparc/linux.h      2015-01-05 07:33:28.000000000 -0500
527
@@ -83,7 +83,7 @@
528
    When the -shared link option is used a final link is not being
529
    done.  */
530
 
531
-#define GLIBC_DYNAMIC_LINKER "/tools/lib/ld-linux.so.2"
532
+#define GLIBC_DYNAMIC_LINKER "/lib/ld-linux.so.2"
533
 
534
 #undef  LINK_SPEC
535
 #define LINK_SPEC "-m elf32_sparc %{shared:-shared} \
536
diff -Naur '--exclude=*.swp' gcc-5.3.0-original/gcc/config/vax/linux.h gcc-5.3.0-zip/gcc/config/vax/linux.h
537 146 dgisselq
--- gcc-5.3.0-original/gcc/config/vax/linux.h   2016-05-12 21:52:06.141764778 -0400
538 102 dgisselq
+++ gcc-5.3.0-zip/gcc/config/vax/linux.h        2015-01-05 07:33:28.000000000 -0500
539
@@ -41,7 +41,7 @@
540
   %{!shared: \
541
     %{!static: \
542
       %{rdynamic:-export-dynamic} \
543
-      -dynamic-linker /tools/lib/ld.so.1} \
544
+      -dynamic-linker /lib/ld.so.1} \
545
     %{static:-static}}"
546
 
547
 #undef  WCHAR_TYPE
548
diff -Naur '--exclude=*.swp' gcc-5.3.0-original/gcc/config/xtensa/linux.h gcc-5.3.0-zip/gcc/config/xtensa/linux.h
549 146 dgisselq
--- gcc-5.3.0-original/gcc/config/xtensa/linux.h        2016-05-12 21:52:06.141764778 -0400
550 102 dgisselq
+++ gcc-5.3.0-zip/gcc/config/xtensa/linux.h     2015-01-05 07:33:28.000000000 -0500
551
@@ -44,7 +44,7 @@
552
   %{mlongcalls:--longcalls} \
553
   %{mno-longcalls:--no-longcalls}"
554
 
555
-#define GLIBC_DYNAMIC_LINKER "/tools/lib/ld.so.1"
556
+#define GLIBC_DYNAMIC_LINKER "/lib/ld.so.1"
557
 
558
 #undef LINK_SPEC
559
 #define LINK_SPEC \
560
diff -Naur '--exclude=*.swp' gcc-5.3.0-original/gcc/config/zip/netbsd.h gcc-5.3.0-zip/gcc/config/zip/netbsd.h
561
--- gcc-5.3.0-original/gcc/config/zip/netbsd.h  1969-12-31 19:00:00.000000000 -0500
562
+++ gcc-5.3.0-zip/gcc/config/zip/netbsd.h       2016-01-30 15:04:14.796899050 -0500
563
@@ -0,0 +1,82 @@
564
+////////////////////////////////////////////////////////////////////////////////
565
+//
566
+// Filename:   netbsd.h
567
+//
568
+// Project:    Zip CPU backend for the GNU Compiler Collection
569
+//
570
+// Purpose:
571
+//
572
+// Creator:    Dan Gisselquist, Ph.D.
573
+//             Gisselquist Technology, LLC
574
+//
575
+////////////////////////////////////////////////////////////////////////////////
576
+//
577
+// Copyright (C) 2016, Gisselquist Technology, LLC
578
+//
579
+// This program is free software (firmware): you can redistribute it and/or
580
+// modify it under the terms of  the GNU General Public License as published
581
+// by the Free Software Foundation, either version 3 of the License, or (at
582
+// your option) any later version.
583
+//
584
+// This program is distributed in the hope that it will be useful, but WITHOUT
585
+// ANY WARRANTY; without even the implied warranty of MERCHANTIBILITY or
586
+// FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
587
+// for more details.
588
+//
589
+// You should have received a copy of the GNU General Public License along
590
+// with this program.  (It's in the $(ROOT)/doc directory, run make with no
591
+// target there if the PDF file isn't present.)  If not, see
592
+// <http://www.gnu.org/licenses/> for a copy.
593
+//
594
+// License:    GPL, v3, as defined and found on www.gnu.org,
595
+//             http://www.gnu.org/licenses/gpl.html
596
+//
597
+//
598
+////////////////////////////////////////////////////////////////////////////////
599
+#ifndef        ZIP_NETBSD_H
600
+#define        ZIP_NETBSD_H
601
+
602
+/* Define default target values. */
603
+
604
+#undef MACHINE_TYPE
605
+#define        MACHINE_TYPE    "NetBSD/Zip ELF"
606
+
607
+#undef TARGET_OS_CPP_BUILTINS
608
+#define        TARGET_OS_CPP_BUILTINS()        \
609
+       do { NETBSD_OS_CPP_BUILTINS_ELF();              \
610
+       builtin_define("__ZIPCPU__");                   \
611
+       builtin_assert("cpu=zip");                      \
612
+       builtin_assert("machine=zip");                  \
613
+       } while(0);
614
+
615
+#undef CPP_SPEC
616
+#define        CPP_SPEC        NETBSD_CPP_SPEC
617
+
618
+#undef STARTFILE_SPEC
619
+#define        STARTFILE_SPEC  NETBSD_STARTFILE_SPEC
620
+
621
+#undef ENDFILE_SPEC
622
+#define        ENDFILE_SPEC    NETBSD_ENDFILE_SPEC
623
+
624
+#undef LIB_SPEC
625
+#define        LIB_SPEC        NETBSD_LIB_SPEC
626
+
627
+#undef TARGET_VERSION
628
+#define        TARGET_VERSION  fprintf(stderr, " (%s)", MACHINE_TYPE);
629
+
630
+/* Make gcc agree with <machine/ansi.h> */
631
+
632
+#undef WCHAR_TYPE
633
+#define        WCHAR_TYPE      "int"
634
+
635
+#undef WCHAR_TYPE_SIZE
636
+#define        WCHAR_TYPE_SIZE 32
637
+
638
+#undef WINT_TYPE
639
+#define        WINT_TYPE       "int"
640
+
641
+/* Clean up after the generic Zip/ELF configuration. */
642
+#undef MD_EXEC_PREFIX
643
+#undef MD_STARTFILE_PREFIX
644
+
645
+#endif /* ZIP_NETBSD_H */
646
diff -Naur '--exclude=*.swp' gcc-5.3.0-original/gcc/config/zip/t-zip gcc-5.3.0-zip/gcc/config/zip/t-zip
647
--- gcc-5.3.0-original/gcc/config/zip/t-zip     1969-12-31 19:00:00.000000000 -0500
648
+++ gcc-5.3.0-zip/gcc/config/zip/t-zip  2016-02-04 19:00:59.939652587 -0500
649
@@ -0,0 +1,47 @@
650
+################################################################################
651
+##
652
+## Filename:   t-zip
653
+##
654
+## Project:    Zip CPU backend for the GNU Compiler Collection
655
+##
656
+## Purpose:
657
+##
658
+## Creator:    Dan Gisselquist, Ph.D.
659
+##             Gisselquist Technology, LLC
660
+##
661
+################################################################################
662
+##
663
+## Copyright (C) 2016, Gisselquist Technology, LLC
664
+##
665
+## This program is free software (firmware): you can redistribute it and/or
666
+## modify it under the terms of  the GNU General Public License as published
667
+## by the Free Software Foundation, either version 3 of the License, or (at
668
+## your option) any later version.
669
+##
670
+## This program is distributed in the hope that it will be useful, but WITHOUT
671
+## ANY WARRANTY; without even the implied warranty of MERCHANTIBILITY or
672
+## FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
673
+## for more details.
674
+##
675
+## You should have received a copy of the GNU General Public License along
676
+## with this program.  (It's in the $(ROOT)/doc directory, run make with no
677
+## target there if the PDF file isn't present.)  If not, see
678
+## <http://www.gnu.org/licenses/> for a copy.
679
+##
680
+## License:    GPL, v3, as defined and found on www.gnu.org,
681
+##             http://www.gnu.org/licenses/gpl.html
682
+##
683
+##
684
+################################################################################
685
+
686
+FPBIT = fp-bit.c
687
+DPBIT = dp-bit.c
688
+
689
+# dp-bit.c: $(srcdir)/config/fp-bit.c
690
+       # cat $(srcdir)/config/fp-bit.c > dp-bit.c
691
+#
692
+# fp-bit.c: $(srcdir)/config/fp-bit.c
693
+       # echo '#define FLOAT" > fp-bit.c
694
+       # cat $(srcdir)/config/fp-bit.c >> fp-bit.c
695
+
696
+
697
diff -Naur '--exclude=*.swp' gcc-5.3.0-original/gcc/config/zip/zip.c gcc-5.3.0-zip/gcc/config/zip/zip.c
698
--- gcc-5.3.0-original/gcc/config/zip/zip.c     1969-12-31 19:00:00.000000000 -0500
699 142 dgisselq
+++ gcc-5.3.0-zip/gcc/config/zip/zip.c  2016-05-09 11:40:35.637861735 -0400
700
@@ -0,0 +1,2286 @@
701 102 dgisselq
+////////////////////////////////////////////////////////////////////////////////
702
+//
703
+// Filename:   zip.c
704
+//
705
+// Project:    Zip CPU backend for the GNU Compiler Collection
706
+//
707
+// Purpose:
708
+//
709
+// Creator:    Dan Gisselquist, Ph.D.
710
+//             Gisselquist Technology, LLC
711
+//
712
+////////////////////////////////////////////////////////////////////////////////
713
+//
714
+// Copyright (C) 2016, Gisselquist Technology, LLC
715
+//
716
+// This program is free software (firmware): you can redistribute it and/or
717
+// modify it under the terms of  the GNU General Public License as published
718
+// by the Free Software Foundation, either version 3 of the License, or (at
719
+// your option) any later version.
720
+//
721
+// This program is distributed in the hope that it will be useful, but WITHOUT
722
+// ANY WARRANTY; without even the implied warranty of MERCHANTIBILITY or
723
+// FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
724
+// for more details.
725
+//
726
+// You should have received a copy of the GNU General Public License along
727
+// with this program.  (It's in the $(ROOT)/doc directory, run make with no
728
+// target there if the PDF file isn't present.)  If not, see
729
+// <http://www.gnu.org/licenses/> for a copy.
730
+//
731
+// License:    GPL, v3, as defined and found on www.gnu.org,
732
+//             http://www.gnu.org/licenses/gpl.html
733
+//
734
+//
735
+////////////////////////////////////////////////////////////////////////////////
736
+#include "config.h"
737
+#include "system.h"
738
+#include "coretypes.h"
739
+#include "tm.h"
740
+#include "rtl.h"
741
+#include "dominance.h"
742
+#include "cfg.h"
743
+#include "cfgrtl.h"
744
+#include "cfganal.h"
745
+#include "lcm.h"
746
+#include "cfgbuild.h"
747
+#include "cfgcleanup.h"
748
+#include "predict.h"
749
+#include "basic-block.h"
750
+#include "df.h"
751
+#include "hashtab.h"
752
+#include "hash-set.h"
753
+#include "machmode.h"
754
+#include "symtab.h"
755
+#include "rtlhash.h"
756
+#include "tree.h"
757
+#include "regs.h"
758
+#include "hard-reg-set.h"
759
+#include "real.h"
760
+#include "insn-config.h"
761
+#include "conditions.h"
762
+#include "output.h"
763
+#include "insn-attr.h"
764
+#include "flags.h"
765
+#include "expr.h"
766
+#include "function.h"
767
+#include "recog.h"
768
+#include "toplev.h"
769
+#include "ggc.h"
770
+#include "builtins.h"
771
+#include "calls.h"
772
+#include "langhooks.h"
773
+#include "optabs.h"
774
+#include "explow.h"
775
+#include "emit-rtl.h"
776 122 dgisselq
+#include "ifcvt.h"
777 102 dgisselq
+
778
+// #include "tmp_p.h"
779
+#include "target.h"
780
+#include "target-def.h"
781
+// #include "tm-constrs.h"
782 122 dgisselq
+#include "tm-preds.h"
783 102 dgisselq
+
784
+#include "diagnostic.h"
785
+// #include "integrate.h"
786
+
787
+// static int  zip_arg_partial_bytes(CUMULATIVE_ARGS *, enum machine_mode, tree, bool);
788
+// static      bool    zip_pass_by_reference(CUMULATIVE_ARGS *, enum machine_mode, const_tree, bool);
789
+static bool    zip_return_in_memory(const_tree, const_tree);
790
+static bool    zip_frame_pointer_required(void);
791
+
792
+static void zip_function_arg_advance(cumulative_args_t ca, enum machine_mode mode,
793
+               const_tree type, bool named);
794
+static rtx zip_function_arg(cumulative_args_t ca, enum machine_mode mode, const_tree type, bool named);
795
+
796
+static void    zip_asm_trampoline_template(FILE *);
797
+static void    zip_trampoline_init(rtx, tree, rtx);
798
+static void    zip_init_builtins(void);
799
+static tree zip_builtin_decl(unsigned, bool);
800
+// static void zip_asm_output_anchor(rtx x);
801
+       void    zip_asm_output_def(FILE *s, const char *n, const char *v);
802
+static rtx     zip_expand_builtin(tree exp, rtx target, rtx subtarget,
803
+                       enum machine_mode tmode, int    ignore);
804
+static bool    zip_scalar_mode_supported_p(enum machine_mode mode);
805
+static bool    zip_libgcc_floating_mode_supported_p(enum machine_mode mode);
806
+static int     zip_address_cost(rtx addr, enum machine_mode mode, addr_space_t as, bool spd);
807
+static bool    zip_mode_dependent_address_p(const_rtx addr, addr_space_t);
808
+static unsigned HOST_WIDE_INT  zip_const_anchor = 0x20000;
809 122 dgisselq
+static          HOST_WIDE_INT  zip_min_opb_imm = -0x20000;
810
+static          HOST_WIDE_INT  zip_max_opb_imm =  0x1ffff;
811 142 dgisselq
+static          HOST_WIDE_INT  zip_min_anchor_offset = -0x2000;
812
+static          HOST_WIDE_INT  zip_max_anchor_offset =  0x1fff;
813 102 dgisselq
+static          HOST_WIDE_INT  zip_min_mov_offset = -0x1000;
814
+static          HOST_WIDE_INT  zip_max_mov_offset =  0x0fff;
815
+static int     zip_sched_issue_rate(void) { return 1; }
816
+static bool    zip_legitimate_address_p(machine_mode, rtx, bool);
817
+static bool    zip_legitimate_move_operand_p(machine_mode, rtx, bool);
818
+       void    zip_debug_rtx_pfx(const char *, const_rtx x);
819
+       void    zip_debug_rtx(const_rtx x);
820
+static void    zip_override_options(void);
821
+static bool    zip_can_eliminate(int from ATTRIBUTE_UNUSED, int to);
822
+static int     zip_memory_move_cost(machine_mode, reg_class_t, bool);
823 111 dgisselq
+static rtx     zip_legitimize_address(rtx x, rtx oldx, machine_mode mode);
824 117 dgisselq
+static bool    zip_cannot_modify_jumps_p(void);
825 122 dgisselq
+#ifdef HAVE_cc0
826
+       void    zip_update_cc_notice(rtx exp, rtx_insn *insn);
827
+#error "We're not supposed to have CC0 anymore"
828
+#else
829
+static bool    zip_fixed_condition_code_regs(unsigned int *a, unsigned int *b);
830
+#endif
831 102 dgisselq
+
832
+
833 103 dgisselq
+#define        ALL_DEBUG_OFF   false
834 102 dgisselq
+#define        ALL_DEBUG_ON    false
835
+
836
+enum ZIP_BUILTIN_ID_CODE {
837
+       ZIP_BUILTIN_RTU,
838
+       ZIP_BUILTIN_HALT,
839
+       ZIP_BUILTIN_IDLE,
840
+       ZIP_BUILTIN_SYSCALL,
841
+       ZIP_BUILTIN_SAVE_CONTEXT,
842
+       ZIP_BUILTIN_RESTORE_CONTEXT,
843
+       ZIP_BUILTIN_BITREV,
844
+       ZIP_BUILTIN_CC,
845 117 dgisselq
+       ZIP_BUILTIN_UCC,
846 102 dgisselq
+       ZIP_BUILTIN_MAX
847
+};
848
+
849
+static GTY (()) tree   zip_builtins[(int)ZIP_BUILTIN_MAX];
850
+static enum insn_code  zip_builtins_icode[(int)ZIP_BUILTIN_MAX];
851
+
852
+
853
+#include "gt-zip.h"
854
+
855
+/* The Global 'targetm' Variable. */
856
+struct gcc_target      targetm = TARGET_INITIALIZER;
857
+
858
+
859
+enum   reg_class zip_reg_class(int);
860
+
861
+#define        LOSE_AND_RETURN(msgid, x)               \
862
+       do {                                    \
863
+               zip_operand_lossage(msgid, x);  \
864
+               return;                         \
865
+       } while(0)
866
+
867
+/* Per-function machine data. */
868
+struct GTY(()) machine_function
869
+{
870
+       /* number of pretented arguments for varargs */
871
+       int     pretend_size;
872
+
873
+       /* Number of bytes saved on the stack for local variables. */
874
+       int     local_vars_size;
875
+
876
+       /* Number of bytes saved on stack for register save area */
877
+       int     saved_reg_size;
878
+       int     save_ret;
879
+
880
+       int     sp_fp_offset;
881
+       bool    fp_needed;
882
+       int     size_for_adjusting_sp;
883
+};
884
+
885
+/* Allocate a chunk of memory for per-function machine-dependent data. */
886
+
887
+static struct machine_function *
888
+zip_init_machine_status(void) {
889
+       return ggc_cleared_alloc<machine_function>();
890
+}
891
+
892
+static void
893
+zip_override_options(void)
894
+{
895
+       init_machine_status = zip_init_machine_status;
896
+}
897
+
898
+enum   reg_class
899
+zip_reg_class(int regno)
900
+{
901
+       if (is_ZIP_GENERAL_REG(regno)) {
902
+               return GENERAL_REGS;
903
+       } else if (is_ZIP_REG(regno)) {
904
+               return ALL_REGS;
905
+       } return NO_REGS;
906
+}
907
+
908
+/* Worker function for TARGET_RETURN_IN_MEMORY. */
909
+static bool
910
+zip_return_in_memory(const_tree type, const_tree fntype ATTRIBUTE_UNUSED) {
911
+       const   HOST_WIDE_INT size = int_size_in_bytes(type);
912
+       return (size == -1)||(size > UNITS_PER_WORD);
913
+}
914
+
915
+/* Emit an error emssage when we're in an asm, and a fatal error for "normal"
916
+ * insn.  Formatted output isn't easily implemented, since we use output operand
917
+ * lossage to output the actual message and handle the categorization of the
918
+ * error.  */
919
+
920
+static void
921
+zip_operand_lossage(const char *msgid, rtx op) {
922
+       fprintf(stderr, "Operand lossage??\n");
923
+       debug_rtx(op);
924
+       zip_debug_rtx(op);
925
+       output_operand_lossage("%s", msgid);
926
+}
927
+
928
+/* The PRINT_OPERAND_ADDRESS worker.   */
929
+void
930
+zip_print_operand_address(FILE *file, rtx x) {
931
+       const bool      dbg = ((ALL_DEBUG_ON)||(false))&&(!ALL_DEBUG_OFF);
932
+
933
+       if (dbg) zip_debug_rtx(x);
934
+       switch(GET_CODE(x)) {
935
+               case REG:
936 127 dgisselq
+                       gcc_assert(is_ZIP_REG(REGNO(x)));
937 102 dgisselq
+                       fprintf(file, "(%s)", reg_names[REGNO(x)]);
938
+                       break;
939
+               case SYMBOL_REF:
940
+                       fprintf(file, "%s", XSTR(x,0));
941
+                       break;
942
+               case LABEL_REF:
943
+                       x = LABEL_REF_LABEL(x);
944
+               case CODE_LABEL:
945
+                       { char buf[256];
946
+                       ASM_GENERATE_INTERNAL_LABEL(buf, "L", CODE_LABEL_NUMBER(x));
947
+#ifdef ASM_OUTPUT_LABEL_REF
948
+                       ASM_OUTPUT_LABEL_REF(file, buf);
949
+#else
950
+                       assemble_name(file, buf);
951
+#endif
952
+                       }
953
+                       break;
954
+               case PLUS:
955 111 dgisselq
+                       if (!REG_P(XEXP(x, 0))) {
956
+                               fprintf(stderr, "Unsupported address construct\n");
957
+                               zip_debug_rtx(x);
958 102 dgisselq
+                               abort();
959 127 dgisselq
+                       } gcc_assert(is_ZIP_REG(REGNO(XEXP(x,0))));
960
+                       if (CONST_INT_P(XEXP(x, 1))) {
961 102 dgisselq
+                               if (INTVAL(XEXP(x,1))!=0) {
962
+                                       fprintf(file, "%ld(%s)",
963 135 dgisselq
+                                       (long)INTVAL(XEXP(x, 1)),
964 102 dgisselq
+                                       reg_names[REGNO(XEXP(x, 0))]);
965
+                               } else {
966
+                                       fprintf(file, "(%s)",
967
+                                       reg_names[REGNO(XEXP(x, 0))]);
968
+                               }
969
+                       } else if (GET_CODE(XEXP(x,1)) == SYMBOL_REF) {
970
+                               fprintf(file, "%s(%s)", XSTR(x,0),
971
+                                       reg_names[REGNO(XEXP(x, 0))]);
972
+                       } else if ((GET_CODE(XEXP(x, 1)) == MINUS)
973
+                               && (GET_CODE(XEXP(XEXP(x, 1), 0))==SYMBOL_REF)
974
+                               && (GET_CODE(XEXP(XEXP(x, 1), 1))==SYMBOL_REF)) {
975
+                               fprintf(file, "%s-%s(%s)",
976
+                                       XSTR(XEXP(XEXP(x, 1),0),0),
977
+                                       XSTR(XEXP(XEXP(x, 1),1),0),
978
+                                       reg_names[REGNO(XEXP(x, 0))]);
979
+                       } else
980
+                               fprintf(file, "#INVALID(%s)",
981
+                                       reg_names[REGNO(XEXP(x, 0))]);
982
+                       /*
983
+                       else if (GET_CODE(XEXP(addr, 1)) == LABEL)
984
+                               fprintf(file, "%s(%s)",
985
+                                       GET_CODE(XEXP(addr, 1)),
986
+                                       reg_names[REGNO(GET_CODE(XEXP(addr, 0)))]);
987
+                       else if ((GET_CODE(XEXP(addr, 1)) == MINUS)
988
+                               && (GET_CODE(XEXP(GET_CODE(XEXP(addr, 1)), 0))==LABEL)
989
+                               && (GET_CODE(XEXP(GET_CODE(XEXP(addr, 1)), 1))==LABEL)) {
990
+                               fprintf(file, "%s-%s(%s)",
991
+                                       reg_names[REGNO(GET_CODE(XEXP(addr, 0)))]);
992
+                                       reg_names[REGNO(GET_CODE(XEXP(addr, 0)))]);
993
+                                       reg_names[REGNO(GET_CODE(XEXP(addr, 0)))]);
994
+                       }
995
+                       */
996
+                       break;
997
+               // We don't support direct memory addressing within our
998
+               // instruction set, even though the instructions themselves
999
+               // would support direct memory addressing of the lower 18 bits
1000
+               // of memory space.
1001
+               case MEM:
1002
+                       if (dbg) zip_debug_rtx(x);
1003
+                       zip_print_operand_address(file, XEXP(x, 0));
1004
+                       break;
1005 111 dgisselq
+               case CONST_INT:
1006 135 dgisselq
+                       fprintf(file, "%ld",(long)INTVAL(x));
1007 111 dgisselq
+                       break;
1008 102 dgisselq
+               default:
1009 111 dgisselq
+                       fprintf(stderr, "Unknown address format\n");
1010
+                       zip_debug_rtx(x);
1011 102 dgisselq
+                       abort(); break;
1012
+                       // output_addr_const(file, x);
1013
+               break;
1014
+       }
1015
+}
1016
+
1017
+/* The PRINT_OPERAND worker. */
1018
+
1019
+void
1020
+zip_print_operand(FILE *file, rtx x, int code)
1021
+{
1022
+       rtx operand = x;
1023
+       int     rgoff = 0;
1024
+
1025
+       // fprintf(file, "Print Operand!\n");
1026
+
1027
+       /* New code entries should just be added to the switch below.  If
1028
+        * handling is finished, just return.  If handling was just a
1029
+        * modification of the operand, the modified operand should be put in
1030
+        * "operand", and then do a break to let default handling
1031
+        * (zero-modifier) output the operand.
1032
+        */
1033
+       switch(code) {
1034
+               case 0:
1035
+                       /* No code, print as usual. */
1036
+                       break;
1037
+               case 'L':
1038
+                       /* Lower of two registers, print one up */
1039
+                       rgoff = 1;
1040
+                       break;
1041
+               case 'R':
1042
+               case 'H':
1043
+                       /* Higher of a register pair, print normal */
1044
+                       break;
1045
+
1046
+               default:
1047
+                       LOSE_AND_RETURN("invalid operand modifier letter", x);
1048
+       }
1049
+
1050
+       /* Print an operand as without a modifier letter. */
1051
+       switch (GET_CODE(operand)) {
1052
+       case REG:
1053
+               if (REGNO(operand)+rgoff >= FIRST_PSEUDO_REGISTER)
1054
+                       internal_error("internal error: bad register: %d", REGNO(operand));
1055
+               fprintf(file, "%s", reg_names[REGNO(operand)+rgoff]);
1056
+               return;
1057
+       case SCRATCH:
1058
+               LOSE_AND_RETURN("Need a scratch register", x);
1059
+               return;
1060
+
1061
+       case CODE_LABEL:
1062
+       case LABEL_REF:
1063
+       case SYMBOL_REF:
1064
+       case PLUS:
1065
+               PRINT_OPERAND_ADDRESS(file, operand);
1066
+               return;
1067
+       case MEM:
1068
+               PRINT_OPERAND_ADDRESS(file, XEXP(operand, 0));
1069
+               return;
1070
+
1071
+       default:
1072
+               /* No need to handle all strange variants, let
1073
+                * output_addr_const do it for us.
1074
+                */
1075
+               if (CONSTANT_P(operand)) {
1076
+                       output_addr_const(file, operand);
1077
+                       return;
1078
+               }
1079
+
1080
+               LOSE_AND_RETURN("unexpected operand", x);
1081
+       }
1082
+}
1083
+
1084
+static bool
1085
+zip_frame_pointer_required(void)
1086
+{
1087
+       // This should really depend upon whether we have variable sized
1088
+       // arguments in our frame or not.  Once this fails, let's look
1089
+       // at what the problem was and then whether or not we can detect
1090
+       // it.
1091
+       //
1092
+       // Use a GCC global to determine our answer
1093 103 dgisselq
+       if (cfun->calls_alloca)
1094
+               return true;
1095 102 dgisselq
+       return (frame_pointer_needed);
1096
+/*
1097
+*/
1098
+}
1099
+
1100
+/* Determine whether or not a register needs to be saved on the stack or not.
1101
+ */
1102
+static bool
1103
+zip_save_reg(int regno) {
1104
+       if (regno == 0)
1105
+               return ((!crtl->is_leaf)
1106
+                       ||((df_regs_ever_live_p(0))&&(!call_used_regs[0])));
1107
+       else if ((regno == zip_GOT)&&(!ZIP_PIC))
1108
+               return  ((df_regs_ever_live_p(regno))
1109
+                               &&(!call_used_regs[regno]));
1110
+       else if (regno == zip_FP)
1111
+               return((zip_frame_pointer_required())||((df_regs_ever_live_p(regno))
1112
+                               &&(!call_used_regs[regno])));
1113
+       else if (regno < zip_FP)
1114
+               return  ((df_regs_ever_live_p(regno))
1115
+                               &&(!call_used_regs[regno]));
1116
+       return false;
1117
+}
1118
+
1119
+/* Compute the size of the local area and the size to be adjusted by the
1120
+ * prologue and epilogue.
1121
+ *
1122
+ * Here's what we are looking at (top is the current, bottom is the last ...)
1123
+ *
1124
+ *     Stack Pointer ->
1125 124 dgisselq
+ *                     Outgoing arguments
1126 102 dgisselq
+ *                     Local variables (could be variable size)
1127
+ *     Frame Pointer ->        (= Stack Pointer + sp_fp_offset)
1128
+ *                     Saved return address, if saved
1129
+ *                     Other Saved registers
1130
+ *                     Saved frame pointer (if used)
1131
+ *                     Saved R12, if used
1132
+ *                     (Stack pointer is not saved)
1133
+ *     Original stack pointer ->       (= Stack_Pointer +size_for_adjusting_sp)
1134
+ *                     Called arguments (not passed in registers)
1135
+ *                     Return arguments (not R1, args.pretend_args_size)
1136
+ *             (Prior function's stack frame ... )
1137
+ *
1138
+ */
1139
+static void
1140
+zip_compute_frame(void) {
1141
+       int     regno;
1142
+       int     args_size;
1143 124 dgisselq
+       const bool      dbg = ((ALL_DEBUG_ON)||(false))&&(!ALL_DEBUG_OFF);
1144 102 dgisselq
+
1145 124 dgisselq
+       if (dbg) fprintf(stderr, "ZIP-COMPUTE-FRAME\n");
1146 102 dgisselq
+       // gcc_assert(crtl);
1147
+       gcc_assert(cfun);
1148
+       gcc_assert(cfun->machine);
1149
+
1150
+       args_size=(ACCUMULATE_OUTGOING_ARGS ? crtl->outgoing_args_size : 0);
1151
+
1152
+       if(crtl->args.pretend_args_size > 0) {
1153
+               args_size += crtl->args.pretend_args_size;
1154
+               // printf("%s pretend_args_size : %d\n", current_function_name(),
1155
+                       // crtl->args.pretend_args_size);
1156
+               cfun->machine->pretend_size = crtl->args.pretend_args_size;
1157
+       }
1158
+
1159
+       cfun->machine->local_vars_size = get_frame_size();
1160
+
1161
+       // Save callee-saved registers.
1162
+       cfun->machine->saved_reg_size = 0;
1163
+       for(regno=0; regno < FIRST_PSEUDO_REGISTER; regno++) {
1164
+               if (zip_save_reg(regno))
1165
+                       cfun->machine->saved_reg_size ++;
1166
+       }
1167
+
1168
+       cfun->machine->fp_needed = (zip_frame_pointer_required());
1169
+
1170
+       if ((cfun->machine->fp_needed)&&
1171
+                       (!df_regs_ever_live_p(zip_FP))) {
1172
+               cfun->machine->saved_reg_size ++;
1173
+       }
1174
+
1175
+       cfun->machine->sp_fp_offset = args_size + cfun->machine->local_vars_size;
1176
+       cfun->machine->size_for_adjusting_sp = cfun->machine->local_vars_size
1177
+                       + cfun->machine->saved_reg_size
1178
+                       + args_size;
1179 124 dgisselq
+       if(dbg) {
1180
+               fprintf(stderr, "\tFRAME-POINTR: %s\n",
1181
+                       cfun->machine->fp_needed?"Yes":"No");
1182
+               fprintf(stderr, "\tARGS-SIZE   : %d\n",
1183
+                       args_size);
1184
+               fprintf(stderr, "\tLOCALS-SIZE : %d\n",
1185
+                       cfun->machine->local_vars_size);
1186
+               fprintf(stderr, "\tREGISTERS   : %d\n",
1187
+                       cfun->machine->saved_reg_size);
1188
+               fprintf(stderr, "\tSP_FP_OFFSET: %d\n",
1189
+                       cfun->machine->sp_fp_offset);
1190
+               fprintf(stderr, "\tSP-ADJUSTMNT: %d\n",
1191
+                       cfun->machine->size_for_adjusting_sp);
1192
+       }
1193 102 dgisselq
+}
1194
+
1195
+void
1196
+zip_expand_prologue(void) {
1197
+       rtx     insn;
1198
+
1199
+       const bool      dbg = ((ALL_DEBUG_ON)||(false))&&(!ALL_DEBUG_OFF);
1200
+       zip_compute_frame();
1201
+
1202 124 dgisselq
+       if (dbg)  fprintf(stderr, "PROLOGUE: Computing Prologue instructions\n");
1203 127 dgisselq
+       if (dbg)  fprintf(stderr, "PROLOGUE: SP-FP offset is %d\n",
1204
+                       cfun->machine->sp_fp_offset);
1205 102 dgisselq
+       if (cfun->machine->size_for_adjusting_sp != 0) {
1206 138 dgisselq
+               insn = emit_insn(gen_subsi3_reg_clobber(stack_pointer_rtx,
1207 102 dgisselq
+                               stack_pointer_rtx,
1208
+                       gen_int_mode(cfun->machine->size_for_adjusting_sp,
1209
+                               SImode)));
1210
+                       // cfun->machine->sp_fp_offset
1211
+
1212
+               RTX_FRAME_RELATED_P(insn) = 1;
1213
+       }
1214
+
1215
+       {
1216
+               int offset = 0, regno;
1217
+               for(regno=0; regno < FIRST_PSEUDO_REGISTER; regno++) {
1218
+                       if (zip_save_reg(regno)) {
1219 127 dgisselq
+                               if (dbg) fprintf(stderr,
1220
+                                       "PROLOGUE: Saving R%d in %d+%d(SP)\n",
1221
+                                       regno, cfun->machine->sp_fp_offset,
1222
+                                       offset);
1223 124 dgisselq
+                               insn=emit_insn(gen_movsi_sto_off(
1224
+                                       stack_pointer_rtx,
1225
+                                       GEN_INT(cfun->machine->sp_fp_offset
1226
+                                               +offset++),
1227 102 dgisselq
+                                       gen_rtx_REG(SImode, regno)));
1228
+                               RTX_FRAME_RELATED_P(insn) = 1;
1229
+                       }
1230
+               }
1231 103 dgisselq
+               if (dbg)  fprintf(stderr, "%d registers saved%s\n", offset,
1232
+                       (crtl->saves_all_registers)?", should be all of them":", less than all");
1233 102 dgisselq
+       }
1234
+
1235
+       if (cfun->machine->fp_needed) {
1236
+               if (dbg) zip_debug_rtx(stack_pointer_rtx);
1237
+               if (dbg) zip_debug_rtx(frame_pointer_rtx);
1238
+               insn = emit_insn(gen_movsi_reg_off(frame_pointer_rtx,
1239 124 dgisselq
+                               stack_pointer_rtx,
1240
+                               GEN_INT(cfun->machine->sp_fp_offset)));
1241 102 dgisselq
+               RTX_FRAME_RELATED_P(insn) = 1;
1242 103 dgisselq
+               if (dbg)  fprintf(stderr, "sp_fp_offset is %d\n", cfun->machine->sp_fp_offset);
1243 102 dgisselq
+       }
1244
+}
1245
+
1246
+bool
1247
+zip_use_return_insn(void)
1248
+{
1249
+       if ((!reload_completed)||(cfun->machine->fp_needed)
1250
+                       ||(get_frame_size()!=0)) {
1251
+               // If R0 ever gets pushed to the stack, then we cannot
1252
+               // use a master return from anywhere.  We need to clean up the
1253
+               // stack first.
1254
+               if ((!crtl->is_leaf)||((df_regs_ever_live_p(0))
1255
+                                               &&(!call_used_regs[0]))) {
1256
+                       return false;
1257
+               }
1258
+       }
1259
+       zip_compute_frame();
1260
+       return (cfun->machine->size_for_adjusting_sp == 0);
1261
+}
1262
+
1263
+/* As per the notes in M68k.c, quote the function epilogue should not depend
1264
+ * upon the current stack pointer.  It should use the frame poitner only,
1265
+ * if there is a frame pointer.  This is mandatory because of alloca; we also
1266
+ * take advantage of it to omit stack adjustments before returning ...
1267
+ *
1268
+ * Let's see if we can use their approach here.
1269
+ *
1270
+ * We can't.  Consider our choices:
1271
+ *     LOD (FP),R0
1272
+ *     LOD 1(FP),R4
1273
+ *     LOD 2(FP),R5
1274
+ *     LOD 3(FP),R6
1275
+ *     LOD 4(FP),FP
1276
+ *     ... Then what is the stack pointer?
1277
+ * or
1278
+ *     LOD (FP),R0
1279
+ *     LOD 1(FP),R4
1280
+ *     LOD 2(FP),R5
1281
+ *     LOD 3(FP),R6
1282
+ *     MOV FP,SP
1283
+ *     LOD 4(SP),FP
1284
+ *     ... Which suffers unnecessary pipeline stalls, and certainly doesn't
1285
+ *     exploit our pipeline memory function
1286
+ * or
1287
+ *     MOV FP,SP
1288
+ *     LOD (SP),R0
1289
+ *     LOD 1(SP),R4
1290
+ *     LOD 2(SP),R5
1291
+ *     LOD 3(SP),R6
1292
+ *     LOD 4(SP),FP
1293
+ * Which will be our choice.  Note that we do use the stack pointer, eventually.
1294
+ *
1295
+ */
1296
+void
1297
+zip_expand_epilogue(void) {
1298
+       int     regno, offset;
1299
+       const bool      dbg = ((ALL_DEBUG_ON)||(false))&&(!ALL_DEBUG_OFF);
1300 138 dgisselq
+       rtx     insn;
1301 102 dgisselq
+
1302
+       zip_compute_frame();
1303
+
1304
+       if (dbg) fprintf(stderr, "EPILOG::\n");
1305
+       if (cfun->machine->fp_needed) {
1306 124 dgisselq
+               // This is done special--if you can't trust the stack pointer
1307
+               // enough so that you must have a frame pointer, then you can't
1308
+               // trust its offset enough to restore from it.  Hence, we start
1309
+               // by moving the frame pointer to the stack pointer to recover
1310
+               // the stack pointer back to a usable value.
1311 102 dgisselq
+               if (dbg) fprintf(stderr, "EPILOG::Moving frame pointer to stack register\n");
1312 138 dgisselq
+               insn = emit_insn(gen_movsi_reg(stack_pointer_rtx, frame_pointer_rtx));
1313
+               RTX_FRAME_RELATED_P(insn) = 1;
1314 102 dgisselq
+       }
1315
+
1316
+       if (cfun->machine->saved_reg_size != 0) {
1317 124 dgisselq
+               if (cfun->machine->fp_needed)
1318
+                       offset = 0;
1319
+               else
1320
+                       offset = cfun->machine->sp_fp_offset;
1321 102 dgisselq
+               if (dbg) fprintf(stderr, "EPILOG::Saved_REG_Size = %d\n", cfun->machine->saved_reg_size);
1322
+               for(regno=0; regno < FIRST_PSEUDO_REGISTER; regno++) {
1323
+                       if (zip_save_reg(regno)) {
1324
+                               if (dbg) fprintf(stderr, "EPILOG::RESTORING R%d\n", regno);
1325 138 dgisselq
+                               rtx reg = gen_rtx_REG(SImode, regno);
1326
+                               insn = emit_insn(gen_movsi_lod_off(
1327
+                                               reg,
1328 124 dgisselq
+                                               stack_pointer_rtx,
1329
+                                               GEN_INT(offset++)));
1330 138 dgisselq
+                               add_reg_note(insn, REG_CFA_RESTORE, reg);
1331
+                               RTX_FRAME_RELATED_P(insn) = 1;
1332 102 dgisselq
+                       }
1333
+               }
1334
+       }
1335
+
1336 124 dgisselq
+       if (cfun->machine->fp_needed) {
1337
+               // Restore the stack pointer back to the original, the
1338
+               // difference being the difference from the frame pointer
1339
+               // to the original stack
1340 138 dgisselq
+               insn = emit_insn(gen_addsi3_reg_clobber(stack_pointer_rtx,
1341
+                       stack_pointer_rtx,
1342 124 dgisselq
+                       GEN_INT(cfun->machine->size_for_adjusting_sp
1343
+                               -cfun->machine->sp_fp_offset)));
1344 138 dgisselq
+               RTX_FRAME_RELATED_P(insn) = 1;
1345 124 dgisselq
+       } else {
1346
+               // else now the difference is between the stack pointer and
1347
+               // the original stack pointer.
1348 102 dgisselq
+               if (dbg) fprintf(stderr, "EPILOG::ADDSI3(StackPtr, %d)\n",
1349
+                               cfun->machine->size_for_adjusting_sp);
1350 138 dgisselq
+               insn = emit_insn(gen_addsi3_reg_clobber(stack_pointer_rtx,
1351
+                       stack_pointer_rtx,
1352 124 dgisselq
+                       GEN_INT(cfun->machine->size_for_adjusting_sp)));
1353 138 dgisselq
+               RTX_FRAME_RELATED_P(insn) = 1;
1354 102 dgisselq
+       }
1355
+       if (dbg) fprintf(stderr, "EPILOG::EMITTING-RETURN\n");
1356
+
1357 138 dgisselq
+       // The return RTX is not allowed to be frame related
1358
+       insn = emit_jump_insn(ret_rtx);
1359
+       // RTX_FRAME_RELATED_P(insn) = 1;
1360 102 dgisselq
+}
1361
+
1362
+/* Implement RETURN_ADDR_RTX(COUNT, FRAMEADDR).
1363
+ *
1364
+ * We currently only support calculating the return address for the current
1365
+ * frame.
1366
+ */
1367
+
1368
+/*
1369
+rtx
1370
+zip_return_addr_rtx(int count, rtx frame ATTRIBUTE_UNUSED)
1371
+{
1372
+       if (count)
1373
+               return NULL_RTX;
1374
+
1375
+       zip_compute_frame();
1376
+
1377
+       // saved return address for current function is at fp - 1
1378
+       if (cfun->machine->save_ret)
1379
+               return gen_rtx_MEM(Pmode, plus_constant(frame_pointer_rtx,
1380
+                               -UNITS_PER_WORD));
1381
+       return get_hard_reg_initial_val(Pmode, RETURN_ADDRESS_REGNUM);
1382
+}
1383
+*/
1384
+
1385
+/* Implements the macro INITIAL_ELIMINATION_OFFSET,
1386
+ * return the OFFSET.
1387
+ */
1388
+int
1389
+zip_initial_elimination_offset(int from, int to) {
1390
+       int     ret = 0;
1391
+       zip_compute_frame();
1392
+
1393
+       if (((from) == FRAME_POINTER_REGNUM)&&((to) == STACK_POINTER_REGNUM)) {
1394
+               ret = cfun->machine->sp_fp_offset;
1395 117 dgisselq
+       } else if (((from)=ARG_POINTER_REGNUM)&&((to)==STACK_POINTER_REGNUM)) {
1396
+               ret = cfun->machine->sp_fp_offset;
1397 102 dgisselq
+       } else if (((from)=ARG_POINTER_REGNUM)&&((to)==FRAME_POINTER_REGNUM)) {
1398 117 dgisselq
+               // ret = cfun->machine->local_vars_size;
1399
+               ret = 0;
1400 102 dgisselq
+       } else {
1401
+               abort();
1402
+       }
1403
+
1404
+       return ret;
1405
+}
1406
+
1407
+/*
1408
+ * Code taken from m68k ...
1409
+ */
1410
+static bool
1411
+zip_can_eliminate(int from, int to)
1412
+{
1413
+       // fprintf(stderr, "CAN_ELIMINATE::QUERYING(%d,%d)\n", from, to);
1414
+       if ((from == zip_FP)&&(to == zip_SP))
1415
+               return !cfun->machine->fp_needed;
1416
+       return true;
1417
+}
1418
+
1419
+/*
1420
+static void
1421
+zip_basic_check(void)
1422
+{
1423
+       gcc_assert(mode_base_align[SImode]==4);
1424
+       if ((BITS_PER_UNIT != 32)
1425
+                       ||(GET_MODE_SIZE(SImode)!=1)
1426
+                       ||(GET_MODE_SIZE(DImode)!=1)
1427
+                       ||(HARD_REGNO_NREGS(0,SImode)!=1)) {
1428
+               printf("SIZEOF(SIMode) == %d\n", GET_MODE_SIZE(SImode));
1429
+               printf("BITS_PER_UNIT  == %d\n", BITS_PER_UNIT);
1430
+               gcc_assert(BITS_PER_UNIT==32);
1431
+               gcc_assert(GET_MODE_SIZE(SImode)==1);
1432
+               gcc_assert(HARD_REGNO_NREGS(0,SImode)==1);
1433
+       }
1434
+}
1435
+*/
1436
+
1437
+#define        zip_basic_check()
1438
+
1439
+/* Compute the number of word sized regiters needed to hold a function
1440
+ * argument of mode INT_MODE and tree type TYPE.
1441
+ */
1442
+int
1443
+zip_num_arg_regs(enum machine_mode mode, const_tree type) {
1444
+       int     size;
1445
+
1446
+       zip_basic_check();
1447
+
1448
+       if (targetm.calls.must_pass_in_stack(mode, type))
1449
+               return 0;
1450
+
1451
+       if ((type)&&(mode == BLKmode))
1452
+               size = int_size_in_bytes(type);
1453
+       else
1454
+               size = GET_MODE_SIZE(mode);
1455
+
1456
+       return (size + UNITS_PER_WORD - 1)/UNITS_PER_WORD;
1457
+}
1458
+
1459
+/* pushed in function prologue */
1460
+/*
1461
+static int
1462
+zip_arg_partial_bytes(CUMULATIVE_ARGS *cum, enum machine_mode mode,
1463
+               tree type, bool name ATTRIBUTE_UNUSED) {
1464
+       int     words;
1465
+       unsigned int    regs = zip_num_arg_regs(mode, type);
1466
+
1467
+       if (*cum >= ZIP_LAST_ARG_REGNO + 1)
1468
+               words = 0;
1469
+       else if ((*cum + regs) > ZIP_LAST_ARG_REGNO + 1)
1470
+               words = (*cum + regs) - ZIP_LAST_ARG_REGNO + 1;
1471
+       else
1472
+               words = 0;
1473
+
1474
+       return words * UNITS_PER_WORD;
1475
+}
1476
+*/
1477
+
1478
+static void
1479
+zip_function_arg_advance(cumulative_args_t ca, machine_mode mode,
1480
+               const_tree type, bool named ATTRIBUTE_UNUSED) {
1481
+       CUMULATIVE_ARGS *cum;
1482
+       int     nreg;
1483
+
1484
+       zip_basic_check();
1485
+
1486
+       cum = get_cumulative_args(ca);
1487
+       nreg = zip_num_arg_regs(mode, type);
1488
+       if (((*cum)+nreg) > NUM_ARG_REGS)
1489
+               (*cum) = NUM_ARG_REGS;
1490
+       else
1491
+               (*cum) += nreg;
1492
+}
1493
+
1494
+static rtx
1495
+zip_function_arg(cumulative_args_t ca, machine_mode mode,
1496
+               const_tree type ATTRIBUTE_UNUSED, bool named) {
1497
+       CUMULATIVE_ARGS *cum;
1498
+
1499
+       zip_basic_check();
1500
+
1501
+
1502
+       if (!named)
1503
+               return NULL_RTX;
1504
+       //if (targetm.calls.must_pass_in_stack(mode, type))
1505
+               //return NULL_RTX;
1506
+       cum = get_cumulative_args(ca);
1507
+
1508
+       if ((*cum) >= NUM_ARG_REGS)
1509
+               return NULL_RTX;
1510
+       return
1511
+               gen_rtx_REG(mode, (*cum)+1);
1512
+}
1513
+
1514 122 dgisselq
+#ifdef HAVE_cc0
1515 102 dgisselq
+/* NOTICE_UPDATE_CC sends us here
1516
+ */
1517
+void
1518
+zip_update_cc_notice(rtx exp, rtx_insn *insn)
1519
+{
1520 122 dgisselq
+#error "The CC0 code was supposed to be removed"
1521 102 dgisselq
+       const bool      dbg = ((ALL_DEBUG_ON)||(false))&&(!ALL_DEBUG_OFF);
1522
+       enum    attr_ccresult  ccr;
1523
+       enum    attr_conditional  conditionally_executed;
1524
+
1525
+       // The default is that nothing has changed.
1526
+       // cc_status = cc_status_prev;
1527
+       rtx     src, dest;
1528
+
1529
+       if (dbg) fprintf(stderr, "CC-NOTICE ...\n");
1530
+       if (dbg) zip_debug_rtx_pfx("CC :", exp);
1531
+       if (dbg) debug_rtx(exp);
1532
+
1533
+       ccr = get_attr_ccresult(insn);
1534
+       if (ccr == CCRESULT_UNKNOWN) {
1535
+               CC_STATUS_INIT;
1536
+               if (dbg) fprintf(stderr, "\tINIT-CC\n");
1537
+               return;
1538
+       }
1539
+
1540
+       if ((GET_CODE(exp) == PARALLEL)&&(GET_CODE(XVECEXP(exp, 0, 0))==SET)) {
1541
+               // This works up and until we add cc0 parallel instructions
1542
+               // to our instruction set.
1543
+               dest = SET_DEST(XVECEXP(exp, 0, 0));
1544
+               src  = SET_SRC (XVECEXP(exp, 0, 0));
1545
+       } else if (GET_CODE(exp) == SET) {
1546
+               dest = SET_DEST(exp);
1547
+               src  = SET_SRC (exp);
1548
+       } else {
1549
+               // First, do nothing if we haven't touched the condition codes.
1550
+               // Condition codes can only be changed as a result of a set
1551
+               // expression ...?
1552
+               if (dbg) fprintf(stderr, "Non-set expression, doesn\'t touch condition codes\n");
1553
+               return;
1554
+       }
1555
+
1556 111 dgisselq
+
1557
+       if (ccr == CCRESULT_UNCHANGED) {
1558
+               if (dbg) fprintf(stderr, "\tUnchanged CC\n");
1559
+
1560
+               // We can't just run away here ... even though the CC result
1561
+               // hasn't changed, GCC's ability to recognize it as a valid
1562
+               // result has changed.  In other words, if we just 'set' a
1563
+               // value contained within either value1 or value2, then we'll
1564
+               // need to update those values so that they are no longer looked
1565
+               // upon as potentially containing the current CC values.
1566
+
1567
+               if (dest) {
1568
+                       if (dest == cc0_rtx)
1569
+                               CC_STATUS_INIT;
1570
+                       else if ((REG_P(dest))&&(dest != pc_rtx)) {
1571
+                               // An example here might be a load instruction
1572
+                               if (reg_mentioned_p(dest, cc_status.value1))
1573
+                                       cc_status.value1 = NULL_RTX;
1574
+                               if (reg_mentioned_p(dest, cc_status.value2))
1575
+                                       cc_status.value2 = NULL_RTX;
1576
+                       }
1577
+               }
1578
+               return;
1579
+       }
1580
+
1581 102 dgisselq
+       // Gotta wait on this test, until we know whether or not the
1582
+       // conditionally executed instruction was designed to set the
1583
+       // CC0 register.
1584
+       conditionally_executed = get_attr_conditional(insn);
1585
+       if ((conditionally_executed == CONDITIONAL_YES)&&(dest != cc0_rtx)) {
1586
+               // cc_status is unchanged
1587 111 dgisselq
+               // However, GCC's vision of it may have changed
1588
+               //
1589
+               // Initialize CC_STATUS
1590 102 dgisselq
+               if (dbg) fprintf(stderr, "\tCC -- unchanged (conditional exec)\n");
1591 111 dgisselq
+               CC_STATUS_INIT;
1592 102 dgisselq
+               return;
1593 111 dgisselq
+       } else if (GET_CODE(src)==IF_THEN_ELSE) {
1594
+               // Same thing as above
1595
+               CC_STATUS_INIT;
1596
+               return;
1597 102 dgisselq
+       }
1598
+
1599
+       if (ccr == CCRESULT_VALIDZN)
1600
+               cc_status.flags = CC_NO_OVERFLOW;
1601
+       else
1602
+               cc_status.flags = 0;
1603
+       cc_status.value1 = dest;
1604
+       if (dest == cc0_rtx)
1605
+               cc_status.value2 = src;
1606
+       else if((REG_P(dest))&&(!reg_mentioned_p(dest, src)))
1607
+               cc_status.value2 = src;
1608
+       else if((SUBREG_P(dest))&&(!reg_mentioned_p(XEXP(dest,0), src)))
1609
+               cc_status.value2 = src;
1610
+       else
1611
+               cc_status.value2 = 0;
1612
+       if (dbg) fprintf(stderr, "\tCC -- Set flags for\n");
1613
+       if (dbg) zip_debug_rtx_pfx("V1: ", dest);
1614
+       if ((dbg)&&(cc_status.value2)) zip_debug_rtx_pfx("V2: ", src);
1615
+       else if (dbg)   fprintf(stderr, "V2: (No SRC)\n");
1616
+       if ((dbg)&&(REG_P(dest))) fprintf(stderr, "src refers to dest ?? %s\n",
1617
+               refers_to_regno_p(REGNO(dest),REGNO(dest),src,NULL)?"Yes":"No");
1618
+       if ((dbg)&&(REG_P(dest))) fprintf(stderr, "Occurrs %d times\n",
1619
+               count_occurrences(dest,src,0));
1620
+       if ((dbg)&&(REG_P(dest))) fprintf(stderr, "%s mentioned\n",
1621
+               reg_mentioned_p(dest,src)?"Is":"Is not");
1622
+       if ((dbg)&&(REG_P(dest))) fprintf(stderr, "%s referenced\n",
1623
+               reg_referenced_p(dest,src)?"Is":"Is not");
1624
+
1625
+//
1626
+// These results are only used in final.c, where they are used to remove
1627
+// compare instructions if the optimizer is on.  If I produce nothing, no
1628
+// compare instructions will be removed.  If I produce something, a smart
1629
+// decision may be made to remove compare instructions.
1630
+//
1631
+// cc_status will be compared  with subsequent
1632
+//     (set (cc0) (something)) (i.e. compare only) instructions
1633
+//
1634
+//     (set (cc0) (compare (x) (y)))
1635
+//     dst = cc0 -- the destination of the set is ignored, save that it must be
1636
+//             cc0
1637
+//     src1 = (compare (x) (y))
1638
+//     if (src1 == compare)&&(y == (const_int 0))
1639
+//             src2 = (x)
1640
+//     else
1641
+//             src2 = null
1642
+//
1643
+//     Four conditions:
1644
+//     1. if (val1)&&(src1 == val1)
1645
+//             This would be true if I had seen a (set (val1) (src1)) insn
1646
+//             If I have seen a (set (val1) (src1))
1647
+//                     or equivalently a (set (val1) (compare (x) (y)))
1648
+//     or
1649
+//     2. if (val2)&&(src1 == val2)
1650
+//             This would be true if I had seen a (set (val1) (src1)) insn,
1651
+//             and only if val2 was still valid.
1652
+//     or
1653
+//     3. if (src2)&&(value1)&&(src2 == value1)
1654
+//             This would be true if we are comparing against zero, and the
1655
+//             number we are comparing against zero is value 1
1656
+//     or
1657
+//     4. if (src2)&&(value2)&&(src2 == value2)
1658
+//             ... or value2.  This is the common ZipCPU case.
1659
+//
1660
+//             then delete the compare.
1661
+//
1662
+}
1663 122 dgisselq
+#else
1664 102 dgisselq
+
1665 122 dgisselq
+void   zip_canonicalize_comparison(int *code, rtx *op0, rtx *op1,
1666
+               bool preserve_op0)
1667
+{
1668
+       const bool      dbg = ((ALL_DEBUG_ON)||(false))&&(!ALL_DEBUG_OFF);
1669 102 dgisselq
+
1670 122 dgisselq
+       if (dbg) fprintf(stderr, "CANONICALIZE ...%s\n", (preserve_op0)?"(Preserve Op0)":"");
1671
+       if (dbg) zip_debug_rtx_pfx("CODE", gen_rtx_fmt_ee((rtx_code)*code, VOIDmode, gen_rtx_REG(CCmode,zip_CC), const0_rtx));
1672
+       if (dbg) zip_debug_rtx_pfx("OP0 ", *op0);
1673
+       if (dbg) zip_debug_rtx_pfx("OP1 ", *op1);
1674
+
1675
+       if ((!preserve_op0)&&((*code == LE)||(*code == GTU)||(*code == GEU))) {
1676
+               rtx tem = *op0;
1677
+               *op0 = *op1;
1678
+               *op1 = tem;
1679
+               *code = (int)swap_condition((enum rtx_code)*code);
1680
+       }
1681
+
1682
+       if ((*code == LE)||(*code == LEU)||(*code == GTU)) {
1683
+               int offset = 1; // (*code == GTU) ? 1 : -1;
1684
+               bool    swap = false;
1685
+
1686
+               if (CONST_INT_P(*op1)) {
1687
+                       *op1 = GEN_INT(INTVAL(*op1)+offset);
1688
+                       swap = true;
1689
+               } else if (REG_P(*op1)) {
1690 138 dgisselq
+                       *op1 = plus_constant(GET_MODE(*op1), *op1, offset, true);
1691 122 dgisselq
+                       swap = true;
1692
+               } else if ((GET_CODE(*op1)==PLUS)&&(CONST_INT_P(XEXP(*op1,1)))){
1693
+                       *op1 = plus_constant(GET_MODE(*op1),XEXP(*op1,0),
1694
+                               INTVAL(XEXP(*op1,1))+offset);
1695
+                       swap = true;
1696
+               } if (swap) {
1697
+                       if (*code == LE)
1698
+                               (*code)= LT;
1699
+                       else if (*code == LEU)
1700
+                               (*code)= LTU;
1701
+                       else // (*code == GTU)
1702
+                               (*code) = GEU;
1703
+               }
1704
+       }
1705
+}
1706
+
1707
+static bool
1708
+zip_fixed_condition_code_regs(unsigned int *a, unsigned int *b) {
1709
+       *a = zip_CC;
1710
+       *b = INVALID_REGNUM;
1711
+       return true;
1712
+}
1713
+
1714
+#endif
1715
+
1716
+
1717 102 dgisselq
+/* totally buggy - we can't return pointers to nested functions */
1718
+static void
1719
+zip_asm_trampoline_template(FILE *f) {
1720
+       // Whereas at one time I thought I wouldn't need it, now I know I
1721
+       // need this trampoline function, although it is for a completely
1722
+       // different purpose than the one I was familiar with.
1723 138 dgisselq
+       fprintf(f, "\tbrev\t0,r1\n");
1724
+       fprintf(f, "\tldilo\t0,r1\n");
1725 102 dgisselq
+       fprintf(f, "\tjmp r1\n");
1726
+}
1727
+
1728
+/* Worker function for TARGET_TRAMPOLINE_INIT. */
1729
+static void
1730
+zip_trampoline_init(rtx m_tramp ATTRIBUTE_UNUSED,
1731
+       tree fndecl ATTRIBUTE_UNUSED,
1732
+       rtx chain_value ATTRIBUTE_UNUSED) {
1733
+// #warning "This needs to be filled out"
1734
+       abort();
1735
+}
1736
+
1737
+static tree
1738
+def_builtin(const char *name, enum insn_code icode, enum ZIP_BUILTIN_ID_CODE code,
1739
+       tree type)
1740
+{
1741
+       tree t = add_builtin_function(name,type,code,BUILT_IN_MD, NULL, NULL_TREE);
1742
+       zip_basic_check();
1743
+
1744
+       if(t) {
1745
+               zip_builtins[code] = t;
1746
+               zip_builtins_icode[code] = icode;
1747
+       }
1748
+
1749
+       return t;
1750
+
1751
+}
1752
+
1753
+void   zip_init_builtins(void) {
1754
+       zip_basic_check();
1755
+
1756
+  tree void_ftype_void = build_function_type_list(void_type_node, NULL_TREE);
1757
+#ifdef HAVE_zip_rtu
1758
+  def_builtin("zip_rtu", CODE_FOR_zip_rtu, ZIP_BUILTIN_RTU, void_ftype_void);
1759
+#endif
1760
+#ifdef HAVE_zip_halt
1761
+  def_builtin("zip_halt",  CODE_FOR_zip_halt,  ZIP_BUILTIN_HALT, void_ftype_void);
1762
+#endif
1763
+#ifdef HAVE_zip_idle
1764
+  def_builtin("zip_idle", CODE_FOR_zip_idle, ZIP_BUILTIN_IDLE, void_ftype_void);
1765
+#endif
1766
+
1767
+#ifdef HAVE_zip_syscall
1768
+// Support int SYSCALL(callID, int a, int b, int c);
1769
+  def_builtin("zip_syscall", CODE_FOR_zip_syscall, ZIP_BUILTIN_SYSCALL,
1770
+                       build_function_type_list(void_type_node, NULL_TREE));
1771
+#endif
1772
+
1773
+#ifdef HAVE_zip_save_context
1774
+  def_builtin("zip_save_context", CODE_FOR_zip_save_context, ZIP_BUILTIN_SAVE_CONTEXT,
1775
+               build_function_type_list(void_type_node, ptr_type_node, 0));
1776
+#endif
1777
+
1778
+#ifdef HAVE_zip_restore_context
1779
+  def_builtin("zip_restore_context", CODE_FOR_zip_restore_context, ZIP_BUILTIN_RESTORE_CONTEXT,
1780
+       build_function_type_list(void_type_node, ptr_type_node, 0));
1781
+#endif
1782
+
1783
+#ifdef HAVE_zip_bitrev
1784
+  def_builtin("zip_bitrev", CODE_FOR_zip_bitrev, ZIP_BUILTIN_BITREV,
1785
+       build_function_type_list(unsigned_type_node, unsigned_type_node,
1786
+               NULL_TREE));
1787
+#endif
1788
+
1789
+#ifdef HAVE_zip_cc
1790
+  def_builtin("zip_cc", CODE_FOR_zip_cc, ZIP_BUILTIN_CC,
1791
+       build_function_type_list(unsigned_type_node, NULL_TREE));
1792
+#endif
1793
+
1794 117 dgisselq
+#ifdef HAVE_zip_ucc
1795
+  def_builtin("zip_ucc", CODE_FOR_zip_ucc, ZIP_BUILTIN_UCC,
1796
+       build_function_type_list(unsigned_type_node, NULL_TREE));
1797
+#endif
1798
+
1799 102 dgisselq
+}
1800
+
1801
+static tree
1802
+zip_builtin_decl(unsigned zip_builtin_code, bool initialize_p ATTRIBUTE_UNUSED)
1803
+{
1804
+  if (zip_builtin_code >= ZIP_BUILTIN_MAX)
1805
+    return error_mark_node;
1806
+
1807
+  return zip_builtins[zip_builtin_code];
1808
+}
1809
+
1810
+static rtx
1811
+zip_expand_builtin(tree exp, rtx target,
1812
+               rtx subtarget ATTRIBUTE_UNUSED,
1813
+               machine_mode tmode ATTRIBUTE_UNUSED,
1814
+               int     ignore ATTRIBUTE_UNUSED) {
1815
+
1816
+       tree    fndecl = TREE_OPERAND(CALL_EXPR_FN(exp), 0);
1817
+       bool    nonvoid = (TREE_TYPE(TREE_TYPE(fndecl)) != void_type_node);
1818
+       enum    ZIP_BUILTIN_ID_CODE code=(enum ZIP_BUILTIN_ID_CODE)DECL_FUNCTION_CODE(fndecl);
1819
+       enum    insn_code icode = zip_builtins_icode[code];
1820
+       rtx     pat, op[5];
1821
+       call_expr_arg_iterator  iter;
1822
+       tree    arg;
1823
+
1824
+       if ((code == ZIP_BUILTIN_SAVE_CONTEXT)
1825
+                       ||(code == ZIP_BUILTIN_RESTORE_CONTEXT)) {
1826
+               arg = first_call_expr_arg(exp, &iter);
1827
+               if (arg == error_mark_node)
1828
+                       return NULL_RTX;
1829
+               op[0] = expand_normal(arg);
1830
+               if (GET_CODE(op[0]) != REG)
1831
+                       op[0] = force_reg(Pmode, op[0]);
1832
+               pat = GEN_FCN(icode)(op[0]);
1833
+       } else if (code == ZIP_BUILTIN_BITREV) {
1834
+               arg = first_call_expr_arg(exp, &iter);
1835
+               if (arg == error_mark_node) {
1836
+                       return NULL_RTX;
1837
+               }
1838
+               op[0] = expand_normal(arg);
1839
+               if (!target)
1840
+                       target = gen_reg_rtx(SImode);
1841
+               pat = GEN_FCN(icode)(target, op[0]);
1842 117 dgisselq
+       } else if ((code == ZIP_BUILTIN_CC)||(code == ZIP_BUILTIN_UCC)) {
1843 102 dgisselq
+               if (!target)
1844
+                       target = gen_reg_rtx(SImode);
1845
+               pat = GEN_FCN(icode)(target);
1846
+       } else // RTU, HALT, IDLE
1847
+               pat = GEN_FCN(icode)();
1848
+       if (!pat)
1849
+               return NULL_RTX;
1850
+       emit_insn(pat);
1851
+       return (nonvoid ? target : const0_rtx);
1852
+}
1853
+
1854
+static bool
1855
+zip_scalar_mode_supported_p(enum machine_mode mode) {
1856
+       zip_basic_check();
1857
+
1858
+       return ((mode)==SImode)||((mode)==DImode); // ||((mode)==SFmode);
1859
+}
1860
+
1861
+static bool
1862
+zip_libgcc_floating_mode_supported_p(enum machine_mode mode) {
1863
+       return ((mode)==SFmode)||((mode)==DFmode);
1864
+}
1865
+
1866
+static int
1867
+zip_address_cost(rtx addr ATTRIBUTE_UNUSED,
1868
+       enum machine_mode mode ATTRIBUTE_UNUSED,
1869
+       addr_space_t as ATTRIBUTE_UNUSED, bool spd ATTRIBUTE_UNUSED) {
1870
+       return 1;
1871
+}
1872
+
1873
+static bool
1874
+zip_mode_dependent_address_p(const_rtx addr ATTRIBUTE_UNUSED,
1875
+       addr_space_t as ATTRIBUTE_UNUSED) {
1876
+       return false;
1877
+}
1878
+
1879
+/*
1880
+static void
1881
+zip_asm_output_anchor(rtx x) {
1882
+       printf("ANCHOR: OP(%d)\n", GET_CODE(x));
1883
+}
1884
+*/
1885
+
1886
+static void
1887
+zip_debug_print(const char *pfx, int lvl, const char *str) {
1888
+       int     i;
1889
+       i = lvl;
1890
+       if ((true)||(lvl == 0))
1891
+               fprintf(stderr, "%s", pfx);
1892
+       else
1893
+               i += strlen(pfx);
1894
+       while(i-->0)
1895
+               fprintf(stderr, "  ");
1896
+       fprintf(stderr, "%s\n", str);
1897
+}
1898
+
1899
+static void
1900
+zip_debug_print_m(const char *pfx, int lvl, const char *str, enum machine_mode m) {
1901
+       int     i;
1902
+
1903
+       i = lvl;
1904
+       if ((true)||(lvl == 0))
1905
+               fprintf(stderr, "%s", pfx);
1906
+       else
1907
+               i = lvl+strlen(pfx);
1908
+       while(i-->0)
1909
+               fprintf(stderr, "  ");
1910
+       switch(m) {
1911
+               case VOIDmode:
1912
+                       fprintf(stderr, "%s:V\n", str);
1913
+                       break;
1914
+               case BLKmode:
1915
+                       fprintf(stderr, "%s:BLK\n", str);
1916
+                       break;
1917
+               case BImode:
1918
+                       fprintf(stderr, "%s:BI\n", str);
1919
+                       break;
1920
+#ifdef HAVE_QImode
1921
+               case QImode:
1922
+                       fprintf(stderr, "%s:QI\n", str);
1923
+                       break;
1924
+#endif
1925
+#ifdef HAVE_HImode
1926
+               case HImode:
1927
+                       fprintf(stderr, "%s:HI\n", str);
1928
+                       break;
1929
+#endif
1930
+               case SImode:
1931
+                       fprintf(stderr, "%s:SI\n", str);
1932
+                       break;
1933 122 dgisselq
+               case CCmode:
1934
+                       fprintf(stderr, "%s:CC\n", str);
1935
+                       break;
1936 102 dgisselq
+               case DImode:
1937
+                       fprintf(stderr, "%s:DI\n", str);
1938
+                       break;
1939
+               default:
1940
+                       fprintf(stderr, "%s:?\n", str);
1941
+       }
1942
+}
1943
+
1944
+static void
1945
+zip_debug_rtx_1(const char *pfx, const_rtx x, int lvl) {
1946
+       if (x == NULL_RTX) {
1947
+               zip_debug_print(pfx, lvl, "(NULL-RTX)");
1948
+               return;
1949
+       } else if (GET_CODE(x) > NUM_RTX_CODE) {
1950
+               char    buf[64];
1951
+               sprintf(buf, "(BAD-RTX-CODE %d)", GET_CODE(x));
1952
+               zip_debug_print(pfx, lvl, buf);
1953 117 dgisselq
+               gcc_assert(0 && "Bad RTX Code");
1954 102 dgisselq
+               return;
1955
+       } switch(GET_CODE(x)) { // rtl.def
1956 122 dgisselq
+       case PARALLEL:
1957
+               zip_debug_print(pfx, lvl, "(PARALLEL");
1958
+               for(int j=0; j<XVECLEN(x,0);j++)
1959
+                       zip_debug_rtx_1(pfx, XVECEXP(x,0,j), lvl+1);
1960
+               zip_debug_print(pfx, lvl, ")");
1961
+               debug_rtx(x);
1962
+               break;
1963 102 dgisselq
+       case INT_LIST: zip_debug_print(pfx, lvl, "(INT-LIST"); break;
1964 122 dgisselq
+       case SEQUENCE:
1965
+               zip_debug_print(pfx, lvl, "(SEQUENCE");
1966
+               for(int j=0; j<XVECLEN(x,0);j++)
1967
+                       zip_debug_rtx_1(pfx, XVECEXP(x,0,j), lvl+1);
1968
+               zip_debug_print(pfx, lvl, ")");
1969
+               debug_rtx(x);
1970
+               break;
1971 102 dgisselq
+       case ADDRESS: zip_debug_print(pfx, lvl, "(ADDRESS"); break;
1972
+       case DEBUG_INSN: zip_debug_print(pfx, lvl, "(DEBUG-INSN"); break;
1973
+       case INSN:
1974
+               zip_debug_print(pfx, lvl, "(INSN");
1975
+               /*
1976
+               { const rtx_insn *tmp_rtx;
1977
+               for(tmp_rtx = as_a <const rtx_insn *>(x); tmp_rtx != 0; tmp_rtx = NEXT_INSN(tmp_rtx)) {
1978
+                       zip_debug_rtx_1(tmp_rtx, lvl+1);
1979
+               }}
1980
+               */
1981
+               zip_debug_rtx_1(pfx, PATTERN(x), lvl+1);
1982
+               zip_debug_print(pfx, lvl, ")");
1983 117 dgisselq
+               debug_rtx(x);
1984 102 dgisselq
+               break;
1985
+       case JUMP_INSN: zip_debug_print(pfx, lvl, "(JUMP-INSN");
1986 111 dgisselq
+               zip_debug_rtx_1(pfx, PATTERN(x), lvl+1);
1987
+               zip_debug_print(pfx, lvl, ")");
1988
+               /*
1989 102 dgisselq
+               if (JUMP_LABEL(x)) {
1990 111 dgisselq
+                       if (GET_CODE(JUMP_LABEL(x)) == LABEL_REF) {
1991
+                               char    buf[64];
1992
+                               sprintf(buf, "(LABEL *.L%d))", CODE_LABEL_NUMBER(LABEL_REF_LABEL(JUMP_LABEL(x))));
1993
+                               zip_debug_print(pfx, lvl+1, buf);
1994
+                       } else if (GET_CODE(JUMP_LABEL(x))==CODE_LABEL) {
1995
+                               char    buf[64];
1996
+                               sprintf(buf, "(CODE_LABEL *.L%d))", CODE_LABEL_NUMBER(JUMP_LABEL(x)));
1997
+                               zip_debug_print(pfx, lvl+1, buf);
1998
+                       } else
1999
+                       zip_debug_print(pfx, lvl+1, "(w/Label))");
2000 102 dgisselq
+               } else
2001 111 dgisselq
+                       zip_debug_print(pfx, lvl+1, "(NO label))");
2002
+               debug_rtx(x);
2003
+               */
2004 102 dgisselq
+               break;
2005
+       case CALL:
2006
+               zip_debug_print(pfx, lvl, "(CALL (Adr) (Args)");
2007
+               zip_debug_rtx_1(pfx, XEXP(x,0), lvl+1);
2008
+               zip_debug_rtx_1(pfx, XEXP(x,1), lvl+1);
2009
+               zip_debug_print(pfx, lvl, ")");
2010
+               break;
2011
+       case CALL_INSN: zip_debug_print(pfx, lvl, "(CALL-INSN");
2012
+               debug_rtx(x);
2013
+               break;
2014
+       case BARRIER: zip_debug_print(pfx, lvl, "(BARRIER)"); break;
2015
+       case RETURN: zip_debug_print(pfx, lvl, "(RETURN)"); break;
2016
+       case NOTE:
2017
+               {       char buf[128];
2018
+                       sprintf(buf, "(NOTE %s)", GET_REG_NOTE_NAME(GET_MODE(x)));
2019
+                       zip_debug_print(pfx, lvl, buf);
2020
+               }break;
2021
+       case COND_EXEC: zip_debug_print(pfx, lvl, "(COND_EXEC)");
2022
+               debug_rtx(x);
2023
+               break;
2024
+       case ASM_INPUT: zip_debug_print(pfx, lvl, "(ASM INPUT)"); break;
2025
+       case ASM_OPERANDS: zip_debug_print(pfx, lvl, "(ASM OPERANDS)"); break;
2026
+       case UNSPEC: zip_debug_print(pfx, lvl, "(UNSPEC)"); break;
2027
+       case UNSPEC_VOLATILE: zip_debug_print(pfx, lvl, "(UNSPEC_VOLATILE)"); break;
2028
+       case CODE_LABEL:
2029
+               {
2030
+                       char    buf[64];
2031 111 dgisselq
+                       sprintf(buf, "(CODE_LABEL *.L%d)", CODE_LABEL_NUMBER(x));
2032 102 dgisselq
+                       zip_debug_print_m(pfx, lvl, buf, GET_MODE(x));
2033
+               } break;
2034
+       case SET:
2035
+               zip_debug_print_m(pfx, lvl, "(SET", GET_MODE(x));
2036 117 dgisselq
+               zip_debug_rtx_1(pfx, SET_DEST(x),lvl+1);
2037
+               zip_debug_rtx_1(pfx, SET_SRC(x),lvl+1);
2038 102 dgisselq
+               zip_debug_print(pfx, lvl, ")");
2039 117 dgisselq
+               debug_rtx(x);
2040 102 dgisselq
+               break;
2041 122 dgisselq
+       case REG: {
2042 127 dgisselq
+               char buf[25], mstr[4];
2043
+               mstr[0] = '\0';
2044
+               if (GET_MODE(x) == SImode)
2045
+                       strcpy(mstr, ":SI");
2046
+               else if (GET_MODE(x) == DImode)
2047
+                       strcpy(mstr, ":DI");
2048
+               else if (GET_MODE(x) == VOIDmode)
2049
+                       strcpy(mstr, ":V");
2050 102 dgisselq
+               if (REGNO(x) == zip_PC)
2051 127 dgisselq
+                       sprintf(buf, "(PC%s)", mstr);
2052 102 dgisselq
+               else if (REGNO(x) == zip_CC)
2053 127 dgisselq
+                       sprintf(buf, "(CC%s)", mstr);
2054 102 dgisselq
+               else if (REGNO(x) == zip_SP)
2055 127 dgisselq
+                       sprintf(buf, "(SP%s)", mstr);
2056 102 dgisselq
+               else if (REGNO(x) == zip_FP)
2057 127 dgisselq
+                       sprintf(buf, "(REG%s FP)", mstr);
2058 102 dgisselq
+               else if (REGNO(x) == zip_GOT)
2059 127 dgisselq
+                       sprintf(buf, "(REG%s GBL)", mstr);
2060 102 dgisselq
+               else if (FUNCTION_VALUE_REGNO_P(REGNO(x)))
2061 127 dgisselq
+                       sprintf(buf, "(REG%s RTN-VL)", mstr);
2062 102 dgisselq
+               else if (REGNO(x) == RETURN_ADDRESS_REGNUM)
2063 127 dgisselq
+                       sprintf(buf, "(REG%s RTN-AD)", mstr);
2064 122 dgisselq
+               else
2065 127 dgisselq
+                       sprintf(buf, "(REG%s %d)", mstr, REGNO(x));
2066
+               if (mstr[0])
2067
+                       zip_debug_print(pfx, lvl, buf);
2068
+               else
2069
+                       zip_debug_print_m(pfx, lvl, buf, GET_MODE(x));
2070 102 dgisselq
+               } break;
2071
+       case IF_THEN_ELSE: // 51
2072
+               zip_debug_print(pfx, lvl, "(IF-THEN-ELSE");
2073
+               zip_debug_rtx_1(pfx, XEXP(x,0),lvl+1);
2074
+               zip_debug_rtx_1(pfx, XEXP(x,1),lvl+1);
2075
+               zip_debug_rtx_1(pfx, XEXP(x,2),lvl+1);
2076
+               zip_debug_print(pfx, lvl, ")");
2077
+               break;
2078
+       case PC:
2079
+               zip_debug_print(pfx, lvl, "(PC)");
2080
+               break;
2081
+       case CC0:
2082
+               zip_debug_print(pfx, lvl, "(CC0)");
2083
+               break;
2084
+       case COMPARE:
2085 127 dgisselq
+               zip_debug_print_m(pfx, lvl, "(COMPARE", GET_MODE(x));
2086 102 dgisselq
+               zip_debug_rtx_1(pfx, XEXP(x,0),lvl+1);
2087
+               zip_debug_rtx_1(pfx, XEXP(x,1),lvl+1);
2088
+               zip_debug_print(pfx, lvl, ")");
2089
+               break;
2090 111 dgisselq
+       case CONST:
2091
+               zip_debug_print_m(pfx, lvl, "(CONST", GET_MODE(x));
2092
+               zip_debug_rtx_1(pfx, XEXP(x,0),lvl+1);
2093
+               zip_debug_print(pfx, lvl, ")");
2094
+               break;
2095 102 dgisselq
+       case CONST_INT:
2096
+               { char buf[25];
2097
+               if (GET_MODE(x)==SImode)
2098 135 dgisselq
+                       sprintf(buf, "(CONST_INT:SI %ld)", (long)INTVAL(x));
2099 102 dgisselq
+               else if (GET_MODE(x)==VOIDmode)
2100 135 dgisselq
+                       sprintf(buf, "(CONST_INT:V %ld)", (long)INTVAL(x));
2101 102 dgisselq
+               else
2102 135 dgisselq
+                       sprintf(buf, "(CONST_INT:? %ld)", (long)INTVAL(x));
2103 102 dgisselq
+               zip_debug_print(pfx, lvl, buf);
2104
+               } break;
2105
+       case LABEL_REF:
2106 122 dgisselq
+               { char buf[256];
2107 111 dgisselq
+               sprintf(buf, "(LABEL *.L%d)", CODE_LABEL_NUMBER(LABEL_REF_LABEL(x)));
2108
+               zip_debug_print(pfx, lvl, buf);
2109
+               }
2110 102 dgisselq
+               break;
2111
+       case SYMBOL_REF:
2112
+               {
2113
+                       char buf[64];
2114
+                       sprintf(buf, "(SYMBOL: %s)", XSTR(x,0));
2115
+                       // fprintf(file, "%s", XSTR(x,0));
2116
+                       zip_debug_print(pfx, lvl, buf);
2117
+               }
2118
+               break;
2119
+       case MEM:
2120
+               zip_debug_print_m(pfx, lvl, "(MEM", GET_MODE(x));
2121
+               zip_debug_rtx_1(pfx, XEXP(x,0),lvl+1);
2122
+               zip_debug_print(pfx, lvl, ")");
2123
+               break;
2124
+       /*
2125
+       case VALUE:
2126
+               {
2127
+                       char buf[64];
2128
+                       sprintf(buf, "(VALUE: %d)", INTVAL(XEXP,0));
2129
+                       zip_debug_print_m(pfx, lvl, "buf", GET_MODE(x));
2130
+               }
2131
+               break;
2132
+       */
2133
+       case PLUS:
2134
+               zip_debug_print_m(pfx, lvl, "(PLUS", GET_MODE(x));
2135
+               zip_debug_rtx_1(pfx, XEXP(x,0),lvl+1);
2136
+               zip_debug_rtx_1(pfx, XEXP(x,1),lvl+1);
2137
+               zip_debug_print(pfx, lvl, ")");
2138
+               break;
2139
+       case MINUS:
2140
+               zip_debug_print_m(pfx, lvl, "(MINUS", GET_MODE(x));
2141
+               zip_debug_rtx_1(pfx, XEXP(x,0),lvl+1);
2142
+               zip_debug_rtx_1(pfx, XEXP(x,1),lvl+1);
2143
+               zip_debug_print(pfx, lvl, ")");
2144
+               break;
2145
+       case AND:
2146
+               zip_debug_print_m(pfx, lvl, "(AND", GET_MODE(x));
2147
+               zip_debug_rtx_1(pfx, XEXP(x,0),lvl+1);
2148
+               zip_debug_rtx_1(pfx, XEXP(x,1),lvl+1);
2149
+               zip_debug_print(pfx, lvl, ")");
2150
+               break;
2151
+       case IOR:
2152
+               zip_debug_print_m(pfx, lvl, "(OR", GET_MODE(x));
2153
+               zip_debug_rtx_1(pfx, XEXP(x,0),lvl+1);
2154
+               zip_debug_rtx_1(pfx, XEXP(x,1),lvl+1);
2155
+               zip_debug_print(pfx, lvl, ")");
2156
+               break;
2157
+       case XOR:
2158
+               zip_debug_print_m(pfx, lvl, "(XOR", GET_MODE(x));
2159
+               zip_debug_rtx_1(pfx, XEXP(x,0),lvl+1);
2160
+               zip_debug_rtx_1(pfx, XEXP(x,1),lvl+1);
2161
+               zip_debug_print(pfx, lvl, ")");
2162
+               break;
2163
+       case MULT:
2164
+               zip_debug_print_m(pfx, lvl, "(MULT", GET_MODE(x));
2165
+               zip_debug_rtx_1(pfx, XEXP(x,0),lvl+1);
2166
+               zip_debug_rtx_1(pfx, XEXP(x,1),lvl+1);
2167
+               zip_debug_print(pfx, lvl, ")");
2168
+               break;
2169
+       case EQ:        //
2170
+               zip_debug_print_m(pfx, lvl, "(EQ", GET_MODE(x));
2171
+               zip_debug_rtx_1(pfx, XEXP(x,0),lvl+1);
2172
+               zip_debug_rtx_1(pfx, XEXP(x,1),lvl+1);
2173
+               zip_debug_print(pfx, lvl, ")");
2174
+               break;
2175
+       case NE:        //
2176
+               zip_debug_print_m(pfx, lvl, "(NE", GET_MODE(x));
2177
+               zip_debug_rtx_1(pfx, XEXP(x,0),lvl+1);
2178
+               zip_debug_rtx_1(pfx, XEXP(x,1),lvl+1);
2179
+               zip_debug_print(pfx, lvl, ")");
2180
+               break;
2181
+       case GE:        //
2182
+               zip_debug_print_m(pfx, lvl, "(GE", GET_MODE(x));
2183
+               zip_debug_rtx_1(pfx, XEXP(x,0),lvl+1);
2184
+               zip_debug_rtx_1(pfx, XEXP(x,1),lvl+1);
2185
+               zip_debug_print(pfx, lvl, ")");
2186
+               break;
2187
+       case GT:        //
2188
+               zip_debug_print_m(pfx, lvl, "(GT", GET_MODE(x));
2189
+               zip_debug_rtx_1(pfx, XEXP(x,0),lvl+1);
2190
+               zip_debug_rtx_1(pfx, XEXP(x,1),lvl+1);
2191
+               zip_debug_print(pfx, lvl, ")");
2192
+               break;
2193
+       case LE:        //
2194
+               zip_debug_print_m(pfx, lvl, "(LE", GET_MODE(x));
2195
+               zip_debug_rtx_1(pfx, XEXP(x,0),lvl+1);
2196
+               zip_debug_rtx_1(pfx, XEXP(x,1),lvl+1);
2197
+               zip_debug_print(pfx, lvl, ")");
2198
+               break;
2199
+       case LT:        //
2200
+               zip_debug_print_m(pfx, lvl, "(LT", GET_MODE(x));
2201
+               zip_debug_rtx_1(pfx, XEXP(x,0),lvl+1);
2202
+               zip_debug_rtx_1(pfx, XEXP(x,1),lvl+1);
2203
+               zip_debug_print(pfx, lvl, ")");
2204
+               break;
2205
+       case GEU:       //
2206
+               zip_debug_print_m(pfx, lvl, "(GEU", GET_MODE(x));
2207
+               zip_debug_rtx_1(pfx, XEXP(x,0),lvl+1);
2208
+               zip_debug_rtx_1(pfx, XEXP(x,1),lvl+1);
2209
+               zip_debug_print(pfx, lvl, ")");
2210
+               break;
2211
+       case GTU:       //
2212
+               zip_debug_print_m(pfx, lvl, "(GTU", GET_MODE(x));
2213
+               zip_debug_rtx_1(pfx, XEXP(x,0),lvl+1);
2214
+               zip_debug_rtx_1(pfx, XEXP(x,1),lvl+1);
2215
+               zip_debug_print(pfx, lvl, ")");
2216
+               break;
2217
+       case LEU:       //
2218
+               zip_debug_print_m(pfx, lvl, "(LEU", GET_MODE(x));
2219
+               zip_debug_rtx_1(pfx, XEXP(x,0),lvl+1);
2220
+               zip_debug_rtx_1(pfx, XEXP(x,1),lvl+1);
2221
+               zip_debug_print(pfx, lvl, ")");
2222
+               break;
2223
+       case LTU:       //
2224
+               zip_debug_print_m(pfx, lvl, "(LTU", GET_MODE(x));
2225
+               zip_debug_rtx_1(pfx, XEXP(x,0),lvl+1);
2226
+               zip_debug_rtx_1(pfx, XEXP(x,1),lvl+1);
2227
+               zip_debug_print(pfx, lvl, ")");
2228
+               break;
2229
+       case SCRATCH:   //
2230
+               zip_debug_print_m(pfx, lvl, "(SCRATCH)", GET_MODE(x));
2231
+               break;
2232
+       case SUBREG:
2233
+               { char buf[25];
2234 111 dgisselq
+               if (REG_P(XEXP(x,0))) {
2235
+                       sprintf(buf, "(SUBREG %d/%d)", REGNO(XEXP(x,0)),
2236
+                               SUBREG_BYTE(x));
2237
+                       zip_debug_print(pfx, lvl, buf);
2238
+               } else if (MEM_P(XEXP(x,0))) {
2239
+                       sprintf(buf, "(SUBREG /%d", SUBREG_BYTE(x));
2240
+                       zip_debug_print(pfx, lvl, buf);
2241
+                       zip_debug_rtx_1(pfx, XEXP(x,0),lvl+1);
2242
+                       zip_debug_print(pfx, lvl, ")");
2243
+               } else {
2244
+                       sprintf(buf, "(SUBREG UNK /%d", SUBREG_BYTE(x));
2245
+                       zip_debug_print(pfx, lvl, buf);
2246
+                       zip_debug_rtx_1(pfx, XEXP(x,0),lvl+1);
2247
+                       zip_debug_print(pfx, lvl, ")");
2248
+               }}
2249
+               break;
2250 127 dgisselq
+       case ASHIFT:
2251
+               zip_debug_print_m(pfx, lvl, "(ASHIFT", GET_MODE(x));
2252
+               zip_debug_rtx_1(pfx, XEXP(x,0),lvl+1);
2253
+               zip_debug_rtx_1(pfx, XEXP(x,1),lvl+1);
2254
+               zip_debug_print(pfx, lvl, ")");
2255
+               break;
2256
+       case ASHIFTRT:
2257
+               zip_debug_print_m(pfx, lvl, "(ASHIFTRT", GET_MODE(x));
2258
+               zip_debug_rtx_1(pfx, XEXP(x,0),lvl+1);
2259
+               zip_debug_rtx_1(pfx, XEXP(x,1),lvl+1);
2260
+               zip_debug_print(pfx, lvl, ")");
2261
+               break;
2262
+       case LSHIFTRT:
2263
+               zip_debug_print_m(pfx, lvl, "(LSHIFTRT", GET_MODE(x));
2264
+               zip_debug_rtx_1(pfx, XEXP(x,0),lvl+1);
2265
+               zip_debug_rtx_1(pfx, XEXP(x,1),lvl+1);
2266
+               zip_debug_print(pfx, lvl, ")");
2267
+               break;
2268 102 dgisselq
+       default:
2269 111 dgisselq
+               { char buf[128];
2270 102 dgisselq
+               sprintf(buf, "(? = %d) -- calling DEBUG-RTX", GET_CODE(x));
2271
+               zip_debug_print(pfx, lvl, buf);
2272
+               debug_rtx(x);
2273
+               } break;
2274
+       }
2275
+}
2276
+
2277
+void
2278
+zip_debug_rtx_pfx(const char *pfx, const_rtx x) {
2279
+       zip_debug_rtx_1(pfx, x, 0);
2280
+}
2281
+
2282
+void
2283
+zip_debug_rtx(const_rtx x) {
2284
+       zip_debug_rtx_pfx("", x);
2285
+}
2286
+
2287
+void
2288 142 dgisselq
+zip_debug_ccode(int ccode) {
2289
+       switch(ccode) {
2290
+       case    EQ: fprintf(stderr, "EQ"); break;
2291
+       case    NE: fprintf(stderr, "NE"); break;
2292
+       case    GT: fprintf(stderr, "GT"); break;
2293
+       case    GE: fprintf(stderr, "GE"); break;
2294
+       case    LT: fprintf(stderr, "LT"); break;
2295
+       case    LE: fprintf(stderr, "LE"); break;
2296
+       case    GTU: fprintf(stderr, "GTU"); break;
2297
+       case    GEU: fprintf(stderr, "GEU"); break;
2298
+       case    LTU: fprintf(stderr, "LTU"); break;
2299
+       case    LEU: fprintf(stderr, "LEU"); break;
2300
+       default:
2301
+               fprintf(stderr, "%d", ccode); break;
2302
+       }
2303
+}
2304
+
2305
+void
2306 102 dgisselq
+zip_debug_insn(rtx_insn *insn ATTRIBUTE_UNUSED) {
2307
+}
2308
+
2309
+void
2310
+zip_debug_bb(basic_block bb) {
2311
+       rtx_insn        *insn;
2312
+
2313
+       fprintf(stderr, "************ BASIC-BLOCK ***************\n");
2314
+       FOR_BB_INSNS(bb, insn)
2315
+       {
2316
+               zip_debug_rtx(insn);
2317
+       }
2318
+}
2319
+
2320
+
2321
+static bool
2322 122 dgisselq
+zip_legitimate_opb(rtx x, bool strict)
2323 102 dgisselq
+{
2324 103 dgisselq
+       const bool      dbg = ((ALL_DEBUG_ON)||(false))&&(!ALL_DEBUG_OFF);
2325 102 dgisselq
+
2326 111 dgisselq
+       if (dbg) fprintf(stderr, "ZIP-LEGITIMATE-OPB\n");
2327 102 dgisselq
+       if (dbg) zip_debug_rtx_pfx("Test: ", x);
2328
+
2329
+       if (NULL_RTX == x)
2330
+               return false;
2331 122 dgisselq
+       else if ((GET_MODE(x) != SImode)&&(GET_MODE(x) != VOIDmode)) {
2332
+               if (dbg) fprintf(stderr, "ZIP-LEGITIMATE-OPB -> Mode failure\n");
2333 102 dgisselq
+               return false;
2334 122 dgisselq
+       } else if ((strict)&&(REG_P(x))) {
2335
+               if (REGNO(x)<zip_CC) {
2336
+                       if (dbg) fprintf(stderr, "ZIP-LEGITIMATE-OPB -> (Reg)\n");
2337
+                       return true;
2338
+               } else return false;
2339
+       } else if (register_operand(x, GET_MODE(x))) {
2340
+               // This also handles subregs
2341
+               if (dbg) fprintf(stderr, "ZIP-LEGITIMATE-OPB -> (Reg)\n");
2342
+               return true;
2343 111 dgisselq
+       } else if ((CONST_INT_P(x))
2344
+               &&(INTVAL(x) >= zip_min_opb_imm)
2345
+               &&(INTVAL(x) <= zip_max_opb_imm)) {
2346 136 dgisselq
+               if (dbg) fprintf(stderr, "ZIP-LEGITIMATE-OPB -> YES! (Const) %ld <= %ld <= %ld\n", (long)zip_min_opb_imm, (long)INTVAL(x), (long)zip_max_opb_imm);
2347 111 dgisselq
+               return true;
2348 122 dgisselq
+       // } else if ((GET_CODE(x) == LABEL_REF)||(GET_CODE(x)==CODE_LABEL)) {
2349
+               // return true;
2350 102 dgisselq
+       } else if (GET_CODE(x) == PLUS) {
2351
+               // Is it a valid register?
2352 122 dgisselq
+               if ((!strict)&&(!register_operand((rtx)XEXP((rtx)x,0), GET_MODE(x)))) {
2353 111 dgisselq
+                       if (dbg) fprintf(stderr, "ZIP-LEGITIMATE-OPB -> No (No reg in +%s)\n",
2354 102 dgisselq
+                       (GET_CODE(XEXP(x,1))==REG)?", reg in op[1]":"");
2355
+                       return false;
2356 122 dgisselq
+               } else if ((strict)&&((!REG_P(XEXP(x,0)))||(REGNO(XEXP(x,0))>=zip_CC))) {
2357 102 dgisselq
+                       return false;
2358
+               } if ((GET_CODE(XEXP(x, 1)) == CONST_INT)
2359
+                       &&(INTVAL(XEXP(x, 1)) <= zip_max_anchor_offset)
2360
+                       &&(INTVAL(XEXP(x, 1)) >= zip_min_anchor_offset)) {
2361 111 dgisselq
+                       if (dbg) fprintf(stderr, "ZIP-LEGITIMATE-OPB -> YES! (reg+int)\n");
2362 103 dgisselq
+                       // if((INTVAL(XEXP(x,1))<0)&&(REGNO(XEXP(x,0))==zip_SP))
2363
+                               // gcc_unreachable();
2364 102 dgisselq
+                       return true;
2365
+               } if ((GET_CODE(XEXP(x, 1)) == LABEL_REF)
2366 122 dgisselq
+                       ||(GET_CODE(XEXP(x, 1)) == CODE_LABEL)
2367 102 dgisselq
+                       ||(GET_CODE(XEXP(x, 1)) == SYMBOL_REF)) {
2368
+                       // While we can technically support this, the problem
2369
+                       // is that the symbol address could be anywhere, and we
2370
+                       // have no way of recovering if it's outside of our
2371
+                       // 14 allowable bits.
2372 111 dgisselq
+                       if (dbg) fprintf(stderr, "ZIP-LEGITIMATE-OPB -> No. (reg+lbl)\n");
2373 102 dgisselq
+                       return false;
2374
+               }
2375
+       }
2376
+
2377 111 dgisselq
+       if (dbg) fprintf(stderr, "ZIP-LEGITIMATE-OPB -> No\n");
2378 102 dgisselq
+       if (dbg) zip_debug_rtx(x);
2379
+       return false;
2380
+}
2381
+
2382
+static bool
2383
+zip_legitimate_move_operand_p(machine_mode mode ATTRIBUTE_UNUSED, rtx x, bool strict) {
2384
+       const bool      dbg = ((ALL_DEBUG_ON)||(false))&&(!ALL_DEBUG_OFF);
2385
+
2386
+       if (dbg) fprintf(stderr, "ZIP-VALID-MOVE-OPERAND\n");
2387
+       if (dbg) zip_debug_rtx_pfx("VMov?: ", x);
2388
+
2389 122 dgisselq
+       if (!zip_legitimate_opb(x, strict))
2390 102 dgisselq
+               return false;
2391 122 dgisselq
+       else if ((GET_CODE(x)==PLUS)&&(CONST_INT_P(XEXP(x,1)))) {
2392
+               if ((INTVAL(XEXP(x, 1)) > zip_max_mov_offset)
2393
+                       ||(INTVAL(XEXP(x, 1)) < zip_min_mov_offset)) {
2394 135 dgisselq
+                       if (dbg) fprintf(stderr, "ZIP-VALID-MOVE-OPERAND -> NO! (reg+int), int out of bounds: %ld\n", (long)INTVAL(XEXP(x,1)));
2395 102 dgisselq
+                       return false;
2396
+               }
2397
+       }
2398
+
2399 122 dgisselq
+       if (dbg) fprintf(stderr, "ZIP-VALID-MOVE-OPERAND -> Yes\n");
2400 102 dgisselq
+       if (dbg) zip_debug_rtx(x);
2401 122 dgisselq
+       return true;
2402 102 dgisselq
+}
2403
+
2404
+int
2405
+zip_pd_mov_operand(rtx op)
2406
+{
2407
+       const bool      dbg = ((ALL_DEBUG_ON)||(false))&&(!ALL_DEBUG_OFF);
2408
+
2409
+       if (dbg) fprintf(stderr, "ZIP-VALID-MOV(predicate) for OPERAND\n");
2410
+       return zip_legitimate_move_operand_p(VOIDmode, op, !can_create_pseudo_p());
2411
+}
2412
+
2413
+int
2414 111 dgisselq
+zip_pd_mvimm_operand(rtx op)
2415
+{
2416
+       const bool      dbg = ((ALL_DEBUG_ON)||(false))&&(!ALL_DEBUG_OFF);
2417
+
2418
+       if (dbg) fprintf(stderr, "ZIP-VALID-MVIMM(predicate) for OPERAND\n");
2419
+       if (!CONST_INT_P(op))
2420
+               return false;
2421
+       if (INTVAL(op) > zip_max_mov_offset)
2422
+               return false;
2423
+       if (INTVAL(op) < zip_min_mov_offset)
2424
+               return false;
2425
+       return true;
2426
+}
2427
+
2428
+int
2429
+zip_pd_imm_operand(rtx op)
2430
+{
2431
+       const bool      dbg = ((ALL_DEBUG_ON)||(false))&&(!ALL_DEBUG_OFF);
2432
+
2433
+       if (dbg) fprintf(stderr, "ZIP-VALID-IMM(predicate) for OPERAND\n");
2434
+       if (!CONST_INT_P(op))
2435
+               return false;
2436
+       if (INTVAL(op) > zip_max_anchor_offset)
2437
+               return false;
2438
+       if (INTVAL(op) < zip_min_anchor_offset)
2439
+               return false;
2440
+       return true;
2441
+}
2442
+
2443
+int
2444 102 dgisselq
+zip_address_operand(rtx op)
2445
+{
2446
+       const bool      dbg = ((ALL_DEBUG_ON)||(false))&&(!ALL_DEBUG_OFF);
2447
+
2448
+       if (dbg) fprintf(stderr, "ZIP-ADDRESS for OPERAND\n");
2449 111 dgisselq
+       if ((REG_P(op))&&(REGNO(op)==zip_CC))
2450
+               return false;
2451
+       else if ((GET_CODE(op) == PLUS)&&(REG_P(XEXP(op,0)))
2452
+                       &&(REGNO(XEXP(op,0))==zip_CC))
2453
+               return false;
2454
+       else
2455
+               return zip_legitimate_opb(op, !can_create_pseudo_p());
2456 102 dgisselq
+}
2457
+
2458
+int
2459 111 dgisselq
+zip_pd_opb_operand(rtx op)
2460 102 dgisselq
+{
2461
+       const bool      dbg = ((ALL_DEBUG_ON)||(false))&&(!ALL_DEBUG_OFF);
2462
+
2463 111 dgisselq
+       if (dbg) fprintf(stderr, "ZIP-OPB(predicate) for OPERAND\n");
2464 122 dgisselq
+       return zip_legitimate_opb(op, false); //, !can_create_pseudo_p());
2465 102 dgisselq
+}
2466
+
2467
+int
2468
+zip_ct_address_operand(rtx op)
2469
+{
2470
+       const bool      dbg = ((ALL_DEBUG_ON)||(false))&&(!ALL_DEBUG_OFF);
2471
+
2472
+       if (dbg) fprintf(stderr, "ZIP-ADDRESS(constraint) for OPERAND\n");
2473 111 dgisselq
+       return zip_legitimate_opb(op, !can_create_pseudo_p());
2474 102 dgisselq
+}
2475
+
2476
+int
2477
+zip_const_address_operand(rtx x) {
2478
+       const bool      dbg = ((ALL_DEBUG_ON)||(false))&&(!ALL_DEBUG_OFF);
2479
+
2480
+       if (dbg) fprintf(stderr, "is ZIP-CONST-ADDRESS?\n");
2481
+       if (dbg) zip_debug_rtx(x);
2482 127 dgisselq
+       if ((GET_MODE(x) != SImode)&&(GET_MODE(x) != VOIDmode)) {
2483
+               fprintf(stderr, "is ZIP-CONST-ADDRESS? -> NO, BAD MODE\n");
2484 102 dgisselq
+               return false;
2485 127 dgisselq
+       }
2486 102 dgisselq
+       if ((GET_CODE(x) == LABEL_REF)
2487
+                       ||(GET_CODE(x) == CODE_LABEL)
2488
+                       ||(GET_CODE(x) == SYMBOL_REF)) {
2489 127 dgisselq
+               if (dbg) fprintf(stderr, "is ZIP-CONST-ADDRESS? -> YES! (LBL)\n");
2490 102 dgisselq
+               return true;
2491
+       } else if (CONST_INT_P(x)) {
2492 127 dgisselq
+               if (dbg) fprintf(stderr, "is ZIP-CONST-ADDRESS? -> YES! (INT)\n");
2493 102 dgisselq
+               return true;
2494
+       } else if (GET_CODE(x) == PLUS) {
2495
+               if (dbg) fprintf(stderr, "is ZIP-CONST-ADDRESS(PLUS)\n");
2496
+               return ((zip_const_address_operand(XEXP(x,0)))
2497
+                       &&(CONST_INT_P(XEXP(x,1))));
2498
+       } else if (GET_CODE(x) == MINUS) {
2499
+               if (dbg) fprintf(stderr, "is ZIP-CONST-ADDRESS(MINUS)\n");
2500
+               return ((zip_const_address_operand(XEXP(x,0)))
2501
+                       &&(zip_const_address_operand(XEXP(x,1))));
2502
+       }
2503
+
2504
+       if (dbg) fprintf(stderr, "is ZIP-CONST-ADDRESS? -> No\n");
2505
+       if (dbg) zip_debug_rtx(x);
2506
+       return false;
2507
+}
2508
+
2509
+int
2510
+zip_ct_const_address_operand(rtx x) {
2511
+       const bool      dbg = ((ALL_DEBUG_ON)||(false))&&(!ALL_DEBUG_OFF);
2512
+
2513
+       if (dbg) fprintf(stderr, "ZIP-CONST-ADDRESS(constraint)\n");
2514
+       return zip_const_address_operand(x);
2515
+}
2516
+
2517
+int
2518
+zip_pd_const_address_operand(rtx x) {
2519
+       const bool      dbg = ((ALL_DEBUG_ON)||(false))&&(!ALL_DEBUG_OFF);
2520
+
2521
+       if (dbg) fprintf(stderr, "ZIP-CONST-ADDRESS(predicate)\n");
2522
+       return zip_const_address_operand(x);
2523
+}
2524
+
2525
+
2526
+static bool
2527
+zip_legitimate_address_p(machine_mode mode ATTRIBUTE_UNUSED, rtx x, bool strict)
2528
+{
2529
+       const bool      dbg = ((ALL_DEBUG_ON)||(false))&&(!ALL_DEBUG_OFF);
2530
+
2531
+       if (dbg) fprintf(stderr, "Zip-LEGITIMATE-ADDRESS-P\n");
2532
+       if (dbg) zip_debug_rtx(x);
2533
+
2534
+       // Only insist the register be a valid register if strict is true
2535 111 dgisselq
+       if (zip_legitimate_opb(x, strict))
2536 102 dgisselq
+               return true;
2537 111 dgisselq
+       // else if (zip_const_address_operand(x))
2538
+               // return true;
2539 102 dgisselq
+
2540
+       return false;
2541
+}
2542
+
2543 111 dgisselq
+static rtx
2544
+zip_legitimize_address(rtx x, rtx oldx ATTRIBUTE_UNUSED, machine_mode mode ATTRIBUTE_UNUSED) {
2545
+       const bool      dbg = ((ALL_DEBUG_ON)||(false))&&(!ALL_DEBUG_OFF);
2546
+
2547
+       if (dbg) zip_debug_rtx_pfx("LEGITIMIZE: ", x);
2548
+       if (zip_legitimate_address_p(mode, x, !can_create_pseudo_p()))
2549
+               return x;
2550
+
2551
+       if (GET_CODE(x)==PLUS) {
2552
+               if (!REG_P(XEXP(x,0)))
2553
+                       XEXP(x,0) = force_reg(GET_MODE(x),XEXP(x,0));
2554
+               if ((!zip_legitimate_address_p(mode, x, !can_create_pseudo_p()))
2555
+                       &&(!CONST_INT_P(XEXP(x,1))))
2556
+                       x = force_reg(GET_MODE(x),x);
2557
+       } else if (MEM_P(x))
2558
+               x = force_reg(GET_MODE(x),x);
2559
+
2560
+       if (dbg) zip_debug_rtx_pfx("LEGITIMATE: ", x);
2561
+       return x;
2562
+}
2563
+
2564 102 dgisselq
+void
2565
+zip_asm_output_def(FILE *stream, const char *name, const char *value)
2566
+{
2567
+       assemble_name(stream, name);
2568
+       fprintf(stream, "\t.equ ");
2569
+       assemble_name(stream, value);
2570
+       fputc('\n', stream);
2571
+}
2572
+
2573 111 dgisselq
+#define        USE_SUBREG
2574
+#ifdef USE_SUBREG
2575
+#define        SREG_P(RTX) ((SUBREG_P(RTX))&&(REG_P(XEXP(RTX,0))))
2576
+#define        SMEM_P(RTX) ((SUBREG_P(RTX))&&(MEM_P(XEXP(RTX,0))))
2577
+#else
2578
+#define        SREG_P(RTX)     false
2579
+#define        SMEM_P(RTX)     false
2580
+#endif
2581 102 dgisselq
+
2582
+const char *zip_set_zero_or_one(rtx condition, rtx dst) {
2583 103 dgisselq
+       const bool      dbg = ((ALL_DEBUG_ON)||(false))&&(!ALL_DEBUG_OFF);
2584 102 dgisselq
+       if (dbg) fprintf(stderr, "ZIP::SET-ZERO-OR-ONE\n");
2585
+       if (dbg) zip_debug_rtx_pfx("CND", condition);
2586
+       if (dbg) zip_debug_rtx_pfx("REG", dst);
2587
+       switch(GET_CODE(condition)) {
2588
+       case EQ:        return "LDI\t0,%0\n\tLDILO.Z\t1,%0";
2589
+       case NE:        return "LDI\t0,%0\n\tLDILO.NZ\t1,%0";
2590
+       case LT:        return "LDI\t0,%0\n\tLDILO.LT\t1,%0";
2591
+       case GT:        return "LDI\t0,%0\n\tLDILO.GT\t1,%0";
2592
+       case LE:        return "LDI\t1,%0\n\tLDILO.GT\t0,%0";
2593
+       case GE:        return "LDI\t0,%0\n\tLDILO.GE\t1,%0";
2594
+       case LTU:       return "LDI\t0,%0\n\tLDILO.C\t1,%0";
2595
+       case GTU:       return "LDI\t1,%0\n\tLDILO.C\t0,%0\n\tLDILO.Z\t0,%0";
2596
+       case LEU:       return "LDI\t0,%0\n\tLDILO.C\t1,%0\n\tLDILO.Z\t1,%0";
2597
+       case GEU:       return "LDI\t1,%0\n\tLDILO.C\t0,%0";
2598
+       default:
2599
+               zip_debug_rtx(condition);
2600
+               internal_error("CSTORE Unsupported condition");
2601
+               return NULL;
2602
+       }
2603
+}
2604
+
2605 127 dgisselq
+/*
2606 102 dgisselq
+const char *zip_binary_movsicc(rtx_code condition, const char *op, const int opno) {
2607
+       static char     result[64] = "";
2608
+       switch(condition) {
2609
+               //
2610
+               // Result already exists in the iffalse register
2611
+               // Can't change it.  Therefore, on the
2612
+               // condition ... move true register to the
2613
+               // destination
2614
+               //
2615
+               case EQ:        sprintf(result, "%s.Z\t%%%d,%%0", op, opno); break;
2616
+               case NE:        sprintf(result, "%s.NZ\t%%%d,%%0", op, opno); break;
2617
+               case LT:        sprintf(result, "%s.LT\t%%%d,%%0", op, opno); break;
2618
+               case GT:        sprintf(result, "%s.GT\t%%%d,%%0", op, opno); break;
2619
+               // .LE doesn't exist on Zip CPU--turn this into two instructions
2620
+               case LE:        sprintf(result, "%s.LT\t%%%d,%%0\n\t%s.Z\t%%%d,%%0", op, opno, op, opno); break;
2621
+               case GE:        sprintf(result, "%s.GE\t%%%d,%%0", op, opno); break;
2622
+               case LTU:       sprintf(result, "%s.C\t%%%d,%%0", op, opno); break;
2623
+               //
2624
+               // .GTU doesn't exist on the Zip CPU either. We also note that
2625
+               // .C will never be set on an equal condition.  Therefore, we
2626
+               // turn this into a XOR.NZ 2,CC, which will set the .C condition
2627
+               // as long as .Z wasn't true.  We then undo this when we're
2628
+               // done.  This is possible since none of these instructions
2629
+               // (LDI/MOV/Lod conditional, nor Xor conditional) will ever set
2630
+               // the condition codes.
2631
+               //
2632
+               // This is obviously not very optimal.  Avoid this by all means
2633
+               // if you can
2634
+               case GTU:       sprintf(result, "XOR.NZ\t2,CC\n%s.C\t%%%d,%%0\n\tXOR.NZ\t2,CC", op, opno); break;
2635
+               // .LEU doesn't exist on Zip CPU either--turn this into another
2636
+               // two instructions
2637
+               case LEU:       sprintf(result, "%s.C\t%%%d,%%0\n\t%s.Z\t%%%d,%%0", op, opno, op, opno); break;
2638
+               //
2639
+               // .GEU doesn't exist on Zip CPU.  Implementing it her is
2640
+               // painful.  We can change the condition codes to make it so,
2641
+               // but the instruction requires the condition codes not be
2642
+               // changed.  Hence, we must change them back if we do so.
2643
+               //
2644
+               // .C will be set on less than but not equal.  Hence !.C will
2645
+               // be true on greater than or equal.
2646
+               case GEU:       sprintf(result, "XOR\t2,CC\n%s.C\t%%%d,%%0\n\tXOR\t2,CC", op, opno); break;
2647
+               default:
2648
+                       internal_error("MOVSICC(BINARY) Unsupported condition");
2649
+                       return NULL;
2650
+       } return result;
2651
+}
2652 127 dgisselq
+*/
2653 102 dgisselq
+
2654 127 dgisselq
+bool
2655
+zip_supported_condition(int c) {
2656
+       switch(c) {
2657
+       case NE: case LT: case EQ: case GT: case GE: case LTU:
2658
+               return true;
2659
+               break;
2660
+       default:
2661
+               break;
2662
+       } return false;
2663 102 dgisselq
+}
2664
+
2665 127 dgisselq
+bool
2666
+zip_signed_comparison(int c) {
2667
+       switch(c) {
2668
+       case NE: case LT: case EQ: case GT: case GE:
2669
+               return true;
2670
+       default:
2671
+               break;
2672
+       } return false;
2673
+}
2674
+
2675 142 dgisselq
+bool
2676 127 dgisselq
+zip_expand_movsicc(rtx dst, rtx condition, rtx iftrue, rtx iffalse) {
2677 142 dgisselq
+       rtx_insn *insn;
2678 103 dgisselq
+       const bool      dbg = ((ALL_DEBUG_ON)||(false))&&(!ALL_DEBUG_OFF);
2679 102 dgisselq
+       if (dbg) fprintf(stderr, "ZIP::MOVSICC\n");
2680
+       if (dbg) zip_debug_rtx_pfx("DST", dst);
2681
+       if (dbg) zip_debug_rtx_pfx("CND", condition);
2682
+       if (dbg) zip_debug_rtx_pfx("TRU", iftrue);
2683
+       if (dbg) zip_debug_rtx_pfx("FAL", iffalse);
2684 127 dgisselq
+
2685
+       // Start with the condition
2686
+       rtx     cmpa = XEXP(condition,0), cmpb=XEXP(condition,1);
2687
+       enum rtx_code   cmpcode = GET_CODE(condition);
2688
+
2689 142 dgisselq
+       // Want to always do the false expression, and only sometimes the
2690
+       // true expression.  If, however, the false is a constant and the
2691
+       // true and destination are the same thing, this doesn't work.
2692
+       if (rtx_equal_p(dst, iftrue)) {
2693
+               // If the true value is the same as the destination already,
2694
+               // then swap so we only do the condition on true
2695
+               rtx tem = iffalse;
2696
+               iffalse = iftrue;
2697
+               iftrue  = tem;
2698
+               cmpcode = reverse_condition(cmpcode);
2699
+       }
2700
+
2701 127 dgisselq
+       //; Do we need to swap or adjust the condition?
2702
+       if (zip_supported_condition((int)cmpcode)) {
2703
+               // Keep everything as is
2704 142 dgisselq
+               if (dbg) fprintf(stderr, "ZIP::MOVSICC -- Condition is supported\n");
2705 127 dgisselq
+       } else if ((zip_supported_condition(reverse_condition(cmpcode)))
2706 142 dgisselq
+                       &&(!MEM_P(iffalse))
2707
+                       &&(!rtx_equal_p(dst,iffalse))) {
2708 127 dgisselq
+               rtx tem = iffalse;
2709
+               iffalse = iftrue;
2710
+               iftrue = tem;
2711
+
2712
+               cmpcode = reverse_condition(cmpcode);
2713
+       } else if ((zip_supported_condition((int)swap_condition(cmpcode)))
2714
+               &&((REG_P(cmpb))||(can_create_pseudo_p()))) {
2715
+               rtx tem = cmpa;
2716
+               cmpa = cmpb;
2717
+               cmpa = tem;
2718
+               cmpcode = swap_condition(cmpcode);
2719
+
2720
+               if ((GET_CODE(cmpa)==PLUS)&&(zip_signed_comparison((int)cmpcode))
2721
+                       &&(REG_P(XEXP(cmpa,0)))
2722
+                       &&(CONST_INT_P(XEXP(cmpa,1)))
2723
+                       &&(abs(INTVAL(XEXP(cmpa,1)))<(1<<17))) {
2724
+
2725
+                       // If we were doing CMP x(Rb),Ra
2726
+                       // and we just changed it to CMP Ra,x(Rb)
2727
+                       // adjust it to CMP -x(Ra),Rb
2728
+                       cmpb = plus_constant(SImode, cmpb, -INTVAL(XEXP(cmpa,1)));
2729
+                       cmpa = XEXP(cmpa,0);
2730
+               } else if (!REG_P(cmpa)) {
2731
+                       // Otherwise, if we had anything else in Rb other than
2732
+                       // a register ... such as a constant, then load it into
2733
+                       // a register before comparing it.  So
2734
+                       //      CMP x,Ra
2735
+                       // became
2736
+                       //      CMP Ra,x
2737
+                       // now becomes
2738
+                       //      LDI x,Rt
2739
+                       //      CMP Ra,Rt
2740
+                       // (We already tested for can_create_pseudo_p() above..)
2741
+                       tem = gen_reg_rtx(SImode);
2742
+                       emit_move_insn(tem, cmpa);
2743
+                       cmpa = tem;
2744 102 dgisselq
+               }
2745 127 dgisselq
+       } else {
2746
+               // Here's our last chance.
2747
+               // This will adjust for less than equal types of stuff
2748
+               int     cod = (int)cmpcode;
2749
+               zip_canonicalize_comparison(&cod, &cmpa, &cmpb, false);
2750
+               cmpcode = (enum rtx_code)cod;
2751 102 dgisselq
+       }
2752
+
2753 142 dgisselq
+       if (dbg) fprintf(stderr, "ZIP::MOVSICC -- Post-Modes\n");
2754
+       if (dbg) zip_debug_rtx_pfx("DST-P: ", dst);
2755
+       if (dbg) zip_debug_rtx_pfx("CND-P: ", condition);
2756
+       if (dbg) zip_debug_rtx_pfx("TRU-P: ", iftrue);
2757
+       if (dbg) zip_debug_rtx_pfx("FAL-P: ", iffalse);
2758
+
2759
+       if (!zip_supported_condition((int)cmpcode)) {
2760
+               if (dbg) {
2761
+               fprintf(stderr, "ZIP::MOVSICC -- Unsupported condition: ");
2762
+                       zip_debug_ccode(cmpcode);
2763
+                       fprintf(stderr, "\n");
2764
+               }
2765
+               return false;
2766
+       }
2767 127 dgisselq
+       gcc_assert(zip_supported_condition((int)cmpcode));
2768
+
2769
+       //; Always do the default move
2770 142 dgisselq
+       bool    conditionally_do_false = false;
2771
+       conditionally_do_false = (MEM_P(iffalse))
2772
+               &&(!rtx_equal_p(dst,iffalse))
2773
+               &&(zip_supported_condition(reverse_condition(cmpcode)));
2774
+       conditionally_do_false = conditionally_do_false || (rtx_equal_p(dst,iftrue));
2775
+       if ((conditionally_do_false)&&(!zip_supported_condition(reverse_condition(cmpcode)))) {
2776
+               if (dbg) {
2777
+                       fprintf(stderr, "ZIP::MOVSICC -- Cant support the reverse condition: ");
2778
+                       zip_debug_ccode(cmpcode);
2779
+                       fprintf(stderr, "\n");
2780
+               }
2781
+               return false;
2782
+       }
2783 127 dgisselq
+
2784 142 dgisselq
+       if ((!rtx_equal_p(dst, iffalse))&&(!conditionally_do_false)) {
2785
+               if (dbg)
2786
+               fprintf(stderr, "ZIP::MOVSICC -- EMITTING MOVE FALSE->DST\n");
2787
+               insn = emit_move_insn(dst, iffalse);
2788
+               if (dbg) zip_debug_rtx_pfx("BARE-U: ", insn);
2789
+       }
2790
+
2791 127 dgisselq
+       rtx     cc_rtx = gen_rtx_REG(CCmode, zip_CC);
2792
+
2793
+       //; Now let's get our comparison right
2794 142 dgisselq
+       if (dbg) fprintf(stderr, "ZIP::MOVSICC -- EMITTING COMPARISON\n");
2795
+       insn = emit_insn(gen_rtx_SET(VOIDmode, cc_rtx,
2796 127 dgisselq
+               gen_rtx_COMPARE(CCmode, cmpa, cmpb)));
2797 142 dgisselq
+       if (dbg) zip_debug_rtx_pfx("BARE-C: ", insn);
2798 127 dgisselq
+
2799
+       //; Finally, let's load the value on true
2800 142 dgisselq
+       if (!rtx_equal_p(dst, iftrue)) {
2801
+               if (dbg) fprintf(stderr, "ZIP::MOVSICC -- EMITTING BARE\n");
2802
+               insn=emit_insn(gen_movsicc_bare(dst,
2803 127 dgisselq
+                       gen_rtx_fmt_ee(cmpcode, SImode, NULL_RTX, NULL_RTX),
2804
+                       iftrue, dst));
2805 142 dgisselq
+               if (dbg) zip_debug_rtx_pfx("BARE-T: ", insn);
2806
+       }
2807
+
2808
+       if (conditionally_do_false) {
2809
+               gcc_assert(zip_supported_condition(reverse_condition(cmpcode)));
2810
+               insn=emit_insn(gen_movsicc_bare(dst,
2811
+                       gen_rtx_fmt_ee(reverse_condition(cmpcode), SImode,
2812
+                       NULL_RTX, NULL_RTX), iffalse, dst));
2813
+               if (dbg) zip_debug_rtx_pfx("BARE-F: ", insn);
2814
+       }
2815
+
2816
+       // Return true on success
2817
+       return true;
2818 102 dgisselq
+}
2819
+
2820
+const char *zip_addsicc(rtx dst, rtx condition, rtx ifsrc, rtx addv ATTRIBUTE_UNUSED) {
2821
+       // We know upon entry that REG_P(dst) must be true
2822
+       if (!REG_P(dst))
2823
+               internal_error("%s","ADDSICC into something other than register");
2824
+       if ((REG_P(ifsrc))&&(REGNO(dst)==REGNO(ifsrc))) {
2825
+               switch (GET_CODE(condition)) {
2826
+               case EQ: return "ADD.Z\t%3,%0";
2827
+               case NE: return "ADD.NZ\t%3,%0";
2828
+               case LT: return "ADD.LT\t%3,%0";
2829
+               case GT: return "ADD.GT\t%3,%0";
2830
+               case LE: return "ADD.LT\t%3,%0\n\tADD.Z\t%3,%0";
2831
+               case GE: return "ADD.GE\t%3,%0";
2832
+               case LTU: return "ADD.C\t%3,%0";
2833
+               case LEU: return "ADD.C\t%3,%0\n\tADD.Z\t%3,%0";
2834
+               case GEU: return "XOR\t2,CC\n\tADD.C\t%3,%0\n\tXOR\t2,CC";
2835
+               // Can do a GEU comparison, and then undo on the Zero condition
2836
+               case GTU: return "XOR\t2,CC\n\tADD.C\t%3,%0\n\tSUB.Z\t%3,%0\n\tXOR\t2,CC";
2837
+               default:
2838
+                       internal_error("%s", "Zip/No usable addsi expansion");
2839
+                       break;
2840
+               }
2841
+       } else {
2842
+               // MOV A+REG,REG
2843
+               switch (GET_CODE(condition)) {
2844
+               case EQ: return "MOV.Z\t%3+%2,%0";
2845
+               case NE: return "MOV.NZ\t%3+%2,%0";
2846
+               case LT: return "MOV.LT\t%3+%2,%0";
2847
+               case GT: return "MOV.GT\t%3+%2,%0";
2848
+               case LE: return "MOV.LT\t%3+%2,%0\n\tMOV.Z\t%3+%2,%0";
2849
+               case GE: return "MOV.GE\t%3+%2,%0";
2850
+               case LTU: return "MOV.C\t%3+%2,%0";
2851
+               case LEU: return "MOV.C\t%3+%2,%0\n\tMOV.Z\t%3+%2,%0";
2852
+               case GEU: return "XOR\t2,CC\n\tMOV.C\t%3+%2,%0\n\tXOR\t2,CC";
2853
+               // Can do a GEU comparison, and then undo on the Zero condition
2854
+               // EXCEPT: with a move instruction, what's there to undo?  We
2855
+               // just clobbered our register!
2856
+               // case GTU: return "XOR\t2,CC\n\tMOV.C\t%3,%0\n\tSUB.Z\t%3,%0XOR\t2,CC";
2857
+               default:
2858
+                       internal_error("%s", "Zip/No usable addsi(reg,reg) expansion");
2859
+                       break;
2860
+               }
2861
+       }
2862
+
2863
+       return "BREAK";
2864
+}
2865
+
2866 103 dgisselq
+static int     zip_memory_move_cost(machine_mode mode, reg_class_t ATTRIBUTE_UNUSED, bool in ATTRIBUTE_UNUSED) {
2867 102 dgisselq
+       int     rv = 14;
2868
+       if ((mode == DImode)||(mode == DFmode))
2869
+               rv += 2;
2870
+       return rv;
2871
+}
2872
+
2873 103 dgisselq
+// #warning "How do we tell the compiler LDI label is expensive as 2 ops"?
2874 117 dgisselq
+static bool    zip_cannot_modify_jumps_p(void) {
2875
+       // Let's try their suggested approach, keeping us from modifying jumps
2876
+       // after reload.  This should also allow our peephole2 optimizations
2877
+       // to adjust things back to what they need to be if necessary.
2878
+       return (reload_completed || reload_in_progress);
2879
+}
2880 122 dgisselq
+
2881
+rtx_insn       *zip_ifcvt_info;
2882
+
2883
+void
2884
+zip_ifcvt_modify_tests(ce_if_block *ce_info ATTRIBUTE_UNUSED, rtx *true_expr, rtx *false_expr) {
2885
+       const bool      dbg = ((ALL_DEBUG_ON)||(false))&&(!ALL_DEBUG_OFF);
2886
+       if (dbg) fprintf(stderr, "IFCVT-MODIFY-TESTS\n");
2887
+       if (*true_expr) switch(GET_CODE(*true_expr)) {
2888
+               case LE:
2889
+               case GTU:
2890
+               case GEU:
2891
+               case LEU:
2892
+                       if (dbg) fprintf(stderr, "TRUE, missing expr\n");
2893
+                       if (dbg) zip_debug_rtx(*true_expr);
2894
+                       *true_expr = NULL_RTX;
2895
+                       break;
2896
+               default: // LT, GT, GTE, LTU, NE, EQ
2897
+                       break;
2898
+       }
2899
+
2900
+       if (*false_expr) switch(GET_CODE(*false_expr)) {
2901
+               case LE:
2902
+               case GTU:
2903
+               case GEU:
2904
+               case LEU:
2905
+                       if (dbg) fprintf(stderr, "FALSE, missing expr\n");
2906
+                       if (dbg) zip_debug_rtx(*false_expr);
2907
+                       *false_expr = NULL_RTX;
2908
+               default:
2909
+                       break;
2910
+       }
2911
+       if ((dbg)&&((!*true_expr)||(!*false_expr)))
2912
+               fprintf(stderr, "IFCVT-MODIFY-TESTS -- FAIL\n");
2913
+}
2914
+
2915
+void
2916 142 dgisselq
+zip_ifcvt_machdep_init(struct ce_if_block *ceinfo ATTRIBUTE_UNUSED) {
2917 122 dgisselq
+/*
2918 142 dgisselq
+if (!ceinfo->then_bb)
2919
+       return;
2920
+rtx_insn *insn;
2921
+FOR_BB_INSNS(ceinfo->then_bb, insn) {
2922
+       fprintf(stderr, "IFCVT -- INIT\n");
2923
+       zip_debug_rtx_pfx("INIT-BB", insn);
2924 122 dgisselq
+}
2925
+*/
2926
+/*
2927
+       zip_ifcvt_info = NULL;
2928
+       rtx_insn *insn, *ifinsn = NULL;
2929
+       FOR_BB_INSNS(ceinfo->test_bb, insn) {
2930
+               rtx     p;
2931
+               p = single_set(insn);
2932
+               if (!p) continue;
2933
+               if (SET_DEST(p)==pc_rtx) {
2934
+                       ifinsn = insn;
2935
+               }
2936
+               if (!REG_P(SET_DEST(p)))
2937
+                       continue;
2938
+               if (GET_MODE(SET_DEST(p))!=CCmode)
2939
+                       continue;
2940
+               if (REGNO(SET_DEST(p))!=zip_CC)
2941
+                       continue;
2942
+               zip_ifcvt_info = insn;
2943
+       }
2944
+
2945
+       if (zip_ifcvt_info)
2946
+               zip_debug_rtx_pfx("PUTATIVE-CMP",zip_ifcvt_info);
2947
+       if (ifinsn)
2948
+               zip_debug_rtx_pfx("PRIOR-JMP",ifinsn);
2949
+*/
2950
+}
2951
+
2952 142 dgisselq
+void
2953
+zip_ifcvt_modify_insn(struct ce_if_block *ceinfo ATTRIBUTE_UNUSED,
2954
+               rtx pattern ATTRIBUTE_UNUSED,
2955
+               rtx_insn *insn ATTRIBUTE_UNUSED) {
2956
+       // zip_debug_rtx_pfx("MODIFY-INSN: ", insn);
2957
+}
2958
+
2959
+void
2960
+zip_ifcvt_modify_cancel(struct ce_if_block *ceinfo ATTRIBUTE_UNUSED) {
2961
+/*
2962
+       fprintf(stderr, "IFCVT -- CANCEL\n");
2963
+       zip_ifcvt_info = NULL;
2964
+*/
2965
+}
2966
+
2967
+void
2968
+zip_ifcvt_modify_final(struct ce_if_block *ceinfo ATTRIBUTE_UNUSED) {
2969
+/*
2970
+rtx_insn *insn;
2971
+FOR_BB_INSNS(ceinfo->test_bb, insn) {
2972
+       fprintf(stderr, "IFCVT -- FINAL\n");
2973
+       zip_debug_rtx_pfx("FINAL-TEST-BB", insn);
2974
+}
2975
+       zip_ifcvt_info = NULL;
2976
+*/
2977
+}
2978
+
2979
+
2980 127 dgisselq
+int    zip_insn_sets_cc(rtx_insn *insn) {
2981
+       return (get_attr_ccresult(insn)==CCRESULT_SET);
2982
+}
2983
+
2984
+int    zip_is_conditional(rtx_insn *insn) {
2985
+       return (get_attr_conditional(insn)==CONDITIONAL_YES);
2986
+}
2987 102 dgisselq
diff -Naur '--exclude=*.swp' gcc-5.3.0-original/gcc/config/zip/zip.h gcc-5.3.0-zip/gcc/config/zip/zip.h
2988
--- gcc-5.3.0-original/gcc/config/zip/zip.h     1969-12-31 19:00:00.000000000 -0500
2989 146 dgisselq
+++ gcc-5.3.0-zip/gcc/config/zip/zip.h  2016-05-12 15:20:14.000702915 -0400
2990
@@ -0,0 +1,4077 @@
2991 102 dgisselq
+////////////////////////////////////////////////////////////////////////////////
2992
+//
2993
+// Filename:   gcc/config/zip/zip.h
2994
+//
2995
+// Project:    Zip CPU backend for the GNU Compiler Collection
2996
+//
2997
+// Purpose:
2998
+//
2999
+// Creator:    Dan Gisselquist, Ph.D.
3000
+//             Gisselquist Technology, LLC
3001
+//
3002
+////////////////////////////////////////////////////////////////////////////////
3003
+//
3004
+// Copyright (C) 2016, Gisselquist Technology, LLC
3005
+//
3006
+// This program is free software (firmware): you can redistribute it and/or
3007
+// modify it under the terms of  the GNU General Public License as published
3008
+// by the Free Software Foundation, either version 3 of the License, or (at
3009
+// your option) any later version.
3010
+//
3011
+// This program is distributed in the hope that it will be useful, but WITHOUT
3012
+// ANY WARRANTY; without even the implied warranty of MERCHANTIBILITY or
3013
+// FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
3014
+// for more details.
3015
+//
3016
+// You should have received a copy of the GNU General Public License along
3017
+// with this program.  (It's in the $(ROOT)/doc directory, run make with no
3018
+// target there if the PDF file isn't present.)  If not, see
3019
+// <http://www.gnu.org/licenses/> for a copy.
3020
+//
3021
+// License:    GPL, v3, as defined and found on www.gnu.org,
3022
+//             http://www.gnu.org/licenses/gpl.html
3023
+//
3024
+//
3025
+////////////////////////////////////////////////////////////////////////////////
3026
+#ifndef        GCC_ZIP_H
3027
+#define        GCC_ZIP_H
3028
+
3029
+
3030
+//
3031
+//
3032 127 dgisselq
+// Zip CPU configuration defines
3033 102 dgisselq
+//
3034
+//
3035
+#define        ZIP_USER        0        // Assume we are in supervisor mode
3036
+#define        ZIP_MULTIPLY    1       // Assume we have multiply instructions
3037
+#define        ZIP_DIVIDE      1       // Assume we have divide instructions
3038
+#define        ZIP_FPU         0        // Assume we have no floating point instructions
3039
+#define        ZIP_PIPELINED   1       // Assume our instructions are pipelined
3040
+#define        ZIP_VLIW        1       // Assume we have the VLIW feature
3041
+#define        ZIP_ATOMIC      ((ZIP_PIPELINED)&&(ZIP_VLIW))
3042
+#define        ZIP_PIC         0        // Attempting to produce PIC code, with GOT
3043
+#define        ZIP_HAS_DI      1
3044 127 dgisselq
+// Should we use the peephole optimizations?
3045
+#define        ZIP_PEEPHOLE    1       // 0 means no peephole optimizations.
3046 138 dgisselq
+// How about the new long multiply instruction set?
3047
+#define        ZIP_LONGMPY     1       // 0 means use the old instruction set
3048 102 dgisselq
+
3049
+// Zip has 16 registers in each user mode.
3050
+//     Register 15 is the program counter (PC)
3051
+//     Register 14 is the condition codes (CC)
3052
+//     Register 13 is the stack pointer   (SP)
3053
+//     Register 12 (may be) the Global Offset Table pointer (GOT)
3054
+//     Register  0 (may be) the return address pointer
3055
+// Registers 16-31 may only be used in supervisor mode.
3056
+#define        is_ZIP_GENERAL_REG(REGNO)       ((REGNO)<13)
3057
+#define        is_ZIP_REG(REGNO)               ((REGNO)<16)
3058
+
3059 103 dgisselq
+// #define     zip_FP_PSEUDO   16
3060
+#define        zip_PC          15
3061
+#define        zip_CC          14
3062
+#define        zip_SP          13
3063
+#define        zip_FP          12
3064
+#define        zip_GOT         11
3065
+#define        zip_AP          10
3066
+#define        zip_R1          1
3067
+#define        zip_R0          0
3068 102 dgisselq
+
3069
+#define        ZIP_FIRST_ARG_REGNO     1
3070
+#define        ZIP_LAST_ARG_REGNO      5
3071 111 dgisselq
+#define        NUM_ARG_REGS            (ZIP_LAST_ARG_REGNO-ZIP_FIRST_ARG_REGNO+1)
3072
+#define        MAX_PARM_REGS           (ZIP_LAST_ARG_REGNO-ZIP_FIRST_ARG_REGNO+1)
3073 102 dgisselq
+
3074
+/* The overall framework of an assembler file */
3075
+
3076
+#define        ASM_COMMENT_START       ";"
3077
+#define        ASM_APP_ON              ""
3078
+#define        ASM_APP_OFF             ""
3079
+
3080
+#define        FILE_ASM_OP             "\t.file\n"
3081
+
3082
+/* Output and Generation of Labels */
3083
+#define        GLOBAL_ASM_OP           "\t.global\t"
3084
+
3085
+#undef BITS_PER_UNIT
3086
+#define        BITS_PER_UNIT   (32)
3087
+
3088
+/* Assembler Commands for Alignment */
3089
+#define        ASM_OUTPUT_ALIGN(STREAM,POWER)  \
3090 127 dgisselq
+       { int pwr = POWER; fprintf(STREAM, "\t.p2align %d\n", (pwr<2)?2:pwr); }
3091 102 dgisselq
+
3092
+
3093
+/* A C compound statement to output to stdio stream STREAM the assembler syntax
3094
+ * for an instruction operand X. */
3095
+#define        PRINT_OPERAND(STREAM, X, CODE)  zip_print_operand(STREAM, X, CODE)
3096
+#define        PRINT_OPERAND_ADDRESS(STREAM, X) zip_print_operand_address(STREAM, X)
3097
+
3098
+/* Passing arguments in registers */
3099
+#define        FUNCTION_VALUE_REGNO_P(REGNO)   ((REGNO)==zip_R1)
3100
+
3101
+/* Define how to find the value returned by a function.  VALTYPE is the data
3102
+ * type of the value (as a tree).  If the precise function being called is known
3103
+ * FUNC is its FUNCTION_DECL; otherwise, FUNC is 0. */
3104
+#define        FUNCTION_VALUE(VALTYPE, FUNC) gen_rtx_REG(TYPE_MODE(VALTYPE), zip_R1)
3105
+
3106
+/* Define how to find the value returned by a library function assuming the
3107
+ * value has mode MODE.
3108
+ */
3109
+#define        LIBCALL_VALUE(MODE)     gen_rtx_REG(MODE, zip_R1)
3110
+
3111
+
3112
+/* STACK AND CALLING */
3113
+
3114
+
3115
+/* Define this macro as a C expression that is nonzero for registers that are
3116
+ * used by the epilogue or the return pattern.  The stack and frame pointer
3117
+ * registers are already assumed to be used as needed.
3118
+ */
3119
+#define        EPILOGUE_USES(R)        (R == RETURN_ADDRESS_REGNUM)
3120
+
3121
+
3122
+/* The best alignment to use in cases where we have a choice. */
3123 127 dgisselq
+#define        FASTEST_ALIGNMENT       BITS_PER_WORD
3124 102 dgisselq
+
3125
+/* MAX_FIXED_MODE_SIZE -- An integer expression for the size in bits of the
3126
+ * largest integer machine mode that should actually be used.  All integer
3127
+ * machine modes of this size and smaller can be used for structures and unions
3128
+ * with the appropriate sizes.  If this macro is undefined,
3129
+ * GET_MODE_BITSIZE(DImode) is assumed.
3130
+ *
3131
+ * ZipCPU -- The default looks good enough for us.
3132
+ */
3133
+
3134
+/* Generate Code for Profiling
3135
+ */
3136
+#define        FUNCTION_PROFILER(FILE,LABELNO)         (abort(), 0)
3137
+
3138
+
3139
+/* A C expression which is nonzero if register number NUM is suitable for use
3140
+ * as an index register in operand addresses.
3141
+ */
3142
+#define        REGNO_OK_FOR_INDEX_P(NUM)       0
3143
+
3144
+
3145
+/* A C compound statement with a conditional 'goto LABEL;' executed if X
3146
+ * (an RTX) is a legitimate memory address on the target machine for a memory
3147
+ * operand of mode MODE.
3148
+ */
3149 111 dgisselq
+/* 17.03 Controlling the Compilation Driver, 'gcc' */
3150
+// DRIVER_SELF_SPECS
3151
+// OPTION_DEFAULT_SPECS
3152
+// CPP_SPEC
3153
+// CPLUSPLUS_CPP_SPEC
3154
+// CC1_SPEC
3155
+// CC1PLUS_SPEC
3156
+/* ASM_SPEC ... A C string constant that tells the GCC driver program options
3157
+ * to pass to the assembler.  It can also specify how to translate options you
3158
+ * give to GCC into options for GCC to pass to the assembler.  See the file
3159
+ * 'sun3.h' for an example of this.
3160
+ *
3161
+ * Do not define thismacro if it does not need to do anything.
3162
+ */
3163
+// #undef      ASM_SPEC
3164
+// ASM_FINAL_SPEC
3165
+// ASM_NEEDS_DASH_FOR_PIPED_INPUT
3166
+
3167
+/* LINK_SPEC ... A C string constant that tells the GCC driver program options
3168
+ * to pass to the linker.  It can also specify how to translate options you give
3169
+ * to GCC into options for GCC to pass to the linker.
3170
+ *
3171
+ * Do not define this macro if it does not need to do anything.
3172
+ */
3173
+
3174
+/* LIB_SPEC ... Another C string constant very much like LINK_SPEC.  The
3175
+ * difference between the two is that LIB_SPEC is used at the end of the
3176
+ * command given to the linker.
3177
+ *
3178
+ * If this macro is not defined, a default is provided that loads the standard
3179
+ * C library from the usual place.  See 'gcc.c'.
3180
+ */
3181
+#undef LIB_SPEC
3182
+// #define     LIB_SPEC        "%{!g:-lc} %{g:-lg} -lzip"
3183
+#define        LIB_SPEC        ""
3184
+
3185
+/* LIBGCC_SPEC ... Another C string constant that tells the GCC driver program
3186
+ * hoow and when to place a reference to 'libgcc.a' into the linker command
3187
+ * line.  This constant is placed both before and after the value of LIB_SPEC.
3188
+ *
3189
+ * If this macro is not defined, the GCC driver provides a default that passes
3190
+ * the string '-lgcc' to the linker.
3191
+ */
3192
+#undef LIBGCC_SPEC
3193
+#define        LIBGCC_SPEC     ""
3194
+
3195
+/* REAL_LIBGCC_SPEC ... By default, if ENABLE_SHARED_LIBGCC is defined, the
3196
+ * LIBGCC_SPEC is not directly used by the driver program but is instead
3197
+ * modified to refer to different versions of 'libgcc.a' depending on the
3198
+ * values of the command line flags '-static', '-shared', '-static-libgcc',
3199
+ * and '-shared-libgcc'.  On targets where these modifications are
3200
+ * inappropriate, define REAL_LIBGCC_SPEC instead.  REAL_LIBGCC_SPEC tells the
3201
+ * driver how to place a reference to 'libgcc' on the link command line, but
3202
+ * unlike LIBGCC_SPEC, it is used unmodified.
3203
+ */
3204
+#define        REAL_LIBGCC_SPEC        ""
3205
+
3206
+// USE_LD_AS_NEEDED
3207
+// LINK_EH_SPEC
3208
+
3209
+/* STARTFILE_SPEC ... Another C string constant used much like LINK_SPEC.  The
3210
+ * difference between the two is that STARTFILE_SPEC is used at the very
3211
+ * beginning of the command given to the linker.
3212
+ *
3213
+ * If this macro is not defined, a default is provided that loads the standard
3214
+ * C startup file from the usual place.  See 'gcc.c'
3215
+ */
3216
+#undef STARTFILE_SPEC
3217
+#define        STARTFILE_SPEC  ""
3218
+
3219
+/* ENDFILE_SPEC ... Another C string constant used much like LINK_SPEC.  The
3220
+ * difference between the two is that ENDFILE_SPEC is used at the very end
3221
+ * of the command given to the linker.
3222
+ *
3223
+ * Do not define this macro if it does not do anything.
3224
+ */
3225
+// #undef      ENDFILE_SPEC
3226
+// #define     ENDFILE_SPEC    ""
3227
+
3228
+// THREAD_MODEL_SPEC
3229
+// SYSROOT_SUFFIX_SPEC
3230
+// SYSROOT_HEADERS_SUFFIX_SPEC
3231
+// EXTRA_SPECS
3232
+// LINK_LIBGCC_SPECIAL_1
3233
+// LINK_GCC_C_SEQUENCE_SPEC
3234
+// LINK_COMMAND_SPEC
3235
+// TARGET_ALWAYS_STRIP_DOTDOT
3236
+// MULTILIB_DEFAULTS
3237
+// RELATIVE_PREFIX_NOT_LINKDIR
3238
+// MD_EXEC_PREFIX
3239
+// STANDARD_STARTFILE_PREFIX
3240
+// STANDARD_STARTFILE_PREFIX_1
3241
+// STANDARD_STARTFILE_PREFIX_2
3242
+// MD_STARTFILE_PREFIX
3243
+// MD_STARTFILE_PREFIX_1
3244
+// INIT_ENVIRONMENT
3245
+// LOCAL_INCLUDE_DIR
3246
+#undef LOCAL_INCLUDE_DIR
3247
+
3248
+// NATIVE_SYSTEM_HEADER_COMPONENT
3249
+// INCLUDE_DEFAULTS
3250
+
3251 102 dgisselq
+/* 17.03 Run-time Target Specification */
3252
+
3253
+/* TARGET_CPU_CPP_BUILTINS() ... This function-like macro expands to a block of
3254
+ * code that defines built-in preprocessor macros and assertions for the target
3255
+ * CPU, using the functions builtin_define, builtin_define_std, and
3256
+ * builtin_assert.  When the front end calls this macro it provides a trailing
3257
+ * semicolon, and since it has finished command line option proccessing your
3258
+ * code can use those results freely.
3259
+ *
3260
+ * ZipCPU --- We should probably capture in this macro what capabilities the
3261
+ * command line parameters we've been given indicate that our CPU has.  That
3262
+ * way, code can be adjusted depending upon the CPU's capabilities.
3263
+ */
3264
+#define        TARGET_CPU_CPP_BUILTINS()                       \
3265
+       { builtin_define("__ZIPCPU__");                 \
3266
+       if (ZIP_FPU) builtin_define("__ZIPFPU__");      \
3267
+       if (ZIP_ATOMIC) builtin_define("__ZIPATOMIC__");        \
3268
+       }
3269
+       // If (zip_param_has_fpu)  builtin_define("__ZIPFPU__");
3270
+       // If (zip_param_has_div)  builtin_define("__ZIPDIV__");
3271
+       // If (zip_param_has_mpy)  builtin_define("__ZIPMPY__");
3272
+       // If (zip_param_has_lock) builtin_define("__ZIPLOCK__");
3273
+       // If (zip_param_supervisor) builtin_define("__ZIPUREGS__");
3274
+       // If (we support int64s) builtin_define("___int64_t_defined");
3275
+
3276
+/* TARGET_OS_CPP_BUILTINS() ... Similarly to TARGET_CPU_CPP_BUILTINS but this
3277
+ * macro is optional and is used for the target operating system instead.
3278
+ */
3279
+
3280
+/* Option macros: (we need to define these eventually ... )
3281
+ *
3282
+ *     TARGET_HANDLE_OPTION
3283
+ *     TARGET_HANDLE_C_OPTION
3284
+ *     TARGET_OBJ_CONSTRUCT_STRING_OBJECT
3285
+ *     TARGET_OBJ_DECLARE_UNRESOLVED_CLASS_REFERENCE
3286
+ *     TARGET_OBJ_DECLARE_CLASS_DEFINITION
3287
+ *     TARGET_STRING_OBJECT_REF_TYPE_P
3288
+ *     TARGET_CHECK_STRING_OBJECT_FORMAT_ARG
3289
+ *     TARGET_OVERRIDE_OPTIONS_AFTER_CHANGE(VOID)
3290
+ *     C_COMMON_OVERRIDE_OTPTIONS
3291
+ *     TARGET_OPTION_OPTIMIZATION_TABLE
3292
+ *     TARGET_OPTION_INIT_STRUCT
3293
+ *     TARGET_OPTION_DEFAULT_PARAMS
3294
+ */
3295
+
3296
+/* SWITCHABLE_TARGET
3297
+ *
3298
+ * Zip CPU doesn't need this, so it defaults to zero.  No need to change it
3299
+ * here.
3300
+ */
3301
+
3302
+/* TARGET_FLOAT_EXCEPTIONS_ROUNDING_SUPPORTED_P(VOID) ... Returns true if the
3303
+ * target supports IEEE 754 floating-point exceptions and rounding modes, false
3304
+ * otherwise.  This is intended to relate to the float and double types, but not
3305
+ * necessarily "long double".  By default, returns true if the adddf3
3306
+ * instruction pattern is available and false otherwise, on the assumption that
3307
+ * hardware floating point supports exceptions and rounding modes but software
3308
+ * floating point does not.
3309
+ *
3310
+ * ZipCPU floating point is barely going to be functional, I doubt it will
3311
+ * support all of these bells and whistles when full functionality is even
3312
+ * achieved.  Therefore, we won't support these modes.  However, we can't just
3313
+ * set this to zero, so let's come back to this.
3314
+ */
3315
+// #warning "Wrong answer encoded to date"
3316 103 dgisselq
+// #undef      TARGET_FLOAT_EXCEPTIONS_ROUNDING_SUPPORTED_P
3317 102 dgisselq
+// #define     TARGET_FLOAT_EXCEPTIONS_ROUNDING_SUPPORTED_P(X) 0
3318
+
3319
+/* 17.04 Defining data structures for per-function information */
3320
+
3321
+/* INIT_EXPANDERS ... Macro called to initialize any target specific
3322
+ * information.  This macro is called once per function, before generation of
3323
+ * any RTL has begun.  The intention is to allow the initialization of the
3324
+ * function pointer init_machine_status.
3325
+ */
3326
+// #warning "I may need to define this to handle function return addresses ..."
3327
+
3328
+/* 17.05 Storage Layout */
3329
+
3330
+/* Storage Layout */
3331
+#define        BITS_BIG_ENDIAN         0        // MSB has highest number
3332
+#define        BYTES_BIG_ENDIAN        1       // 1 if MSB is lowest number
3333
+#define        WORDS_BIG_ENDIAN        1       // 1 if MSW is lowest number
3334
+#define        FLOAT_WORDS_BIG_ENDIAN  1
3335
+#define        BITS_PER_WORD           32
3336
+// #define     MAX_BITS_PER_WORD       // defaults to BITS_PER_WORD
3337
+#define        UNITS_PER_WORD          1       // Storage units in a word, pwr of 2:1-8
3338
+#define        MIN_UNITS_PER_WORD      1       // Default is UNITS_PER_WORD
3339
+/* POINTER_SIZE ... Width of a pointer in bits.  You must specify a value no
3340
+ * wider than the width of Pmode.  If it is not equal to the width of Pmode,
3341
+ * you must define POINTERS_EXTEND_UNSIGNED. If you do not specify a value the
3342
+ * default is BITS_PER_WORD.
3343
+ *
3344
+ * ZipCPU --- All of our pointers are 32-bits, the width of our address bus.
3345
+ */
3346
+#define        POINTER_SIZE            32      // Ptr width in bits
3347
+/* POINTERS_EXTEND_UNSIGNED ... A C expression that determines how pointers
3348
+ * should be extended from ptr_mode to either Pmode or word_mode.  It is greater
3349
+ * than zero if pointers should be zero-extended, zero if they should be sign
3350
+ * extended, and negative if some other conversion is needed.  In the last case,
3351
+ * the extension is done by the target's ptr_extend instruction.
3352
+ *
3353
+ * You need not define this macro if the ptr_mode, Pmode, and word_mode are all
3354
+ * the same width.
3355
+ *
3356
+ * ZipCPU --- While we shouldn't need this, QImode and HImode have the same
3357
+ * number of bits as SImode.  Therefore, one might wish to convert between the
3358
+ * two.  Hence, we specify how we would do that here.
3359
+ */
3360 127 dgisselq
+#define        POINTERS_EXTEND_UNSIGNED        1
3361 102 dgisselq
+
3362
+/* PROMOTE_MODE(m,unsignedp,type) ... A macro to update m and unsignedp when an
3363
+ * object whose type is type and which has he specified mode and signedness is
3364
+ * to be stored in a register.  This macro is only called when type is a scalar
3365
+ * type.
3366
+ *
3367
+ * On most RISC machines, which only have operations that operate on a full
3368
+ * register, define this macro to set m to word_mode if m is an integer mode
3369
+ * narrower than BITS_PER_WORD.  In most cases, only integer modes should be
3370
+ * widened because wider precision floating-point operations are usually more
3371
+ * expensive than their narrower counterparts.
3372
+ *
3373
+ * For most machines, the macro definition does not change unsigndep.  However,
3374
+ * some machines, have instructions that preferentially handle either signed or
3375
+ * unsigned quantities of certain modes.  For example, on the DEC Alpha, 32-bit
3376
+ * loads from memory and 32-bit add instructions sign-extend the result to
3377
+ * 64-bits. On such machines, set unsignedp according to which kind of extension
3378
+ * is more efficient.
3379
+ *
3380
+ * Do not define this macro if it would never modify m.
3381
+ *
3382
+ * ZipCPU --- We need to always (if possible) promote everything to SImode where
3383
+ * we can handle things.  HImode and QImode just don't make sense on this CPU.
3384
+ */
3385
+#define        PROMOTE_MODE(M,U,T)     if ((GET_MODE_CLASS(M)==MODE_INT)&&(GET_MODE_SIZE(M)<2)) (M)=SImode;
3386
+
3387
+// TARGET_PROMOTE_FUNCTION_MODE
3388
+/* PARM_BOUNDARY ... Normal alignment required for function parameters on the
3389
+ * stack, in bits.  All stack parameters receive at least this much alignment
3390
+ * regardless of data type.  On most machines, this is the same as the size of
3391
+ * an integer.
3392
+ */
3393
+#define        PARM_BOUNDARY   32
3394
+
3395
+/* STACK_BOUNDARY ... Define this macro to the minimum alignment enforced by
3396
+ * hardware for the stack pointer on this machine.  The definition is a C
3397
+ * expression for the desired alignment (measured in bits).  This value is used
3398
+ * as a default if PREFERRED_STACK_BOUNDARY is not defined.  On most machines,
3399
+ * this should be the same as PARM_BOUNDARY.
3400
+ */
3401
+#define        STACK_BOUNDARY  PARM_BOUNDARY
3402
+
3403
+/* PREFERRED_STACK_BOUNDARY ... Define this ... */
3404 127 dgisselq
+#define        PREFERRED_STACK_BOUNDARY        STACK_BOUNDARY
3405 102 dgisselq
+
3406 127 dgisselq
+/* INCOMING_STACK_BOUNDARY ... Define this macro if the incoming stack boundary
3407
+ * may be different from PREFERRED_STACK_BOUNDARY.  This macro must evaluate
3408
+ * to a value equal to or larger than STACK_BOUNDARY.
3409 102 dgisselq
+ */
3410 127 dgisselq
+#define        INCOMING_STACK_BOUNDARY STACK_BOUNDARY
3411 102 dgisselq
+
3412
+/* FUNCTION_BOUNDARY ... Alignment required for a function entry point, in bits.
3413
+ */
3414
+#define        FUNCTION_BOUNDARY       32
3415
+
3416
+/* BIGGEST_ALIGNMENT ... Biggest alignment that any data type can require on
3417
+ * this machine, in bits.  Note that this is not the biggest alignment that is
3418
+ * supported, just the biggest alignment that, when violated, may cause a fault.
3419
+ */
3420
+#define BIGGEST_ALIGNMENT      32
3421
+
3422 127 dgisselq
+/* MALLOC_ABI_ALIGNMENT
3423
+ */
3424
+
3425
+/* ATTRIBUTE_ALIGNED_VALUE
3426
+ */
3427
+
3428 102 dgisselq
+/* MINIMUM_ATOMIC_ALIGNMENT ... If defined, the smallest alignment, that can be
3429
+ * given to an object that can be referenced in one operation, without
3430
+ * disturbing any nearby object.  Normally, this is BITS_PER_UNIT, but may be
3431
+ * larger on machines that don't have byte or halfword store operations.
3432
+ */
3433
+#define        MINIMUM_ATOMIC_ALIGNMENT        BITS_PER_UNIT
3434
+
3435 127 dgisselq
+/* BIGGEST_FIELD_ALIGNMENT ... Biggest alignment that any structure or union
3436
+ * field can require on this machine, in bits.  If defined, this overrides
3437
+ * BIGGEST_ALIGNMENT for structure and union fields only, unless the field
3438
+ * alignment has been set by the __attribute__((aligned(n))) construct.
3439
+ */
3440
+#define        BIGGEST_FIELD_ALIGNMENT BITS_PER_UNIT
3441
+
3442
+/* ADJUST_FIELD_ALIGN
3443
+ */
3444
+#define        ADJUST_FIELD_ALIGN(A,B) BITS_PER_WORD
3445
+
3446
+/* MAX_STACK_ALIGNMENT
3447
+ */
3448
+#define        MAX_STACK_ALIGNMENT     BITS_PER_WORD
3449
+
3450
+/* MAX_OFILE_ALIGNMENT
3451
+ */
3452
+
3453
+/* DATA_ALIGNMENT(TYPE, BASIC-ALIGN) ... If defined, a C expression to compute
3454
+ * the alignment for a variable in the static store.  TYPE is the data type, and
3455
+ * BASIC-ALIGN is the alignment that the object would ordinarily have.  The
3456
+ * value of this macro is used instead of that alignment to align the object.
3457
+ *
3458
+ * If this macro is not defined, then BASIC-ALIGN is used.
3459
+ *
3460
+ * ZipCPU -- in hindsight, if this macro is not defined then the compiler is
3461
+ * broken.  So we define it to be our fastest alignment, or 32-bits.
3462
+ */
3463
+#define        DATA_ALIGNMENT(TYPE, ALIGN)     BITS_PER_WORD
3464
+
3465
+
3466
+/* DATA_ABI_ALIGNMENT(TYPE,BASIC-ALIGN)
3467
+ */
3468
+
3469
+/* CONSTANT_ALIGNMENT(CONST, BASIC-ALIGN) ... If defined, a C expression to
3470
+ * compute the alignment given to a constant that is being placed in memory.
3471
+ * CONST is the constant and BASIC-ALIGN is the alignment that the object
3472
+ * would ordinarily have.  The value of this macro is used instead of that
3473
+ * alignment to align the object.
3474
+ *
3475
+ * If this macro is not defined, then BASIC-ALIGN is used.
3476
+ *
3477
+ * ZipCPU -- in hindsiht, if this macro is not defined then the compiler is
3478
+ * broken.  We'll define it as above.
3479
+ *
3480
+ */
3481
+#define        CONSTANT_ALIGNMENT(EXP, ALIGN)  BITS_PER_WORD
3482
+
3483
+/* LOCAL_ALIGNMENT(TYPE,BASIC-ALIGN) ... If defined ...
3484
+ */
3485
+#define        LOCAL_ALIGNMENT(TYP,ALIGN)      BITS_PER_WORD
3486
+
3487
+/* TARGET_VECTOR_ALIGNMENT
3488
+ */
3489
+
3490
+/* STACK_SLOT_ALIGNMENT
3491
+ */
3492
+#define        STACK_SLOT_ALIGNMENT(T,M,B)     BITS_PER_WORD
3493
+
3494
+/* LOCAL_DECL_ALIGNMEN(DECL)
3495
+ */
3496
+#define        LOCAL_DECL_ALIGNMENT(DECL)      BITS_PER_WORD
3497
+
3498
+/* MINIMUM_ALIGNMENT
3499
+ */
3500
+#define        MINIMUM_ALIGNMENT(EXP,MOD,ALIGN)        BITS_PER_WORD
3501
+
3502
+/* EMPTY_FIELD_BOUNDARY
3503
+ * Alignment of field after 'int : 0' in a structure.
3504
+ */
3505
+#define        EMPTY_FIELD_BOUNDARY    BITS_PER_WORD
3506
+
3507
+/* STRUCTURE_SIE_BOUNDARY
3508
+ * ZipCPU -- Every structures size must be a multiple of 32-bits.
3509
+ */
3510
+#define        STRUCTURE_SIZE_BOUNDARY BITS_PER_WORD
3511
+
3512 102 dgisselq
+/* STRICT_ALIGNMENT ... Set this nonzero if move instructions will actually
3513
+ * fail to work when given unaligned data.  If instructions will merely go
3514
+ * slower in that case, define this macro as 0.
3515 125 dgisselq
+ *
3516
+ * ZipCPU -- Since we have defined our smallest addressable unit to be a 32-bit
3517
+ * word (one byte, on our machine), and since reading any amount of 32-bit words
3518
+ * is easy, then there really are no instructions that will ever fail.
3519 102 dgisselq
+ */
3520 125 dgisselq
+#define        STRICT_ALIGNMENT        0
3521 102 dgisselq
+
3522 127 dgisselq
+/* PCC_BITFIELD_TYPE_MATTERS -- define this if you wish to imitate the the way
3523
+ * other C compilers handle alignment of bit-fields and the structures that
3524
+ * contain them.
3525
+ *
3526
+ * The behavior is that the type written for a named bit-field (int, short, or
3527
+ * other integer type) imposes an alignment for the entire structure, as if the
3528
+ * structure really did contain an ordinary field of that type.  In addition,
3529
+ * the bit-field is placed within the structure so that it would fit within
3530
+ * such a field, not crossing a boundary for it.
3531
+ *
3532
+ * Thus, no most machines, a named bit-field whose type is written as int would
3533
+ * not cross a four-byte boundary, and would force four-byte alignment for the
3534
+ * whole structure.  (The alignment used may not be four bytes; it is controlled
3535
+ * by other alignment parameters.)
3536
+ *
3537
+ * An unnamed bit-field will not affect the alignment of the containing
3538
+ * structure.
3539
+ *
3540
+ * If the macro is defined, its definition should be a C expression, a non
3541
+ * zero value for the expression enables this behavior.
3542
+ * Look at the fundamental type that is used for a bit-field and use that to
3543
+ * impose alignment on the enclosing structure.  struct s{int a:8}; should
3544
+ * have the same alignment as 'int', not 'char'.
3545
+ */
3546
+#undef PCC_BITFIELD_TYPE_MATTERS
3547
+#define        PCC_BITFIELD_TYPE_MATTERS       0
3548
+
3549 102 dgisselq
+/* MAX_FIXED_MODE_SIZE ... An integer expression for the size in bits of the
3550
+ * largest integer machine mode that should actually be used.  All integer
3551
+ * machine modes of this size or smaller can be used for structures and unions
3552
+ * with the appropriate sizes.  If this macro is undefined,
3553
+ * GET_MODE_BITSIZE(DImode) is assumed.
3554
+ *
3555
+ * ZipCPU ... Get_MOD_BITSIZE(DImode) will be 64, and this is really not the
3556
+ * size on bits of the largest integer machine mode.  However, that's the case
3557
+ * with most DI implementations: A long is two words, spliced together.  We'd
3558
+ * like to support that eventually, but we need to get there.  Hence, let's use
3559
+ * compile time flag (ZIP_HAS_DI) that we can enable when we're ready.
3560
+ */
3561
+#if (ZIP_HAS_DI != 0)
3562
+#define        MAX_FIXED_MODE_SIZE     64
3563
+#else
3564
+#define        MAX_FIXED_MODE_SIZE     32
3565
+#endif
3566
+
3567
+
3568
+/* 17.06 Layout of Source Language Data Types */
3569
+
3570
+#undef CHAR_TYPE_SIZE
3571
+#undef SHORT_TYPE_SIZE
3572
+#undef INT_TYPE_SIZE
3573
+#undef LONG_TYPE_SIZE
3574
+#undef LONG_LONG_TYPE_SIZE
3575
+//
3576
+#define        CHAR_TYPE_SIZE  32
3577
+#define        SHORT_TYPE_SIZE 32
3578
+#define        INT_TYPE_SIZE   32
3579
+#define        LONG_TYPE_SIZE  32
3580
+#define        LONG_LONG_TYPE_SIZE     64
3581
+// BOOL_TYPE_SIZE defaults to CHAR_TYPE_SIZE
3582
+#undef FLOAT_TYPE_SIZE
3583
+#undef DOUBLE_TYPE_SIZE
3584
+#undef LONG_DOUBLE_TYPE_SIZE
3585
+#define        FLOAT_TYPE_SIZE         32
3586
+#define        DOUBLE_TYPE_SIZE        FLOAT_TYPE_SIZE // Zip CPU doesn't support dbls
3587
+#define        LONG_DOUBLE_TYPE_SIZE   64      // This'll need to be done via emulation
3588
+// SHORT_FRAC_TYPE_SIZE
3589
+// LONG_FFRACT_TYPE_SIZE
3590
+// LONG_LONG_FRACT_TIME_SIZE
3591
+#undef SHORT_ACCUM_TYPE_SIZE
3592
+#undef ACCUM_TYPE_SIZE
3593
+#undef LONG_ACCUM_TYPE_SIZE
3594
+#define        SHORT_ACCUM_TYPE_SIZE   SHORT_TYPE_SIZE
3595
+#define        ACCUM_TYPE_SIZE         INT_TYPE_SIZE
3596
+#define        LONG_ACCUM_TYPE_SIZE    LONG_TYPE_SIZE
3597
+
3598
+/* LIBGCC2_GNU_PREFIX ... This macro corresponds to the TARGET_GNU_PREFIX target
3599
+ * hook and should be defined if that hook is overriden to be true.  It causes
3600
+ * function names in libgcc to be changed to use a __gnu_ prefix for their name
3601
+ * rather than the default __.  A port which uses this macro should also arrange
3602
+ * to use t-gnu-prefix in the libgcc config.host.
3603
+ *
3604
+ * ZipCPU -- I see no reason to define and therefore change this behavior.
3605
+ */
3606
+
3607
+/* TARGET_FLT_EVAL_METHOD ... A C expression for the value for FLT_EVAL_METHOD
3608
+ * in float.h,, assuming, if applicable, that the floating-point control word
3609
+ * is in its default state.  If you do not define this macro the value of
3610
+ * FLT_EVAL_METHOD will be zero.
3611
+ *
3612
+ * ZipCPU --- ???
3613
+ */
3614
+
3615
+/* WIDEST_HARDWARE_FP_SIZE ... A C expression for the size in bits of the widest
3616
+ * floating-point format supported by the hardware.  If you define this macro,
3617
+ * you must specify a value less than or equal to the value of LONG_DOUBLE_...
3618
+ * If you do not define this macro, the value of LONG_DOUBLE_TYPE_SIZE is the
3619
+ * default.
3620
+ *
3621
+ * ZipCPU supports 32-bit IEEE floats--IF THE SUPPORT IS COMPILED IN!  This
3622
+ * really needs to be determined, then, based upon a compile time parameter
3623
+ * where the one compiling the code states whether or not the H/W even has
3624
+ * floating point support.
3625
+ *
3626
+ * For now, we'll assume it does--but once we implement GCC parameters, we'll
3627
+ * need to change this.
3628
+ */
3629
+#undef WIDEST_HARDWARE_FP_SIZE
3630
+// #warning "Definition needs to change if no FPU present"
3631
+#define        WIDEST_HARDWARE_FP_SIZE FLOAT_TYPE_SIZE
3632
+
3633
+/* DEFAULT_SIGNED_CHAR ... An expression whose value is 1 or 0, according to
3634
+ * whether the type char should be signed or unsigned by default.  The user
3635
+ * can always override this default with the options -fsigned-char and
3636
+ * -funsigned-char.
3637
+ *
3638
+ * ZipCPU--let's go with the default behavior.
3639
+ */
3640
+#define        DEFAULT_SIGNED_CHAR     1
3641
+
3642
+/* TARGET_DEFAULT_SHORT_ENUMS(VOID) ... This target hook should return true if
3643 103 dgisselq
+ * the compiler should give an enum type only as many bytes as it takes to
3644 102 dgisselq
+ * represent the range of possible values of that type.  It should return
3645
+ * false if all enum types should be allocated like int.
3646
+ *
3647
+ * The default is to return false.  This is what the ZipCPU needs, so we won't
3648
+ * override it.
3649
+ */
3650
+
3651
+/* SIZE_TYPE ... A C expression for a string describing the name of the data
3652
+ * type to use for size values.  The typedef name size_t is defined using the
3653
+ * contents of the string.
3654
+ *
3655
+ * If you don't define this macro, the default is "long unsigned int".  Since
3656
+ * on the ZipCPU this is a 32-bit number, and all ZipCPU values are 32-bits,
3657
+ * the default seems perfect for us.
3658
+ */
3659
+#define        SIZE_TYPE       "unsigned int"
3660
+
3661
+/* SIZETYPE ... GCC defines internal types () for expressions dealing with size.
3662
+ * This macro is a C expression for a string describing the name of the data
3663
+ * type from which the precision of sizetype is extracted.  The string has the
3664
+ * same restrictions as SIZE_TYPE string.  If you don't define this macro, the
3665
+ * default is SIZE_TYPE --- which seems good enough for us.
3666
+ */
3667
+
3668
+/* PTRDIFF_TYPE ... A C expression for a string describing the name of the data
3669 127 dgisselq
+ * type to use for the result of subtracting two pointers.  The typedef name
3670 102 dgisselq
+ * ptrdiff_t is defined using the contents of the string.  See SIZE_TYPE for
3671
+ * more information.
3672
+ *
3673
+ * The default is "long int" which for the ZipCPU is 32-bits---still good enough
3674
+ * for us.
3675
+ */
3676
+#define        PTRDIFF_TYPE    "int"
3677
+
3678
+/* WCHAR_TYPE ... A C expression for a string describing the name of the data
3679
+ * type to use for wide characters.  The typedef name wchar_t is defined using
3680
+ * the contents of  the string.  If you don't define this macro, the default is
3681
+ * 'int'--good enough for ZipCPU.
3682
+ */
3683
+
3684
+/* WCHAR_TYPE_SIZE ... A C expression for the size in bits of the data type for
3685
+ * wide characters.  This is used in cpp, which cannot make use of WCHAR_TYPE.
3686
+ */
3687
+#undef WCHAR_TYPE_SIZE
3688
+#define        WCHAR_TYPE_SIZE 32
3689
+
3690
+/* WINT_TYPE ... A C expression for a string describing the name of the data
3691
+ * type to use for wide characters passed to printf and returned from getwc.
3692
+ * The typedef name wint_t is defined using the contents of the string.  See
3693
+ *
3694 103 dgisselq
+ * ZipCPU -- If you don't define this macro, the default is "unsigned int"--also
3695
+ * best for us again.
3696 102 dgisselq
+ */
3697
+
3698
+/* INTMAX_TYPE ... A C expression for a string describing the name of the
3699
+ * data type that can represent any value of any standard or extended signed
3700
+ * integer type.  The typedef name intmax_t is defined using the contents of
3701
+ * the string.
3702
+ *
3703
+ * If you don't define this macro, the default is the first of "int", "long int"
3704
+ * or "long long int" that has as much precision as "long long int".
3705
+ */
3706
+
3707
+/* UINTMAX_TYPE ... same as INTMAX_TYPE, but for unsigned
3708
+ */
3709
+
3710
+#undef SIG_ATOMIC_TYPE
3711
+#if (ZIP_ATOMIC != 0)
3712
+#define        SIG_ATOMIC_TYPE "int"
3713
+#else
3714
+#define        SIG_ATOMIC_TYPE NULL    // We have no atomic types, but registers
3715
+#endif
3716
+#undef INT8_TYPE
3717
+#define        INT8_TYPE               NULL    // We have no 8-bit integer type
3718
+#undef INT16_TYPE
3719
+#define        INT16_TYPE              NULL
3720
+#undef INT32_TYPE
3721
+#define        INT32_TYPE              "int"
3722
+#undef UINT8_TYPE
3723
+#define        UINT8_TYPE              NULL
3724
+#undef UINT16_TYPE
3725
+#define        UINT16_TYPE             NULL
3726
+#undef UINT32_TYPE
3727
+#define        UINT32_TYPE             "unsigned int"
3728
+#undef INT_LEAST8_TYPE
3729
+#define        INT_LEAST8_TYPE         "int"
3730
+#undef INT_LEAST16_TYPE
3731
+#define        INT_LEAST16_TYPE        "int"
3732
+#undef INT_LEAST32_TYPE
3733
+#define        INT_LEAST32_TYPE        "int"
3734
+#undef UINT_LEAST8_TYPE
3735
+#define        UINT_LEAST8_TYPE        "unsigned int"
3736
+#undef UINT_LEAST16_TYPE
3737
+#define        UINT_LEAST16_TYPE       "unsigned int"
3738
+#undef UINT_LEAST32_TYPE
3739
+#define        UINT_LEAST32_TYPE       "unsigned int"
3740
+#undef INT_FAST8_TYPE
3741
+#define        INT_FAST8_TYPE          "int"
3742
+#undef INT_FAST16_TYPE
3743
+#define        INT_FAST16_TYPE         "int"
3744
+#undef INT_FAST32_TYPE
3745
+#define        INT_FAST32_TYPE         "int"
3746
+#undef UINT_FAST8_TYPE
3747
+#define        UINT_FAST8_TYPE         "unsigned int"
3748
+#undef UINT_FAST16_TYPE
3749
+#define        UINT_FAST16_TYPE        "unsigned int"
3750
+#undef UINT_FAST32_TYPE
3751
+#define        UINT_FAST32_TYPE        "unsigned int"
3752
+#undef INTPTR_TYPE
3753
+#define        INTPTR_TYPE             "unsigned int"
3754
+#undef UINTPTR_TYPE
3755
+#define        UINTPTR_TYPE            "unsigned int"
3756
+
3757
+#undef INT64_TYPE
3758
+#undef UINT64_TYPE
3759
+#undef INT_LEAST64_TYPE
3760
+#undef UINT_LEAST64_TYPE
3761
+#undef INT_FAST64_TYPE
3762
+#undef UINT_FAST64_TYPE
3763
+
3764
+#if (ZIP_HAS_DI != 0)
3765
+#define        INT64_TYPE              "long int"
3766
+#define        UINT64_TYPE             "long unsigned int"
3767
+#define        INT_LEAST64_TYPE        "long int"
3768
+#define        UINT_LEAST64_TYPE       "long unsigned int"
3769
+#define        INT_FAST64_TYPE         "long int"
3770
+#define        UINT_FAST64_TYPE        "long unsigned int"
3771
+#else
3772
+#define        INT64_TYPE              NULL
3773
+#define        UINT64_TYPE             NULL
3774
+#define        INT_LEAST64_TYPE        NULL
3775
+#define        UINT_LEAST64_TYPE       NULL
3776
+#define        INT_FAST64_TYPE         NULL
3777
+#define        UINT_FAST64_TYPE        NULL
3778
+#endif
3779
+
3780
+#define        TARGET_PTRMEMFUNC_VBI_LOCATION  ptrmemfunc_vbit_in_pfn
3781
+
3782
+
3783
+/* 17.07 Register Usage / Register definitions */
3784
+
3785
+/* FIRST_PSEUDO_REGISTER ... Number of hardware registers known to the compiler.
3786
+ * They receive numbers 0 through FIRST_PSEUDO_REGISTER-1; thus the first
3787
+ * pseudo register's numbrer really is assigned the number
3788
+ * FIRST_PSEUDO_REGISTER.
3789
+ *
3790
+ * ZipCPU---There are 16 registers in the ZipCPU, numbered 0-15 with the CC
3791
+ * and PC register being numbered 14 and 15 respectively.  Therefore, the
3792
+ * compiler can take register number 16 and above and do whatever it wants
3793
+ * with it.
3794
+ */
3795
+#ifdef DEFINE_USER_REGS
3796 103 dgisselq
+#  define      FIRST_PSEUDO_REGISTER   32
3797 102 dgisselq
+#else
3798 103 dgisselq
+#  ifdef       zip_FP_PSEUDO
3799
+#    define    FIRST_PSEUDO_REGISTER   (zip_FP_PSEUDO+1)
3800
+#  else
3801
+#    define    FIRST_PSEUDO_REGISTER   16
3802
+#  endif
3803 102 dgisselq
+#endif
3804
+
3805
+/* FIXED_REGISTERS ... An initializer that says which registers are used for
3806
+ * fixed purposes all throughout the compiled code and are therefore not
3807
+ * available for general allocation.  These would include the stack pointer, the
3808
+ * frame pointer (except on machines where that can be used as a general
3809
+ * register when no frame pointer is needed), the program counter on machines
3810
+ * where that is considered one of the addressable registers, and any other
3811
+ * numbered register with a standard use.
3812
+ *
3813
+ * This information is expressed as a sequence of numbers, separated by commas,
3814
+ * and surrounded by braces.  The nth number is 1 if register n is fixed, 0
3815
+ * otherwise.
3816
+ *
3817
+ * For the Zip CPU, we have three fixed registers that are not available for
3818
+ * general allocation:
3819
+ *
3820
+ *     SP      The stack pointer
3821
+ *     CC      The condition codes and CPU state register
3822
+ *     PC      The program counter
3823
+ *
3824
+ * Other registers, such as FP (the frame pointer) or GBL (the global offset
3825
+ * table pointer) are registers that we hope will not be so fixed.
3826
+ */
3827 127 dgisselq
+#ifdef DEFINE_USER_REGS
3828
+#  define      FIXED_REGISTERS         { 0,0,0,0,0,0,0,0,0,0,0,0,0,1,1,1,1,   1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1 }
3829 103 dgisselq
+#else
3830 127 dgisselq
+#  ifdef       zip_FP_PSEUDO
3831
+#    define    FIXED_REGISTERS         { 0,0,0,0,0,0,0,0,0,0,0,0,0,1,1,1,1 }
3832
+#  else
3833
+#    define    FIXED_REGISTERS         { 0,0,0,0,0,0,0,0,0,0,0,0,0,1,1,1 }
3834
+#  endif
3835 103 dgisselq
+#endif
3836 102 dgisselq
+
3837
+/* CALL_USED_REGISTERS ... like FIXED_REGISTERS but has 1 for each register
3838
+ * that is clobbered (in general) by function calls as well as for fixed
3839
+ * registers.  This macro therefore identifies the registers that are not
3840
+ * available for general allocation of values that must live across function
3841
+ * calls.
3842
+ *
3843
+ * If a register has 0 in CALL_USED_REGISTERS, the compiler automatically saves
3844
+ * it on function entry and restores it on function exit, if the register is
3845
+ * used within the function.
3846
+ *
3847
+ * On the Zip CPU, we must save R0 (the return address), and (let's pick) any
3848
+ * register above R5.
3849
+ */
3850 127 dgisselq
+#ifdef DEFINE_USER_REGS
3851
+#  define      CALL_USED_REGISTERS     { 0,1,1,1,1,0,0,0,0,0,0,0,0,1,1,1,1,  1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1 }
3852 103 dgisselq
+#else
3853 127 dgisselq
+#  ifdef       zip_FP_PSEUDO
3854
+#    define    CALL_USED_REGISTERS     { 0,1,1,1,1,0,0,0,0,0,0,0,0,1,1,1,1 }
3855
+#  else
3856
+#    define    CALL_USED_REGISTERS     { 0,1,1,1,1,0,0,0,0,0,0,0,0,1,1,1 }
3857
+#  endif
3858 103 dgisselq
+#endif
3859 102 dgisselq
+
3860
+/* CALL_REALLY_USED_REGISTERS ...  optional macro that, if not defined, defaults
3861
+ * to the value of CALL_USED_REGISTERS.
3862
+ */
3863
+
3864
+/* HARD_REGNO_CALL_PART_CLOBBERED(REGNO,MODE) ... A C expression that is nonzero
3865
+ * if it is not permissible to store a value of mode MODE in hard register REGNO
3866
+ * across a call without some part of it being clobbbered.  For most machines,
3867
+ * this macro need not be defined.  It is only required for machines that do
3868 103 dgisselq
+ * not preserve the entire contents of a register across a call.
3869 102 dgisselq
+ *
3870 127 dgisselq
+ * ZipCPU--Always preserves the entire contents of those registers that are
3871
+ * preserved across calls, so this shouldnt need to be defined.
3872 102 dgisselq
+ */
3873 127 dgisselq
+// #define     HARD_REGNO_CALL_PART_CLOBBERED(REGNO,MODE)      (REGNO==0)
3874 102 dgisselq
+
3875
+/* TARGET_CONDITIONAL_REGISTER_USAGE(VOID) ... This hook may conditionally
3876
+ * modify five variables fixed_regs, call_used_regs, global_regs, reg_names, and
3877
+ * reg_class_contents, to take into account any dependence of these register
3878
+ * sets on target flags.  The first three of these are of type char[]
3879
+ * (interpreted as Boolean vectors).  global_regs is a const char *[] and
3880
+ * reg_class_contents is a HARD_REG_SET.  Before the macro is called,
3881
+ * fixed_regs, call_used_regs, reg_class_contents, and reg_names have been
3882
+ * initialized from FIXED_REGISTERS, CALL_USED_REGISTERS, REG_CLASS_CONTENTS,
3883
+ * and REGISTER_NAMES, respectively.  global_regs has been cleared, and any
3884
+ * -ffixed-reg, -fcall-used-reg, and -fcall-saved-reg command options have been
3885
+ * applied.
3886
+ *
3887
+ * ZipCPU -- I may need to return and define this depending upon how FP and
3888
+ * GBL register allocation go.  But for now, we'll leave this at its default
3889
+ * value.
3890
+ */
3891
+// #warning "Revisit me after FP and GBL allocation"
3892
+
3893
+/* INCOMING_REGNO(out) ... Define this macro if the target machine has register
3894
+ * windows. ...
3895
+ *
3896
+ * Zip CPU has no register windows.
3897
+ */
3898
+
3899
+/* OUTGOING_REGNO ... same thing.
3900
+ */
3901
+
3902
+/* LOCAL_REGNO ... same thing.
3903
+ */
3904
+
3905
+/* PC_REGNUM ... If the program counter has a register number, define this as
3906
+ * that register number.  Otherwise do not define it.
3907
+ */
3908
+#define        PC_REGNUM       zip_PC
3909
+
3910
+
3911
+/* REG_ALLOC_ORDER ... If defined, an initializer for a vector of integers,
3912
+ * containing the number of hard registers in the order in which GCC should
3913
+ * prefer to use them (from most preferred to least.
3914
+ *
3915 103 dgisselq
+ * If this macro is not defined, registers are used lowest numbered first (all
3916 102 dgisselq
+ * else being equal).
3917
+ *
3918
+ * Since the default is the ZipCPU desired case, we won't define this here.
3919
+ */
3920
+
3921
+/* ADJUST_REG_ALLOC_ORDER ... on most machines it is not necessary to define
3922
+ * this macro, so we won't either.
3923
+ */
3924
+
3925
+/* HONOR_REG_ALLOC_ORDER ...
3926
+ */
3927
+
3928
+/* HONOR_REG_ALLOC_ORDER ... on most machines it is not necessary to define
3929
+ * this macro, so we won't either.
3930
+ */
3931
+
3932
+/* HARD_REGNO_NREGS(REGNO, MODE) ... A C expression for the number of
3933
+ * consecutive hard registers, starting at register number REGNO, required to
3934
+ * hold a value of mode MODE.
3935
+ *
3936
+ * On a machine where all registers are exactly one word, a suitable definition
3937
+ * is given of ((GET_MODE_SIZE(MODE)+UNITS_PER_WORD-1)/UNITS_PER_WORD.
3938
+ *
3939
+ * On ZipCPU, we might do
3940
+ *     ((((MODE)==DImode)||((MODE)==DFmode))?2:1)
3941
+ * but I think the default (above) code should work as well.  Hence, let's stick
3942
+ * with the default, lest someone try to create larger modes (TImode, OImode,
3943
+ * XImode) and expect us to follow them properly some how.
3944
+ *
3945
+ * Okay, now in hind sight, we know that the default doesn't work for our
3946
+ * architecture, since GET_MODE_SIZE(SImode)=4, not 1.  Thus, let's rearrange
3947
+ * this expression to work in bits rather than in bytes and we'll know more
3948
+ * of what we are doing.
3949
+ */
3950
+#undef HARD_REGNO_NREGS
3951
+#define        HARD_REGNO_NREGS(REGNO, MODE)   ((GET_MODE_SIZE(MODE)+UNITS_PER_WORD-1)\
3952
+               / (UNITS_PER_WORD))
3953
+
3954
+/* HARD_REGNO_NREGS_HAS_PADDING(REGNO,MODE) ... A C expression that is nonzero
3955
+ * if a value of mode MODE, stored in memory, ends with padding that causes it
3956
+ * to take up more space than in registers starting at register number REGNO
3957
+ * (as determined by multiplying GCC's notion of the size of the register when
3958
+ * containing this mode by the number of registers returned by HARD_REGNO_NREGS)
3959
+ * By default this is zero.
3960
+ *
3961
+ * Zip CPU --- The default looks good enough to me.
3962
+ */
3963
+
3964
+/* HARD_REGNO_NREGS_WITH_PADDING(REGNO, MODE)
3965
+ *
3966
+ * ZipCPU ---
3967
+ */
3968
+
3969
+/* REGMODE_NATURAL_SIZE(MODE) -- Define this macro if the natural size of
3970
+ * registers that hold values of mode mode is not the word size.  It is a C
3971
+ * expression that should give the natural size in bytes for the specified mode.
3972
+ * It is used by the register allocator to try to optimize its results.
3973
+ *
3974
+ * ZipCPU ---
3975
+ */
3976
+// #define     REGMODE_NATURAL_SIZE(MODE)      (((MODE)==DImode)?2:1)
3977
+
3978
+/* HARD_REGNO_MODE_OK ... A C expression that is nonzero if it is permissible
3979 103 dgisselq
+ * to store a value of mode MODE in a hard register number REGNO (or in several
3980 102 dgisselq
+ * registers starting with that one).  For a machine where all registers are
3981
+ * equivalent, a suitable definition is '1'.  You need not include code to check
3982
+ * for the numbers of fixed registers, because the allocation mechanism
3983
+ * considered them to be always occupied.
3984
+ *
3985
+ * ZipCPU --- As long as you are already avoiding the fixed registers, the
3986
+ * suitable default definition mentioned above should be sufficient.
3987
+ */
3988
+#undef HARD_REGNO_MODE_OK
3989 103 dgisselq
+#define        HARD_REGNO_MODE_OK(R,M) (R<zip_CC)
3990 102 dgisselq
+
3991
+/* HARD_REGNO_RENAME_OK(FROM,TO) ... A C expression that is nonzero if it is
3992
+ * okay to rename a hard register FROM to another hard register TO.  One common
3993
+ * use of this macro is to prevernt renaming of a register to another register
3994
+ * that is not saved by a prologue in an interrupt handler.  The default is
3995
+ * always nonzero.
3996
+ *
3997
+ * ZipCPU --- The default looks good enough to us.
3998
+ */
3999
+#undef HARD_REGNO_RENAME_OK
4000
+#define        HARD_REGNO_RENAME_OK(FROM,TO)   ((is_ZIP_GENERAL_REG(FROM))&&(is_ZIP_GENERAL_REG(TO)))
4001
+
4002
+
4003
+/* MODES_TIABLE_P(M1, M2) ... A C expression that is nonzero if a value of mode
4004
+ * M1 is accessible in mode M2 without copying.
4005
+ *
4006
+ * ZipCPU --- well, that's true for us (although we support scant few modes) ...
4007
+ * so lets' set to one.
4008
+ */
4009
+#define        MODES_TIEABLE_P(M1,M2)  1
4010
+
4011
+/* TARGET_HARD_REGNO_SCRATCH_OK(REGNO)
4012
+ * This target hook should return true if it is OK to use a hard register
4013
+ * REGNO has a scratch register in peephole2.  One common use of this macro is
4014
+ * to prevent using of a register that is not saved by a prologue in an
4015
+ * interrupt handler.  The default version of this hook always returns true.
4016
+ *
4017
+ * ZipCPU --- the default works for us as well.  If you are in an interrupt
4018
+ * context, you have an entirely new set of registers (the supervisor set), so
4019
+ * this is a non-issue.
4020
+ */
4021
+
4022
+/* AVOID_CCMODE_COPIES ... define this macro if the compiler should avoid
4023
+ * copies to/from CCmode register(s).  You should only define this macro if
4024
+ * support for copying to/from CCmode is incomplete.
4025
+ *
4026
+ * ZipCPU --- CCmode register copies work like any other, so we'll keep with the
4027
+ * default definition.
4028
+ */
4029
+
4030
+/* STACK_REGS ... Define this if the machine has any stack-like registers.
4031
+ *
4032
+ * Zip CPU has no stack-like registers, as their definition is different from
4033
+ * the ZipCPU stack pointer register.
4034
+ */
4035
+
4036 127 dgisselq
+// #define     ZIP_REG_BYTE_SIZE       1
4037 102 dgisselq
+
4038
+/* 17.08 Register Classes */
4039
+
4040
+/* enum reg_class ... An enumerate type that must be defined with all the
4041
+ * register class names as enumerated values.  NO_REGS must be first.  ALL_REGS
4042
+ * must be the last register class, followed by one more enumerated value,
4043
+ * LIM_REG_CLASSES, which is not a register class but rather tells how many
4044
+ * classes there are.
4045
+ *
4046
+ * ZipCPU --- We'll defined register 0-13 as general registers, 14-15 in
4047
+ * all_regs, and go from there.
4048
+ */
4049
+enum   reg_class {
4050
+       NO_REGS, GENERAL_REGS,
4051
+#ifdef DEFINE_USER_REGS
4052
+       USER_REGS,
4053
+#endif
4054
+       ALL_REGS, LIM_REG_CLASSES
4055
+};
4056
+
4057
+/* N_REG_CLASSES ... the number of distinct register classes, defined as follows
4058
+ */
4059
+#define        N_REG_CLASSES   (int)LIM_REG_CLASSES
4060
+
4061
+/* REG_CLASS_NAMES ... An initializer containing the names of the register
4062
+ * classes as C string constants.  These names are used in writing some of the
4063
+ * debugging dumps.
4064
+ */
4065 127 dgisselq
+#ifdef DEFINE_USER_REGS
4066
+#  define      REG_CLASS_NAMES { "NO_REGS", "GENERAL_REGS", "USER_REGS", "ALL_REGS" }
4067
+#else
4068
+#  define      REG_CLASS_NAMES { "NO_REGS", "GENERAL_REGS", "ALL_REGS" }
4069
+#endif
4070 102 dgisselq
+
4071
+/* REG_CLASS_CONTENTS ... An initializer containing the contents of the register
4072 127 dgisselq
+ * classes, as integers which are bit masks.  The nth integer specifies the
4073 102 dgisselq
+ * contents of class n.  That way the integer mask is interpreted as that
4074
+ * register r is in the class if (mask&(1<<r)) is 1.
4075
+ *
4076
+ * When the machine has more than 32 registers ... that's not us.
4077
+ *
4078
+ * ZipCPU --- This is straight forward, three register classes, etc.
4079
+ */
4080 127 dgisselq
+#ifdef DEFINE_USER_REGS
4081
+#    define    REG_CLASS_CONTENTS { { 0x000000000}, {0x00003fff}, {0x0ffff0000l}, {0x0ffffffffl} }
4082 103 dgisselq
+#else
4083 127 dgisselq
+#  ifdef       zip_FP_PSEUDO
4084
+#    define    REG_CLASS_CONTENTS { { 0x00000}, {0x13fff}, {0x1ffff} }
4085
+#  else
4086
+#    define    REG_CLASS_CONTENTS { { 0x00000}, {0x03fff}, {0x0ffff} }
4087
+#  endif
4088 103 dgisselq
+#endif
4089 102 dgisselq
+
4090
+/* REGNO_REG_CLASS ... A C expression whose value is a register class
4091
+ * containing hard register REGNO.  In general there is more than one such
4092
+ * class;  Choose a class which is minimal, meaning that no smaller class also
4093
+ * contains the register.
4094
+ */
4095
+#undef REGNO_REG_CLASS
4096 103 dgisselq
+#ifdef zip_FP_PSEUDO
4097
+#define        REGNO_REG_CLASS(R)      (is_ZIP_REG(R)?((((R)<=13)||((R)==zip_FP_PSEUDO))?GENERAL_REGS:ALL_REGS):NO_REGS)
4098
+#else
4099 102 dgisselq
+#define        REGNO_REG_CLASS(R)      (is_ZIP_REG(R)?((R<=13)?GENERAL_REGS:ALL_REGS):NO_REGS)
4100 103 dgisselq
+#endif
4101 102 dgisselq
+
4102
+/* BASE_REG_CLASS ... A macro whose definition is the name of the class to which
4103
+ * a valid base register must belong.  A base register is one used in an address
4104
+ * which is the register value plus a displacement.
4105
+ */
4106
+#undef BASE_REG_CLASS
4107
+#define        BASE_REG_CLASS  GENERAL_REGS
4108
+
4109
+/* MODE_BASE_CLASS(MODE) ... This is a variation of the BASE_REG_CLASS macro
4110
+ * which allows the selection of a bse register in a mode dependent manner.  If
4111
+ * mode is VOIDmode then it should return the same value as BASE_REG_CLASS.
4112
+ */
4113
+#undef MODE_BASE_CLASS
4114
+#define        MODE_BASE_CLASS(MODE)   GENERAL_REGS
4115
+
4116
+/* MODE_BASE_REG_REG_CLASS(MODE) ... A C expression whose value is the register
4117
+ * class to which a valid base register must belong in order to be used in a
4118
+ * base plus index register address.  You should define this macro if base plus
4119
+ * index addresses have different requirements than other base register uses.
4120
+ *
4121
+ * Zip CPU does not support the base plus index addressing mode, thus ...
4122
+ */
4123 111 dgisselq
+// #undef      MODE_BASE_REG_REG_CLASS
4124
+// #define     MODE_BASE_REG_REG_CLASS(MODE)   NO_REGS
4125 102 dgisselq
+
4126
+/* INDEX_REG_CLASS ... A macro whose definition is the name of the class to
4127
+ * which a valid index register must belong.  An index register is one used in
4128
+ * an address where its value is either multiplied by a scale factor or added
4129
+ * to another register (as well as added to a displacement).
4130
+ *
4131
+ * ZipCPU -- Has no index registers.
4132
+ */
4133
+#undef INDEX_REG_CLASS
4134
+#define        INDEX_REG_CLASS NO_REGS
4135
+
4136
+/* REGNO_OK_FOR_BASE_P(NUM) ... A C expression which is nonzero if register
4137
+ * number num is suitable for use as a base register in operand addresses.
4138
+ */
4139
+#undef REGNO_OK_FOR_BASE_P
4140 127 dgisselq
+# define REGNO_OK_FOR_BASE_P(NUM)      ((NUM>=FIRST_PSEUDO_REGISTER)||(NUM != zip_CC))
4141 102 dgisselq
+
4142
+/* REGNO_MODE_OK_FOR_BASE_P ... A C expressison that is just like
4143
+ * REGNO_OK_FOR_BASE_P, except that that expression may examine the mode of the
4144 111 dgisselq
+ * memory reference in MODE.  You should define this macro if the mode of the
4145 102 dgisselq
+ * memory reference affects whether a register may be used as a base register.
4146
+ *
4147
+ * ZipCPU --- the mode doesn't affect anything, so we don't define this.
4148
+ */
4149
+
4150
+/* REGNO_MODE_OK_FOR_REG_BASE_P(NUM, MODE) ... base plus index operand
4151
+ * addresses, accessing memory in mode mode.
4152
+ *
4153
+ * Use of this macro is deprecated.
4154
+ */
4155
+
4156 111 dgisselq
+/* REGNO_MODE_CODE_OK_FOR_BASE_P(N,M,AS,OC,IC) ... A C expression which is
4157 102 dgisselq
+ * nonzero if a register number N is suitable for use as a base register in
4158
+ * operand addresses, accessing memory in mode M in address space AS.  This is
4159
+ * similar to REGNO_MODE_OK_FOR_BASE_P, except that the expression may examine
4160
+ * the context in which the register appears in the memory reference.
4161
+ *
4162
+ * ZipCPU---We aren't specific in how we use our registers.
4163
+ */
4164
+#define        REGNO_MODE_CODE_OK_FOR_BASE_P(N,M,AS,OC,IC) REGNO_OK_FOR_BASE_P(N)
4165
+
4166
+/* REGNO_OK_FOR_INDEX_P(REGNO) ... A C expression which is nonzero if register
4167
+ * num is suitable for use as an index register in opernad addressess.  It may
4168
+ * be either a suitable hard register or a pseudo register that has been
4169 111 dgisselq
+ * allocated such as a hard register.
4170 102 dgisselq
+ *
4171
+ * ZipCPU has no index registers, therefore we declare this to be zero.
4172
+ */
4173
+#undef REGNO_OK_FOR_INDEX_P
4174
+#define        REGNO_OK_FOR_INDEX_P(REGNO)     0
4175
+
4176
+/* TARGET_PREFERRED_RENAME_CLASS(RCLASS) ... A target hook that places
4177
+ * additional preference on the register class to use when it is necessary to
4178
+ * rename a register in class RCLASS to another class, or perhaps NO_REGS, if no
4179
+ * preferred register class is found or hook preferred_rename_class is not
4180
+ * implemented.  SOmething returning a more restrictive class makes better code.
4181
+ * For example, on ARM, thumb-2 instructions using LO_REGS may be smaller than
4182
+ * instructions using GENERIC_REGS.  By returning LO_REGS from
4183
+ * preferred_rename_class, code size can be reduced.
4184
+ */
4185
+// #undef TARGET_PREFERRED_RENAME_CLASS
4186
+// #define     TARGET_PREFERRED_RENAME_CLASS(RCLASS)   RCLASS
4187
+
4188
+/* TARGET_PREFERRED_RELOAD_CLASS(X,RC) ... A target hook that places additional
4189
+ * restri tions on the register class to use when it is necessary to copy value
4190
+ * X into a register in class RC.  The value is a register class; rehaps RC, or
4191
+ * perhaps a smaller class.
4192
+ *
4193
+ * The default fversion of this hook always returns value of RC argument, which
4194
+ * sounds quite appropriate for the ZipCPU.
4195
+ */
4196
+
4197
+/* PREFERRED_RELOAD_CLASS(X,CLASS) ... A C expression that places additional
4198
+ * restrictions on the register class to use when it is necessary to copy
4199
+ * value X into a register in class CLASS.  On many machines, the following
4200
+ * definition is safe: PREFERRED_RELOAD_CLASS(X,CLASS) (CLASS)
4201
+ * Sometimes returning a more restrictive class makes better code.  For example,
4202
+ * on the 68k, when x is an integer constant that is in range for a moveq
4203
+ * instruction, the value of this macro is always DATA_REGS as long as CLASS
4204 111 dgisselq
+ * includes the data registers.  Requiring a data register guarantees that a
4205 102 dgisselq
+ * 'moveq' will be used.
4206
+ *
4207
+ * ZipCPU --- you can't load certain values into all members of ALL_REGS.  For
4208
+ * example, loading (sleep and !gie) into the CC register could halt the CPU.
4209
+ * Hence, we only allow loads into the GENERAL_REG class.
4210
+ */
4211
+#define        PREFERRED_RELOAD_CLASS(X, CLASS)        GENERAL_REGS
4212
+
4213
+/* TARGET_PREFERRED_OUTPUT_RELOAD_CLASS(RTX,RCLASS) ... Like TARGET_PREFERRED_..
4214
+ * RELOAD_CLASS, but for output instead of input reloads.
4215
+ *
4216
+ * ZipCPU --- there's gotta be a valid default behaviour for this.
4217
+ */
4218
+
4219
+/* LIMIT_RELOAD_CLASS(MODE, CL) ...
4220
+ *
4221
+ * Don't define this macro unless the target machine has limitations which
4222
+ * require the macro to do something nontrivial.  ZipCPU doesn't, so we won't.
4223
+ */
4224
+
4225
+/* TARGET_SECONDARY_RELOAD
4226
+ * SECONDARY_ ...
4227
+ * Don't think we need these ...
4228
+ */
4229
+
4230
+/* CLASS_MAX_NREGS(CLASS,MODE) ... A C expression for the maximum number of
4231
+ * consecutive registers of class CLASS needed to hold a value of mode MODE.
4232
+ *
4233
+ * This is closely related to the macro HARD_REGNO_NREGS.  In fact, the value
4234
+ * of the macro CLASS_MAX_REGS(CL,M) should be the maximum value of
4235
+ * HARD_REGNO_NREGS(REGNO,MODE) for all REGNO values in the class CLASS.
4236
+ *
4237
+ * This macro helps control the handling of multiple word values in the reload
4238
+ * pass.
4239
+ *
4240
+ * ZipCPU --- We'll just use HARDNO_REGNO_NREGS, since CLASS is independent for
4241
+ * us.  We'll also choose register R0, since ... well, since it simply doesn't
4242
+ * matter.  (HARD_REGNO_NREGS ignores this anyway)
4243
+ */
4244
+#define        CLASS_MAX_NREGS(CLASS, MODE)    HARD_REGNO_NREGS(0,MODE)
4245
+
4246
+/* CANNOT_CHANGE_MODE_CLASS
4247
+ * ???
4248
+ */
4249
+
4250
+/* TARGET_IRA_CHANGE_PSEUDO_ALLOCNO_CLASS
4251
+ */
4252
+
4253
+/* TARRGET_LRA_P
4254
+ * Default looks good.
4255
+ */
4256
+
4257
+/* TARGET_REGISTER_PRIORITY(INT) ... A target hook which returns the register
4258 111 dgisselq
+ * priority number to which the register HARD_REGNO belongs to.  The bigger the
4259 102 dgisselq
+ * number
4260
+ *
4261
+ * The default version of this target hook returns always zero---good enough for
4262
+ * the ZipCPU.
4263
+ */
4264
+
4265
+/* TARGET_REGISTER_USAGE_LEVELING_P(VOID) ... A target hook which returns true
4266
+ * if we need register usage leveling.  That means if a few hard registers are
4267
+ * equally good for the assignment, we choose the least used hard register.  The
4268
+ * register usage leveling may be profitable for some targets.  Don't use usage
4269
+ * leveling for targets with conditional execution or targets with big register
4270
+ * files as it hurts if-conversion and cross-jumping optimizations.  The default
4271
+ * version of this target hook returns always false.
4272
+ *
4273
+ * ZipCPU --- Default is the right answer.
4274
+ */
4275
+
4276
+/* TARGET_DIFFERENT_ADDR_DISPLACEMENT_P ...
4277
+ * Default looks good.
4278
+ */
4279
+
4280
+/* TARGET_CANNOT_SUBSTITUTE_MEM_EQUIV_P ...
4281
+ * Default looks good.
4282
+ */
4283
+
4284
+/* TARGET_LEGITIMIZE_ADDRESS_DISPLACEMENT ....
4285
+ */
4286
+
4287
+/* TARGET_SPILL_CLASS
4288
+ *
4289
+ * ZipCPU --- If we were running in supervisor mode only, this might be the
4290
+ * user set of registers.  However, we're not building for that mode (now),
4291
+ * so we'll leave this at the default of NO_REGS.
4292
+ */
4293
+
4294
+/* TARGET_CSTORE_MODE(ICODE) ... Defines the machine mode to use for the
4295
+ * boolean result of conditional store patterns.  The OCIDE argument is the
4296
+ * instruction code for the cstore being performed.  Not defining this hook is
4297
+ * the same as accepting the mode encoded into operand 0 of the cstore expander
4298
+ * patterns.
4299
+ *
4300
+ * ??? ZipCPU --- I don't follow this documentation.  We'll leave this at the
4301
+ * default therefore.
4302
+ */
4303
+
4304
+/* 17.09 Stack Layout and Calling Conventions */
4305
+
4306
+
4307
+/* STACK_GROWS_DOWNWARD ... Define this macro if pushing a word onto the stack
4308
+ * moves the stack pointer to a smaller address, and false otherwise.
4309
+ *
4310
+ * ZipCPU ... well, our stack does grow downward, but it doesn't do so auto-
4311
+ * magically.  We have to move the stack pointer ourselves.  However, since this
4312
+ * is our convention, we'll define it as such.
4313
+ */
4314
+#undef STACK_GROWS_DOWNWARD
4315
+#define        STACK_GROWS_DOWNWARD    1
4316
+
4317
+/* STACK_PUSH_CODE ... This macro defines the operation used when something is
4318
+ * pushed on the stack.  In RTL, a push operation will be
4319
+ * (set (mem( STACK_PUSH_CODE(reg sp))) ...) The choiecs are PRE_DEC, POST_DEC,
4320
+ * PRE_INC, and POST_INC.  Which of these is correct depends on the stack
4321
+ * direction and on whether the stack pointer points to the last item on the
4322
+ * stack or whether it points to the space for the next item on the stack.
4323
+ * The default is PRE_DECC when STACK_GROWS_DOWNWARD is true, which is almost
4324
+ * always right, and PRE_INC otherwise, which is often wrong.
4325
+ *
4326
+ * ZipCPU --- None of these is right, so let's leave this at the default and
4327
+ * see how badly we get mangled.  In particular, ZipCPU doesn't have any of the
4328
+ * PRE_DEC, POST_DEC, PRE_INC, or POST_INC addressing modes used here.
4329
+ */
4330
+
4331
+/* FRAME_GROWS_DOWNWARD ... Define this macro to nonzero if the addresses of
4332
+ * local variable slots are at negative offsets from the frame pointer.
4333
+ *
4334
+ * ZipCPU --- If the frame pointer is defined as the stack pointer upon the
4335 103 dgisselq
+ * start of function execution, and that stack pointer grows downward, then
4336 102 dgisselq
+ * this should be the case as well.
4337
+ */
4338
+#undef FRAME_GROWS_DOWNWARD
4339
+#define        FRAME_GROWS_DOWNWARD    1
4340
+// #define     FRAME_GROWS_DOWNWARD    0        // This was ECO32's value
4341
+
4342
+
4343
+/* ARGS_GROW_DOWNWARD ... Define this macro if successive arguments to a
4344
+ * function occupy decreasing addresses on the stack.
4345
+ *
4346
+ * ZipCPU -- we can leave this up to the compiler's preferred implementation,
4347
+ * it is of no consequence to the hardware.
4348
+ */
4349
+
4350
+/* STARTING_FRAME_OFFSET ... Offset from the frame pointer to the first local
4351
+ * variable slot to be allocated.  If FRAME_GROWS_DOWNWARD, find the next slot's
4352
+ * offset by subtracting the firstt slot's length from STARTING_FRAME_OFFSET.
4353
+ * Otherwise it is found by adding the length of the first slot to the value
4354
+ * START_FRAME_OFFSET.
4355
+ *
4356
+ * ZipCPU --- I'm not certain on this, let's come back after we look at how
4357
+ * the code is getting generated.  However, the ECO32 code I am copying from
4358
+ * suggests that 0 is the right value, so we'll use that here.
4359
+ */
4360
+// #warning "Re-evaluate me"
4361
+#define        STARTING_FRAME_OFFSET   0
4362
+
4363
+/* STACK_ALIGNMENT_NEEDED ... Define to zero to disable final alignment of the
4364
+ * stack during reload.  The nonzero default for this macro is suitable for most
4365
+ * ports.
4366
+ *
4367
+ * ZipCPU --- we'll leave this at the default, although if any alignment code
4368
+ * shows up on the stack we may need to adjust it.
4369
+ */
4370
+
4371
+/* STACK_POINTER_OFFSET ... Offset from the SP register to the first location at
4372
+ * which outgoing arguments are placed.  If not specified, the default value
4373
+ * of zero is used.  This is the proper value for most machines.
4374
+ */
4375
+#define        STACK_POINTER_OFFSET    0
4376
+
4377
+/* FIRST_PARM_OFFSET ... Offset from the argument pointer register to the first
4378
+ * argument's address.  On some machines it may depend on the data type of the
4379
+ * function.
4380
+ */
4381
+#define        FIRST_PARM_OFFSET(F)    0
4382
+
4383
+/* STACK_DYNAMIC_OFFSET(F) ... Offset from the stack pointer register to an item
4384
+ * dynamically allocated on the stack, e.g., by alloca.  The default value for
4385
+ * this macro is STACK_POINTER_OFFSET plus the length of the outgoing arguments.
4386
+ * The default is correct for most machines, ...
4387
+ *
4388
+ * ZipCPU --- so we'll use it for the ZipCPU.
4389
+ */
4390
+
4391
+/* INITIAL_FRAME_ADDRESS_RTX ... A C expression whose value is RTL representing
4392
+ * the address of the initial stack frame.  This address is passed to
4393
+ * RETURN_ADDR_RTX and DYNAMIC_CHAIN_ADDRESS.  If you don't define this macro,
4394
+ * a reasonable default value will be used.  Define this macro in order to make
4395
+ * frame pointer elimination work in the presence of __builtin_frame_address(C)
4396
+ * and __builtin_return_address(C) for (C) not equal to zero.
4397
+ *
4398
+ * ZipCPU --- Let's try the reasonable default and see what happens.
4399
+ */
4400
+
4401
+/* SETUP_FRAME_ADDRESSES ... A C expression that produces the machine-specific
4402
+ * code to setup the stack so that arbitrary frames can be accessed.  For
4403
+ * example, on the SPARC, we must flush all of the register windows to the stack
4404
+ * before we can access arbitrary stack frames.  You will seldom need to define
4405
+ * this macro.  The default is to do nothing.
4406
+ *
4407
+ * ZipCPU --- which is what we shall do here.
4408
+ */
4409
+
4410
+/* TARGET_BUILTIN_SETJMP_FRAME_VALUE(VOID) ... This target hook should return
4411
+ * an RTX that is used to store the address of the current frame into the
4412
+ * builtin setjmp buffer.  The default value, virtual_stack_vars_rtx, is correct
4413
+ * for most machines.  One reason you may need to define this target hook is if
4414
+ * hard_frame_pointer_rtx is the appropriate value on your machine.
4415
+ *
4416
+ * ZipCPU --- leave this undefined, since the default value should be correct
4417
+ * for "most" machines.
4418
+ */
4419
+
4420
+/* FRAME_ADDR_RTX ... most machines do not need to define it.
4421
+ */
4422
+
4423
+/* RETURN_ADDR_RTX(COUNT,FRAMEADDR) ... A C expression whose value is RTL
4424
+ * representing the value of the return address for the frame COUNT steps up
4425
+ * from the current frame, after the prologue.  FRAMEADDR is the frame pointer
4426
+ * of the COUNT frame, or the frame pointer of the COUNT-1 frame if
4427
+ * RETURN_ADDR_IN_PREVIOUS_FRAME is nonzero.  The value of the expression must
4428
+ * always be the correct address when COUNT is nonzero, but may be NULL_RTX if
4429
+ * there is no way to determine the return address of other frames.
4430
+ *
4431
+ * ZipCPU --- I have no idea how we'd do this, so let's just return NULL_RTX.
4432
+ */
4433
+#undef RETURN_ADDR_RTX
4434
+#define        RETURN_ADDR_RTX(COUNT,FRAMEADDR)        NULL_RTX
4435
+
4436
+/* RETURN_ADDR_IN_PREVIOUS_FRAME ... Define this macro to nonzero value if the
4437
+ * return address of a particular stack frame is accessed from the frame pointer
4438
+ * of the previous stack frame.  The zero default for this macro is suitable
4439
+ * for most ports.
4440
+ *
4441
+ * ZipCPU---Default works here as well.
4442
+ */
4443
+
4444
+/* INCOMING_RETURN_ADDR_RTX ... A C expression whose value is RTL representing
4445
+ * the location of the incoming return address at the beginning of any function,
4446
+ * before the prologue.  This RTL is either a REG, indicating that the return
4447
+ * value is saved in 'REG', or a MEM representing the location in the stack.
4448
+ * If this RTL is a REG, you should define DWARF_RETURN_COLUMN to
4449
+ * DWARF_FRAME_REGNUM(REGNO).
4450
+ *
4451
+ * ZipCPU --- While our incoming return address could theoretically be in any
4452
+ * register, our machine description file is going to place it into register
4453
+ * R0, so that's what we return here.
4454
+ */
4455
+#undef INCOMING_RETURN_ADDR_RTX
4456
+#define        INCOMING_RETURN_ADDR_RTX        gen_rtx_REG(SImode, zip_R0)
4457
+
4458
+
4459
+/* DWARF_ALT_FRAME_RETURN_COLUMN
4460
+ */
4461
+
4462
+/* DWARF_ZERO_REG ... A C exrpession whose value is an integer giving a DWARF2
4463
+ * register number that is considered to always have the value zero.  This
4464
+ * should only be defined if the target has an architected zero register (ZipCPU
4465
+ * does not), and someone decided it was a good idea to use that register number
4466
+ * to terminate the stack backtrace.  New ports should avoid this (so the
4467
+ * ZipCPU port will avoid it as well).
4468
+ *
4469
+ */
4470
+
4471
+/* TARGET_DWARF_HANDLE_FRAME_UNSPEC
4472
+ */
4473
+
4474
+/* INCOMING_FRAME_SP_OFFSET
4475
+ */
4476
+#define        INCOMING_FRAME_SP_OFFSET        0
4477
+
4478
+/* ARG_POINTER_CFA_OFFSET
4479
+ */
4480
+
4481
+/* FRAME_POINTER_CFA_OFFSET
4482
+ */
4483
+
4484
+/* CFA_FRAME_BASE_OFFSET
4485
+ */
4486
+
4487
+/* 17.09.02 Exception handling support */
4488
+
4489
+/* EH_RETURN_DATA_REGNO(N) ... A C expres