OpenCores
URL https://opencores.org/ocsvn/usb11/usb11/trunk

Subversion Repositories usb11

Compare Revisions

  • This comparison shows the changes necessary to convert path 
    /
    from Rev 10 to Rev 11
    ↔ Reverse comparison
  •

Rev 10 → Rev 11

/trunk/bench/verilog/tests.v
40,10 → 40,10
 
// CVS Log
//
// $Id: tests.v,v 1.2 2004-05-11 18:51:08 alfoltran Exp $
// $Id: tests.v,v 1.3 2004-05-28 23:13:16 alfoltran Exp $
//
// $Date: 2004-05-11 18:51:08 $
// $Revision: 1.2 $
// $Date: 2004-05-28 23:13:16 $
// $Revision: 1.3 $
// $Author: alfoltran $
// $Locker: $
// $State: Exp $
50,6 → 50,9
//
// Change History:
// $Log: not supported by cvs2svn $
// Revision 1.2 2004/05/11 18:51:08 alfoltran
// Task in5 correction: no ACK for length zero packet.
//
// Revision 1.1 2004/05/10 19:23:26 alfoltran
// Initial version in OpenCores.org (2004/04/10 - 19:22GMT)
//
579,7 → 582,7
if(buffer1[n] !== ep_f_dout)
begin
$display("ERROR: DATA mismatch. Expected: %h, Got: %h (%t)",
ep_f_dout, buffer1[n], $time);
buffer1[n], ep_f_dout, $time);
error_cnt = error_cnt + 1;
end
824,11 → 827,12
repeat(2) @(posedge clk2);
end
 
#2;
#2; // Comment this line for XILINX Timed Simulation
//@(posedge clk2); // Comment this line for Standard Simulation
if(buffer1[n] !== ep_f_dout)
begin
$display("ERROR: DATA mismatch. Expected: %h, Got: %h (%t)",
ep_f_dout, buffer1[n], $time);
buffer1[n], ep_f_dout, $time);
error_cnt = error_cnt + 1;
end
1078,11 → 1082,12
repeat(2) @(posedge clk2);
end
 
#2;
#2; // Comment this line for XILINX Timed Simulation
//@(posedge clk2); // Comment this line for Standard Simulation
if(buffer1[n] !== ep_f_dout)
begin
$display("ERROR: DATA mismatch. Expected: %h, Got: %h (%t)",
ep_f_dout, buffer1[n], $time);
buffer1[n], ep_f_dout, $time);
error_cnt = error_cnt + 1;
end
/trunk/bench/verilog/tests_ocp.v
40,10 → 40,10
 
// CVS Log
//
// $Id: tests_ocp.v,v 1.2 2004-05-11 18:51:08 alfoltran Exp $
// $Id: tests_ocp.v,v 1.3 2004-05-28 23:13:16 alfoltran Exp $
//
// $Date: 2004-05-11 18:51:08 $
// $Revision: 1.2 $
// $Date: 2004-05-28 23:13:16 $
// $Revision: 1.3 $
// $Author: alfoltran $
// $Locker: $
// $State: Exp $
50,6 → 50,9
//
// Change History:
// $Log: not supported by cvs2svn $
// Revision 1.2 2004/05/11 18:51:08 alfoltran
// Task in5 correction: no ACK for length zero packet.
//
// Revision 1.1 2004/05/10 19:23:26 alfoltran
// Initial version in OpenCores.org (2004/04/10 - 19:22GMT)
//
579,7 → 582,7
if(buffer1[n] !== ep_f_dout)
begin
$display("ERROR: DATA mismatch. Expected: %h, Got: %h (%t)",
ep_f_dout, buffer1[n], $time);
buffer1[n], ep_f_dout, $time);
error_cnt = error_cnt + 1;
end
824,11 → 827,12
repeat(2) @(posedge clk2);
end
 
#2;
#2; // Comment this line for XILINX Timed Simulation
//@(posedge clk2); // Comment this line for Standard Simulation
if(buffer1[n] !== ep_f_dout)
begin
$display("ERROR: DATA mismatch. Expected: %h, Got: %h (%t)",
ep_f_dout, buffer1[n], $time);
buffer1[n], ep_f_dout, $time);
error_cnt = error_cnt + 1;
end
1078,11 → 1082,12
repeat(2) @(posedge clk2);
end
 
#2;
#2; // Comment this line for XILINX Timed Simulation
//@(posedge clk2); // Comment this line for Standard Simulation
if(buffer1[n] !== ep_f_dout)
begin
$display("ERROR: DATA mismatch. Expected: %h, Got: %h (%t)",
ep_f_dout, buffer1[n], $time);
buffer1[n], ep_f_dout, $time);
error_cnt = error_cnt + 1;
end

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.