OpenCores
URL https://opencores.org/ocsvn/z80soc/z80soc/trunk

Subversion Repositories z80soc

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Rev 9 → Rev 10

/trunk/rtl/VHDL/PS2/ps2bkd.vhd
6,6 → 6,7
keyboard_clk : inout std_logic;
keyboard_data : inout std_logic;
clock : in std_logic;
clkdelay : in std_logic;
reset : in std_logic;
read : in std_logic;
scan_ready : out std_logic;
14,16 → 15,44
architecture rtl of ps2kbd is
 
signal scan_code_sig : std_logic_vector(7 downto 0);
signal scode_shf_sig : std_logic_vector(11 downto 0);
--signal keyboard_clk : std_logic;
--signal keyboard_data : std_logic;
--signal clock : std_logic;
--signal reset : std_logic;
--signal read : std_logic;
--signal scan_ready : std_logic;
--signal ps2_ascii_code : std_logic_vector(7 downto 0);
 
signal scan_code_sig : std_logic_vector(7 downto 0);
signal scan_code : std_logic_vector(11 downto 0);
signal shift : std_logic_vector(1 downto 0);
signal caps : std_logic_vector(1 downto 0);
signal ctrlkey : std_logic_vector(3 downto 0);
 
begin
process (clkdelay)
begin
if clkdelay'event and clkdelay='1' then
if scan_code_sig = x"58" then
if caps = "00" then
caps <= "01";
elsif caps = "01" then
caps <= "11";
elsif caps = "11" then
caps <= "10";
else
caps <= "00";
end if;
end if;
end if;
 
scode_shf_sig <= "0000" & scan_code_sig;
scan_code <= "000" & caps(0) & scan_code_sig;
 
ps2_ascii_decode : process(scode_shf_sig)
end process;
 
ps2_ascii_decode : process(scan_code)
begin
case scode_shf_sig is
case scan_code is
when x"066" => ps2_ascii_code <= x"08"; -- Backspace ("backspace" key)
when x"00d" => ps2_ascii_code <= x"09"; -- Horizontal Tab
when x"05a" => ps2_ascii_code <= x"0d"; -- Carriage return ("enter" key)
61,32 → 90,32
when x"149" => ps2_ascii_code <= x"3e"; -- >
when x"14a" => ps2_ascii_code <= x"3f"; -- ?
when x"11e" => ps2_ascii_code <= x"40"; -- @
when x"01c" => ps2_ascii_code <= x"41"; -- A
when x"032" => ps2_ascii_code <= x"42"; -- B
when x"021" => ps2_ascii_code <= x"43"; -- C
when x"023" => ps2_ascii_code <= x"44"; -- D
when x"024" => ps2_ascii_code <= x"45"; -- E
when x"02b" => ps2_ascii_code <= x"46"; -- F
when x"034" => ps2_ascii_code <= x"47"; -- G
when x"033" => ps2_ascii_code <= x"48"; -- H
when x"043" => ps2_ascii_code <= x"49"; -- I
when x"03b" => ps2_ascii_code <= x"4a"; -- J
when x"042" => ps2_ascii_code <= x"4b"; -- K
when x"04b" => ps2_ascii_code <= x"4c"; -- L
when x"03a" => ps2_ascii_code <= x"4d"; -- M
when x"031" => ps2_ascii_code <= x"4e"; -- N
when x"044" => ps2_ascii_code <= x"4f"; -- O
when x"04d" => ps2_ascii_code <= x"50"; -- P
when x"015" => ps2_ascii_code <= x"51"; -- Q
when x"02d" => ps2_ascii_code <= x"52"; -- R
when x"01b" => ps2_ascii_code <= x"53"; -- S
when x"02c" => ps2_ascii_code <= x"54"; -- T
when x"03c" => ps2_ascii_code <= x"55"; -- U
when x"02a" => ps2_ascii_code <= x"56"; -- V
when x"01d" => ps2_ascii_code <= x"57"; -- W
when x"022" => ps2_ascii_code <= x"58"; -- X
when x"035" => ps2_ascii_code <= x"59"; -- Y
when x"01a" => ps2_ascii_code <= x"5a"; -- Z
when x"11c" => ps2_ascii_code <= x"41"; -- A
when x"132" => ps2_ascii_code <= x"42"; -- B
when x"121" => ps2_ascii_code <= x"43"; -- C
when x"123" => ps2_ascii_code <= x"44"; -- D
when x"124" => ps2_ascii_code <= x"45"; -- E
when x"12b" => ps2_ascii_code <= x"46"; -- F
when x"134" => ps2_ascii_code <= x"47"; -- G
when x"133" => ps2_ascii_code <= x"48"; -- H
when x"143" => ps2_ascii_code <= x"49"; -- I
when x"13b" => ps2_ascii_code <= x"4a"; -- J
when x"142" => ps2_ascii_code <= x"4b"; -- K
when x"14b" => ps2_ascii_code <= x"4c"; -- L
when x"13a" => ps2_ascii_code <= x"4d"; -- M
when x"131" => ps2_ascii_code <= x"4e"; -- N
when x"144" => ps2_ascii_code <= x"4f"; -- O
when x"14d" => ps2_ascii_code <= x"50"; -- P
when x"115" => ps2_ascii_code <= x"51"; -- Q
when x"12d" => ps2_ascii_code <= x"52"; -- R
when x"11b" => ps2_ascii_code <= x"53"; -- S
when x"12c" => ps2_ascii_code <= x"54"; -- T
when x"13c" => ps2_ascii_code <= x"55"; -- U
when x"12a" => ps2_ascii_code <= x"56"; -- V
when x"11d" => ps2_ascii_code <= x"57"; -- W
when x"122" => ps2_ascii_code <= x"58"; -- X
when x"135" => ps2_ascii_code <= x"59"; -- Y
when x"11a" => ps2_ascii_code <= x"5a"; -- Z
when x"054" => ps2_ascii_code <= x"5b"; -- [
when x"05d" => ps2_ascii_code <= x"5c"; -- \
when x"05b" => ps2_ascii_code <= x"5d"; -- ]
93,38 → 122,38
when x"136" => ps2_ascii_code <= x"5e"; -- ^
when x"14e" => ps2_ascii_code <= x"5f"; -- _
when x"00e" => ps2_ascii_code <= x"60"; -- `
when x"11c" => ps2_ascii_code <= x"61"; -- a
when x"132" => ps2_ascii_code <= x"62"; -- b
when x"121" => ps2_ascii_code <= x"63"; -- c
when x"123" => ps2_ascii_code <= x"64"; -- d
when x"124" => ps2_ascii_code <= x"65"; -- e
when x"12b" => ps2_ascii_code <= x"66"; -- f
when x"134" => ps2_ascii_code <= x"67"; -- g
when x"133" => ps2_ascii_code <= x"68"; -- h
when x"143" => ps2_ascii_code <= x"69"; -- i
when x"13b" => ps2_ascii_code <= x"6a"; -- j
when x"142" => ps2_ascii_code <= x"6b"; -- k
when x"14b" => ps2_ascii_code <= x"6c"; -- l
when x"13a" => ps2_ascii_code <= x"6d"; -- m
when x"131" => ps2_ascii_code <= x"6e"; -- n
when x"144" => ps2_ascii_code <= x"6f"; -- o
when x"14d" => ps2_ascii_code <= x"70"; -- p
when x"115" => ps2_ascii_code <= x"71"; -- q
when x"12d" => ps2_ascii_code <= x"72"; -- r
when x"11b" => ps2_ascii_code <= x"73"; -- s
when x"12c" => ps2_ascii_code <= x"74"; -- t
when x"13c" => ps2_ascii_code <= x"75"; -- u
when x"12a" => ps2_ascii_code <= x"76"; -- v
when x"11d" => ps2_ascii_code <= x"77"; -- w
when x"122" => ps2_ascii_code <= x"78"; -- x
when x"135" => ps2_ascii_code <= x"79"; -- y
when x"11a" => ps2_ascii_code <= x"7a"; -- z
when x"01c" => ps2_ascii_code <= x"61"; -- a
when x"032" => ps2_ascii_code <= x"62"; -- b
when x"021" => ps2_ascii_code <= x"63"; -- c
when x"023" => ps2_ascii_code <= x"64"; -- d
when x"024" => ps2_ascii_code <= x"65"; -- e
when x"02b" => ps2_ascii_code <= x"66"; -- f
when x"034" => ps2_ascii_code <= x"67"; -- g
when x"033" => ps2_ascii_code <= x"68"; -- h
when x"043" => ps2_ascii_code <= x"69"; -- i
when x"03b" => ps2_ascii_code <= x"6a"; -- j
when x"042" => ps2_ascii_code <= x"6b"; -- k
when x"04b" => ps2_ascii_code <= x"6c"; -- l
when x"03a" => ps2_ascii_code <= x"6d"; -- m
when x"031" => ps2_ascii_code <= x"6e"; -- n
when x"044" => ps2_ascii_code <= x"6f"; -- o
when x"04d" => ps2_ascii_code <= x"70"; -- p
when x"015" => ps2_ascii_code <= x"71"; -- q
when x"02d" => ps2_ascii_code <= x"72"; -- r
when x"01b" => ps2_ascii_code <= x"73"; -- s
when x"02c" => ps2_ascii_code <= x"74"; -- t
when x"03c" => ps2_ascii_code <= x"75"; -- u
when x"02a" => ps2_ascii_code <= x"76"; -- v
when x"01d" => ps2_ascii_code <= x"77"; -- w
when x"022" => ps2_ascii_code <= x"78"; -- x
when x"035" => ps2_ascii_code <= x"79"; -- y
when x"01a" => ps2_ascii_code <= x"7a"; -- z
when x"154" => ps2_ascii_code <= x"7b"; -- {
when x"15d" => ps2_ascii_code <= x"7c"; -- |
when x"15b" => ps2_ascii_code <= x"7d"; -- }
when x"10e" => ps2_ascii_code <= x"7e"; -- ~
when x"071" => ps2_ascii_code <= x"7f"; -- (Delete OR DEL on numeric keypad)
when x"171" => ps2_ascii_code <= x"7f"; -- (Delete OR DEL on numeric keypad)
when x"171" => ps2_ascii_code <= x"7f"; -- (Delete OR DEL on numeric keypad)
when others => ps2_ascii_code <= x"FF"; -- keys not mapped
end case;
end process;
/trunk/rtl/VHDL/clk_div.vhd
0,0 → 1,128
library IEEE;
use IEEE.STD_LOGIC_1164.all;
use IEEE.STD_LOGIC_ARITH.all;
use IEEE.STD_LOGIC_UNSIGNED.all;
 
ENTITY clk_div IS
 
PORT
(
clock_25Mhz : IN STD_LOGIC;
clock_1MHz : OUT STD_LOGIC;
clock_100KHz : OUT STD_LOGIC;
clock_10KHz : OUT STD_LOGIC;
clock_1KHz : OUT STD_LOGIC;
clock_100Hz : OUT STD_LOGIC;
clock_10Hz : OUT STD_LOGIC;
clock_1Hz : OUT STD_LOGIC);
END clk_div;
 
ARCHITECTURE a OF clk_div IS
 
SIGNAL count_1Mhz: STD_LOGIC_VECTOR(4 DOWNTO 0);
SIGNAL count_100Khz, count_10Khz, count_1Khz : STD_LOGIC_VECTOR(2 DOWNTO 0);
SIGNAL count_100hz, count_10hz, count_1hz : STD_LOGIC_VECTOR(2 DOWNTO 0);
SIGNAL clock_1Mhz_int, clock_100Khz_int, clock_10Khz_int, clock_1Khz_int: STD_LOGIC;
SIGNAL clock_100hz_int, clock_10Hz_int, clock_1Hz_int : STD_LOGIC;
BEGIN
PROCESS
BEGIN
-- Divide by 25
WAIT UNTIL clock_25Mhz'EVENT and clock_25Mhz = '1';
IF count_1Mhz < 24 THEN
count_1Mhz <= count_1Mhz + 1;
ELSE
count_1Mhz <= "00000";
END IF;
IF count_1Mhz < 12 THEN
clock_1Mhz_int <= '0';
ELSE
clock_1Mhz_int <= '1';
END IF;
 
-- Ripple clocks are used in this code to save prescalar hardware
-- Sync all clock prescalar outputs back to master clock signal
clock_1Mhz <= clock_1Mhz_int;
clock_100Khz <= clock_100Khz_int;
clock_10Khz <= clock_10Khz_int;
clock_1Khz <= clock_1Khz_int;
clock_100hz <= clock_100hz_int;
clock_10hz <= clock_10hz_int;
clock_1hz <= clock_1hz_int;
END PROCESS;
 
-- Divide by 10
PROCESS
BEGIN
WAIT UNTIL clock_1Mhz_int'EVENT and clock_1Mhz_int = '1';
IF count_100Khz /= 4 THEN
count_100Khz <= count_100Khz + 1;
ELSE
count_100khz <= "000";
clock_100Khz_int <= NOT clock_100Khz_int;
END IF;
END PROCESS;
 
-- Divide by 10
PROCESS
BEGIN
WAIT UNTIL clock_100Khz_int'EVENT and clock_100Khz_int = '1';
IF count_10Khz /= 4 THEN
count_10Khz <= count_10Khz + 1;
ELSE
count_10khz <= "000";
clock_10Khz_int <= NOT clock_10Khz_int;
END IF;
END PROCESS;
 
-- Divide by 10
PROCESS
BEGIN
WAIT UNTIL clock_10Khz_int'EVENT and clock_10Khz_int = '1';
IF count_1Khz /= 4 THEN
count_1Khz <= count_1Khz + 1;
ELSE
count_1khz <= "000";
clock_1Khz_int <= NOT clock_1Khz_int;
END IF;
END PROCESS;
 
-- Divide by 10
PROCESS
BEGIN
WAIT UNTIL clock_1Khz_int'EVENT and clock_1Khz_int = '1';
IF count_100hz /= 4 THEN
count_100hz <= count_100hz + 1;
ELSE
count_100hz <= "000";
clock_100hz_int <= NOT clock_100hz_int;
END IF;
END PROCESS;
 
-- Divide by 10
PROCESS
BEGIN
WAIT UNTIL clock_100hz_int'EVENT and clock_100hz_int = '1';
IF count_10hz /= 4 THEN
count_10hz <= count_10hz + 1;
ELSE
count_10hz <= "000";
clock_10hz_int <= NOT clock_10hz_int;
END IF;
END PROCESS;
 
-- Divide by 10
PROCESS
BEGIN
WAIT UNTIL clock_10hz_int'EVENT and clock_10hz_int = '1';
IF count_1hz /= 4 THEN
count_1hz <= count_1hz + 1;
ELSE
count_1hz <= "000";
clock_1hz_int <= NOT clock_1hz_int;
END IF;
END PROCESS;
 
END a;
 
/trunk/rtl/VHDL/top_de1.vhd
9,8 → 9,6
-- Based on the T80 core: http://www.opencores.org/projects.cgi/web/t80
-- This version developed and tested on: Altera DE1 Development Board
--
-- Please, see the RevisionHistory.txt file for complete features and change history.
--
-- Peripherals configured (Using Ports):
--
-- 08 KB Internal ROM Read (0x0000h - 0x1FFFh)
209,7 → 207,10
signal D_ROM : std_logic_vector(7 downto 0);
 
signal clk25mhz_sig : std_logic;
signal Clk_1hz : std_logic;
signal clk25mhz : std_logic;
signal clk1hz : std_logic;
signal clk10hz : std_logic;
signal clk100hz : std_logic;
signal HEX_DISP0 : std_logic_vector(6 downto 0);
signal HEX_DISP1 : std_logic_vector(6 downto 0);
250,6 → 251,8
HEX3 <= HEX_DISP3;
SRAM_ADDR(15 downto 0) <= A - x"4000" when (A >= x"4000" and MReq_n = '0');
-- SRAM_ADDR(15 downto 0) <= A - x"4000" when (A >= x"4000" and MReq_n = '0') else A;
-- this is bad --> SRAM_ADDR(15 downto 0) <= A - x"4000";
SRAM_DQ(15 downto 8) <= (others => 'Z');
SRAM_ADDR(17 downto 16) <= "00";
SRAM_UB_N <= '1';
262,9 → 265,12
SRAM_DQ(7 downto 0) <= DO_CPU when (Wr_n = '0' and MReq_n = '0' and A >= x"4000") else (others => 'Z');
 
-- Write into VRAM
-- this is almost ok -->vram_wraddress_sig <= A - x"2000" when (A >= x"2000" and A < x"4000" and MReq_n = '0' and IORQ_n = '1');
vram_wraddress_sig <= A - x"2000" when (A >= x"2000" and A < x"4000" and MReq_n = '0');
-- vram_wraddress_sig <= A - x"2000";
vram_wren_sig <= not Wr_n when (A >= x"2000" and A < x"4000" and IORQ_n = '1');
vram_data_sig <= DO_CPU when (Wr_n = '0' and MReq_n = '0' and A >= x"2000" and A < x"4000") else (others => 'Z');
-- this is ok --> vram_data_sig <= DO_CPU;
-- Input to Z80
DI_CPU <= SRAM_DQ(7 downto 0) when (Rd_n = '0' and MReq_n = '0' and A >= x"4000") else
351,9 → 357,10
NUMBER3 <= NUMBER3_sig;
LEDR(7 downto 0) <= LEDR_sig(7 downto 0);
LEDG <= LEDG_sig;
end process;
-- the following three processes deals with different clock domain signals
ps2_process1: process(CLOCK_50)
begin
409,7 → 416,7
CLOCK_50 => CLOCK_50,
VRAM_DATA => vram_q_sig,
VRAM_ADDR => vram_rdaddress_sig,
VRAM_CLOCK => VRAM_CLOCK,
VRAM_CLOCK => clk25mhz,
VRAM_WREN => vram_rden_sig,
VGA_R => VGA_R,
VGA_G => VGA_G,
420,7 → 427,7
 
vram8k_inst : work.vram8k PORT MAP (
rdaddress => vram_rdaddress_sig,
rdclock => not VRAM_CLOCK,
rdclock => not clk25mhz,
rden => vram_rden_sig,
q => vram_q_sig,
wraddress => vram_wraddress_sig(12 downto 0),
435,7 → 442,19
A => A,
D => D_ROM
);
clkdiv_inst: clk_div
port map (
clock_25Mhz => clk25mhz,
clock_1MHz => open,
clock_100KHz => open,
clock_10KHz => open,
clock_1KHz => open,
clock_100Hz => clk100hz,
clock_10Hz => clk10hz,
clock_1Hz => clk1hz
);
clock_z80_inst : Clock_357Mhz
port map (
clock_50Mhz => CLOCK_50,
466,6 → 485,7
keyboard_clk => PS2_CLK,
keyboard_data => PS2_DAT,
clock => CLOCK_50,
clkdelay => clk100hz,
reset => Rst_n_s,
read => ps2_read,
scan_ready => ps2_scan_ready,
/trunk/doc/README.txt
103,7 → 103,7
TO-DO:
----
 
- Expand the character sets (this versions have only uppercase letters and numbers)
- (done)Expand the character sets (this versions have only uppercase letters and numbers)
- 80x40 Video display
- Serial communication
- Monitor program to allow download of programs by serial communication
/trunk/doc/RevisionHistory.txt
1,3 → 1,5
2008/05/01 - Added Caps lock support. Upper and lower case characters are now supported for keyboard input.
 
2008/04/19 - Added complete character set support
- Modified the Z80 demo program format the screen output and input
 
/trunk/z80soc.qpf
0,0 → 1,23
# Copyright (C) 1991-2007 Altera Corporation
# Your use of Altera Corporation's design tools, logic functions
# and other software and tools, and its AMPP partner logic
# functions, and any output files from any of the foregoing
# (including device programming or simulation files), and any
# associated documentation or information are expressly subject
# to the terms and conditions of the Altera Program License
# Subscription Agreement, Altera MegaCore Function License
# Agreement, or other applicable license agreement, including,
# without limitation, that your use is for the sole purpose of
# programming logic devices manufactured by Altera and sold by
# Altera or its authorized distributors. Please refer to the
# applicable agreement for further details.
 
 
 
QUARTUS_VERSION = "7.2"
DATE = "15:51:10 May 01, 2008"
 
 
# Revisions
 
PROJECT_REVISION = "z80soc"
/trunk/ROM/psf2mif.sh
0,0 → 1,84
#!/bin/sh
IN=$1
 
# Shift the bits left or right
SHIFT="+1"
 
addr () {
s=$1
ss=${s//+/?}
sss=${ss//-/?}
#echo $sss
echo ${sss:11:2}
 
}
 
convbin () {
s=$1
ss=${s//X/1}
echo ${ss// /0}
 
}
 
echo "%------------------------------------------------------------------%"
echo "% File generate automatically by: %"
echo "% %"
echo "% psf2mif.sh %"
echo "% %"
echo "% Convert fonts from PSF format to MIF format %"
echo "% %"
echo "% by: %"
echo "% %"
echo "% Ronivon C. Costa %"
echo "% 2008/04/17 %"
echo "% %"
echo "%------------------------------------------------------------------%"
echo "Depth = 2048;
Width = 8;
Address_radix = hex;
Data_radix = bin;
Content
Begin"
 
 
ADDR=0
 
for L in `cat $IN | awk '{ if (substr($0,1,1)!="+") { print $0 } }' | grep -v [0-9] | sed s/" "/0/g`
do
ISADDR=`echo $L | grep "++"`
if [[ -z "$ISADDR" ]]; then
LIN=${L//X/1}
ROMADDR="000"`printf "%02X" $ADDR`
FADDR=${ROMADDR:(-4)}
 
# print Letter using * in front of the binary code
 
ASCII1=${LIN//0/" "}
ASCII2=${ASCII1//1/*}
 
if [[ $SHIFT == "+1" ]]; then
LIN="0"${LIN:0:7}
else
if [[ $SHIFT == "+2" ]]; then
LIN="00"${LIN:0:6}
else
if [[ $SHIFT == "-1" ]]; then
LIN=${LIN:1:7}"0"
else
if [[ $SHIFT == "-2" ]]; then
LIN=${LIN:2:6}"00"
fi
fi
fi
fi
 
echo "$FADDR : $LIN ; % $ASCII2 %"
 
let ADDR=$ADDR+1
fi
 
done
 
echo "End;"
 
/trunk/ROM/drdos8x8.txt
0,0 → 1,2548
++font-text-file
++chars
448
++width
8
++height
8
++---000-0x00-''-
++---001-0x01-''-
XXXXXX
X X
X X X X
X X
X XXXX X
X XX X
X X
XXXXXX
++---002-0x02-''-
XXXXXX
XXXXXXXX
XX XX XX
XXXXXXXX
XX XX
XXX XXX
XXXXXXXX
XXXXXX
++---003-0x03-''-
XX XX
XXXXXXX
XXXXXXX
XXXXXXX
XXXXX
XXX
X
++---004-0x04-''-
X
XXX
XXXXX
XXXXXXX
XXXXX
XXX
X
++---005-0x05-''-
XX
XXXX
XXXX
XXX XXX
XXX XXX
XX
XXXX
++---006-0x06-''-
X
XXX
XXXXX
XXXXXXX
XXXXX
X
XXX
++---007-0x07-''-
XX
XXXX
XX
++---008-0x08-''-
XXXXXXXX
XXXXXXXX
XXX XXX
XX XX
XXX XXX
XXXXXXXX
XXXXXXXX
XXXXXXXX
++---009-0x09-''-
XX
X X
XX
++---010-0x0a-''-
XXXXXXXX
XXXXXXXX
XXX XXX
XX XX XX
XXX XXX
XXXXXXXX
XXXXXXXX
XXXXXXXX
++---011-0x0b-''-
XXX
XX
X
XXXXX
X X
X X
XXXXX
++---012-0x0c-''-
XXXXX
X X
X X
XXXXX
X
XXX
X
++---013-0x0d-''-
XXXXX
XXXX
X
X
XXXX
XXX
++---014-0x0e-''-
XXXXX
XXXXX
X X
X XXX
XXX XX
XX
++---015-0x0f-''-
X
X X X
XXX
XX XX
XXX
X X X
X
++---016-0x10-''-
X
XXX
XXXXX
XXX
X
++---017-0x11-''-
X
XXX
XXXXX
XXX
X
++---018-0x12-''-
XX
XXXX
XXXXXX
XX
XX
XXXXXX
XXXX
XX
++---019-0x13-''-
X X
X X
X X
X X
X X
X X
++---020-0x14-''-
XXXXXXX
XX XX XX
XX XX XX
X XX XX
XX XX
XX XX
XX XX
XX XX
++---021-0x15-''-
XXXX
X X
XXXX
X X
X X
XXXX
X X
XXXX
++---022-0x16-''-
XXXXXXX
XXXXXXX
XXXXXXX
++---023-0x17-''-
XX
XXXX
XXXXXX
XX
XXXXXX
XXXX
XX
XXXXXX
++---024-0x18-''-
XX
XXXX
XXXXXX
XX
XX
XX
XX
++---025-0x19-''-
XX
XX
XX
XX
XXXXXX
XXXX
XX
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++---256-0x100-''-
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'-
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+'- + XXX + XX XX +XXXXXXX +XX +XXXXX +XX +XXXXXXX + +++---270-0x10e-''- +XX XX + +XXXXXXX +XX +XXXXX +XX +XXXXXXX + +++---271-0x10f-''- + XX + XX +XXXXXXX +XX +XXXXX +XX +XXXXXXX + +++---272-0x110-''- + + + + X + XX + X + XXX + +++---273-0x111-''- + XX + XX + XXXX + XX + XX + XX + XXXX + +++---274-0x112-''- + XXXX + XX XX + XXXX + XX + XX + XX + XXXX + +++---275-0x113-''- + XX XX + + XXXX + XX + XX + XX + XXXX + +++---276-0x114-''- + XX + XX + XX + + XX + XX + XX + +++---277-0x115-''- + XX + XX + XXXX + XX + XX + XX + XXXX + +++---278-0x116-''- + XX + XX + XXXXX +XX XX +XX XX +XX XX + XXXXX + +++---279-0x117-''- + XXXXX +XX XX + XXXXX +XX XX +XX XX +XX XX + XXXXX + +++---280-0x118-''- + XX + XX + XXXXX +XX XX +XX XX +XX XX + XXXXX + +++---281-0x119-''- + XXX X +X XXX + + XXXXX +XX XX +XX XX + XXXXX + +++---282-0x11a-' \ No newline at end of file
/trunk/ROM/z802rom.sh
0,0 → 1,40
#!/bin/sh
file=rom.hex
echo "library IEEE;
use IEEE.std_logic_1164.all;
use ieee.numeric_std.all;
 
entity rom is
port(
Clk : in std_logic;
A : in std_logic_vector(15 downto 0);
D : out std_logic_vector(7 downto 0)
);
end rom;
 
architecture rtl of rom is
begin
 
process (Clk)
begin
if Clk'event and Clk = '1' then
case A is"
 
 
ADDR=0
for i in `cat $file | tr ',' ' '`
do
BL1="when x\""
BL3="\" => D <= x\"$i\";"
hexaddr="000"`echo "obase=16;ibase=10;$ADDR" | bc`
fixhexaddr=${hexaddr:(-4)}
echo " "$BL1$fixhexaddr$BL3
let ADDR=ADDR+1
done
echo " when others => D <= x\"00\";
end case;
end if;
end process;
end;"
 
 
/trunk/ROM/hex2rom.sh
0,0 → 1,40
#!/bin/sh
file=rom.hex
echo "library IEEE;
use IEEE.std_logic_1164.all;
use ieee.numeric_std.all;
 
entity rom is
port(
Clk : in std_logic;
A : in std_logic_vector(15 downto 0);
D : out std_logic_vector(7 downto 0)
);
end rom;
 
architecture rtl of rom is
begin
 
process (Clk)
begin
if Clk'event and Clk = '1' then
case A is"
 
 
ADDR=0
for i in `cat $file | tr ',' ' '`
do
BL1="when x\""
BL3="\" => D <= x\"$i\";"
hexaddr="000"`echo "obase=16;ibase=10;$ADDR" | bc`
fixhexaddr=${hexaddr:(-4)}
echo " "$BL1$fixhexaddr$BL3
let ADDR=ADDR+1
done
echo " when others => D <= x\"00\";
end case;
end if;
end process;
end;"
 
 
/trunk/ROM/mif2coe.sh
0,0 → 1,27
#!/bin/sh
IN=$1
 
 
cat $IN | grep -i data_radix | grep hex >>trash.tmp 2>>trash.tmp
if [ $? -eq 0 ]; then
radix=16
else
cat $IN | grep -i data_radix | grep oct >>trash.tmp 2>>trash.tmp
if [ $? -eq 0 ]; then
radix=8
else
cat $IN | grep -i data_radix | grep bin >>trash.tmp 2>>trash.tmp
if [ $? -eq 0 ]; then
radix=2
fi
fi
fi
 
cat $IN | grep -v ^% | grep ":" | cut -f2 -d':' | cut -f1 -d";" | tr -d ' ' > mif2coe.tmp
NROWS=`cat mif2coe.tmp | wc -l`
 
echo "memory_initialization_radix=$radix;"
echo "memory_initialization_vector="
cat mif2coe.tmp | awk -v ROWS=$NROWS '{if (NR==ROWS) { print $0";" } else { print $0"," }}'
 
rm mif2coe.tmp
/trunk/z80soc.qsf
0,0 → 1,507
# Copyright (C) 1991-2007 Altera Corporation
# Your use of Altera Corporation's design tools, logic functions
# and other software and tools, and its AMPP partner logic
# functions, and any output files from any of the foregoing
# (including device programming or simulation files), and any
# associated documentation or information are expressly subject
# to the terms and conditions of the Altera Program License
# Subscription Agreement, Altera MegaCore Function License
# Agreement, or other applicable license agreement, including,
# without limitation, that your use is for the sole purpose of
# programming logic devices manufactured by Altera and sold by
# Altera or its authorized distributors. Please refer to the
# applicable agreement for further details.
 
 
# The default values for assignments are stored in the file
# z80soc_caps_assignment_defaults.qdf
# If this file doesn't exist, and for assignments not listed, see file
# assignment_defaults.qdf
 
# Altera recommends that you do not modify this file. This
# file is updated automatically by the Quartus II software
# and any changes you make may be lost or overwritten.
 
 
set_global_assignment -name FAMILY "Cyclone II"
set_global_assignment -name DEVICE EP2C20F484C7
set_global_assignment -name TOP_LEVEL_ENTITY top_de1
set_global_assignment -name ORIGINAL_QUARTUS_VERSION "7.2 SP3"
set_global_assignment -name PROJECT_CREATION_TIME_DATE "15:43:12 MAY 01, 2008"
set_global_assignment -name LAST_QUARTUS_VERSION "7.2 SP3"
set_global_assignment -name USE_GENERATED_PHYSICAL_CONSTRAINTS OFF -section_id eda_palace
set_global_assignment -name RESERVE_ALL_UNUSED_PINS "AS INPUT TRI-STATED"
set_global_assignment -name RESERVE_ALL_UNUSED_PINS_NO_OUTPUT_GND "AS INPUT TRI-STATED"
set_global_assignment -name ENABLE_DA_RULE "C101, C102, C103, C104, C105, C106, R101, R102, R103, R104, R105, T101, T102, A101, A102, A103, A104, A105, A106, A107, A108, A109, A110, S101, S102, S103, S104, D101, D102, D103, H101, H102, M101, M102, M103, M104, M105"
set_location_assignment PIN_A13 -to GPIO_0[0]
set_location_assignment PIN_B13 -to GPIO_0[1]
set_location_assignment PIN_A14 -to GPIO_0[2]
set_location_assignment PIN_B14 -to GPIO_0[3]
set_location_assignment PIN_A15 -to GPIO_0[4]
set_location_assignment PIN_B15 -to GPIO_0[5]
set_location_assignment PIN_A16 -to GPIO_0[6]
set_location_assignment PIN_B16 -to GPIO_0[7]
set_location_assignment PIN_A17 -to GPIO_0[8]
set_location_assignment PIN_B17 -to GPIO_0[9]
set_location_assignment PIN_A18 -to GPIO_0[10]
set_location_assignment PIN_B18 -to GPIO_0[11]
set_location_assignment PIN_A19 -to GPIO_0[12]
set_location_assignment PIN_B19 -to GPIO_0[13]
set_location_assignment PIN_A20 -to GPIO_0[14]
set_location_assignment PIN_B20 -to GPIO_0[15]
set_location_assignment PIN_C21 -to GPIO_0[16]
set_location_assignment PIN_C22 -to GPIO_0[17]
set_location_assignment PIN_D21 -to GPIO_0[18]
set_location_assignment PIN_D22 -to GPIO_0[19]
set_location_assignment PIN_E21 -to GPIO_0[20]
set_location_assignment PIN_E22 -to GPIO_0[21]
set_location_assignment PIN_F21 -to GPIO_0[22]
set_location_assignment PIN_F22 -to GPIO_0[23]
set_location_assignment PIN_G21 -to GPIO_0[24]
set_location_assignment PIN_G22 -to GPIO_0[25]
set_location_assignment PIN_J21 -to GPIO_0[26]
set_location_assignment PIN_J22 -to GPIO_0[27]
set_location_assignment PIN_K21 -to GPIO_0[28]
set_location_assignment PIN_K22 -to GPIO_0[29]
set_location_assignment PIN_J19 -to GPIO_0[30]
set_location_assignment PIN_J20 -to GPIO_0[31]
set_location_assignment PIN_J18 -to GPIO_0[32]
set_location_assignment PIN_K20 -to GPIO_0[33]
set_location_assignment PIN_L19 -to GPIO_0[34]
set_location_assignment PIN_L18 -to GPIO_0[35]
set_location_assignment PIN_H12 -to GPIO_1[0]
set_location_assignment PIN_H13 -to GPIO_1[1]
set_location_assignment PIN_H14 -to GPIO_1[2]
set_location_assignment PIN_G15 -to GPIO_1[3]
set_location_assignment PIN_E14 -to GPIO_1[4]
set_location_assignment PIN_E15 -to GPIO_1[5]
set_location_assignment PIN_F15 -to GPIO_1[6]
set_location_assignment PIN_G16 -to GPIO_1[7]
set_location_assignment PIN_F12 -to GPIO_1[8]
set_location_assignment PIN_F13 -to GPIO_1[9]
set_location_assignment PIN_C14 -to GPIO_1[10]
set_location_assignment PIN_D14 -to GPIO_1[11]
set_location_assignment PIN_D15 -to GPIO_1[12]
set_location_assignment PIN_D16 -to GPIO_1[13]
set_location_assignment PIN_C17 -to GPIO_1[14]
set_location_assignment PIN_C18 -to GPIO_1[15]
set_location_assignment PIN_C19 -to GPIO_1[16]
set_location_assignment PIN_C20 -to GPIO_1[17]
set_location_assignment PIN_D19 -to GPIO_1[18]
set_location_assignment PIN_D20 -to GPIO_1[19]
set_location_assignment PIN_E20 -to GPIO_1[20]
set_location_assignment PIN_F20 -to GPIO_1[21]
set_location_assignment PIN_E19 -to GPIO_1[22]
set_location_assignment PIN_E18 -to GPIO_1[23]
set_location_assignment PIN_G20 -to GPIO_1[24]
set_location_assignment PIN_G18 -to GPIO_1[25]
set_location_assignment PIN_G17 -to GPIO_1[26]
set_location_assignment PIN_H17 -to GPIO_1[27]
set_location_assignment PIN_J15 -to GPIO_1[28]
set_location_assignment PIN_H18 -to GPIO_1[29]
set_location_assignment PIN_N22 -to GPIO_1[30]
set_location_assignment PIN_N21 -to GPIO_1[31]
set_location_assignment PIN_P15 -to GPIO_1[32]
set_location_assignment PIN_N15 -to GPIO_1[33]
set_location_assignment PIN_P17 -to GPIO_1[34]
set_location_assignment PIN_P18 -to GPIO_1[35]
set_instance_assignment -name IO_STANDARD LVTTL -to GPIO_0[0]
set_instance_assignment -name IO_STANDARD LVTTL -to GPIO_0[1]
set_instance_assignment -name IO_STANDARD LVTTL -to GPIO_0[2]
set_instance_assignment -name IO_STANDARD LVTTL -to GPIO_0[3]
set_instance_assignment -name IO_STANDARD LVTTL -to GPIO_0[4]
set_instance_assignment -name IO_STANDARD LVTTL -to GPIO_0[5]
set_instance_assignment -name IO_STANDARD LVTTL -to GPIO_0[6]
set_instance_assignment -name IO_STANDARD LVTTL -to GPIO_0[7]
set_instance_assignment -name IO_STANDARD LVTTL -to GPIO_0[8]
set_instance_assignment -name IO_STANDARD LVTTL -to GPIO_0[9]
set_instance_assignment -name IO_STANDARD LVTTL -to GPIO_0[10]
set_instance_assignment -name IO_STANDARD LVTTL -to GPIO_0[11]
set_instance_assignment -name IO_STANDARD LVTTL -to GPIO_0[12]
set_instance_assignment -name IO_STANDARD LVTTL -to GPIO_0[13]
set_instance_assignment -name IO_STANDARD LVTTL -to GPIO_0[14]
set_instance_assignment -name IO_STANDARD LVTTL -to GPIO_0[15]
set_instance_assignment -name IO_STANDARD LVTTL -to GPIO_0[16]
set_instance_assignment -name IO_STANDARD LVTTL -to GPIO_0[17]
set_instance_assignment -name IO_STANDARD LVTTL -to GPIO_0[18]
set_instance_assignment -name IO_STANDARD LVTTL -to GPIO_0[19]
set_instance_assignment -name IO_STANDARD LVTTL -to GPIO_0[20]
set_instance_assignment -name IO_STANDARD LVTTL -to GPIO_0[21]
set_instance_assignment -name IO_STANDARD LVTTL -to GPIO_0[22]
set_instance_assignment -name IO_STANDARD LVTTL -to GPIO_0[23]
set_instance_assignment -name IO_STANDARD LVTTL -to GPIO_0[24]
set_instance_assignment -name IO_STANDARD LVTTL -to GPIO_0[25]
set_instance_assignment -name IO_STANDARD LVTTL -to GPIO_0[26]
set_instance_assignment -name IO_STANDARD LVTTL -to GPIO_0[27]
set_instance_assignment -name IO_STANDARD LVTTL -to GPIO_0[28]
set_instance_assignment -name IO_STANDARD LVTTL -to GPIO_0[29]
set_instance_assignment -name IO_STANDARD LVTTL -to GPIO_0[30]
set_instance_assignment -name IO_STANDARD LVTTL -to GPIO_0[31]
set_instance_assignment -name IO_STANDARD LVTTL -to GPIO_0[32]
set_instance_assignment -name IO_STANDARD LVTTL -to GPIO_0[33]
set_instance_assignment -name IO_STANDARD LVTTL -to GPIO_0[34]
set_instance_assignment -name IO_STANDARD LVTTL -to GPIO_0[35]
set_instance_assignment -name IO_STANDARD LVTTL -to GPIO_1[0]
set_instance_assignment -name IO_STANDARD LVTTL -to GPIO_1[1]
set_instance_assignment -name IO_STANDARD LVTTL -to GPIO_1[2]
set_instance_assignment -name IO_STANDARD LVTTL -to GPIO_1[3]
set_instance_assignment -name IO_STANDARD LVTTL -to GPIO_1[4]
set_instance_assignment -name IO_STANDARD LVTTL -to GPIO_1[5]
set_instance_assignment -name IO_STANDARD LVTTL -to GPIO_1[6]
set_instance_assignment -name IO_STANDARD LVTTL -to GPIO_1[7]
set_instance_assignment -name IO_STANDARD LVTTL -to GPIO_1[8]
set_instance_assignment -name IO_STANDARD LVTTL -to GPIO_1[9]
set_instance_assignment -name IO_STANDARD LVTTL -to GPIO_1[10]
set_instance_assignment -name IO_STANDARD LVTTL -to GPIO_1[11]
set_instance_assignment -name IO_STANDARD LVTTL -to GPIO_1[12]
set_instance_assignment -name IO_STANDARD LVTTL -to GPIO_1[13]
set_instance_assignment -name IO_STANDARD LVTTL -to GPIO_1[14]
set_instance_assignment -name IO_STANDARD LVTTL -to GPIO_1[15]
set_instance_assignment -name IO_STANDARD LVTTL -to GPIO_1[16]
set_instance_assignment -name IO_STANDARD LVTTL -to GPIO_1[17]
set_instance_assignment -name IO_STANDARD LVTTL -to GPIO_1[18]
set_instance_assignment -name IO_STANDARD LVTTL -to GPIO_1[19]
set_instance_assignment -name IO_STANDARD LVTTL -to GPIO_1[20]
set_instance_assignment -name IO_STANDARD LVTTL -to GPIO_1[21]
set_instance_assignment -name IO_STANDARD LVTTL -to GPIO_1[22]
set_instance_assignment -name IO_STANDARD LVTTL -to GPIO_1[23]
set_instance_assignment -name IO_STANDARD LVTTL -to GPIO_1[24]
set_instance_assignment -name IO_STANDARD LVTTL -to GPIO_1[25]
set_instance_assignment -name IO_STANDARD LVTTL -to GPIO_1[26]
set_instance_assignment -name IO_STANDARD LVTTL -to GPIO_1[27]
set_instance_assignment -name IO_STANDARD LVTTL -to GPIO_1[28]
set_instance_assignment -name IO_STANDARD LVTTL -to GPIO_1[29]
set_instance_assignment -name IO_STANDARD LVTTL -to GPIO_1[30]
set_instance_assignment -name IO_STANDARD LVTTL -to GPIO_1[31]
set_instance_assignment -name IO_STANDARD LVTTL -to GPIO_1[32]
set_instance_assignment -name IO_STANDARD LVTTL -to GPIO_1[33]
set_instance_assignment -name IO_STANDARD LVTTL -to GPIO_1[34]
set_instance_assignment -name IO_STANDARD LVTTL -to GPIO_1[35]
set_location_assignment PIN_L22 -to SW[0]
set_location_assignment PIN_L21 -to SW[1]
set_location_assignment PIN_M22 -to SW[2]
set_location_assignment PIN_V12 -to SW[3]
set_location_assignment PIN_W12 -to SW[4]
set_location_assignment PIN_U12 -to SW[5]
set_location_assignment PIN_U11 -to SW[6]
set_location_assignment PIN_M2 -to SW[7]
set_location_assignment PIN_M1 -to SW[8]
set_location_assignment PIN_L2 -to SW[9]
set_instance_assignment -name IO_STANDARD LVTTL -to SW[0]
set_instance_assignment -name IO_STANDARD LVTTL -to SW[1]
set_instance_assignment -name IO_STANDARD LVTTL -to SW[2]
set_instance_assignment -name IO_STANDARD LVTTL -to SW[3]
set_instance_assignment -name IO_STANDARD LVTTL -to SW[4]
set_instance_assignment -name IO_STANDARD LVTTL -to SW[5]
set_instance_assignment -name IO_STANDARD LVTTL -to SW[6]
set_instance_assignment -name IO_STANDARD LVTTL -to SW[7]
set_instance_assignment -name IO_STANDARD LVTTL -to SW[8]
set_instance_assignment -name IO_STANDARD LVTTL -to SW[9]
set_location_assignment PIN_J2 -to HEX0[0]
set_location_assignment PIN_J1 -to HEX0[1]
set_location_assignment PIN_H2 -to HEX0[2]
set_location_assignment PIN_H1 -to HEX0[3]
set_location_assignment PIN_F2 -to HEX0[4]
set_location_assignment PIN_F1 -to HEX0[5]
set_location_assignment PIN_E2 -to HEX0[6]
set_location_assignment PIN_E1 -to HEX1[0]
set_location_assignment PIN_H6 -to HEX1[1]
set_location_assignment PIN_H5 -to HEX1[2]
set_location_assignment PIN_H4 -to HEX1[3]
set_location_assignment PIN_G3 -to HEX1[4]
set_location_assignment PIN_D2 -to HEX1[5]
set_location_assignment PIN_D1 -to HEX1[6]
set_location_assignment PIN_G5 -to HEX2[0]
set_location_assignment PIN_G6 -to HEX2[1]
set_location_assignment PIN_C2 -to HEX2[2]
set_location_assignment PIN_C1 -to HEX2[3]
set_location_assignment PIN_E3 -to HEX2[4]
set_location_assignment PIN_E4 -to HEX2[5]
set_location_assignment PIN_D3 -to HEX2[6]
set_location_assignment PIN_F4 -to HEX3[0]
set_location_assignment PIN_D5 -to HEX3[1]
set_location_assignment PIN_D6 -to HEX3[2]
set_location_assignment PIN_J4 -to HEX3[3]
set_location_assignment PIN_L8 -to HEX3[4]
set_location_assignment PIN_F3 -to HEX3[5]
set_location_assignment PIN_D4 -to HEX3[6]
set_instance_assignment -name IO_STANDARD LVTTL -to HEX0[0]
set_instance_assignment -name IO_STANDARD LVTTL -to HEX0[1]
set_instance_assignment -name IO_STANDARD LVTTL -to HEX0[2]
set_instance_assignment -name IO_STANDARD LVTTL -to HEX0[3]
set_instance_assignment -name IO_STANDARD LVTTL -to HEX0[4]
set_instance_assignment -name IO_STANDARD LVTTL -to HEX0[5]
set_instance_assignment -name IO_STANDARD LVTTL -to HEX0[6]
set_instance_assignment -name IO_STANDARD LVTTL -to HEX1[0]
set_instance_assignment -name IO_STANDARD LVTTL -to HEX1[1]
set_instance_assignment -name IO_STANDARD LVTTL -to HEX1[2]
set_instance_assignment -name IO_STANDARD LVTTL -to HEX1[3]
set_instance_assignment -name IO_STANDARD LVTTL -to HEX1[4]
set_instance_assignment -name IO_STANDARD LVTTL -to HEX1[5]
set_instance_assignment -name IO_STANDARD LVTTL -to HEX1[6]
set_instance_assignment -name IO_STANDARD LVTTL -to HEX2[0]
set_instance_assignment -name IO_STANDARD LVTTL -to HEX2[1]
set_instance_assignment -name IO_STANDARD LVTTL -to HEX2[2]
set_instance_assignment -name IO_STANDARD LVTTL -to HEX2[3]
set_instance_assignment -name IO_STANDARD LVTTL -to HEX2[4]
set_instance_assignment -name IO_STANDARD LVTTL -to HEX2[5]
set_instance_assignment -name IO_STANDARD LVTTL -to HEX2[6]
set_instance_assignment -name IO_STANDARD LVTTL -to HEX3[0]
set_instance_assignment -name IO_STANDARD LVTTL -to HEX3[1]
set_instance_assignment -name IO_STANDARD LVTTL -to HEX3[2]
set_instance_assignment -name IO_STANDARD LVTTL -to HEX3[3]
set_instance_assignment -name IO_STANDARD LVTTL -to HEX3[4]
set_instance_assignment -name IO_STANDARD LVTTL -to HEX3[5]
set_instance_assignment -name IO_STANDARD LVTTL -to HEX3[6]
set_location_assignment PIN_R22 -to KEY[0]
set_location_assignment PIN_R21 -to KEY[1]
set_location_assignment PIN_T22 -to KEY[2]
set_location_assignment PIN_T21 -to KEY[3]
set_location_assignment PIN_R20 -to LEDR[0]
set_location_assignment PIN_R19 -to LEDR[1]
set_location_assignment PIN_U19 -to LEDR[2]
set_location_assignment PIN_Y19 -to LEDR[3]
set_location_assignment PIN_T18 -to LEDR[4]
set_location_assignment PIN_V19 -to LEDR[5]
set_location_assignment PIN_Y18 -to LEDR[6]
set_location_assignment PIN_U18 -to LEDR[7]
set_location_assignment PIN_R18 -to LEDR[8]
set_location_assignment PIN_R17 -to LEDR[9]
set_location_assignment PIN_U22 -to LEDG[0]
set_location_assignment PIN_U21 -to LEDG[1]
set_location_assignment PIN_V22 -to LEDG[2]
set_location_assignment PIN_V21 -to LEDG[3]
set_location_assignment PIN_W22 -to LEDG[4]
set_location_assignment PIN_W21 -to LEDG[5]
set_location_assignment PIN_Y22 -to LEDG[6]
set_location_assignment PIN_Y21 -to LEDG[7]
set_instance_assignment -name IO_STANDARD LVTTL -to KEY[0]
set_instance_assignment -name IO_STANDARD LVTTL -to KEY[1]
set_instance_assignment -name IO_STANDARD LVTTL -to KEY[2]
set_instance_assignment -name IO_STANDARD LVTTL -to KEY[3]
set_instance_assignment -name IO_STANDARD LVTTL -to LEDR[0]
set_instance_assignment -name IO_STANDARD LVTTL -to LEDR[1]
set_instance_assignment -name IO_STANDARD LVTTL -to LEDR[2]
set_instance_assignment -name IO_STANDARD LVTTL -to LEDR[3]
set_instance_assignment -name IO_STANDARD LVTTL -to LEDR[4]
set_instance_assignment -name IO_STANDARD LVTTL -to LEDR[5]
set_instance_assignment -name IO_STANDARD LVTTL -to LEDR[6]
set_instance_assignment -name IO_STANDARD LVTTL -to LEDR[7]
set_instance_assignment -name IO_STANDARD LVTTL -to LEDR[8]
set_instance_assignment -name IO_STANDARD LVTTL -to LEDR[9]
set_instance_assignment -name IO_STANDARD LVTTL -to LEDG[0]
set_instance_assignment -name IO_STANDARD LVTTL -to LEDG[1]
set_instance_assignment -name IO_STANDARD LVTTL -to LEDG[2]
set_instance_assignment -name IO_STANDARD LVTTL -to LEDG[3]
set_instance_assignment -name IO_STANDARD LVTTL -to LEDG[4]
set_instance_assignment -name IO_STANDARD LVTTL -to LEDG[5]
set_instance_assignment -name IO_STANDARD LVTTL -to LEDG[6]
set_instance_assignment -name IO_STANDARD LVTTL -to LEDG[7]
set_location_assignment PIN_D12 -to CLOCK_27[0]
set_location_assignment PIN_E12 -to CLOCK_27[1]
set_location_assignment PIN_B12 -to CLOCK_24[0]
set_location_assignment PIN_A12 -to CLOCK_24[1]
set_location_assignment PIN_L1 -to CLOCK_50
set_location_assignment PIN_M21 -to EXT_CLOCK
set_instance_assignment -name IO_STANDARD LVTTL -to CLOCK_27[1]
set_instance_assignment -name IO_STANDARD LVTTL -to CLOCK_24[0]
set_instance_assignment -name IO_STANDARD LVTTL -to CLOCK_24[1]
set_instance_assignment -name IO_STANDARD LVTTL -to CLOCK_50
set_instance_assignment -name IO_STANDARD LVTTL -to EXT_CLOCK
set_location_assignment PIN_H15 -to PS2_CLK
set_location_assignment PIN_J14 -to PS2_DAT
set_location_assignment PIN_F14 -to UART_RXD
set_location_assignment PIN_G12 -to UART_TXD
set_instance_assignment -name IO_STANDARD LVTTL -to PS2_CLK
set_instance_assignment -name IO_STANDARD LVTTL -to PS2_DAT
set_instance_assignment -name IO_STANDARD LVTTL -to UART_RXD
set_instance_assignment -name IO_STANDARD LVTTL -to UART_TXD
set_location_assignment PIN_E8 -to TDI
set_location_assignment PIN_D8 -to TCS
set_location_assignment PIN_C7 -to TCK
set_location_assignment PIN_D7 -to TDO
set_instance_assignment -name IO_STANDARD LVTTL -to TDI
set_instance_assignment -name IO_STANDARD LVTTL -to TCS
set_instance_assignment -name IO_STANDARD LVTTL -to TCK
set_instance_assignment -name IO_STANDARD LVTTL -to TDO
set_location_assignment PIN_D9 -to VGA_R[0]
set_location_assignment PIN_C9 -to VGA_R[1]
set_location_assignment PIN_A7 -to VGA_R[2]
set_location_assignment PIN_B7 -to VGA_R[3]
set_location_assignment PIN_B8 -to VGA_G[0]
set_location_assignment PIN_C10 -to VGA_G[1]
set_location_assignment PIN_B9 -to VGA_G[2]
set_location_assignment PIN_A8 -to VGA_G[3]
set_location_assignment PIN_A9 -to VGA_B[0]
set_location_assignment PIN_D11 -to VGA_B[1]
set_location_assignment PIN_A10 -to VGA_B[2]
set_location_assignment PIN_B10 -to VGA_B[3]
set_location_assignment PIN_A11 -to VGA_HS
set_location_assignment PIN_B11 -to VGA_VS
set_instance_assignment -name IO_STANDARD LVTTL -to VGA_R[0]
set_instance_assignment -name IO_STANDARD LVTTL -to VGA_R[1]
set_instance_assignment -name IO_STANDARD LVTTL -to VGA_R[2]
set_instance_assignment -name IO_STANDARD LVTTL -to VGA_R[3]
set_instance_assignment -name IO_STANDARD LVTTL -to VGA_G[0]
set_instance_assignment -name IO_STANDARD LVTTL -to VGA_G[1]
set_instance_assignment -name IO_STANDARD LVTTL -to VGA_G[2]
set_instance_assignment -name IO_STANDARD LVTTL -to VGA_G[3]
set_instance_assignment -name IO_STANDARD LVTTL -to VGA_B[0]
set_instance_assignment -name IO_STANDARD LVTTL -to VGA_B[1]
set_instance_assignment -name IO_STANDARD LVTTL -to VGA_B[2]
set_instance_assignment -name IO_STANDARD LVTTL -to VGA_B[3]
set_instance_assignment -name IO_STANDARD LVTTL -to VGA_HS
set_instance_assignment -name IO_STANDARD LVTTL -to VGA_VS
set_location_assignment PIN_A3 -to I2C_SCLK
set_location_assignment PIN_B3 -to I2C_SDAT
set_location_assignment PIN_A6 -to AUD_ADCLRCK
set_location_assignment PIN_B6 -to AUD_ADCDAT
set_location_assignment PIN_A5 -to AUD_DACLRCK
set_location_assignment PIN_B5 -to AUD_DACDAT
set_location_assignment PIN_B4 -to AUD_XCK
set_location_assignment PIN_A4 -to AUD_BCLK
set_instance_assignment -name IO_STANDARD LVTTL -to I2C_SCLK
set_instance_assignment -name IO_STANDARD LVTTL -to I2C_SDAT
set_instance_assignment -name IO_STANDARD LVTTL -to AUD_ADCLRCK
set_instance_assignment -name IO_STANDARD LVTTL -to AUD_ADCDAT
set_instance_assignment -name IO_STANDARD LVTTL -to AUD_DACLRCK
set_instance_assignment -name IO_STANDARD LVTTL -to AUD_DACDAT
set_instance_assignment -name IO_STANDARD LVTTL -to AUD_XCK
set_instance_assignment -name IO_STANDARD LVTTL -to AUD_BCLK
set_location_assignment PIN_W4 -to DRAM_ADDR[0]
set_location_assignment PIN_W5 -to DRAM_ADDR[1]
set_location_assignment PIN_Y3 -to DRAM_ADDR[2]
set_location_assignment PIN_Y4 -to DRAM_ADDR[3]
set_location_assignment PIN_R6 -to DRAM_ADDR[4]
set_location_assignment PIN_R5 -to DRAM_ADDR[5]
set_location_assignment PIN_P6 -to DRAM_ADDR[6]
set_location_assignment PIN_P5 -to DRAM_ADDR[7]
set_location_assignment PIN_P3 -to DRAM_ADDR[8]
set_location_assignment PIN_N4 -to DRAM_ADDR[9]
set_location_assignment PIN_W3 -to DRAM_ADDR[10]
set_location_assignment PIN_N6 -to DRAM_ADDR[11]
set_location_assignment PIN_U3 -to DRAM_BA_0
set_location_assignment PIN_V4 -to DRAM_BA_1
set_location_assignment PIN_T3 -to DRAM_CAS_N
set_location_assignment PIN_N3 -to DRAM_CKE
set_location_assignment PIN_U4 -to DRAM_CLK
set_location_assignment PIN_T6 -to DRAM_CS_N
set_location_assignment PIN_U1 -to DRAM_DQ[0]
set_location_assignment PIN_U2 -to DRAM_DQ[1]
set_location_assignment PIN_V1 -to DRAM_DQ[2]
set_location_assignment PIN_V2 -to DRAM_DQ[3]
set_location_assignment PIN_W1 -to DRAM_DQ[4]
set_location_assignment PIN_W2 -to DRAM_DQ[5]
set_location_assignment PIN_Y1 -to DRAM_DQ[6]
set_location_assignment PIN_Y2 -to DRAM_DQ[7]
set_location_assignment PIN_N1 -to DRAM_DQ[8]
set_location_assignment PIN_N2 -to DRAM_DQ[9]
set_location_assignment PIN_P1 -to DRAM_DQ[10]
set_location_assignment PIN_P2 -to DRAM_DQ[11]
set_location_assignment PIN_R1 -to DRAM_DQ[12]
set_location_assignment PIN_R2 -to DRAM_DQ[13]
set_location_assignment PIN_T1 -to DRAM_DQ[14]
set_location_assignment PIN_T2 -to DRAM_DQ[15]
set_location_assignment PIN_R7 -to DRAM_LDQM
set_location_assignment PIN_T5 -to DRAM_RAS_N
set_location_assignment PIN_M5 -to DRAM_UDQM
set_location_assignment PIN_R8 -to DRAM_WE_N
set_location_assignment PIN_AB20 -to FL_ADDR[0]
set_location_assignment PIN_AA14 -to FL_ADDR[1]
set_location_assignment PIN_Y16 -to FL_ADDR[2]
set_location_assignment PIN_R15 -to FL_ADDR[3]
set_location_assignment PIN_T15 -to FL_ADDR[4]
set_location_assignment PIN_U15 -to FL_ADDR[5]
set_location_assignment PIN_V15 -to FL_ADDR[6]
set_location_assignment PIN_W15 -to FL_ADDR[7]
set_location_assignment PIN_R14 -to FL_ADDR[8]
set_location_assignment PIN_Y13 -to FL_ADDR[9]
set_location_assignment PIN_R12 -to FL_ADDR[10]
set_location_assignment PIN_T12 -to FL_ADDR[11]
set_location_assignment PIN_AB14 -to FL_ADDR[12]
set_location_assignment PIN_AA13 -to FL_ADDR[13]
set_location_assignment PIN_AB13 -to FL_ADDR[14]
set_location_assignment PIN_AA12 -to FL_ADDR[15]
set_location_assignment PIN_AB12 -to FL_ADDR[16]
set_location_assignment PIN_AA20 -to FL_ADDR[17]
set_location_assignment PIN_U14 -to FL_ADDR[18]
set_location_assignment PIN_V14 -to FL_ADDR[19]
set_location_assignment PIN_U13 -to FL_ADDR[20]
set_location_assignment PIN_R13 -to FL_ADDR[21]
set_location_assignment PIN_AB16 -to FL_DQ[0]
set_location_assignment PIN_AA16 -to FL_DQ[1]
set_location_assignment PIN_AB17 -to FL_DQ[2]
set_location_assignment PIN_AA17 -to FL_DQ[3]
set_location_assignment PIN_AB18 -to FL_DQ[4]
set_location_assignment PIN_AA18 -to FL_DQ[5]
set_location_assignment PIN_AB19 -to FL_DQ[6]
set_location_assignment PIN_AA19 -to FL_DQ[7]
set_location_assignment PIN_AA15 -to FL_OE_N
set_location_assignment PIN_W14 -to FL_RST_N
set_location_assignment PIN_Y14 -to FL_WE_N
set_location_assignment PIN_AA3 -to SRAM_ADDR[0]
set_location_assignment PIN_AB3 -to SRAM_ADDR[1]
set_location_assignment PIN_AA4 -to SRAM_ADDR[2]
set_location_assignment PIN_AB4 -to SRAM_ADDR[3]
set_location_assignment PIN_AA5 -to SRAM_ADDR[4]
set_location_assignment PIN_AB10 -to SRAM_ADDR[5]
set_location_assignment PIN_AA11 -to SRAM_ADDR[6]
set_location_assignment PIN_AB11 -to SRAM_ADDR[7]
set_location_assignment PIN_V11 -to SRAM_ADDR[8]
set_location_assignment PIN_W11 -to SRAM_ADDR[9]
set_location_assignment PIN_R11 -to SRAM_ADDR[10]
set_location_assignment PIN_T11 -to SRAM_ADDR[11]
set_location_assignment PIN_Y10 -to SRAM_ADDR[12]
set_location_assignment PIN_U10 -to SRAM_ADDR[13]
set_location_assignment PIN_R10 -to SRAM_ADDR[14]
set_location_assignment PIN_T7 -to SRAM_ADDR[15]
set_location_assignment PIN_Y6 -to SRAM_ADDR[16]
set_location_assignment PIN_Y5 -to SRAM_ADDR[17]
set_location_assignment PIN_AB5 -to SRAM_CE_N
set_location_assignment PIN_AA6 -to SRAM_DQ[0]
set_location_assignment PIN_AB6 -to SRAM_DQ[1]
set_location_assignment PIN_AA7 -to SRAM_DQ[2]
set_location_assignment PIN_AB7 -to SRAM_DQ[3]
set_location_assignment PIN_AA8 -to SRAM_DQ[4]
set_location_assignment PIN_AB8 -to SRAM_DQ[5]
set_location_assignment PIN_AA9 -to SRAM_DQ[6]
set_location_assignment PIN_AB9 -to SRAM_DQ[7]
set_location_assignment PIN_Y9 -to SRAM_DQ[8]
set_location_assignment PIN_W9 -to SRAM_DQ[9]
set_location_assignment PIN_V9 -to SRAM_DQ[10]
set_location_assignment PIN_U9 -to SRAM_DQ[11]
set_location_assignment PIN_R9 -to SRAM_DQ[12]
set_location_assignment PIN_W8 -to SRAM_DQ[13]
set_location_assignment PIN_V8 -to SRAM_DQ[14]
set_location_assignment PIN_U8 -to SRAM_DQ[15]
set_location_assignment PIN_Y7 -to SRAM_LB_N
set_location_assignment PIN_T8 -to SRAM_OE_N
set_location_assignment PIN_W7 -to SRAM_UB_N
set_location_assignment PIN_AA10 -to SRAM_WE_N
set_global_assignment -name END_TIME "10000 us"
set_global_assignment -name ADD_DEFAULT_PINS_TO_SIMULATION_OUTPUT_WAVEFORMS OFF
set_global_assignment -name SMART_RECOMPILE ON
set_global_assignment -name AUTO_SHIFT_REGISTER_RECOGNITION OFF
set_global_assignment -name VHDL_FILE rtl/VHDL/clk_div.vhd
set_global_assignment -name VHDL_FILE rtl/VHDL/PS2/KEYBOARD.VHD
set_global_assignment -name VHDL_FILE rtl/VHDL/PS2/ps2bkd.vhd
set_global_assignment -name VHDL_FILE rtl/VHDL/VIDEO_80X40.vhd
set_global_assignment -name VHDL_FILE rtl/vhdl/vga_sync.vhd
set_global_assignment -name VHDL_FILE rtl/vhdl/CHAR_ROM.VHD
set_global_assignment -name VHDL_FILE rtl/vhdl/video_PLL.vhd
set_global_assignment -name VHDL_FILE rtl/vhdl/vram8k.vhd
set_global_assignment -name VHDL_FILE rtl/vhdl/clock_357mhz.vhd
set_global_assignment -name VHDL_FILE rtl/vhdl/rom.vhd
set_global_assignment -name VHDL_FILE rtl/vhdl/top_de1.vhd
set_global_assignment -name VHDL_FILE rtl/vhdl/decoder_7seg.vhd
set_global_assignment -name VHDL_FILE rtl/vhdl/t80/T80s.vhd
set_global_assignment -name VHDL_FILE rtl/vhdl/t80/T80.vhd
set_global_assignment -name VHDL_FILE rtl/vhdl/t80/T80_ALU.vhd
set_global_assignment -name VHDL_FILE rtl/vhdl/t80/T80_MCode.vhd
set_global_assignment -name VHDL_FILE rtl/vhdl/t80/T80_Pack.vhd
set_global_assignment -name VHDL_FILE rtl/vhdl/t80/T80_Reg.vhd
set_global_assignment -name PARTITION_NETLIST_TYPE SOURCE -section_id Top
set_global_assignment -name PARTITION_COLOR 2147039 -section_id Top
set_global_assignment -name LL_ROOT_REGION ON -section_id "Root Region"
set_global_assignment -name LL_MEMBER_STATE LOCKED -section_id "Root Region"
set_instance_assignment -name PARTITION_HIERARCHY no_file_for_top_partition -to | -section_id Top

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