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/trunk/rtl/verilog/aeMB2_aslu.v
1,4 → 1,4
/* $Id: aeMB2_aslu.v,v 1.7 2007-12-17 12:53:27 sybreon Exp $
/* $Id: aeMB2_aslu.v,v 1.8 2008-01-09 19:12:59 sybreon Exp $
**
** AEMB2 INTEGER ARITHMETIC SHIFT LOGIC UNIT
**
315,10 → 315,11
speed. */
reg [31:0] rRES_MUL;
always @(posedge clk_i) begin
rMUL_MA <= #1 rRES_MUL;
rRES_MUL <= #1 (rOPA * rOPB);
end
always @(posedge clk_i)
rMUL_MA <= #1 rRES_MUL;
always @(posedge clk_i)
rRES_MUL <= #1 (rOPA * rOPB);
 
/*
BARREL SHIFTER
563,6 → 564,9
endmodule // aeMB2_aslu
 
/* $Log: not supported by cvs2svn $
/* Revision 1.7 2007/12/17 12:53:27 sybreon
/* Fixed Carry bit bug.
/*
/* Revision 1.6 2007/12/16 20:38:06 sybreon
/* Minor optimisations.
/*

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