OpenCores
URL https://opencores.org/ocsvn/aemb/aemb/trunk

Subversion Repositories aemb

Compare Revisions

  • This comparison shows the changes necessary to convert path
    /
    from Rev 103 to Rev 104
    Reverse comparison

Rev 103 → Rev 104

/trunk/sw/gccrom
1,6 → 1,28
#!/bin/sh
# $Id: gccrom,v 1.12 2007-12-11 00:44:32 sybreon Exp $
# $Id: gccrom,v 1.13 2008-01-19 16:42:54 sybreon Exp $
 
# Compile using C++ pre-processor
mb-g++ -g -Wl,-defsym -Wl,_HEAP_SIZE=0x800 -mxl-soft-div -msoft-float -mxl-barrel-shift -mno-xl-soft-mul -mno-clearbss $@ -o rom.elf -lc_m_bs -lm_m_bs && \
 
# Create a text listing of the compiled code
mb-objdump -DSC rom.elf > rom.dump && \
 
# Convert the ELF file to an SREC file
mb-objcopy -O srec rom.elf rom.srec && \
 
# Generate a Verilog VMEM file from the SREC file
srec_cat rom.srec -o ../sim/dump.vmem -vmem 32 && \
 
# Cleanup code
rm rom.srec && \
 
# Say Cheeze!
echo "ROM generated"
 
# $Log: not supported by cvs2svn $
# Revision 1.12 2007/12/11 00:44:32 sybreon
# Modified for AEMB2
#
# Revision 1.11 2007/11/30 17:09:27 sybreon
# Minor code cleanup.
#
35,22 → 57,3
#
# Revision 1.1 2007/03/09 17:41:56 sybreon
# initial import
#
 
# Compile using C++ pre-processor
mb-g++ -g -Wl,-defsym -Wl,_STACK_SIZE=0x400 -mxl-soft-div -msoft-float -mxl-barrel-shift -mno-xl-soft-mul -o rom.elf $@ && \
 
# Create a text listing of the compiled code
mb-objdump -dSC rom.elf > rom.dump && \
 
# Convert the ELF file to an SREC file
mb-objcopy -O srec rom.elf rom.srec && \
 
# Generate a Verilog VMEM file from the SREC file
srec_cat rom.srec -o ../sim/dump.vmem -vmem 32 && \
 
# Cleanup code
rm rom.srec && \
 
# Say Cheeze!
echo "ROM generated"

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.