URL
https://opencores.org/ocsvn/xulalx25soc/xulalx25soc/trunk
Subversion Repositories xulalx25soc
Compare Revisions
- This comparison shows the changes necessary to convert path
/
- from Rev 105 to Rev 106
- ↔ Reverse comparison
Rev 105 → Rev 106
/xulalx25soc/trunk/bench/cpp/busmaster_tb.cpp
140,6 → 140,8
writeout = true; |
*/ |
|
if ((m_core->v__DOT__wbu_cyc)&&(!m_core->v__DOT__wbu_we)) |
writeout = true; |
/* |
if ((m_core->v__DOT__wbu_cyc)&&(!m_core->v__DOT__wbu_we)) |
writeout = true; |
147,6 → 149,15
writeout = true; |
*/ |
|
#define v__DOT__wb_addr v__DOT__dwb_addr |
#define v__DOT__dwb_stall v__DOT__wb_stall |
#define v__DOT__dwb_ack v__DOT__wb_ack |
#define v__DOT__wb_cyc v__DOT__dwb_cyc |
#define v__DOT__wb_stb v__DOT__dwb_stb |
#define v__DOT__wb_we v__DOT__dwb_we |
#define v__DOT__dwb_idata v__DOT__wb_idata |
#define v__DOT__wb_data v__DOT__dwb_odata |
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if (!m_core->v__DOT__zippy__DOT__cmd_halt) |
writeout = true; |
|
197,17 → 208,25
(m_core->v__DOT____Vcellinp__genbus____pinNumber10)?'s':' ', |
(m_core->v__DOT__wb_err)?'E':'.'); |
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printf(" RUNWB %d@0x%08x %3x %3x %d %d/%d %d:%09lx", |
printf(" RUNWB %d:%09lx %d@0x%08x %3x %3x %d %d/%d/%d %d:%09lx", |
m_core->v__DOT__genbus__DOT__fifo_in_stb, |
m_core->v__DOT__genbus__DOT__fifo_in_word, |
m_core->v__DOT__genbus__DOT__runwb__DOT__wb_state, |
m_core->v__DOT__wbu_addr, |
m_core->v__DOT__genbus__DOT__runwb__DOT__r_len, |
m_core->v__DOT__genbus__DOT__runwb__DOT__r_acks_needed, |
m_core->v__DOT__genbus__DOT__runwb__DOT__w_eow, |
m_core->v__DOT__genbus__DOT__runwb__DOT__last_read_request, |
m_core->v__DOT__genbus__DOT__runwb__DOT__last_ack, |
m_core->v__DOT__genbus__DOT__runwb__DOT__zero_acks, |
m_core->v__DOT__genbus__DOT__exec_stb, |
m_core->v__DOT__genbus__DOT__exec_word); |
|
printf(" WBU[%d,%3d,%3d]", |
m_core->v__DOT__genbus__DOT__runwb__DOT__wb_state, |
m_core->v__DOT__genbus__DOT__runwb__DOT__r_len, |
m_core->v__DOT__genbus__DOT__runwb__DOT__r_acks_needed); |
|
/* |
printf("%c[%d%d%d%d,%d:%04x%c]@%06x(%d) ->%06x%c", |
(m_core->v__DOT__sdram_sel)?'!':' ', |
/xulalx25soc/trunk/rtl/busmaster.v
375,6 → 375,9
// 001x xxxx Down-sampler taps (64 taps, 2 at a time) |
// 1xxx xxxx Up-sampler taps |
// 1 xxxx xxxx xxxx xxxx xxxx Up-sampler taps |
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`ifndef SPEEDY_IO |
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wire pre_io, pre_pwm, pre_uart, pre_flctl, pre_scop; |
assign io_bank = (wb_cyc)&&(wb_addr[31:5] == 27'h8); |
assign pre_io = (~pre_flctl)&&(~pre_pwm)&&(~pre_uart)&&(~pre_scop); |
397,7 → 400,38
assign sdcard_sel=1'b0; |
`endif |
assign sdram_sel=((wb_cyc)&&(wb_addr[31:23]== 9'h01)); |
`else |
// While the following would make the bus infinitely easier to decode, |
// it would also scramble where everything on the bus is located at, |
// while also making it difficult to access these values via offsets |
// of a register. Further, while simpler, everything would alias all |
// over the place as well--that is, devices would show up at multiple |
// locations on the bus. It's all a tradeoff. |
assign iovec = { wb_addr[23],wb_addr[18],wb_addr[15:13] } |
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assign sdram_sel =((wb_cyc)&&(io_vec[4])); |
assign flash_sel =((wb_cyc)&&(io_vec[4:3]==2'b01)); |
assign mem_sel =((wb_cyc)&&(io_vec[4:0]==5'h07)); |
assign cfg_sel =((wb_cyc)&&(io_vec[4:0]==5'h06)); |
`ifdef SDCARD_ACCESS |
assign sdcard_sel=((wb_cyc)&&(io_vec[4:0]==5'h05)); |
`else |
assign sdcard_sel=1'b0; |
`endif |
assign scop_sel =((wb_cyc)&&(io_vec[4:0]==5'h04)); |
assign rtc_sel =((wb_cyc)&&(io_vec[4:0]==5'h03)); |
assign rtc_sel =((wb_cyc)&&(io_vec[4:0]==5'h03)); |
assign puf_sel =((wb_cyc)&&(io_vec[4:0]==5'h02)); |
assign io_sel =((wb_cyc)&&(io_vec[4:0]==5'h01)); |
assign wb_err =((wb_cyc)&&(io_vec[4:0]==5'h00)); |
assign flctl_sel = (puf_sel)&&(wb_addr[3]); |
assign pwm_sel = (puf_sel)&&(wb_addr[3:2]==2'b00); |
// Note that in the following definition, the UART is given four words |
// despite the fact that it can probably only use 3. |
assign uart_sel = (puf_sel)&&(wb_addr[3:2]==2'b01); |
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`endif |
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assign none_sel =((wb_cyc)&&(wb_stb)&&(~ |
(io_sel |
||uart_sel |
440,11 → 474,12
|
wire flash_interrupt, sdcard_interrupt, scop_interrupt, |
uart_rx_int, uart_tx_int, pwm_int; |
wire [(NGPO-1):0] w_gpio; |
// The I/O processor, herein called an ioslave |
ioslave #(NGPO, NGPI) runio(i_clk, |
wb_cyc, (io_sel)&&(wb_stb), wb_we, wb_addr[4:0], |
wb_data, io_ack, io_stall, io_data, |
i_gpio, o_gpio, |
i_gpio, w_gpio, |
bus_err_addr, |
{ |
sdcard_interrupt, |
484,7 → 519,14
// audio rate can be adjusted (1), or whether it is fixed within the |
// build (0). |
`ifdef XULA25 |
`define FMHACK |
|
`ifdef FMHACK |
wbfmtxhack #(16'd1813) // 44.1 kHz, user adjustable |
`else |
wbpwmaudio #(16'd1813,1) // 44.1 kHz, user adjustable |
`endif |
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`else |
wbpwmaudio #(16'h270f,0,16) // 8 kHz, fixed audio rate |
`endif |
492,7 → 534,14
wb_cyc, (wb_stb)&&(pwm_sel), wb_we, wb_addr[0], |
wb_data, pwm_ack, pwm_stall, pwm_data, o_pwm, pwm_int); |
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`ifdef FMHACK |
assign o_gpio = {(NGPO){o_pwm}}; |
`else |
assign o_gpio = w_gpio; |
`endif |
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// |
// FLASH MEMORY CONFIGURATION ACCESS |
// |
/xulalx25soc/trunk/Makefile
58,6 → 58,8
archive: |
tar --transform s,^,$(YYMMDD)-xula/, -chjf $(YYMMDD)-xula.tjz $(BENCH) $(SW) $(RTL) $(NOTES) $(PROJ) $(BIN) $(CONSTRAINTS) |
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.PHONY: rtl |
rtl: verilated |
.PHONY: verilated |
verilated: |
cd rtl ; $(MAKE) --no-print-directory |