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URL https://opencores.org/ocsvn/or1k/or1k/trunk

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  • This comparison shows the changes necessary to convert path 
    /
    from Rev 1061 to Rev 1062
    ↔ Reverse comparison
  •

Rev 1061 → Rev 1062

/trunk/or1ksim/cuc/cuc.h
23,7 → 23,7
/* Maximum number of instructions per function */
#define MAX_INSNS 0x10000
#define MAX_OPERANDS 4
#define MAX_BB 0x100
#define MAX_BB 0x1000
#define MAX_REGS 34
#define FLAG_REG (MAX_REGS - 2)
#define LRBB_REG (MAX_REGS - 1)
221,7 → 221,7
void generate_bb_seq (cuc_func *f, char *mp_filename, char *bb_filename);
 
/* Prints out instructions */
void print_insns (cuc_insn *insn, int size, int verbose);
void print_insns (int bb, cuc_insn *insn, int size, int verbose);
 
/* prints out bb string */
void print_bb_num (int num);
/trunk/or1ksim/cuc/load.c
69,7 → 69,7
{
int i, j;
PRINTF ("****************** %s ******************\n", s);
print_insns (insn, num_insn,verbose);
print_insns (0, insn, num_insn,verbose);
PRINTF ("\n\n");
}
 
231,20 → 231,32
int i, j, num_bra = 0, d;
for (i = 0; i < num_insn; i++) if (insn[i].type & IT_BRANCH) num_bra++;
 
d = num_insn + num_bra;
d = num_insn + 2 * num_bra;
assert (d < MAX_INSNS);
/* Add nop before branch */
for (i = num_insn - 1; i >= 0; i--) if (insn[i].type & IT_BRANCH) {
insn[--d] = insn[i];
insn[--d] = insn[i];
insn[--d] = insn[i]; // for delay slot (later)
if (insn[d].opt[1] & OPT_REGISTER) {
assert (insn[d].op[1] == FLAG_REG);
insn[d].op[1] = i; insn[d].opt[1] = OPT_REF;
}
insn[--d] = insn[i]; // for branch
change_insn_type (&insn[d], II_NOP);
insn[--d] = insn[i]; // save flag & negation of conditional, if required
change_insn_type (&insn[d], II_CMOV);
insn[d].op[0] = -1; insn[d].opt[0] = OPT_REGISTER | OPT_DEST;
insn[d].op[1] = insn[d].type & IT_FLAG1 ? 0 : 1; insn[d].opt[1] = OPT_CONST;
insn[d].op[2] = insn[d].type & IT_FLAG1 ? 1 : 0; insn[d].opt[2] = OPT_CONST;
insn[d].op[3] = FLAG_REG; insn[d].opt[3] = OPT_REGISTER;
insn[d].type = IT_COND;
if (insn[d].type)
reloc[i] = d;
change_insn_type (&insn[d], II_NOP);
} else {
insn[--d] = insn[i];
reloc[i] = d;
}
num_insn += num_bra;
num_insn += 2 * num_bra;
for (i = 0; i < num_insn; i++)
for (j = 0; j < MAX_OPERANDS; j++)
if (insn[i].opt[j] & OPT_REF || insn[i].opt[j] & OPT_JUMP)
443,19 → 455,11
insn[i].op[1] = 1; insn[i].opt[1] = OPT_CONST;
insn[i].type |= IT_BRANCH | IT_VOLATILE;
} else {
i--;
/* repair params */
insn[i].op[2] = insn[i].op[1]; insn[i].opt[2] = insn[i].opt[1] & ~OPT_DEST;
insn[i].op[1] = insn[i].op[0]; insn[i].opt[1] = insn[i].opt[0] & ~OPT_DEST;
insn[i].op[0] = FLAG_REG; insn[i].opt[0] = OPT_DEST | OPT_REGISTER;
insn[i].opt[3] = OPT_NONE;
insn[i].type |= IT_COND;
if (f) negate_conditional (&insn[i]);
i++;
change_insn_type (&insn[i], II_BF);
insn[i].op[0] = i + insn[i].op[0]; insn[i].opt[0] = OPT_JUMP;
insn[i].op[1] = FLAG_REG; insn[i].opt[1] = OPT_REGISTER;
insn[i].type |= IT_BRANCH | IT_VOLATILE;
if (f) insn[i].type |= IT_FLAG1;
}
} else {
insn[i].index = -1;
472,6 → 476,16
insn[i].op[2] = 0;
insn[i].opt[2] = OPT_CONST;
}
if (insn[i].index == II_SFEQ || insn[i].index == II_SFNE
|| insn[i].index == II_SFLE || insn[i].index == II_SFGT
|| insn[i].index == II_SFGE || insn[i].index == II_SFLT) {
/* repair params */
insn[i].op[2] = insn[i].op[1]; insn[i].opt[2] = insn[i].opt[1] & ~OPT_DEST;
insn[i].op[1] = insn[i].op[0]; insn[i].opt[1] = insn[i].opt[0] & ~OPT_DEST;
insn[i].op[0] = FLAG_REG; insn[i].opt[0] = OPT_DEST | OPT_REGISTER;
insn[i].opt[3] = OPT_NONE;
insn[i].type |= IT_COND;
}
if (insn[i].index < 0 || insn[i].index == II_NOP && insn[i].op[0] != 0) {
cucdebug (1, "Instruction #%i: \"%s\" not supported (2).\n", i, name);
log ("Instruction #%i: \"%s\" not supported (2).\n", i, name);
/trunk/or1ksim/cuc/bb.c
51,7 → 51,7
PRINTF (" "); print_bb_num (f->bb[i].prev[1]);
PRINTF ("\n");
if (f->bb[i].insn) print_insns (f->bb[i].insn, f->bb[i].ninsn, 0);
if (f->bb[i].insn) print_insns (i, f->bb[i].insn, f->bb[i].ninsn, 0);
}
if (f->nmsched) {
PRINTF ("\nmsched: ");
348,11 → 348,11
if (!f->bb[i].insn && f->bb[i].ninsn) goto err;
for (j = 0; j < f->bb[i].ninsn; j++) {
cuc_insn *ii = &f->bb[i].insn[j];
if ((ii->index == II_CMOV || ii->index == II_ADD) && ii->type & IT_COND) {
if ((ii->index == II_CMOV || ii->index == II_ADD) && ii->type & IT_COND && ii->opt[0] & OPT_DEST) {
k = 0;
assert (ii->opt[k] & OPT_REGISTER);
if ((signed)ii->op[k] >= 0 && ii->op[k] != FLAG_REG && ii->op[k] != LRBB_REG) {
cucdebug (1, "%x %x\n", ii->opt[0], ii->op[0]);
cucdebug (1, "Invalid dest conditional type opt%x op%x\n", ii->opt[0], ii->op[0]);
goto err;
}
}
362,7 → 362,10
if (REF_BB(t) >= f->num_bb || REF_I (t) >= f->bb[REF_BB(t)].ninsn
|| (ii->index == II_CMOV || ii->index == II_ADD) && (
(f->INSN(t).type & IT_COND) != (ii->type & IT_COND) && k < 3
|| !(f->INSN(t).type & IT_COND) && k == 3)) goto err;
|| !(f->INSN(t).type & IT_COND) && k == 3)) {
cucdebug (1, "Conditional misused\n");
goto err;
}
}
if (k && ii->opt[k] & OPT_DEST) {
cucdebug (1, "Destination only allowed for op0!\n");
373,8 → 376,9
}
return;
err:
cucdebug (1, "Anomaly detected at %x.%x[%i]\n", i, j, k);
cucdebug (1, "Anomaly detected at [%x_%x].%i\n", i, j, k);
print_cuc_bb (f, "ANOMALY");
cucdebug (1, "Anomaly detected at [%x_%x].%i\n", i, j, k);
exit (1);
}
 
/trunk/or1ksim/cuc/insn.c
82,12 → 82,14
}
 
/* Prints out instructions */
void print_insns (cuc_insn *insn, int ninsn, int verbose)
void print_insns (int bb, cuc_insn *insn, int ninsn, int verbose)
{
int i, j;
for (i = 0; i < ninsn; i++) {
char tmp[10];
dep_list *l = insn[i].dep;
PRINTF ("%4x%c %-4s ", i, insn[i].index >= 0 ? ':' : '?', cuc_insn_name (&insn[i]));
sprintf (tmp, "[%x_%x]", bb, i);
PRINTF ("%-8s%c %-4s ", tmp, insn[i].index >= 0 ? ':' : '?', cuc_insn_name (&insn[i]));
if (verbose) {
PRINTF ("%-20s insn = %08x, index = %i, type = %04x ",
insn[i].disasm, insn[i].insn, insn[i].index, insn[i].type);
99,13 → 101,13
case OPT_CONST: if (insn[i].type & IT_COND && (insn[i].index == II_CMOV
|| insn[i].index == II_ADD)) PRINTF ("%x, ", insn[i].op[j]);
else PRINTF ("0x%08x, ", insn[i].op[j]); break;
case OPT_JUMP: PRINTF ("J%x ", insn[i].op[j]); break;
case OPT_JUMP: PRINTF ("J%x, ", insn[i].op[j]); break;
case OPT_REGISTER: PRINTF ("r%i, ", insn[i].op[j]); break;
case OPT_REF: PRINTF ("[%x.%x], ", REF_BB(insn[i].op[j]), REF_I(insn[i].op[j])); break;
case OPT_REF: PRINTF ("[%x_%x], ", REF_BB(insn[i].op[j]), REF_I(insn[i].op[j])); break;
case OPT_BB: PRINTF ("BB "); print_bb_num (insn[i].op[j]); PRINTF (", "); break;
case OPT_LRBB: PRINTF ("LRBB, "); break;
default:
fprintf (stderr, "Invalid operand type %s(%x.%x) = %x\n",
fprintf (stderr, "Invalid operand type %s(%x_%x) = %x\n",
cuc_insn_name (&insn[i]), i, j, insn[i].opt[j]);
assert (0);
}
113,7 → 115,7
if (l) {
PRINTF ("\n\tdep:");
while (l) {
PRINTF (" [%x.%x],", REF_BB (l->ref), REF_I (l->ref));
PRINTF (" [%x_%x],", REF_BB (l->ref), REF_I (l->ref));
l = l->next;
}
}
637,6 → 639,7
tmp = *a;
cmov = f->INSN(ref2);
tmp.op[diff] = ref; tmp.opt[diff] = OPT_REF;
cmov.op[0] = -1; cmov.opt[0] = OPT_REGISTER | OPT_DEST;
cmov.op[1] = a->op[diff]; cmov.opt[1] = a->opt[diff];
cmov.op[2] = b->op[diff]; cmov.opt[2] = b->opt[diff];
change_insn_type (&cmov, II_CMOV);
/trunk/or1ksim/cuc/cuc.c
32,7 → 32,7
#include "parse.h"
 
FILE *flog;
int cuc_debug = 9;
int cuc_debug = 0;
 
/* Last used registers by software convention */
/* Note that r11 is caller saved register, and we can destroy it.
614,7 → 614,10
wait_command:
PRINTF ("(cuc) ");
fflush (stdout);
fgets(tmp1, sizeof tmp1, stdin);
wait_command_empty:
s = fgets(tmp1, sizeof tmp1, stdin);
usleep (100);
if (!s) goto wait_command_empty;
for (s = tmp1; *s != '\0' && *s != '\n' && *s != '\r'; s++);
*s = '\0';
 

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