OpenCores
URL https://opencores.org/ocsvn/mcu8/mcu8/trunk

Subversion Repositories mcu8

Compare Revisions

  • This comparison shows the changes necessary to convert path 
    /
    from Rev 11 to Rev 12
    ↔ Reverse comparison
  •

Rev 11 → Rev 12

/trunk/src/processor_E.ucf
0,0 → 1,71
#NET "prog_adr<0>" LOC = "P83" | IOSTANDARD = LVCMOS33;
#NET "prog_adr<1>" LOC = "P84" | IOSTANDARD = LVCMOS33;
#NET "prog_adr<2>" LOC = "P85" | IOSTANDARD = LVCMOS33;
#NET "prog_adr<3>" LOC = "P86" | IOSTANDARD = LVCMOS33;
#NET "prog_adr<4>" LOC = "P87" | IOSTANDARD = LVCMOS33;
#NET "prog_adr<5>" LOC = "P89" | IOSTANDARD = LVCMOS33;
#NET "prog_adr<6>" LOC = "P90" | IOSTANDARD = LVCMOS33;
#NET "prog_adr<7>" LOC = "P92" | IOSTANDARD = LVCMOS33;
#NET "prog_data<0>" LOC = "P8" | IOSTANDARD = LVCMOS33;
#NET "prog_data<1>" LOC = "P10" | IOSTANDARD = LVCMOS33;
#NET "prog_data<2>" LOC = "P7" | IOSTANDARD = LVCMOS33;
#NET "prog_data<3>" LOC = "P6" | IOSTANDARD = LVCMOS33;
#NET "prog_data<4>" LOC = "P5" | IOSTANDARD = LVCMOS33;
#NET "prog_data<5>" LOC = "P4" | IOSTANDARD = LVCMOS33;
#NET "prog_data<6>" LOC = "P1" | IOSTANDARD = LVCMOS33;
#NET "prog_data<7>" LOC = "P2" | IOSTANDARD = LVCMOS33;
#
#NET "datmem_adr<0>" LOC = "P105" | IOSTANDARD = LVCMOS33;
#NET "datmem_adr<1>" LOC = "P104" | IOSTANDARD = LVCMOS33;
#NET "datmem_adr<2>" LOC = "P103" | IOSTANDARD = LVCMOS33;
#NET "datmem_adr<3>" LOC = "P107" | IOSTANDARD = LVCMOS33;
#NET "datmem_adr<4>" LOC = "P108" | IOSTANDARD = LVCMOS33;
#NET "datmem_adr<5>" LOC = "P116" | IOSTANDARD = LVCMOS33;
#NET "datmem_adr<6>" LOC = "P112" | IOSTANDARD = LVCMOS33;
#NET "datmem_adr<7>" LOC = "P113" | IOSTANDARD = LVCMOS33;
#NET "datmem_data_in<0>" LOC = "P118" | IOSTANDARD = LVCMOS33; #schwarzer draht
#NET "datmem_data_in<1>" LOC = "P122" | IOSTANDARD = LVCMOS33; #gr|ner draht
#NET "datmem_data_in<2>" LOC = "P13" | IOSTANDARD = LVCMOS33;
#NET "datmem_data_in<3>" LOC = "P20" | IOSTANDARD = LVCMOS33;
#NET "datmem_data_in<4>" LOC = "P18" | IOSTANDARD = LVCMOS33;
#NET "datmem_data_in<5>" LOC = "P17" | IOSTANDARD = LVCMOS33;
#NET "datmem_data_in<6>" LOC = "P15" | IOSTANDARD = LVCMOS33;
#NET "datmem_data_in<7>" LOC = "P14" | IOSTANDARD = LVCMOS33;
#NET "datmem_data_out<0>" LOC = "P32" | IOSTANDARD = LVCMOS33;
#NET "datmem_data_out<1>" LOC = "P31" | IOSTANDARD = LVCMOS33;
#NET "datmem_data_out<2>" LOC = "P93" | IOSTANDARD = LVCMOS33;
#NET "datmem_data_out<3>" LOC = "P95" | IOSTANDARD = LVCMOS33;
#NET "datmem_data_out<4>" LOC = "P96" | IOSTANDARD = LVCMOS33;
#NET "datmem_data_out<5>" LOC = "P97" | IOSTANDARD = LVCMOS33;
#NET "datmem_data_out<6>" LOC = "P98" | IOSTANDARD = LVCMOS33;
#NET "datmem_data_out<7>" LOC = "P99" | IOSTANDARD = LVCMOS33;
#NET "datmem_nrd" LOC = "P35" | IOSTANDARD = LVCMOS33;
#NET "datmem_nwr" LOC = "P33" | IOSTANDARD = LVCMOS33;
#
#NET "go_step" LOC = "P119" | IOSTANDARD = LVCMOS33; #wei_er draht
#NET "one_step" LOC = "P11" | IOSTANDARD = LVCMOS33;
##
#NET "clk" LOC = "P127" | IOSTANDARD = LVCMOS33;
#NET "nreset" LOC = "P12" | IOSTANDARD = LVCMOS33;
#
#NET "a<0>" LOC = "P21" | IOSTANDARD = LVCMOS33;
#NET "a<1>" LOC = "P23" | IOSTANDARD = LVCMOS33;
#NET "a<2>" LOC = "P24" | IOSTANDARD = LVCMOS33;
#NET "a<3>" LOC = "P25" | IOSTANDARD = LVCMOS33;
#NET "a<4>" LOC = "P26" | IOSTANDARD = LVCMOS33;
#NET "a<5>" LOC = "P27" | IOSTANDARD = LVCMOS33;
#NET "a<6>" LOC = "P28" | IOSTANDARD = LVCMOS33;
#NET "a<7>" LOC = "P30" | IOSTANDARD = LVCMOS33;
#NET "b<0>" LOC = "P79" | IOSTANDARD = LVCMOS33;
#NET "b<1>" LOC = "P76" | IOSTANDARD = LVCMOS33;
#NET "b<2>" LOC = "P73" | IOSTANDARD = LVCMOS33;
#NET "b<3>" LOC = "P74" | IOSTANDARD = LVCMOS33;
#NET "b<4>" LOC = "P82" | IOSTANDARD = LVCMOS33;
#NET "b<5>" LOC = "P80" | IOSTANDARD = LVCMOS33;
#NET "b<6>" LOC = "P78" | IOSTANDARD = LVCMOS33;
#NET "b<7>" LOC = "P77" | IOSTANDARD = LVCMOS33;
#NET "cflag" LOC = "P36" | IOSTANDARD = LVCMOS33;
#NET "zflag" LOC = "P100" | IOSTANDARD = LVCMOS33;
#
#NET "nreset_int" LOC = "P55" | IOSTANDARD = LVCMOS33;
#
/trunk/src/processor_E.ut
0,0 → 1,30
-g DebugBitstream:No
-g Binary:no
-b
-g CRC:Enable
-g ConfigRate:6
-g CclkPin:PullUp
-g M0Pin:PullUp
-g M1Pin:PullUp
-g M2Pin:PullUp
-g ProgPin:PullUp
-g DonePin:PullUp
-g TckPin:PullUp
-g TdiPin:PullUp
-g TdoPin:PullUp
-g TmsPin:PullUp
-g UnusedPin:PullDown
-g UserID:0xFFFF0001
-g DCMShutDown:Disable
-g StartUpClk:CClk
-g DONE_cycle:4
-g GTS_cycle:5
-g GWE_cycle:6
-g LCK_cycle:NoWait
-g Match_cycle:NoWait
-g Security:None
-g Persist:No
-g ReadBack
-g DonePipe:No
-g DriveDone:No
/trunk/Makefile
4,9 → 4,9
# Don't forget to execute "source bin/load_modules" manual from the shell #
##############################################################################################
 
TOP=processor#change to the name of the TOP-Entity
TOP=processor_E#change to the name of the TOP-Entity
DEVICE=xc3s4000-fg676-4#change to the device id found on the chip
#VHDLSYNFILES=src/processor_E.vhd src/processor.model.vhd src/cpu_types.vhd src/ram.vhd src/rom.vhd #list all vhdl files in the project that have to be synthesized
#VHDLSYNFILES=src/cpu_types.vhd src/components.vhd src/processor_E.vhd src/processor.model.vhd src/cpu_types.vhd src/ram.vhd src/rom.vhd #list all vhdl files in the project that have to be synthesized
VHDLSYNFILES=src/cpu_types.vhd src/alu.vhd src/control.vhd src/pc.vhd src/ram_control.vhd src/reg.vhd src/components.vhd src/processor_E.vhd src/ram.vhd src/rom.vhd
 
OPTMODE=Speed

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.