URL
https://opencores.org/ocsvn/systemc_rng/systemc_rng/trunk
Subversion Repositories systemc_rng
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- from Rev 11 to Rev 12
- ↔ Reverse comparison
Rev 11 → Rev 12
/tags/first_import/stimulus.h
File deleted
/tags/first_import/bench/systemc/stimulus.h
File deleted
/tags/first_import/bench/systemc/main.cpp
File deleted
/tags/first_import/bench/systemc/stimulus.cpp
File deleted
/tags/first_import/rtl/systemc/main.cpp
File deleted
/tags/first_import/rtl/systemc/stimulus.cpp
File deleted
/tags/first_import/rtl/systemc/rng.cpp
File deleted
/tags/first_import/rtl/systemc/stimulus.h
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/tags/first_import/rtl/systemc/rng.h
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/tags/first_import/rtl/systemc/Makefile.defs
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/tags/first_import/rtl/systemc/Makefile
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/tags/first_import/main.cpp
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/tags/first_import/stimulus.cpp
File deleted
/trunk/bench/systemc/stimulus.h
File deleted
/trunk/bench/systemc/main.cpp
File deleted
/trunk/bench/systemc/stimulus.cpp
File deleted
/trunk/bench/verilog/top.v
File deleted
/trunk/rtl/systemc/main.cpp
File deleted
/trunk/rtl/systemc/stimulus.cpp
File deleted
/trunk/rtl/systemc/rng.cpp
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/trunk/rtl/systemc/stimulus.h
File deleted
/trunk/rtl/systemc/rng.h
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/trunk/rtl/systemc/Makefile.defs
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/trunk/rtl/systemc/Makefile
File deleted
/trunk/rtl/verilog/rng.v
File deleted
/systemc_rng/trunk/bench/systemc/main.cpp
0,0 → 1,104
////////////////////////////////////////////////////////////////////// |
//// //// |
//// Random Number Main simulation File //// |
//// //// |
//// This file is part of the SystemC RNG project //// |
//// //// |
//// Description: //// |
//// Main simulation file of random number generator //// |
//// //// |
//// To Do: //// |
//// - nothing //// |
//// //// |
//// Author(s): //// |
//// - Javier Castillo, javier.castillo@urjc.es //// |
//// //// |
//// This core is provided by Universidad Rey Juan Carlos //// |
//// http://www.escet.urjc.es/~jmartine //// |
//// //// |
////////////////////////////////////////////////////////////////////// |
//// //// |
//// Copyright (C) 2000 Authors and OPENCORES.ORG //// |
//// //// |
//// This source file may be used and distributed without //// |
//// restriction provided that this copyright statement is not //// |
//// removed from the file and that any derivative work contains //// |
//// the original copyright notice and the associated disclaimer. //// |
//// //// |
//// This source file is free software; you can redistribute it //// |
//// and/or modify it under the terms of the GNU Lesser General //// |
//// Public License as published by the Free Software Foundation; //// |
//// either version 2.1 of the License, or (at your option) any //// |
//// later version. //// |
//// //// |
//// This source is distributed in the hope that it will be //// |
//// useful, but WITHOUT ANY WARRANTY; without even the implied //// |
//// warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR //// |
//// PURPOSE. See the GNU Lesser General Public License for more //// |
//// details. //// |
//// //// |
//// You should have received a copy of the GNU Lesser General //// |
//// Public License along with this source; if not, download it //// |
//// from http://www.opencores.org/lgpl.shtml //// |
//// //// |
////////////////////////////////////////////////////////////////////// |
// |
// CVS Revision History |
// |
// $Log: not supported by cvs2svn $ |
// Revision 1.3 2004/08/30 17:02:57 jcastillo |
// Used indent command |
// |
// Revision 1.3 2004/08/30 17:01:50 jcastillo |
// Used indent command |
// |
// Revision 1.2 2004/08/25 15:32:23 jcastillo |
// Corrected to run under MSVC60 |
// |
// Revision 1.1.1.1 2004/08/19 14:27:14 jcastillo |
// First import |
// |
|
#include "systemc.h" |
#include "stimulus.h" |
#include "rng.h" |
|
#ifdef __GNUC__ |
#include "iostream.h" |
#endif |
|
|
int |
sc_main (int argc, char *argv[]) |
{ |
|
sc_clock clk ("clk", 1, SC_US); |
|
rng *rng1; |
stimulus *st1; |
|
rng1 = new rng ("rng"); |
st1 = new stimulus ("stimulus"); |
|
sc_signal < bool > reset; |
sc_signal < bool > loadseed_i; |
sc_signal < sc_uint < 32 > >seed_i; |
sc_signal < sc_uint < 32 > >number_o; |
|
rng1->clk (clk); |
rng1->reset (reset); |
rng1->loadseed_i (loadseed_i); |
rng1->seed_i (seed_i); |
rng1->number_o (number_o); |
|
st1->clk (clk); |
st1->reset (reset); |
st1->loadseed_o (loadseed_i); |
st1->seed_o (seed_i); |
st1->number_i (number_o); |
|
sc_start (-1); |
|
return 0; |
|
} |
/systemc_rng/trunk/bench/systemc/stimulus.cpp
0,0 → 1,81
////////////////////////////////////////////////////////////////////// |
//// //// |
//// Random Number Generator Testbench //// |
//// //// |
//// This file is part of the SystemC RNG project //// |
//// //// |
//// Description: //// |
//// Testbench stimulus //// |
//// //// |
//// To Do: //// |
//// - nothing //// |
//// //// |
//// Author(s): //// |
//// - Javier Castillo, javier.castillo@urjc.es //// |
//// //// |
//// This core is provided by Universidad Rey Juan Carlos //// |
//// http://www.escet.urjc.es/~jmartine //// |
//// //// |
////////////////////////////////////////////////////////////////////// |
//// //// |
//// Copyright (C) 2000 Authors and OPENCORES.ORG //// |
//// //// |
//// This source file may be used and distributed without //// |
//// restriction provided that this copyright statement is not //// |
//// removed from the file and that any derivative work contains //// |
//// the original copyright notice and the associated disclaimer. //// |
//// //// |
//// This source file is free software; you can redistribute it //// |
//// and/or modify it under the terms of the GNU Lesser General //// |
//// Public License as published by the Free Software Foundation; //// |
//// either version 2.1 of the License, or (at your option) any //// |
//// later version. //// |
//// //// |
//// This source is distributed in the hope that it will be //// |
//// useful, but WITHOUT ANY WARRANTY; without even the implied //// |
//// warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR //// |
//// PURPOSE. See the GNU Lesser General Public License for more //// |
//// details. //// |
//// //// |
//// You should have received a copy of the GNU Lesser General //// |
//// Public License along with this source; if not, download it //// |
//// from http://www.opencores.org/lgpl.shtml //// |
//// //// |
////////////////////////////////////////////////////////////////////// |
// |
// CVS Revision History |
// |
// $Log: not supported by cvs2svn $ |
// Revision 1.2 2004/08/30 17:02:57 jcastillo |
// Used indent command |
// |
// Revision 1.2 2004/08/30 17:01:50 jcastillo |
// Used indent command |
// |
// Revision 1.1.1.1 2004/08/19 14:27:14 jcastillo |
// First import |
// |
|
#include "systemc.h" |
#include "stimulus.h" |
|
void |
stimulus::tb () |
{ |
|
wait (clk->posedge_event ()); |
reset.write (0); |
wait (clk->posedge_event ()); |
reset.write (1); |
wait (clk->posedge_event ()); |
loadseed_o.write (1); |
seed_o.write (0x12678); |
wait (clk->posedge_event ()); |
loadseed_o.write (0); |
for (;;) |
{ |
wait (clk->posedge_event ()); |
cout << (unsigned int) number_i.read () << endl; |
} |
|
} |
/systemc_rng/trunk/bench/systemc/stimulus.h
0,0 → 1,83
////////////////////////////////////////////////////////////////////// |
//// //// |
//// Random Number Generator Testbench Header //// |
//// //// |
//// This file is part of the SystemC RNG project //// |
//// //// |
//// Description: //// |
//// Testbench header //// |
//// //// |
//// To Do: //// |
//// - nothing //// |
//// //// |
//// Author(s): //// |
//// - Javier Castillo, javier.castillo@urjc.es //// |
//// //// |
//// This core is provided by Universidad Rey Juan Carlos //// |
//// http://www.escet.urjc.es/~jmartine //// |
//// //// |
////////////////////////////////////////////////////////////////////// |
//// //// |
//// Copyright (C) 2000 Authors and OPENCORES.ORG //// |
//// //// |
//// This source file may be used and distributed without //// |
//// restriction provided that this copyright statement is not //// |
//// removed from the file and that any derivative work contains //// |
//// the original copyright notice and the associated disclaimer. //// |
//// //// |
//// This source file is free software; you can redistribute it //// |
//// and/or modify it under the terms of the GNU Lesser General //// |
//// Public License as published by the Free Software Foundation; //// |
//// either version 2.1 of the License, or (at your option) any //// |
//// later version. //// |
//// //// |
//// This source is distributed in the hope that it will be //// |
//// useful, but WITHOUT ANY WARRANTY; without even the implied //// |
//// warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR //// |
//// PURPOSE. See the GNU Lesser General Public License for more //// |
//// details. //// |
//// //// |
//// You should have received a copy of the GNU Lesser General //// |
//// Public License along with this source; if not, download it //// |
//// from http://www.opencores.org/lgpl.shtml //// |
//// //// |
////////////////////////////////////////////////////////////////////// |
// |
// CVS Revision History |
// |
// $Log: not supported by cvs2svn $ |
// Revision 1.2 2004/08/30 17:02:57 jcastillo |
// Used indent command |
// |
// Revision 1.2 2004/08/30 17:01:50 jcastillo |
// Used indent command |
// |
// Revision 1.1.1.1 2004/08/19 14:27:14 jcastillo |
// First import |
// |
|
#include "systemc.h" |
|
SC_MODULE (stimulus) |
{ |
|
sc_in < bool > clk; |
sc_out < bool > reset; |
|
sc_out < bool > loadseed_o; |
sc_out < sc_uint < 32 > >seed_o; |
sc_in < sc_uint < 32 > >number_i; |
|
void tb (); |
|
SC_CTOR (stimulus) |
{ |
|
cout.unsetf (ios::dec); |
cout.setf (ios::hex); |
cout.setf (ios::showbase); |
|
SC_THREAD (tb); |
|
} |
}; |
/systemc_rng/trunk/bench/verilog/top.v
0,0 → 1,93
////////////////////////////////////////////////////////////////////// |
//// //// |
//// RNG main simulation file //// |
//// //// |
//// This file is part of the SystemC RNG //// |
//// //// |
//// Description: //// |
//// RNG main simulation file //// |
//// //// |
//// To Do: //// |
//// - done //// |
//// //// |
//// Author(s): //// |
//// - Javier Castillo, javier.castillo@urjc.es //// |
//// //// |
////////////////////////////////////////////////////////////////////// |
//// //// |
//// Copyright (C) 2000 Authors and OPENCORES.ORG //// |
//// //// |
//// This source file may be used and distributed without //// |
//// restriction provided that this copyright statement is not //// |
//// removed from the file and that any derivative work contains //// |
//// the original copyright notice and the associated disclaimer. //// |
//// //// |
//// This source file is free software; you can redistribute it //// |
//// and/or modify it under the terms of the GNU Lesser General //// |
//// Public License as published by the Free Software Foundation; //// |
//// either version 2.1 of the License, or (at your option) any //// |
//// later version. //// |
//// //// |
//// This source is distributed in the hope that it will be //// |
//// useful, but WITHOUT ANY WARRANTY; without even the implied //// |
//// warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR //// |
//// PURPOSE. See the GNU Lesser General Public License for more //// |
//// details. //// |
//// //// |
//// You should have received a copy of the GNU Lesser General //// |
//// Public License along with this source; if not, download it //// |
//// from http://www.opencores.org/lgpl.shtml //// |
//// //// |
////////////////////////////////////////////////////////////////////// |
// |
// CVS Revision History |
// |
// $Log: not supported by cvs2svn $ |
// Revision 1.1 2004/09/23 09:45:06 jcastillo |
// Verilog first import |
// |
|
`timescale 10ns/1ns |
|
module top; |
|
|
reg clk; |
reg reset; |
reg loadseed_i; |
|
reg [31:0] seed_i; |
wire [31:0] number_o; |
|
rng r1(clk,reset,loadseed_i,seed_i,number_o); |
|
initial |
|
begin |
clk = 1'b1; |
reset = 1'b1; |
loadseed_i = 1'b0; |
seed_i=32'h12345678; |
@(posedge clk); |
reset = #1 1'b0; |
@(posedge clk); |
reset = #1 1'b1; |
@(posedge clk); |
loadseed_i = #1 1'b1; |
@(posedge clk); |
loadseed_i = #1 1'b0; |
|
while(1) |
begin |
@(posedge clk); |
$display("%H",number_o); |
end |
|
|
$finish; |
|
end |
|
always #5 clk = !clk; |
|
endmodule |
/systemc_rng/trunk/rtl/systemc/main.cpp
0,0 → 1,101
////////////////////////////////////////////////////////////////////// |
//// //// |
//// Random Number Main simulation File //// |
//// //// |
//// This file is part of the SystemC RNG project //// |
//// //// |
//// Description: //// |
//// Main simulation file of random number generator //// |
//// //// |
//// To Do: //// |
//// - nothing //// |
//// //// |
//// Author(s): //// |
//// - Javier Castillo, javier.castillo@urjc.es //// |
//// //// |
//// This core is provided by Universidad Rey Juan Carlos //// |
//// http://www.escet.urjc.es/~jmartine //// |
//// //// |
////////////////////////////////////////////////////////////////////// |
//// //// |
//// Copyright (C) 2000 Authors and OPENCORES.ORG //// |
//// //// |
//// This source file may be used and distributed without //// |
//// restriction provided that this copyright statement is not //// |
//// removed from the file and that any derivative work contains //// |
//// the original copyright notice and the associated disclaimer. //// |
//// //// |
//// This source file is free software; you can redistribute it //// |
//// and/or modify it under the terms of the GNU Lesser General //// |
//// Public License as published by the Free Software Foundation; //// |
//// either version 2.1 of the License, or (at your option) any //// |
//// later version. //// |
//// //// |
//// This source is distributed in the hope that it will be //// |
//// useful, but WITHOUT ANY WARRANTY; without even the implied //// |
//// warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR //// |
//// PURPOSE. See the GNU Lesser General Public License for more //// |
//// details. //// |
//// //// |
//// You should have received a copy of the GNU Lesser General //// |
//// Public License along with this source; if not, download it //// |
//// from http://www.opencores.org/lgpl.shtml //// |
//// //// |
////////////////////////////////////////////////////////////////////// |
// |
// CVS Revision History |
// |
// $Log: not supported by cvs2svn $ |
// Revision 1.3 2004/08/30 17:01:50 jcastillo |
// Used indent command |
// |
// Revision 1.2 2004/08/25 15:32:23 jcastillo |
// Corrected to run under MSVC60 |
// |
// Revision 1.1.1.1 2004/08/19 14:27:14 jcastillo |
// First import |
// |
|
#include "systemc.h" |
#include "stimulus.h" |
#include "rng.h" |
|
#ifdef __GNUC__ |
#include "iostream.h" |
#endif |
|
|
int |
sc_main (int argc, char *argv[]) |
{ |
|
sc_clock clk ("clk", 1, SC_US); |
|
rng *rng1; |
stimulus *st1; |
|
rng1 = new rng ("rng"); |
st1 = new stimulus ("stimulus"); |
|
sc_signal < bool > reset; |
sc_signal < bool > loadseed_i; |
sc_signal < sc_uint < 32 > >seed_i; |
sc_signal < sc_uint < 32 > >number_o; |
|
rng1->clk (clk); |
rng1->reset (reset); |
rng1->loadseed_i (loadseed_i); |
rng1->seed_i (seed_i); |
rng1->number_o (number_o); |
|
st1->clk (clk); |
st1->reset (reset); |
st1->loadseed_o (loadseed_i); |
st1->seed_o (seed_i); |
st1->number_i (number_o); |
|
sc_start (-1); |
|
return 0; |
|
} |
/systemc_rng/trunk/rtl/systemc/stimulus.cpp
0,0 → 1,78
////////////////////////////////////////////////////////////////////// |
//// //// |
//// Random Number Generator Testbench //// |
//// //// |
//// This file is part of the SystemC RNG project //// |
//// //// |
//// Description: //// |
//// Testbench stimulus //// |
//// //// |
//// To Do: //// |
//// - nothing //// |
//// //// |
//// Author(s): //// |
//// - Javier Castillo, javier.castillo@urjc.es //// |
//// //// |
//// This core is provided by Universidad Rey Juan Carlos //// |
//// http://www.escet.urjc.es/~jmartine //// |
//// //// |
////////////////////////////////////////////////////////////////////// |
//// //// |
//// Copyright (C) 2000 Authors and OPENCORES.ORG //// |
//// //// |
//// This source file may be used and distributed without //// |
//// restriction provided that this copyright statement is not //// |
//// removed from the file and that any derivative work contains //// |
//// the original copyright notice and the associated disclaimer. //// |
//// //// |
//// This source file is free software; you can redistribute it //// |
//// and/or modify it under the terms of the GNU Lesser General //// |
//// Public License as published by the Free Software Foundation; //// |
//// either version 2.1 of the License, or (at your option) any //// |
//// later version. //// |
//// //// |
//// This source is distributed in the hope that it will be //// |
//// useful, but WITHOUT ANY WARRANTY; without even the implied //// |
//// warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR //// |
//// PURPOSE. See the GNU Lesser General Public License for more //// |
//// details. //// |
//// //// |
//// You should have received a copy of the GNU Lesser General //// |
//// Public License along with this source; if not, download it //// |
//// from http://www.opencores.org/lgpl.shtml //// |
//// //// |
////////////////////////////////////////////////////////////////////// |
// |
// CVS Revision History |
// |
// $Log: not supported by cvs2svn $ |
// Revision 1.2 2004/08/30 17:01:50 jcastillo |
// Used indent command |
// |
// Revision 1.1.1.1 2004/08/19 14:27:14 jcastillo |
// First import |
// |
|
#include "systemc.h" |
#include "stimulus.h" |
|
void |
stimulus::tb () |
{ |
|
wait (clk->posedge_event ()); |
reset.write (0); |
wait (clk->posedge_event ()); |
reset.write (1); |
wait (clk->posedge_event ()); |
loadseed_o.write (1); |
seed_o.write (0x12678); |
wait (clk->posedge_event ()); |
loadseed_o.write (0); |
for (;;) |
{ |
wait (clk->posedge_event ()); |
cout << (unsigned int) number_i.read () << endl; |
} |
|
} |
/systemc_rng/trunk/rtl/systemc/rng.cpp
0,0 → 1,218
////////////////////////////////////////////////////////////////////// |
//// //// |
//// Random Number Generator Top //// |
//// //// |
//// This file is part of the SystemC RNG project //// |
//// //// |
//// Description: //// |
//// Top file of random number generator //// |
//// //// |
//// To Do: //// |
//// - nothing //// |
//// //// |
//// Author(s): //// |
//// - Javier Castillo, javier.castillo@urjc.es //// |
//// //// |
//// This core is provided by Universidad Rey Juan Carlos //// |
//// http://www.escet.urjc.es/~jmartine //// |
//// //// |
////////////////////////////////////////////////////////////////////// |
//// //// |
//// Copyright (C) 2000 Authors and OPENCORES.ORG //// |
//// //// |
//// This source file may be used and distributed without //// |
//// restriction provided that this copyright statement is not //// |
//// removed from the file and that any derivative work contains //// |
//// the original copyright notice and the associated disclaimer. //// |
//// //// |
//// This source file is free software; you can redistribute it //// |
//// and/or modify it under the terms of the GNU Lesser General //// |
//// Public License as published by the Free Software Foundation; //// |
//// either version 2.1 of the License, or (at your option) any //// |
//// later version. //// |
//// //// |
//// This source is distributed in the hope that it will be //// |
//// useful, but WITHOUT ANY WARRANTY; without even the implied //// |
//// warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR //// |
//// PURPOSE. See the GNU Lesser General Public License for more //// |
//// details. //// |
//// //// |
//// You should have received a copy of the GNU Lesser General //// |
//// Public License along with this source; if not, download it //// |
//// from http://www.opencores.org/lgpl.shtml //// |
//// //// |
////////////////////////////////////////////////////////////////////// |
// |
// CVS Revision History |
// |
// $Log: not supported by cvs2svn $ |
// Revision 1.5 2005/07/30 20:07:26 jcastillo |
// Correct bit 28. Correct assignation to bit 31 |
// |
// Revision 1.4 2005/07/29 09:12:41 jcastillo |
// Correct bit 28 of CASR |
// |
// Revision 1.3 2004/09/23 09:45:30 jcastillo |
// Macro removed |
// |
// Revision 1.2 2004/08/30 17:01:50 jcastillo |
// Used indent command |
// |
// Revision 1.1.1.1 2004/08/19 14:27:14 jcastillo |
// First import |
// |
|
#include "rng.h" |
|
void |
rng::combinate () |
{ |
if (!reset.read ()) |
{ |
number_o.write (0); |
} |
else |
{ |
number_o.write (LFSR_reg.read ().range (31, 0) ^ CASR_reg.read ().range (31, 0)); |
} |
} |
|
void |
rng::LFSR () |
{ |
|
sc_uint < 43 > LFSR_var; |
bool outbit; |
|
if (!reset.read ()) |
{ |
LFSR_reg.write (1); |
} |
else |
{ |
if (loadseed_i.read ()) |
{ |
LFSR_var.range (42, 32) = 0; |
LFSR_var.range (31, 0) = seed_i.read (); |
LFSR_reg.write (LFSR_var); |
|
} |
else |
{ |
LFSR_var = LFSR_reg.read (); |
|
outbit = LFSR_var[42]; |
LFSR_var[42] = LFSR_var[41]; |
LFSR_var[41] = LFSR_var[40] ^ outbit; |
LFSR_var[40] = LFSR_var[39]; |
LFSR_var[39] = LFSR_var[38]; |
LFSR_var[38] = LFSR_var[37]; |
LFSR_var[37] = LFSR_var[36]; |
LFSR_var[36] = LFSR_var[35]; |
LFSR_var[35] = LFSR_var[34]; |
LFSR_var[34] = LFSR_var[33]; |
LFSR_var[33] = LFSR_var[32]; |
LFSR_var[32] = LFSR_var[31]; |
LFSR_var[31] = LFSR_var[30]; |
LFSR_var[30] = LFSR_var[29]; |
LFSR_var[29] = LFSR_var[28]; |
LFSR_var[28] = LFSR_var[27]; |
LFSR_var[27] = LFSR_var[26]; |
LFSR_var[26] = LFSR_var[25]; |
LFSR_var[25] = LFSR_var[24]; |
LFSR_var[24] = LFSR_var[23]; |
LFSR_var[23] = LFSR_var[22]; |
LFSR_var[22] = LFSR_var[21]; |
LFSR_var[21] = LFSR_var[20]; |
LFSR_var[20] = LFSR_var[19] ^ outbit; |
LFSR_var[19] = LFSR_var[18]; |
LFSR_var[18] = LFSR_var[17]; |
LFSR_var[17] = LFSR_var[16]; |
LFSR_var[16] = LFSR_var[15]; |
LFSR_var[15] = LFSR_var[14]; |
LFSR_var[14] = LFSR_var[13]; |
LFSR_var[13] = LFSR_var[12]; |
LFSR_var[12] = LFSR_var[11]; |
LFSR_var[11] = LFSR_var[10]; |
LFSR_var[10] = LFSR_var[9]; |
LFSR_var[9] = LFSR_var[8]; |
LFSR_var[8] = LFSR_var[7]; |
LFSR_var[7] = LFSR_var[6]; |
LFSR_var[6] = LFSR_var[5]; |
LFSR_var[5] = LFSR_var[4]; |
LFSR_var[4] = LFSR_var[3]; |
LFSR_var[3] = LFSR_var[2]; |
LFSR_var[2] = LFSR_var[1]; |
LFSR_var[1] = LFSR_var[0] ^ outbit; |
LFSR_var[0] = LFSR_var[42]; |
|
LFSR_reg.write (LFSR_var); |
} |
} |
} |
|
void |
rng::CASR () |
{ |
|
sc_uint < 37 > CASR_var, CASR_out; |
|
if (!reset.read ()) |
{ |
CASR_reg.write (1); |
} |
else |
{ |
if (loadseed_i.read ()) |
{ |
CASR_var.range (36, 32) = 0; |
CASR_var.range (31, 0) = seed_i.read (); |
CASR_reg.write (CASR_var); |
|
} |
else |
{ |
CASR_var = CASR_reg.read (); |
|
CASR_out[36] = CASR_var[35] ^ CASR_var[0]; |
CASR_out[35] = CASR_var[34] ^ CASR_var[36]; |
CASR_out[34] = CASR_var[33] ^ CASR_var[35]; |
CASR_out[33] = CASR_var[32] ^ CASR_var[34]; |
CASR_out[32] = CASR_var[31] ^ CASR_var[33]; |
CASR_out[31] = CASR_var[30] ^ CASR_var[32]; |
CASR_out[30] = CASR_var[29] ^ CASR_var[31]; |
CASR_out[29] = CASR_var[28] ^ CASR_var[30]; |
CASR_out[28] = CASR_var[27] ^ CASR_var[29]; |
CASR_out[27] = CASR_var[26] ^ CASR_var[27] ^ CASR_var[28]; |
CASR_out[26] = CASR_var[25] ^ CASR_var[27]; |
CASR_out[25] = CASR_var[24] ^ CASR_var[26]; |
CASR_out[24] = CASR_var[23] ^ CASR_var[25]; |
CASR_out[23] = CASR_var[22] ^ CASR_var[24]; |
CASR_out[22] = CASR_var[21] ^ CASR_var[23]; |
CASR_out[21] = CASR_var[20] ^ CASR_var[22]; |
CASR_out[20] = CASR_var[19] ^ CASR_var[21]; |
CASR_out[19] = CASR_var[18] ^ CASR_var[20]; |
CASR_out[18] = CASR_var[17] ^ CASR_var[19]; |
CASR_out[17] = CASR_var[16] ^ CASR_var[18]; |
CASR_out[16] = CASR_var[15] ^ CASR_var[17]; |
CASR_out[15] = CASR_var[14] ^ CASR_var[16]; |
CASR_out[14] = CASR_var[13] ^ CASR_var[15]; |
CASR_out[13] = CASR_var[12] ^ CASR_var[14]; |
CASR_out[12] = CASR_var[11] ^ CASR_var[13]; |
CASR_out[11] = CASR_var[10] ^ CASR_var[12]; |
CASR_out[10] = CASR_var[9] ^ CASR_var[11]; |
CASR_out[9] = CASR_var[8] ^ CASR_var[10]; |
CASR_out[8] = CASR_var[7] ^ CASR_var[9]; |
CASR_out[7] = CASR_var[6] ^ CASR_var[8]; |
CASR_out[6] = CASR_var[5] ^ CASR_var[7]; |
CASR_out[5] = CASR_var[4] ^ CASR_var[6]; |
CASR_out[4] = CASR_var[3] ^ CASR_var[5]; |
CASR_out[3] = CASR_var[2] ^ CASR_var[4]; |
CASR_out[2] = CASR_var[1] ^ CASR_var[3]; |
CASR_out[1] = CASR_var[0] ^ CASR_var[2]; |
CASR_out[0] = CASR_var[36] ^ CASR_var[1]; |
|
CASR_reg.write (CASR_out); |
} |
} |
} |
/systemc_rng/trunk/rtl/systemc/stimulus.h
0,0 → 1,80
////////////////////////////////////////////////////////////////////// |
//// //// |
//// Random Number Generator Testbench Header //// |
//// //// |
//// This file is part of the SystemC RNG project //// |
//// //// |
//// Description: //// |
//// Testbench header //// |
//// //// |
//// To Do: //// |
//// - nothing //// |
//// //// |
//// Author(s): //// |
//// - Javier Castillo, javier.castillo@urjc.es //// |
//// //// |
//// This core is provided by Universidad Rey Juan Carlos //// |
//// http://www.escet.urjc.es/~jmartine //// |
//// //// |
////////////////////////////////////////////////////////////////////// |
//// //// |
//// Copyright (C) 2000 Authors and OPENCORES.ORG //// |
//// //// |
//// This source file may be used and distributed without //// |
//// restriction provided that this copyright statement is not //// |
//// removed from the file and that any derivative work contains //// |
//// the original copyright notice and the associated disclaimer. //// |
//// //// |
//// This source file is free software; you can redistribute it //// |
//// and/or modify it under the terms of the GNU Lesser General //// |
//// Public License as published by the Free Software Foundation; //// |
//// either version 2.1 of the License, or (at your option) any //// |
//// later version. //// |
//// //// |
//// This source is distributed in the hope that it will be //// |
//// useful, but WITHOUT ANY WARRANTY; without even the implied //// |
//// warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR //// |
//// PURPOSE. See the GNU Lesser General Public License for more //// |
//// details. //// |
//// //// |
//// You should have received a copy of the GNU Lesser General //// |
//// Public License along with this source; if not, download it //// |
//// from http://www.opencores.org/lgpl.shtml //// |
//// //// |
////////////////////////////////////////////////////////////////////// |
// |
// CVS Revision History |
// |
// $Log: not supported by cvs2svn $ |
// Revision 1.2 2004/08/30 17:01:50 jcastillo |
// Used indent command |
// |
// Revision 1.1.1.1 2004/08/19 14:27:14 jcastillo |
// First import |
// |
|
#include "systemc.h" |
|
SC_MODULE (stimulus) |
{ |
|
sc_in < bool > clk; |
sc_out < bool > reset; |
|
sc_out < bool > loadseed_o; |
sc_out < sc_uint < 32 > >seed_o; |
sc_in < sc_uint < 32 > >number_i; |
|
void tb (); |
|
SC_CTOR (stimulus) |
{ |
|
cout.unsetf (ios::dec); |
cout.setf (ios::hex); |
cout.setf (ios::showbase); |
|
SC_THREAD (tb); |
|
} |
}; |
/systemc_rng/trunk/rtl/systemc/rng.h
0,0 → 1,91
////////////////////////////////////////////////////////////////////// |
//// //// |
//// Random Number Generator Top Header //// |
//// //// |
//// This file is part of the SystemC RNG project //// |
//// //// |
//// Description: //// |
//// Top file of random number generator //// |
//// //// |
//// To Do: //// |
//// - nothing //// |
//// //// |
//// Author(s): //// |
//// - Javier Castillo, javier.castillo@urjc.es //// |
//// //// |
//// This core is provided by Universidad Rey Juan Carlos //// |
//// http://www.escet.urjc.es/~jmartine //// |
//// //// |
////////////////////////////////////////////////////////////////////// |
//// //// |
//// Copyright (C) 2000 Authors and OPENCORES.ORG //// |
//// //// |
//// This source file may be used and distributed without //// |
//// restriction provided that this copyright statement is not //// |
//// removed from the file and that any derivative work contains //// |
//// the original copyright notice and the associated disclaimer. //// |
//// //// |
//// This source file is free software; you can redistribute it //// |
//// and/or modify it under the terms of the GNU Lesser General //// |
//// Public License as published by the Free Software Foundation; //// |
//// either version 2.1 of the License, or (at your option) any //// |
//// later version. //// |
//// //// |
//// This source is distributed in the hope that it will be //// |
//// useful, but WITHOUT ANY WARRANTY; without even the implied //// |
//// warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR //// |
//// PURPOSE. See the GNU Lesser General Public License for more //// |
//// details. //// |
//// //// |
//// You should have received a copy of the GNU Lesser General //// |
//// Public License along with this source; if not, download it //// |
//// from http://www.opencores.org/lgpl.shtml //// |
//// //// |
////////////////////////////////////////////////////////////////////// |
// |
// CVS Revision History |
// |
// $Log: not supported by cvs2svn $ |
// Revision 1.2 2004/08/30 17:01:50 jcastillo |
// Used indent command |
// |
// Revision 1.1.1.1 2004/08/19 14:27:14 jcastillo |
// First import |
// |
#include "systemc.h" |
|
SC_MODULE (rng) |
{ |
|
sc_in < bool > clk; |
sc_in < bool > reset; |
|
sc_in < bool > loadseed_i; |
sc_in < sc_uint < 32 > >seed_i; |
|
sc_out < sc_uint < 32 > >number_o; |
|
sc_signal < sc_uint < 43 > >LFSR_reg; |
sc_signal < sc_uint < 37 > >CASR_reg; |
|
void CASR (); |
void LFSR (); |
void combinate (); |
|
SC_CTOR (rng) |
{ |
|
SC_METHOD (CASR); |
sensitive_pos << clk; |
sensitive_neg << reset; |
|
SC_METHOD (LFSR); |
sensitive_pos << clk; |
sensitive_neg << reset; |
|
SC_METHOD (combinate); |
sensitive_pos << clk; |
sensitive_neg << reset; |
|
} |
}; |
/systemc_rng/trunk/rtl/systemc/Makefile
0,0 → 1,14
TARGET_ARCH = linux |
|
CC = g++ |
OPT = -O3 |
DEBUG = -g |
OTHER = -Wall -Wno-deprecated |
EXTRA_CFLAGS = $(OPT) $(OTHER) |
# EXTRA_CFLAGS = $(DEBUG) $(OTHER) |
|
MODULE = rng |
SRCS = rng.cpp stimulus.cpp main.cpp |
OBJS = $(SRCS:.cpp=.o) |
|
include Makefile.defs |
/systemc_rng/trunk/rtl/systemc/Makefile.defs
0,0 → 1,34
## Variable that points to SystemC installation path |
SYSTEMC = $(SYSTEMC_HOME) |
|
INCDIR = -I. -I.. -I../../bench -I$(SYSTEMC)/include |
LIBDIR = -L. -L.. -L$(SYSTEMC)/lib-$(TARGET_ARCH) |
|
# Build with maximum gcc warning level |
CFLAGS = $(PLATFORM_SPECIFIC_FLAGS) $(EXTRA_CFLAGS) |
|
LIBS = -lm -lsystemc $(EXTRA_LIBS) |
|
EXE = $(MODULE).x |
|
.SUFFIXES: .cpp .cc .o .x |
|
$(EXE): $(OBJS) $(SYSTEMC)/lib-$(TARGET_ARCH)/libsystemc.a |
$(CC) $(CFLAGS) $(INCDIR) $(LIBDIR) -o $@ $(OBJS) $(LIBS) $(SYSTEMC)/lib-$(TARGET_ARCH)/libsystemc.a 2>&1 | c++filt |
|
.cpp.o: |
$(CC) $(CFLAGS) $(INCDIR) -c $< $(USB_FLAGS) |
|
.cc.o: |
$(CC) $(CFLAGS) $(INCDIR) -c $< $(USB_FLAGS) |
|
clean:: |
rm -f $(OBJS) *~ $(EXE) |
|
ultraclean: clean |
rm -f Makefile.deps |
|
Makefile.deps: |
$(CC) $(CFLAGS) $(INCDIR) -M $(SRCS) >> Makefile.deps |
|
#include Makefile.deps |
/systemc_rng/trunk/rtl/verilog/rng.v
0,0 → 1,275
////////////////////////////////////////////////////////////////////// |
//// //// |
//// Random Number Generator //// |
//// //// |
//// This file is part of the SystemC RNG //// |
//// //// |
//// Description: //// |
//// //// |
//// Implementation of random number generator //// |
//// //// |
//// To Do: //// |
//// - done //// |
//// //// |
//// Author(s): //// |
//// - Javier Castillo, javier.castillo@urjc.es //// |
//// //// |
//// This core is provided by Universidad Rey Juan Carlos //// |
//// http://www.escet.urjc.es/~jmartine //// |
//// //// |
////////////////////////////////////////////////////////////////////// |
//// //// |
//// Copyright (C) 2000 Authors and OPENCORES.ORG //// |
//// //// |
//// This source file may be used and distributed without //// |
//// restriction provided that this copyright statement is not //// |
//// removed from the file and that any derivative work contains //// |
//// the original copyright notice and the associated disclaimer. //// |
//// //// |
//// This source file is free software; you can redistribute it //// |
//// and/or modify it under the terms of the GNU Lesser General //// |
//// Public License as published by the Free Software Foundation; //// |
//// either version 2.1 of the License, or (at your option) any //// |
//// later version. //// |
//// //// |
//// This source is distributed in the hope that it will be //// |
//// useful, but WITHOUT ANY WARRANTY; without even the implied //// |
//// warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR //// |
//// PURPOSE. See the GNU Lesser General Public License for more //// |
//// details. //// |
//// //// |
//// You should have received a copy of the GNU Lesser General //// |
//// Public License along with this source; if not, download it //// |
//// from http://www.opencores.org/lgpl.shtml //// |
//// //// |
////////////////////////////////////////////////////////////////////// |
// |
// CVS Revision History |
// |
// $Log: not supported by cvs2svn $ |
// Revision 1.3 2005/07/30 20:07:26 jcastillo |
// Correct bit 28. Correct assignation to bit 31 |
// |
// Revision 1.2 2005/07/29 09:13:06 jcastillo |
// Correct bit 28 of CASR |
// |
// Revision 1.1 2004/09/23 09:43:06 jcastillo |
// Verilog first import |
// |
|
`timescale 10ns/1ns |
|
module rng(clk,reset,loadseed_i,seed_i,number_o); |
input clk; |
input reset; |
input loadseed_i; |
input [31:0] seed_i; |
output [31:0] number_o; |
|
reg [31:0] number_o; |
|
reg [42:0] LFSR_reg; |
reg [36:0] CASR_reg; |
|
|
//CASR: |
reg[36:0] CASR_varCASR,CASR_outCASR; |
always @(posedge clk or negedge reset) |
|
begin |
|
|
|
|
if (!reset ) |
|
begin |
|
CASR_reg = (1); |
|
end |
|
else |
|
begin |
|
if (loadseed_i ) |
|
begin |
|
CASR_varCASR [36:32]=0; |
CASR_varCASR [31:0]=seed_i ; |
CASR_reg = (CASR_varCASR ); |
|
|
end |
|
else |
|
begin |
|
CASR_varCASR =CASR_reg ; |
|
CASR_outCASR [36]=CASR_varCASR [35]^CASR_varCASR [0]; |
CASR_outCASR [35]=CASR_varCASR [34]^CASR_varCASR [36]; |
CASR_outCASR [34]=CASR_varCASR [33]^CASR_varCASR [35]; |
CASR_outCASR [33]=CASR_varCASR [32]^CASR_varCASR [34]; |
CASR_outCASR [32]=CASR_varCASR [31]^CASR_varCASR [33]; |
CASR_outCASR [31]=CASR_varCASR [30]^CASR_varCASR [32]; |
CASR_outCASR [30]=CASR_varCASR [29]^CASR_varCASR [31]; |
CASR_outCASR [29]=CASR_varCASR [28]^CASR_varCASR [30]; |
CASR_outCASR [28]=CASR_varCASR [27]^CASR_varCASR [29]; |
CASR_outCASR [27]=CASR_varCASR [26]^CASR_varCASR [27]^CASR_varCASR [28]; |
CASR_outCASR [26]=CASR_varCASR [25]^CASR_varCASR [27]; |
CASR_outCASR [25]=CASR_varCASR [24]^CASR_varCASR [26]; |
CASR_outCASR [24]=CASR_varCASR [23]^CASR_varCASR [25]; |
CASR_outCASR [23]=CASR_varCASR [22]^CASR_varCASR [24]; |
CASR_outCASR [22]=CASR_varCASR [21]^CASR_varCASR [23]; |
CASR_outCASR [21]=CASR_varCASR [20]^CASR_varCASR [22]; |
CASR_outCASR [20]=CASR_varCASR [19]^CASR_varCASR [21]; |
CASR_outCASR [19]=CASR_varCASR [18]^CASR_varCASR [20]; |
CASR_outCASR [18]=CASR_varCASR [17]^CASR_varCASR [19]; |
CASR_outCASR [17]=CASR_varCASR [16]^CASR_varCASR [18]; |
CASR_outCASR [16]=CASR_varCASR [15]^CASR_varCASR [17]; |
CASR_outCASR [15]=CASR_varCASR [14]^CASR_varCASR [16]; |
CASR_outCASR [14]=CASR_varCASR [13]^CASR_varCASR [15]; |
CASR_outCASR [13]=CASR_varCASR [12]^CASR_varCASR [14]; |
CASR_outCASR [12]=CASR_varCASR [11]^CASR_varCASR [13]; |
CASR_outCASR [11]=CASR_varCASR [10]^CASR_varCASR [12]; |
CASR_outCASR [10]=CASR_varCASR [9]^CASR_varCASR [11]; |
CASR_outCASR [9]=CASR_varCASR [8]^CASR_varCASR [10]; |
CASR_outCASR [8]=CASR_varCASR [7]^CASR_varCASR [9]; |
CASR_outCASR [7]=CASR_varCASR [6]^CASR_varCASR [8]; |
CASR_outCASR [6]=CASR_varCASR [5]^CASR_varCASR [7]; |
CASR_outCASR [5]=CASR_varCASR [4]^CASR_varCASR [6]; |
CASR_outCASR [4]=CASR_varCASR [3]^CASR_varCASR [5]; |
CASR_outCASR [3]=CASR_varCASR [2]^CASR_varCASR [4]; |
CASR_outCASR [2]=CASR_varCASR [1]^CASR_varCASR [3]; |
CASR_outCASR [1]=CASR_varCASR [0]^CASR_varCASR [2]; |
CASR_outCASR [0]=CASR_varCASR [36]^CASR_varCASR [1]; |
|
CASR_reg = (CASR_outCASR ); |
|
end |
|
|
end |
|
|
end |
//LFSR: |
reg[42:0] LFSR_varLFSR; |
reg outbitLFSR; |
always @(posedge clk or negedge reset) |
|
begin |
|
|
if (!reset ) |
|
begin |
|
LFSR_reg = (1); |
|
end |
|
else |
|
begin |
|
if (loadseed_i ) |
|
begin |
|
LFSR_varLFSR [42:32]=0; |
LFSR_varLFSR [31:0]=seed_i ; |
LFSR_reg = (LFSR_varLFSR ); |
|
|
end |
|
else |
|
begin |
|
LFSR_varLFSR =LFSR_reg ; |
|
outbitLFSR =LFSR_varLFSR [42]; |
LFSR_varLFSR [42]=LFSR_varLFSR [41]; |
LFSR_varLFSR [41]=LFSR_varLFSR [40]^outbitLFSR ; |
LFSR_varLFSR [40]=LFSR_varLFSR [39]; |
LFSR_varLFSR [39]=LFSR_varLFSR [38]; |
LFSR_varLFSR [38]=LFSR_varLFSR [37]; |
LFSR_varLFSR [37]=LFSR_varLFSR [36]; |
LFSR_varLFSR [36]=LFSR_varLFSR [35]; |
LFSR_varLFSR [35]=LFSR_varLFSR [34]; |
LFSR_varLFSR [34]=LFSR_varLFSR [33]; |
LFSR_varLFSR [33]=LFSR_varLFSR [32]; |
LFSR_varLFSR [32]=LFSR_varLFSR [31]; |
LFSR_varLFSR [31]=LFSR_varLFSR [30]; |
LFSR_varLFSR [30]=LFSR_varLFSR [29]; |
LFSR_varLFSR [29]=LFSR_varLFSR [28]; |
LFSR_varLFSR [28]=LFSR_varLFSR [27]; |
LFSR_varLFSR [27]=LFSR_varLFSR [26]; |
LFSR_varLFSR [26]=LFSR_varLFSR [25]; |
LFSR_varLFSR [25]=LFSR_varLFSR [24]; |
LFSR_varLFSR [24]=LFSR_varLFSR [23]; |
LFSR_varLFSR [23]=LFSR_varLFSR [22]; |
LFSR_varLFSR [22]=LFSR_varLFSR [21]; |
LFSR_varLFSR [21]=LFSR_varLFSR [20]; |
LFSR_varLFSR [20]=LFSR_varLFSR [19]^outbitLFSR ; |
LFSR_varLFSR [19]=LFSR_varLFSR [18]; |
LFSR_varLFSR [18]=LFSR_varLFSR [17]; |
LFSR_varLFSR [17]=LFSR_varLFSR [16]; |
LFSR_varLFSR [16]=LFSR_varLFSR [15]; |
LFSR_varLFSR [15]=LFSR_varLFSR [14]; |
LFSR_varLFSR [14]=LFSR_varLFSR [13]; |
LFSR_varLFSR [13]=LFSR_varLFSR [12]; |
LFSR_varLFSR [12]=LFSR_varLFSR [11]; |
LFSR_varLFSR [11]=LFSR_varLFSR [10]; |
LFSR_varLFSR [10]=LFSR_varLFSR [9]; |
LFSR_varLFSR [9]=LFSR_varLFSR [8]; |
LFSR_varLFSR [8]=LFSR_varLFSR [7]; |
LFSR_varLFSR [7]=LFSR_varLFSR [6]; |
LFSR_varLFSR [6]=LFSR_varLFSR [5]; |
LFSR_varLFSR [5]=LFSR_varLFSR [4]; |
LFSR_varLFSR [4]=LFSR_varLFSR [3]; |
LFSR_varLFSR [3]=LFSR_varLFSR [2]; |
LFSR_varLFSR [2]=LFSR_varLFSR [1]; |
LFSR_varLFSR [1]=LFSR_varLFSR [0]^outbitLFSR ; |
LFSR_varLFSR [0]=LFSR_varLFSR [42]; |
|
LFSR_reg = (LFSR_varLFSR ); |
|
end |
|
|
end |
|
|
end |
//combinate: |
always @(posedge clk or negedge reset) |
|
begin |
|
if (!reset ) |
|
begin |
|
number_o = (0); |
|
end |
|
else |
|
begin |
|
number_o = (LFSR_reg [31:0]^CASR_reg[31:0]); |
|
end |
|
|
end |
|
endmodule |
systemc_rng/trunk
Property changes :
Added: svn:mergeinfo
## -0,0 +0,0 ##
Index: systemc_rng/web_uploads
===================================================================
--- systemc_rng/web_uploads (nonexistent)
+++ systemc_rng/web_uploads (revision 12)
systemc_rng/web_uploads
Property changes :
Added: svn:mergeinfo
## -0,0 +0,0 ##
Index: systemc_rng/branches
===================================================================
--- systemc_rng/branches (nonexistent)
+++ systemc_rng/branches (revision 12)
systemc_rng/branches
Property changes :
Added: svn:mergeinfo
## -0,0 +0,0 ##
Index: systemc_rng/tags/first_import/bench/systemc/main.cpp
===================================================================
--- systemc_rng/tags/first_import/bench/systemc/main.cpp (nonexistent)
+++ systemc_rng/tags/first_import/bench/systemc/main.cpp (revision 12)
@@ -0,0 +1,86 @@
+//////////////////////////////////////////////////////////////////////
+//// ////
+//// Random Number Main simulation File ////
+//// ////
+//// This file is part of the SystemC RNG project ////
+//// ////
+//// Description: ////
+//// Main simulation file of random number generator ////
+//// ////
+//// To Do: ////
+//// - nothing ////
+//// ////
+//// Author(s): ////
+//// - Javier Castillo, jcastilo@opencores.org ////
+//// ////
+//// This core is provided by OpenSoc ////
+//// http://www.opensocdesign.com ////
+//// ////
+//////////////////////////////////////////////////////////////////////
+//// ////
+//// Copyright (C) 2000 Authors and OPENCORES.ORG ////
+//// ////
+//// This source file may be used and distributed without ////
+//// restriction provided that this copyright statement is not ////
+//// removed from the file and that any derivative work contains ////
+//// the original copyright notice and the associated disclaimer. ////
+//// ////
+//// This source file is free software; you can redistribute it ////
+//// and/or modify it under the terms of the GNU Lesser General ////
+//// Public License as published by the Free Software Foundation; ////
+//// either version 2.1 of the License, or (at your option) any ////
+//// later version. ////
+//// ////
+//// This source is distributed in the hope that it will be ////
+//// useful, but WITHOUT ANY WARRANTY; without even the implied ////
+//// warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR ////
+//// PURPOSE. See the GNU Lesser General Public License for more ////
+//// details. ////
+//// ////
+//// You should have received a copy of the GNU Lesser General ////
+//// Public License along with this source; if not, download it ////
+//// from http://www.opencores.org/lgpl.shtml ////
+//// ////
+//////////////////////////////////////////////////////////////////////
+//
+// CVS Revision History
+//
+// $Log: not supported by cvs2svn $
+
+#include "systemc.h"
+#include "iostream.h"
+#include "stimulus.h"
+#include "rng.h"
+
+int sc_main(int argc, char* argv[]){
+
+ sc_clock clk("clk",1,SC_US);
+
+ rng *rng1;
+ stimulus *st1;
+
+ rng1=new rng("rng");
+ st1=new stimulus("stimulus");
+
+ sc_signal reset;
+ sc_signal loadseed_i;
+ sc_signal > seed_i;
+ sc_signal > number_o;
+
+ rng1->clk(clk);
+ rng1->reset(reset);
+ rng1->loadseed_i(loadseed_i);
+ rng1->seed_i(seed_i);
+ rng1->number_o(number_o);
+
+ st1->clk(clk);
+ st1->reset(reset);
+ st1->loadseed_o(loadseed_i);
+ st1->seed_o(seed_i);
+ st1->number_i(number_o);
+
+ sc_start(-1);
+
+ return 0;
+
+ }
Index: systemc_rng/tags/first_import/bench/systemc/stimulus.cpp
===================================================================
--- systemc_rng/tags/first_import/bench/systemc/stimulus.cpp (nonexistent)
+++ systemc_rng/tags/first_import/bench/systemc/stimulus.cpp (revision 12)
@@ -0,0 +1,69 @@
+//////////////////////////////////////////////////////////////////////
+//// ////
+//// Random Number Generator Testbench ////
+//// ////
+//// This file is part of the SystemC RNG project ////
+//// ////
+//// Description: ////
+//// Testbench stimulus ////
+//// ////
+//// To Do: ////
+//// - nothing ////
+//// ////
+//// Author(s): ////
+//// - Javier Castillo, jcastilo@opencores.org ////
+//// ////
+//// This core is provided by OpenSoc ////
+//// http://www.opensocdesign.com ////
+//// ////
+//////////////////////////////////////////////////////////////////////
+//// ////
+//// Copyright (C) 2000 Authors and OPENCORES.ORG ////
+//// ////
+//// This source file may be used and distributed without ////
+//// restriction provided that this copyright statement is not ////
+//// removed from the file and that any derivative work contains ////
+//// the original copyright notice and the associated disclaimer. ////
+//// ////
+//// This source file is free software; you can redistribute it ////
+//// and/or modify it under the terms of the GNU Lesser General ////
+//// Public License as published by the Free Software Foundation; ////
+//// either version 2.1 of the License, or (at your option) any ////
+//// later version. ////
+//// ////
+//// This source is distributed in the hope that it will be ////
+//// useful, but WITHOUT ANY WARRANTY; without even the implied ////
+//// warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR ////
+//// PURPOSE. See the GNU Lesser General Public License for more ////
+//// details. ////
+//// ////
+//// You should have received a copy of the GNU Lesser General ////
+//// Public License along with this source; if not, download it ////
+//// from http://www.opencores.org/lgpl.shtml ////
+//// ////
+//////////////////////////////////////////////////////////////////////
+//
+// CVS Revision History
+//
+// $Log: not supported by cvs2svn $
+
+#include "systemc.h"
+#include "stimulus.h"
+
+void stimulus::tb(){
+
+ wait(clk->posedge_event());
+ reset.write(0);
+ wait(clk->posedge_event());
+ reset.write(1);
+ wait(clk->posedge_event());
+ loadseed_o.write(1);
+ seed_o.write(0x12678);
+ wait(clk->posedge_event());
+ loadseed_o.write(0);
+ for(;;){
+ wait(clk->posedge_event());
+ cout << (unsigned int)number_i.read() << endl;
+ }
+
+ }
Index: systemc_rng/tags/first_import/bench/systemc/stimulus.h
===================================================================
--- systemc_rng/tags/first_import/bench/systemc/stimulus.h (nonexistent)
+++ systemc_rng/tags/first_import/bench/systemc/stimulus.h (revision 12)
@@ -0,0 +1,72 @@
+//////////////////////////////////////////////////////////////////////
+//// ////
+//// Random Number Generator Testbench Header ////
+//// ////
+//// This file is part of the SystemC RNG project ////
+//// ////
+//// Description: ////
+//// Testbench header ////
+//// ////
+//// To Do: ////
+//// - nothing ////
+//// ////
+//// Author(s): ////
+//// - Javier Castillo, jcastilo@opencores.org ////
+//// ////
+//// This core is provided by OpenSoc ////
+//// http://www.opensocdesign.com ////
+//// ////
+//////////////////////////////////////////////////////////////////////
+//// ////
+//// Copyright (C) 2000 Authors and OPENCORES.ORG ////
+//// ////
+//// This source file may be used and distributed without ////
+//// restriction provided that this copyright statement is not ////
+//// removed from the file and that any derivative work contains ////
+//// the original copyright notice and the associated disclaimer. ////
+//// ////
+//// This source file is free software; you can redistribute it ////
+//// and/or modify it under the terms of the GNU Lesser General ////
+//// Public License as published by the Free Software Foundation; ////
+//// either version 2.1 of the License, or (at your option) any ////
+//// later version. ////
+//// ////
+//// This source is distributed in the hope that it will be ////
+//// useful, but WITHOUT ANY WARRANTY; without even the implied ////
+//// warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR ////
+//// PURPOSE. See the GNU Lesser General Public License for more ////
+//// details. ////
+//// ////
+//// You should have received a copy of the GNU Lesser General ////
+//// Public License along with this source; if not, download it ////
+//// from http://www.opencores.org/lgpl.shtml ////
+//// ////
+//////////////////////////////////////////////////////////////////////
+//
+// CVS Revision History
+//
+// $Log: not supported by cvs2svn $
+
+#include "systemc.h"
+
+SC_MODULE(stimulus){
+
+ sc_in clk;
+ sc_out reset;
+
+ sc_out loadseed_o;
+ sc_out > seed_o;
+ sc_in > number_i;
+
+ void tb();
+
+ SC_CTOR(stimulus){
+
+ cout.unsetf(ios::dec);
+ cout.setf(ios::hex);
+ cout.setf(ios::showbase);
+
+ SC_THREAD(tb);
+
+ }
+};
Index: systemc_rng/tags/first_import/rtl/systemc/main.cpp
===================================================================
--- systemc_rng/tags/first_import/rtl/systemc/main.cpp (nonexistent)
+++ systemc_rng/tags/first_import/rtl/systemc/main.cpp (revision 12)
@@ -0,0 +1,86 @@
+//////////////////////////////////////////////////////////////////////
+//// ////
+//// Random Number Main simulation File ////
+//// ////
+//// This file is part of the SystemC RNG project ////
+//// ////
+//// Description: ////
+//// Main simulation file of random number generator ////
+//// ////
+//// To Do: ////
+//// - nothing ////
+//// ////
+//// Author(s): ////
+//// - Javier Castillo, jcastilo@opencores.org ////
+//// ////
+//// This core is provided by OpenSoc ////
+//// http://www.opensocdesign.com ////
+//// ////
+//////////////////////////////////////////////////////////////////////
+//// ////
+//// Copyright (C) 2000 Authors and OPENCORES.ORG ////
+//// ////
+//// This source file may be used and distributed without ////
+//// restriction provided that this copyright statement is not ////
+//// removed from the file and that any derivative work contains ////
+//// the original copyright notice and the associated disclaimer. ////
+//// ////
+//// This source file is free software; you can redistribute it ////
+//// and/or modify it under the terms of the GNU Lesser General ////
+//// Public License as published by the Free Software Foundation; ////
+//// either version 2.1 of the License, or (at your option) any ////
+//// later version. ////
+//// ////
+//// This source is distributed in the hope that it will be ////
+//// useful, but WITHOUT ANY WARRANTY; without even the implied ////
+//// warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR ////
+//// PURPOSE. See the GNU Lesser General Public License for more ////
+//// details. ////
+//// ////
+//// You should have received a copy of the GNU Lesser General ////
+//// Public License along with this source; if not, download it ////
+//// from http://www.opencores.org/lgpl.shtml ////
+//// ////
+//////////////////////////////////////////////////////////////////////
+//
+// CVS Revision History
+//
+// $Log: not supported by cvs2svn $
+
+#include "systemc.h"
+#include "iostream.h"
+#include "stimulus.h"
+#include "rng.h"
+
+int sc_main(int argc, char* argv[]){
+
+ sc_clock clk("clk",1,SC_US);
+
+ rng *rng1;
+ stimulus *st1;
+
+ rng1=new rng("rng");
+ st1=new stimulus("stimulus");
+
+ sc_signal reset;
+ sc_signal loadseed_i;
+ sc_signal > seed_i;
+ sc_signal > number_o;
+
+ rng1->clk(clk);
+ rng1->reset(reset);
+ rng1->loadseed_i(loadseed_i);
+ rng1->seed_i(seed_i);
+ rng1->number_o(number_o);
+
+ st1->clk(clk);
+ st1->reset(reset);
+ st1->loadseed_o(loadseed_i);
+ st1->seed_o(seed_i);
+ st1->number_i(number_o);
+
+ sc_start(-1);
+
+ return 0;
+
+ }
Index: systemc_rng/tags/first_import/rtl/systemc/stimulus.cpp
===================================================================
--- systemc_rng/tags/first_import/rtl/systemc/stimulus.cpp (nonexistent)
+++ systemc_rng/tags/first_import/rtl/systemc/stimulus.cpp (revision 12)
@@ -0,0 +1,69 @@
+//////////////////////////////////////////////////////////////////////
+//// ////
+//// Random Number Generator Testbench ////
+//// ////
+//// This file is part of the SystemC RNG project ////
+//// ////
+//// Description: ////
+//// Testbench stimulus ////
+//// ////
+//// To Do: ////
+//// - nothing ////
+//// ////
+//// Author(s): ////
+//// - Javier Castillo, jcastilo@opencores.org ////
+//// ////
+//// This core is provided by OpenSoc ////
+//// http://www.opensocdesign.com ////
+//// ////
+//////////////////////////////////////////////////////////////////////
+//// ////
+//// Copyright (C) 2000 Authors and OPENCORES.ORG ////
+//// ////
+//// This source file may be used and distributed without ////
+//// restriction provided that this copyright statement is not ////
+//// removed from the file and that any derivative work contains ////
+//// the original copyright notice and the associated disclaimer. ////
+//// ////
+//// This source file is free software; you can redistribute it ////
+//// and/or modify it under the terms of the GNU Lesser General ////
+//// Public License as published by the Free Software Foundation; ////
+//// either version 2.1 of the License, or (at your option) any ////
+//// later version. ////
+//// ////
+//// This source is distributed in the hope that it will be ////
+//// useful, but WITHOUT ANY WARRANTY; without even the implied ////
+//// warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR ////
+//// PURPOSE. See the GNU Lesser General Public License for more ////
+//// details. ////
+//// ////
+//// You should have received a copy of the GNU Lesser General ////
+//// Public License along with this source; if not, download it ////
+//// from http://www.opencores.org/lgpl.shtml ////
+//// ////
+//////////////////////////////////////////////////////////////////////
+//
+// CVS Revision History
+//
+// $Log: not supported by cvs2svn $
+
+#include "systemc.h"
+#include "stimulus.h"
+
+void stimulus::tb(){
+
+ wait(clk->posedge_event());
+ reset.write(0);
+ wait(clk->posedge_event());
+ reset.write(1);
+ wait(clk->posedge_event());
+ loadseed_o.write(1);
+ seed_o.write(0x12678);
+ wait(clk->posedge_event());
+ loadseed_o.write(0);
+ for(;;){
+ wait(clk->posedge_event());
+ cout << (unsigned int)number_i.read() << endl;
+ }
+
+ }
Index: systemc_rng/tags/first_import/rtl/systemc/rng.cpp
===================================================================
--- systemc_rng/tags/first_import/rtl/systemc/rng.cpp (nonexistent)
+++ systemc_rng/tags/first_import/rtl/systemc/rng.cpp (revision 12)
@@ -0,0 +1,182 @@
+//////////////////////////////////////////////////////////////////////
+//// ////
+//// Random Number Generator Top ////
+//// ////
+//// This file is part of the SystemC RNG project ////
+//// ////
+//// Description: ////
+//// Top file of random number generator ////
+//// ////
+//// To Do: ////
+//// - nothing ////
+//// ////
+//// Author(s): ////
+//// - Javier Castillo, jcastilo@opencores.org ////
+//// ////
+//// This core is provided by OpenSoc ////
+//// http://www.opensocdesign.com ////
+//// ////
+//////////////////////////////////////////////////////////////////////
+//// ////
+//// Copyright (C) 2000 Authors and OPENCORES.ORG ////
+//// ////
+//// This source file may be used and distributed without ////
+//// restriction provided that this copyright statement is not ////
+//// removed from the file and that any derivative work contains ////
+//// the original copyright notice and the associated disclaimer. ////
+//// ////
+//// This source file is free software; you can redistribute it ////
+//// and/or modify it under the terms of the GNU Lesser General ////
+//// Public License as published by the Free Software Foundation; ////
+//// either version 2.1 of the License, or (at your option) any ////
+//// later version. ////
+//// ////
+//// This source is distributed in the hope that it will be ////
+//// useful, but WITHOUT ANY WARRANTY; without even the implied ////
+//// warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR ////
+//// PURPOSE. See the GNU Lesser General Public License for more ////
+//// details. ////
+//// ////
+//// You should have received a copy of the GNU Lesser General ////
+//// Public License along with this source; if not, download it ////
+//// from http://www.opencores.org/lgpl.shtml ////
+//// ////
+//////////////////////////////////////////////////////////////////////
+//
+// CVS Revision History
+//
+// $Log: not supported by cvs2svn $
+
+#include "rng.h"
+
+void rng::combinate(){
+ if(!reset.read()){
+ number_o.write(0);
+ }else{
+ number_o.write(LFSR_reg.read().range(31,0)^CASR_reg.read().range(31,0));
+ }
+}
+
+void rng::LFSR(){
+
+ sc_uint<43> LFSR_var;
+ bool outbit;
+
+ if(!reset.read()){
+ LFSR_reg.write(1);
+ }else{
+ if(loadseed_i.read()){
+ LFSR_var.range(42,31)=0;
+ LFSR_var.range(31,0)=seed_i.read();
+ LFSR_reg.write(LFSR_var);
+
+ }else{
+ LFSR_var=LFSR_reg.read();
+
+ outbit=LFSR_var[42];
+ LFSR_var[42]=LFSR_var[41];
+ LFSR_var[41]=LFSR_var[40]^outbit;
+ LFSR_var[40]=LFSR_var[39];
+ LFSR_var[39]=LFSR_var[38];
+ LFSR_var[38]=LFSR_var[37];
+ LFSR_var[37]=LFSR_var[36];
+ LFSR_var[36]=LFSR_var[35];
+ LFSR_var[35]=LFSR_var[34];
+ LFSR_var[34]=LFSR_var[33];
+ LFSR_var[33]=LFSR_var[32];
+ LFSR_var[32]=LFSR_var[31];
+ LFSR_var[31]=LFSR_var[30];
+ LFSR_var[30]=LFSR_var[29];
+ LFSR_var[29]=LFSR_var[28];
+ LFSR_var[28]=LFSR_var[27];
+ LFSR_var[27]=LFSR_var[26];
+ LFSR_var[26]=LFSR_var[25];
+ LFSR_var[25]=LFSR_var[24];
+ LFSR_var[24]=LFSR_var[23];
+ LFSR_var[23]=LFSR_var[22];
+ LFSR_var[22]=LFSR_var[21];
+ LFSR_var[21]=LFSR_var[20];
+ LFSR_var[20]=LFSR_var[19]^outbit;
+ LFSR_var[19]=LFSR_var[18];
+ LFSR_var[18]=LFSR_var[17];
+ LFSR_var[17]=LFSR_var[16];
+ LFSR_var[16]=LFSR_var[15];
+ LFSR_var[15]=LFSR_var[14];
+ LFSR_var[14]=LFSR_var[13];
+ LFSR_var[13]=LFSR_var[12];
+ LFSR_var[12]=LFSR_var[11];
+ LFSR_var[11]=LFSR_var[10];
+ LFSR_var[10]=LFSR_var[9];
+ LFSR_var[9]=LFSR_var[8];
+ LFSR_var[8]=LFSR_var[7];
+ LFSR_var[7]=LFSR_var[6];
+ LFSR_var[6]=LFSR_var[5];
+ LFSR_var[5]=LFSR_var[4];
+ LFSR_var[4]=LFSR_var[3];
+ LFSR_var[3]=LFSR_var[2];
+ LFSR_var[2]=LFSR_var[1];
+ LFSR_var[1]=LFSR_var[0]^outbit;
+ LFSR_var[0]=LFSR_var[42];
+
+ LFSR_reg.write(LFSR_var);
+ }
+ }
+}
+
+void rng::CASR(){
+
+ sc_uint<43> CASR_var,CASR_out;
+
+ if(!reset.read()){
+ CASR_reg.write(1);
+ }else{
+ if(loadseed_i.read()){
+ CASR_var.range(36,31)=0;
+ CASR_var.range(31,0)=seed_i.read();
+ CASR_reg.write(CASR_var);
+
+ }else{
+ CASR_var=CASR_reg.read();
+
+ CASR_out[36]=CASR_var[35]^CASR_var[0] ;
+ CASR_out[35]=CASR_var[34]^CASR_var[36] ;
+ CASR_out[34]=CASR_var[33]^CASR_var[35] ;
+ CASR_out[33]=CASR_var[32]^CASR_var[34] ;
+ CASR_out[32]=CASR_var[31]^CASR_var[33] ;
+ CASR_out[31]=CASR_var[30]^CASR_var[32] ;
+ CASR_out[30]=CASR_var[29]^CASR_var[31] ;
+ CASR_out[29]=CASR_var[28]^CASR_var[30] ;
+ CASR_out[28]=CASR_var[27]^CASR_var[29] ;
+ CASR_out[27]=CASR_var[26]^CASR_var[28] ;
+ CASR_out[26]=CASR_var[25]^CASR_var[27] ;
+ CASR_out[25]=CASR_var[24]^CASR_var[26] ;
+ CASR_out[24]=CASR_var[23]^CASR_var[25] ;
+ CASR_out[23]=CASR_var[22]^CASR_var[24] ;
+ CASR_out[22]=CASR_var[21]^CASR_var[23] ;
+ CASR_out[21]=CASR_var[20]^CASR_var[22] ;
+ CASR_out[20]=CASR_var[19]^CASR_var[21] ;
+ CASR_out[19]=CASR_var[18]^CASR_var[20] ;
+ CASR_out[18]=CASR_var[17]^CASR_var[19] ;
+ CASR_out[17]=CASR_var[16]^CASR_var[18] ;
+ CASR_out[16]=CASR_var[15]^CASR_var[17] ;
+ CASR_out[15]=CASR_var[14]^CASR_var[16] ;
+ CASR_out[14]=CASR_var[13]^CASR_var[15] ;
+ CASR_out[13]=CASR_var[12]^CASR_var[14] ;
+ CASR_out[12]=CASR_var[11]^CASR_var[13] ;
+ CASR_out[11]=CASR_var[10]^CASR_var[12] ;
+ CASR_out[10]=CASR_var[9]^CASR_var[11] ;
+ CASR_out[9]=CASR_var[8]^CASR_var[10] ;
+ CASR_out[8]=CASR_var[7]^CASR_var[9] ;
+ CASR_out[7]=CASR_var[6]^CASR_var[8] ;
+ CASR_out[6]=CASR_var[5]^CASR_var[7] ;
+ CASR_out[5]=CASR_var[4]^CASR_var[6] ;
+ CASR_out[4]=CASR_var[3]^CASR_var[5] ;
+ CASR_out[3]=CASR_var[2]^CASR_var[4] ;
+ CASR_out[2]=CASR_var[1]^CASR_var[3] ;
+ CASR_out[1]=CASR_var[0]^CASR_var[2] ;
+ CASR_out[0]=CASR_var[36]^CASR_var[1] ;
+
+ CASR_reg.write(CASR_out);
+ }
+ }
+}
Index: systemc_rng/tags/first_import/rtl/systemc/stimulus.h
===================================================================
--- systemc_rng/tags/first_import/rtl/systemc/stimulus.h (nonexistent)
+++ systemc_rng/tags/first_import/rtl/systemc/stimulus.h (revision 12)
@@ -0,0 +1,72 @@
+//////////////////////////////////////////////////////////////////////
+//// ////
+//// Random Number Generator Testbench Header ////
+//// ////
+//// This file is part of the SystemC RNG project ////
+//// ////
+//// Description: ////
+//// Testbench header ////
+//// ////
+//// To Do: ////
+//// - nothing ////
+//// ////
+//// Author(s): ////
+//// - Javier Castillo, jcastilo@opencores.org ////
+//// ////
+//// This core is provided by OpenSoc ////
+//// http://www.opensocdesign.com ////
+//// ////
+//////////////////////////////////////////////////////////////////////
+//// ////
+//// Copyright (C) 2000 Authors and OPENCORES.ORG ////
+//// ////
+//// This source file may be used and distributed without ////
+//// restriction provided that this copyright statement is not ////
+//// removed from the file and that any derivative work contains ////
+//// the original copyright notice and the associated disclaimer. ////
+//// ////
+//// This source file is free software; you can redistribute it ////
+//// and/or modify it under the terms of the GNU Lesser General ////
+//// Public License as published by the Free Software Foundation; ////
+//// either version 2.1 of the License, or (at your option) any ////
+//// later version. ////
+//// ////
+//// This source is distributed in the hope that it will be ////
+//// useful, but WITHOUT ANY WARRANTY; without even the implied ////
+//// warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR ////
+//// PURPOSE. See the GNU Lesser General Public License for more ////
+//// details. ////
+//// ////
+//// You should have received a copy of the GNU Lesser General ////
+//// Public License along with this source; if not, download it ////
+//// from http://www.opencores.org/lgpl.shtml ////
+//// ////
+//////////////////////////////////////////////////////////////////////
+//
+// CVS Revision History
+//
+// $Log: not supported by cvs2svn $
+
+#include "systemc.h"
+
+SC_MODULE(stimulus){
+
+ sc_in clk;
+ sc_out reset;
+
+ sc_out loadseed_o;
+ sc_out > seed_o;
+ sc_in > number_i;
+
+ void tb();
+
+ SC_CTOR(stimulus){
+
+ cout.unsetf(ios::dec);
+ cout.setf(ios::hex);
+ cout.setf(ios::showbase);
+
+ SC_THREAD(tb);
+
+ }
+};
Index: systemc_rng/tags/first_import/rtl/systemc/rng.h
===================================================================
--- systemc_rng/tags/first_import/rtl/systemc/rng.h (nonexistent)
+++ systemc_rng/tags/first_import/rtl/systemc/rng.h (revision 12)
@@ -0,0 +1,83 @@
+//////////////////////////////////////////////////////////////////////
+//// ////
+//// Random Number Generator Top Header ////
+//// ////
+//// This file is part of the SystemC RNG project ////
+//// ////
+//// Description: ////
+//// Top file of random number generator ////
+//// ////
+//// To Do: ////
+//// - nothing ////
+//// ////
+//// Author(s): ////
+//// - Javier Castillo, jcastilo@opencores.org ////
+//// ////
+//// This core is provided by OpenSoc ////
+//// http://www.opensocdesign.com ////
+//// ////
+//////////////////////////////////////////////////////////////////////
+//// ////
+//// Copyright (C) 2000 Authors and OPENCORES.ORG ////
+//// ////
+//// This source file may be used and distributed without ////
+//// restriction provided that this copyright statement is not ////
+//// removed from the file and that any derivative work contains ////
+//// the original copyright notice and the associated disclaimer. ////
+//// ////
+//// This source file is free software; you can redistribute it ////
+//// and/or modify it under the terms of the GNU Lesser General ////
+//// Public License as published by the Free Software Foundation; ////
+//// either version 2.1 of the License, or (at your option) any ////
+//// later version. ////
+//// ////
+//// This source is distributed in the hope that it will be ////
+//// useful, but WITHOUT ANY WARRANTY; without even the implied ////
+//// warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR ////
+//// PURPOSE. See the GNU Lesser General Public License for more ////
+//// details. ////
+//// ////
+//// You should have received a copy of the GNU Lesser General ////
+//// Public License along with this source; if not, download it ////
+//// from http://www.opencores.org/lgpl.shtml ////
+//// ////
+//////////////////////////////////////////////////////////////////////
+//
+// CVS Revision History
+//
+// $Log: not supported by cvs2svn $
+#include "systemc.h"
+
+SC_MODULE(rng){
+
+ sc_in clk;
+ sc_in reset;
+
+ sc_in loadseed_i;
+ sc_in > seed_i;
+
+ sc_out > number_o;
+
+ sc_signal > LFSR_reg;
+ sc_signal > CASR_reg;
+
+ void CASR();
+ void LFSR();
+ void combinate();
+
+ SC_CTOR(rng){
+
+ SC_METHOD(CASR);
+ sensitive_pos << clk;
+ sensitive_neg << reset;
+
+ SC_METHOD(LFSR);
+ sensitive_pos << clk;
+ sensitive_neg << reset;
+
+ SC_METHOD(combinate);
+ sensitive_pos << clk;
+ sensitive_neg << reset;
+
+ }
+ };
Index: systemc_rng/tags/first_import/rtl/systemc/Makefile
===================================================================
--- systemc_rng/tags/first_import/rtl/systemc/Makefile (nonexistent)
+++ systemc_rng/tags/first_import/rtl/systemc/Makefile (revision 12)
@@ -0,0 +1,14 @@
+TARGET_ARCH = linux
+
+CC = g++
+OPT = -O3
+DEBUG = -g
+OTHER = -Wall -Wno-deprecated
+EXTRA_CFLAGS = $(OPT) $(OTHER)
+# EXTRA_CFLAGS = $(DEBUG) $(OTHER)
+
+MODULE = rng
+SRCS = rng.cpp stimulus.cpp main.cpp
+OBJS = $(SRCS:.cpp=.o)
+
+include Makefile.defs
Index: systemc_rng/tags/first_import/rtl/systemc/Makefile.defs
===================================================================
--- systemc_rng/tags/first_import/rtl/systemc/Makefile.defs (nonexistent)
+++ systemc_rng/tags/first_import/rtl/systemc/Makefile.defs (revision 12)
@@ -0,0 +1,34 @@
+## Variable that points to SystemC installation path
+SYSTEMC = $(SYSTEMC_HOME)
+
+INCDIR = -I. -I.. -I../../bench -I$(SYSTEMC)/include
+LIBDIR = -L. -L.. -L$(SYSTEMC)/lib-$(TARGET_ARCH)
+
+# Build with maximum gcc warning level
+CFLAGS = $(PLATFORM_SPECIFIC_FLAGS) $(EXTRA_CFLAGS)
+
+LIBS = -lm -lsystemc $(EXTRA_LIBS)
+
+EXE = $(MODULE).x
+
+.SUFFIXES: .cpp .cc .o .x
+
+$(EXE): $(OBJS) $(SYSTEMC)/lib-$(TARGET_ARCH)/libsystemc.a
+ $(CC) $(CFLAGS) $(INCDIR) $(LIBDIR) -o $@ $(OBJS) $(LIBS) $(SYSTEMC)/lib-$(TARGET_ARCH)/libsystemc.a 2>&1 | c++filt
+
+.cpp.o:
+ $(CC) $(CFLAGS) $(INCDIR) -c $< $(USB_FLAGS)
+
+.cc.o:
+ $(CC) $(CFLAGS) $(INCDIR) -c $< $(USB_FLAGS)
+
+clean::
+ rm -f $(OBJS) *~ $(EXE)
+
+ultraclean: clean
+ rm -f Makefile.deps
+
+Makefile.deps:
+ $(CC) $(CFLAGS) $(INCDIR) -M $(SRCS) >> Makefile.deps
+
+#include Makefile.deps
Index: systemc_rng/tags/first_import/main.cpp
===================================================================
--- systemc_rng/tags/first_import/main.cpp (nonexistent)
+++ systemc_rng/tags/first_import/main.cpp (revision 12)
@@ -0,0 +1,86 @@
+//////////////////////////////////////////////////////////////////////
+//// ////
+//// Random Number Main simulation File ////
+//// ////
+//// This file is part of the SystemC RNG project ////
+//// ////
+//// Description: ////
+//// Main simulation file of random number generator ////
+//// ////
+//// To Do: ////
+//// - nothing ////
+//// ////
+//// Author(s): ////
+//// - Javier Castillo, jcastilo@opencores.org ////
+//// ////
+//// This core is provided by OpenSoc ////
+//// http://www.opensocdesign.com ////
+//// ////
+//////////////////////////////////////////////////////////////////////
+//// ////
+//// Copyright (C) 2000 Authors and OPENCORES.ORG ////
+//// ////
+//// This source file may be used and distributed without ////
+//// restriction provided that this copyright statement is not ////
+//// removed from the file and that any derivative work contains ////
+//// the original copyright notice and the associated disclaimer. ////
+//// ////
+//// This source file is free software; you can redistribute it ////
+//// and/or modify it under the terms of the GNU Lesser General ////
+//// Public License as published by the Free Software Foundation; ////
+//// either version 2.1 of the License, or (at your option) any ////
+//// later version. ////
+//// ////
+//// This source is distributed in the hope that it will be ////
+//// useful, but WITHOUT ANY WARRANTY; without even the implied ////
+//// warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR ////
+//// PURPOSE. See the GNU Lesser General Public License for more ////
+//// details. ////
+//// ////
+//// You should have received a copy of the GNU Lesser General ////
+//// Public License along with this source; if not, download it ////
+//// from http://www.opencores.org/lgpl.shtml ////
+//// ////
+//////////////////////////////////////////////////////////////////////
+//
+// CVS Revision History
+//
+// $Log: not supported by cvs2svn $
+
+#include "systemc.h"
+#include "iostream.h"
+#include "stimulus.h"
+#include "rng.h"
+
+int sc_main(int argc, char* argv[]){
+
+ sc_clock clk("clk",1,SC_US);
+
+ rng *rng1;
+ stimulus *st1;
+
+ rng1=new rng("rng");
+ st1=new stimulus("stimulus");
+
+ sc_signal reset;
+ sc_signal loadseed_i;
+ sc_signal > seed_i;
+ sc_signal > number_o;
+
+ rng1->clk(clk);
+ rng1->reset(reset);
+ rng1->loadseed_i(loadseed_i);
+ rng1->seed_i(seed_i);
+ rng1->number_o(number_o);
+
+ st1->clk(clk);
+ st1->reset(reset);
+ st1->loadseed_o(loadseed_i);
+ st1->seed_o(seed_i);
+ st1->number_i(number_o);
+
+ sc_start(-1);
+
+ return 0;
+
+ }
Index: systemc_rng/tags/first_import/stimulus.cpp
===================================================================
--- systemc_rng/tags/first_import/stimulus.cpp (nonexistent)
+++ systemc_rng/tags/first_import/stimulus.cpp (revision 12)
@@ -0,0 +1,69 @@
+//////////////////////////////////////////////////////////////////////
+//// ////
+//// Random Number Generator Testbench ////
+//// ////
+//// This file is part of the SystemC RNG project ////
+//// ////
+//// Description: ////
+//// Testbench stimulus ////
+//// ////
+//// To Do: ////
+//// - nothing ////
+//// ////
+//// Author(s): ////
+//// - Javier Castillo, jcastilo@opencores.org ////
+//// ////
+//// This core is provided by OpenSoc ////
+//// http://www.opensocdesign.com ////
+//// ////
+//////////////////////////////////////////////////////////////////////
+//// ////
+//// Copyright (C) 2000 Authors and OPENCORES.ORG ////
+//// ////
+//// This source file may be used and distributed without ////
+//// restriction provided that this copyright statement is not ////
+//// removed from the file and that any derivative work contains ////
+//// the original copyright notice and the associated disclaimer. ////
+//// ////
+//// This source file is free software; you can redistribute it ////
+//// and/or modify it under the terms of the GNU Lesser General ////
+//// Public License as published by the Free Software Foundation; ////
+//// either version 2.1 of the License, or (at your option) any ////
+//// later version. ////
+//// ////
+//// This source is distributed in the hope that it will be ////
+//// useful, but WITHOUT ANY WARRANTY; without even the implied ////
+//// warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR ////
+//// PURPOSE. See the GNU Lesser General Public License for more ////
+//// details. ////
+//// ////
+//// You should have received a copy of the GNU Lesser General ////
+//// Public License along with this source; if not, download it ////
+//// from http://www.opencores.org/lgpl.shtml ////
+//// ////
+//////////////////////////////////////////////////////////////////////
+//
+// CVS Revision History
+//
+// $Log: not supported by cvs2svn $
+
+#include "systemc.h"
+#include "stimulus.h"
+
+void stimulus::tb(){
+
+ wait(clk->posedge_event());
+ reset.write(0);
+ wait(clk->posedge_event());
+ reset.write(1);
+ wait(clk->posedge_event());
+ loadseed_o.write(1);
+ seed_o.write(0x12678);
+ wait(clk->posedge_event());
+ loadseed_o.write(0);
+ for(;;){
+ wait(clk->posedge_event());
+ cout << (unsigned int)number_i.read() << endl;
+ }
+
+ }
Index: systemc_rng/tags/first_import/stimulus.h
===================================================================
--- systemc_rng/tags/first_import/stimulus.h (nonexistent)
+++ systemc_rng/tags/first_import/stimulus.h (revision 12)
@@ -0,0 +1,72 @@
+//////////////////////////////////////////////////////////////////////
+//// ////
+//// Random Number Generator Testbench Header ////
+//// ////
+//// This file is part of the SystemC RNG project ////
+//// ////
+//// Description: ////
+//// Testbench header ////
+//// ////
+//// To Do: ////
+//// - nothing ////
+//// ////
+//// Author(s): ////
+//// - Javier Castillo, jcastilo@opencores.org ////
+//// ////
+//// This core is provided by OpenSoc ////
+//// http://www.opensocdesign.com ////
+//// ////
+//////////////////////////////////////////////////////////////////////
+//// ////
+//// Copyright (C) 2000 Authors and OPENCORES.ORG ////
+//// ////
+//// This source file may be used and distributed without ////
+//// restriction provided that this copyright statement is not ////
+//// removed from the file and that any derivative work contains ////
+//// the original copyright notice and the associated disclaimer. ////
+//// ////
+//// This source file is free software; you can redistribute it ////
+//// and/or modify it under the terms of the GNU Lesser General ////
+//// Public License as published by the Free Software Foundation; ////
+//// either version 2.1 of the License, or (at your option) any ////
+//// later version. ////
+//// ////
+//// This source is distributed in the hope that it will be ////
+//// useful, but WITHOUT ANY WARRANTY; without even the implied ////
+//// warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR ////
+//// PURPOSE. See the GNU Lesser General Public License for more ////
+//// details. ////
+//// ////
+//// You should have received a copy of the GNU Lesser General ////
+//// Public License along with this source; if not, download it ////
+//// from http://www.opencores.org/lgpl.shtml ////
+//// ////
+//////////////////////////////////////////////////////////////////////
+//
+// CVS Revision History
+//
+// $Log: not supported by cvs2svn $
+
+#include "systemc.h"
+
+SC_MODULE(stimulus){
+
+ sc_in clk;
+ sc_out reset;
+
+ sc_out loadseed_o;
+ sc_out > seed_o;
+ sc_in > number_i;
+
+ void tb();
+
+ SC_CTOR(stimulus){
+
+ cout.unsetf(ios::dec);
+ cout.setf(ios::hex);
+ cout.setf(ios::showbase);
+
+ SC_THREAD(tb);
+
+ }
+};
Index: systemc_rng/tags
===================================================================
--- systemc_rng/tags (nonexistent)
+++ systemc_rng/tags (revision 12)
systemc_rng/tags
Property changes :
Added: svn:mergeinfo
## -0,0 +0,0 ##