URL
https://opencores.org/ocsvn/pci/pci/trunk
Subversion Repositories pci
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- This comparison shows the changes necessary to convert path
/
- from Rev 112 to Rev 113
- ↔ Reverse comparison
Rev 112 → Rev 113
/trunk/rtl/verilog/pci_wb_slave.v
42,6 → 42,10
// CVS Revision History |
// |
// $Log: not supported by cvs2svn $ |
// Revision 1.2 2003/08/03 18:05:06 mihad |
// Added limited WISHBONE B3 support for WISHBONE Slave Unit. |
// Doesn't support full speed bursts yet. |
// |
// Revision 1.1 2003/01/27 16:49:31 mihad |
// Changed module and file names. Updated scripts accordingly. FIFO synchronizations changed. |
// |
448,8 → 452,18
reg current_delayed_is_ccyc ; |
reg current_delayed_is_iack ; |
|
wire wccyc_hit = (wb_addr_in[8:2] == {1'b1, `CNF_DATA_ADDR}) `ifdef PCI_WBS_ALLOW_NON_ALLIGNED_CONFIG_ACCESS `else && alligned_address `endif ; |
wire wiack_hit = (wb_addr_in[8:2] == {1'b1, `INT_ACK_ADDR}) `ifdef PCI_WBS_ALLOW_NON_ALLIGNED_CONFIG_ACCESS `else && alligned_address `endif ; |
wire wccyc_hit = (wb_addr_in[8:2] == {1'b1, `CNF_DATA_ADDR}) |
`ifdef PCI_WBS_ALLOW_NON_ALLIGNED_CONFIG_ACCESS |
`else |
&& alligned_address |
`endif |
; |
wire wiack_hit = (wb_addr_in[8:2] == {1'b1, `INT_ACK_ADDR}) |
`ifdef PCI_WBS_ALLOW_NON_ALLIGNED_CONFIG_ACCESS |
`else |
&& alligned_address |
`endif |
; |
reg iack_hit ; |
reg ccyc_hit ; |
always@(posedge reset_in or posedge wb_clock_in) |
868,14 → 882,34
S_CONF_WRITE: begin |
`ifdef HOST |
wbw_data_out_sel = SEL_CCYC_ADDR ; |
del_req = do_ccyc_req && ~burst_transfer `ifdef PCI_WBS_ALLOW_NON_ALLIGNED_CONFIG_ACCESS `else && alligned_address `endif ; |
del_done = do_ccyc_comp && ~burst_transfer `ifdef PCI_WBS_ALLOW_NON_ALLIGNED_CONFIG_ACCESS `else && alligned_address `endif ; |
del_in_progress = do_ccyc_comp && ~burst_transfer `ifdef PCI_WBS_ALLOW_NON_ALLIGNED_CONFIG_ACCESS `else && alligned_address `endif ; |
del_req = do_ccyc_req && ~burst_transfer |
`ifdef PCI_WBS_ALLOW_NON_ALLIGNED_CONFIG_ACCESS |
`else |
&& alligned_address |
`endif |
; |
del_done = do_ccyc_comp && ~burst_transfer |
`ifdef PCI_WBS_ALLOW_NON_ALLIGNED_CONFIG_ACCESS |
`else |
&& alligned_address |
`endif |
; |
del_in_progress = do_ccyc_comp && ~burst_transfer |
`ifdef PCI_WBS_ALLOW_NON_ALLIGNED_CONFIG_ACCESS |
`else |
&& alligned_address |
`endif |
; |
`endif |
|
n_state = S_IDLE ; // next state after configuration access is always idle |
|
if ( burst_transfer `ifdef PCI_WBS_ALLOW_NON_ALLIGNED_CONFIG_ACCESS `else | ~alligned_address `endif ) |
if ( burst_transfer |
`ifdef PCI_WBS_ALLOW_NON_ALLIGNED_CONFIG_ACCESS |
`else |
| ~alligned_address |
`endif |
) |
begin |
err = 1'b1 ; |
end |
907,15 → 941,40
S_CONF_READ: begin |
`ifdef HOST |
wbw_data_out_sel = SEL_CCYC_ADDR ; |
del_req = ~burst_transfer `ifdef PCI_WBS_ALLOW_NON_ALLIGNED_CONFIG_ACCESS `else && alligned_address `endif && ( do_ccyc_req || do_iack_req ) ; |
del_done = ~burst_transfer `ifdef PCI_WBS_ALLOW_NON_ALLIGNED_CONFIG_ACCESS `else && alligned_address `endif && ( do_ccyc_comp || do_iack_comp ) ; |
del_in_progress = ~burst_transfer `ifdef PCI_WBS_ALLOW_NON_ALLIGNED_CONFIG_ACCESS `else && alligned_address `endif && ( do_ccyc_comp || do_iack_comp ) ; |
wbr_fifo_renable = ~burst_transfer `ifdef PCI_WBS_ALLOW_NON_ALLIGNED_CONFIG_ACCESS `else && alligned_address `endif && ( do_ccyc_comp || do_iack_comp ) ; |
del_req = ~burst_transfer |
`ifdef PCI_WBS_ALLOW_NON_ALLIGNED_CONFIG_ACCESS |
`else |
&& alligned_address |
`endif |
&& ( do_ccyc_req || do_iack_req ) ; |
del_done = ~burst_transfer |
`ifdef PCI_WBS_ALLOW_NON_ALLIGNED_CONFIG_ACCESS |
`else |
&& alligned_address |
`endif |
&& ( do_ccyc_comp || do_iack_comp ) ; |
del_in_progress = ~burst_transfer |
`ifdef PCI_WBS_ALLOW_NON_ALLIGNED_CONFIG_ACCESS |
`else |
&& alligned_address |
`endif |
&& ( do_ccyc_comp || do_iack_comp ) ; |
wbr_fifo_renable = ~burst_transfer |
`ifdef PCI_WBS_ALLOW_NON_ALLIGNED_CONFIG_ACCESS |
`else |
&& alligned_address |
`endif |
&& ( do_ccyc_comp || do_iack_comp ) ; |
`endif |
|
n_state = S_IDLE ; // next state after configuration access is always idle |
|
if ( burst_transfer `ifdef PCI_WBS_ALLOW_NON_ALLIGNED_CONFIG_ACCESS `else | ~alligned_address `endif ) |
if ( burst_transfer |
`ifdef PCI_WBS_ALLOW_NON_ALLIGNED_CONFIG_ACCESS |
`else |
| ~alligned_address |
`endif |
) |
begin |
err = 1'b1 ; |
end |