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https://opencores.org/ocsvn/rise/rise/trunk
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- This comparison shows the changes necessary to convert path
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- from Rev 113 to Rev 114
- ↔ Reverse comparison
Rev 113 → Rev 114
/trunk/vhdl/wb_stage.vhd
50,6 → 50,7
signal rdy_cnt :std_logic_vector(1 downto 0); |
signal txd :std_logic; |
signal rxd :std_logic; |
signal sendtouart :std_logic; |
|
component sc_uart is |
generic (ADDR_BITS : integer; |
119,13 → 120,17
lr <= (others => 'X'); |
sr_enable <= '0'; |
sr <= (others => 'X'); |
-- uart reset |
rd <= '0'; |
wr <= '0'; |
wr_data <= (others => 'X'); |
rd_data <= (others => '0'); |
|
sendtouart <='0' |
else |
|
if sendtouart = '1' then |
wr_data <= mem_wb_register.reg; |
wr <= '1'; |
end if; |
-- write back of register value. -- |
dreg_addr <= mem_wb_register.dreg_addr; |
if mem_wb_register.aluop1(ALUOP1_WB_REG_BIT) = '1' then |