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URL https://opencores.org/ocsvn/or1k/or1k/trunk

Subversion Repositories or1k

Compare Revisions

  • This comparison shows the changes necessary to convert path
    /
    from Rev 1168 to Rev 1169
    Reverse comparison

Rev 1168 → Rev 1169

/trunk/or1ksim/cpu/or32/or32.c
20,6 → 20,9
 
/*
* $Log: not supported by cvs2svn $
* Revision 1.30 2003/01/28 03:49:24 lampret
* Added cvs log keywords
*
*/
/* We treat all letters the same in encode/decode routines so
282,7 → 285,7
{ "l.sh", "I(rA),rB", "11 0x7 IIIII AAAAA BBBB BIII IIII IIII", EF(l_sh), 0 },
 
{ "l.add", "rD,rA,rB", "11 0x8 DDDDD AAAAA BBBB B-00 ---- 0x0", EF(l_add), OR32_W_FLAG },
{ "l.addc", "rD,rA,rB", "11 0x8 DDDDD AAAAA BBBB B-00 ---- 0x1", EFI, 0 },
{ "l.addc", "rD,rA,rB", "11 0x8 DDDDD AAAAA BBBB B-00 ---- 0x1", EF(l_addc), OR32_W_FLAG },
{ "l.sub", "rD,rA,rB", "11 0x8 DDDDD AAAAA BBBB B-00 ---- 0x2", EF(l_sub), 0 },
{ "l.and", "rD,rA,rB", "11 0x8 DDDDD AAAAA BBBB B-00 ---- 0x3", EF(l_and), OR32_W_FLAG },
{ "l.or", "rD,rA,rB", "11 0x8 DDDDD AAAAA BBBB B-00 ---- 0x4", EF(l_or), 0 },
/trunk/or1ksim/cpu/or1k/opcode/or32.h
104,6 → 104,7
extern void l_sfne PARAMS((void));
extern void l_bf PARAMS((void));
extern void l_add PARAMS((void));
extern void l_addc PARAMS((void));
extern void l_sw PARAMS((void));
extern void l_sb PARAMS((void));
extern void l_sh PARAMS((void));
/trunk/gdb-5.0/include/opcode/or32.h
104,6 → 104,7
extern void l_sfne PARAMS((void));
extern void l_bf PARAMS((void));
extern void l_add PARAMS((void));
extern void l_addc PARAMS((void));
extern void l_sw PARAMS((void));
extern void l_sb PARAMS((void));
extern void l_sh PARAMS((void));
/trunk/gdb-5.0/opcodes/or32.h
104,6 → 104,7
extern void l_sfne PARAMS((void));
extern void l_bf PARAMS((void));
extern void l_add PARAMS((void));
extern void l_addc PARAMS((void));
extern void l_sw PARAMS((void));
extern void l_sb PARAMS((void));
extern void l_sh PARAMS((void));
/trunk/gen_or1k_isa/sources/or32.c
20,6 → 20,9
 
/*
* $Log: not supported by cvs2svn $
* Revision 1.30 2003/01/28 03:49:24 lampret
* Added cvs log keywords
*
*/
/* We treat all letters the same in encode/decode routines so
282,7 → 285,7
{ "l.sh", "I(rA),rB", "11 0x7 IIIII AAAAA BBBB BIII IIII IIII", EF(l_sh), 0 },
 
{ "l.add", "rD,rA,rB", "11 0x8 DDDDD AAAAA BBBB B-00 ---- 0x0", EF(l_add), OR32_W_FLAG },
{ "l.addc", "rD,rA,rB", "11 0x8 DDDDD AAAAA BBBB B-00 ---- 0x1", EFI, 0 },
{ "l.addc", "rD,rA,rB", "11 0x8 DDDDD AAAAA BBBB B-00 ---- 0x1", EF(l_addc), OR32_W_FLAG },
{ "l.sub", "rD,rA,rB", "11 0x8 DDDDD AAAAA BBBB B-00 ---- 0x2", EF(l_sub), 0 },
{ "l.and", "rD,rA,rB", "11 0x8 DDDDD AAAAA BBBB B-00 ---- 0x3", EF(l_and), OR32_W_FLAG },
{ "l.or", "rD,rA,rB", "11 0x8 DDDDD AAAAA BBBB B-00 ---- 0x4", EF(l_or), 0 },
/trunk/gen_or1k_isa/sources/opcode/or32.c
20,6 → 20,9
 
/*
* $Log: not supported by cvs2svn $
* Revision 1.30 2003/01/28 03:49:24 lampret
* Added cvs log keywords
*
*/
/* We treat all letters the same in encode/decode routines so
282,7 → 285,7
{ "l.sh", "I(rA),rB", "11 0x7 IIIII AAAAA BBBB BIII IIII IIII", EF(l_sh), 0 },
 
{ "l.add", "rD,rA,rB", "11 0x8 DDDDD AAAAA BBBB B-00 ---- 0x0", EF(l_add), OR32_W_FLAG },
{ "l.addc", "rD,rA,rB", "11 0x8 DDDDD AAAAA BBBB B-00 ---- 0x1", EFI, 0 },
{ "l.addc", "rD,rA,rB", "11 0x8 DDDDD AAAAA BBBB B-00 ---- 0x1", EF(l_addc), OR32_W_FLAG },
{ "l.sub", "rD,rA,rB", "11 0x8 DDDDD AAAAA BBBB B-00 ---- 0x2", EF(l_sub), 0 },
{ "l.and", "rD,rA,rB", "11 0x8 DDDDD AAAAA BBBB B-00 ---- 0x3", EF(l_and), OR32_W_FLAG },
{ "l.or", "rD,rA,rB", "11 0x8 DDDDD AAAAA BBBB B-00 ---- 0x4", EF(l_or), 0 },
/trunk/insight/include/opcode/or32.h
104,6 → 104,7
extern void l_sfne PARAMS((void));
extern void l_bf PARAMS((void));
extern void l_add PARAMS((void));
extern void l_addc PARAMS((void));
extern void l_sw PARAMS((void));
extern void l_sb PARAMS((void));
extern void l_sh PARAMS((void));
/trunk/insight/opcodes/or32.c
20,6 → 20,9
 
/*
* $Log: not supported by cvs2svn $
* Revision 1.30 2003/01/28 03:49:24 lampret
* Added cvs log keywords
*
*/
/* We treat all letters the same in encode/decode routines so
282,7 → 285,7
{ "l.sh", "I(rA),rB", "11 0x7 IIIII AAAAA BBBB BIII IIII IIII", EF(l_sh), 0 },
 
{ "l.add", "rD,rA,rB", "11 0x8 DDDDD AAAAA BBBB B-00 ---- 0x0", EF(l_add), OR32_W_FLAG },
{ "l.addc", "rD,rA,rB", "11 0x8 DDDDD AAAAA BBBB B-00 ---- 0x1", EFI, 0 },
{ "l.addc", "rD,rA,rB", "11 0x8 DDDDD AAAAA BBBB B-00 ---- 0x1", EF(l_addc), OR32_W_FLAG },
{ "l.sub", "rD,rA,rB", "11 0x8 DDDDD AAAAA BBBB B-00 ---- 0x2", EF(l_sub), 0 },
{ "l.and", "rD,rA,rB", "11 0x8 DDDDD AAAAA BBBB B-00 ---- 0x3", EF(l_and), OR32_W_FLAG },
{ "l.or", "rD,rA,rB", "11 0x8 DDDDD AAAAA BBBB B-00 ---- 0x4", EF(l_or), 0 },

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