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URL https://opencores.org/ocsvn/axi_master/axi_master/trunk

Subversion Repositories axi_master

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  • This comparison shows the changes necessary to convert path
    /
    from Rev 12 to Rev 13
    Reverse comparison

Rev 12 → Rev 13

/axi_master/trunk/run/run.bat
1,6 → 1,4
 
echo off
 
..\..\..\robust.exe ../src/base/axi_master.v -od out -I ../src/gen -list list.txt -listpath -header
 
echo Completed RobustVerilog axi master run - results in run/out/
..\..\..\robust.exe ../src/base/axi_master.v -od out -I ../src/gen -list list.txt -listpath -header -gui
/axi_master/trunk/run/run.sh
1,5 → 1,3
#!/bin/bash
 
../../../robust ../src/base/axi_master.v -od out -I ../src/gen -list list.txt -listpath -header ${@}
 
echo Completed RobustVerilog axi master run - results in run/out/
../../../robust ../src/base/axi_master.v -od out -I ../src/gen -list list.txt -listpath -header -gui ${@}
/axi_master/trunk/src/base/def_axi_master.txt
31,18 → 31,18
 
SWAP.GLOBAL #FFD #1 ##Flip-Flop simulation delay
 
SWAP PREFIX axi_master ##prefix for all module and file names
SWAP.USER PREFIX axi_master ##prefix for all module and file names
SWAP ID_BITS 4 ##AXI ID bits
SWAP ADDR_BITS 32 ##AXI address bits
SWAP DATA_BITS 64 ##AXI data bits
SWAP LEN_BITS 4 ##AXI LEN bits
SWAP SIZE_BITS 2 ##AXI SIZE bits
SWAP.USER ID_BITS 4 ##AXI ID bits
SWAP.USER ADDR_BITS 32 ##AXI address bits
SWAP.USER DATA_BITS 64 ##AXI data bits
SWAP.USER LEN_BITS 4 ##AXI LEN bits
SWAP.USER SIZE_BITS 2 ##AXI SIZE bits
 
SWAP CMD_DEPTH 4 ##AXI command depth for read and write
SWAP.USER CMD_DEPTH 4 ##AXI command depth for read and write
 
SWAP ID_NUM 3 ##Number of IDs (internal masters)
SWAP ID0_VAL ID_BITS'b0011 ##AXI ID0
SWAP ID1_VAL ID_BITS'b0010 ##AXI ID1
SWAP ID2_VAL ID_BITS'b1010 ##AXI ID2
SWAP.USER ID_NUM 3 ##Number of IDs (internal masters)
SWAP.USER ID0_VAL 'b0011 ##AXI ID0
SWAP.USER ID1_VAL 'b0010 ##AXI ID1
SWAP.USER ID2_VAL 'b1010 ##AXI ID2
 
/axi_master/trunk/src/base/def_axi_master_static.txt
27,6 → 27,8
//// ////
//////////////////////////////////////////////////////////////////##>
 
SWAP MODEL_NAME AXI master stub
 
VERIFY (DATA_BITS <= 64) else stub supports 32 or 64 bits data bus
VERIFY (SIZE_BITS <= 3) else stub supports 32 or 64 bits data bus
 
/axi_master/trunk/src/base/axi_master.v
190,7 → 190,7
LOOP IX ID_NUM
STOMP NEWLINE
DEFCMD(LOOP.GLOBAL MIX_IDX 1) \\
DEFCMD(SWAP.GLOBAL ID_MIX_ID0 IDIX_VAL)
DEFCMD(SWAP.GLOBAL ID_MIX_ID0 ID_BITSIDIX_VAL)
ENDLOOP IX
 
PREFIX_ic PREFIX_ic(

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