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URL https://opencores.org/ocsvn/8051/8051/trunk

Subversion Repositories 8051

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  • This comparison shows the changes necessary to convert path
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    from Rev 121 to Rev 122
    Reverse comparison

Rev 121 → Rev 122

/trunk/rtl/verilog/oc8051_defines.v
58,7 → 58,12
`define OC8051_PORT3
 
 
//
// oc8051 ITERNAL ROM
//
//`define OC8051_ROM
 
 
//
// oc8051 memory
//
/trunk/rtl/verilog/oc8051_top.v
44,6 → 44,9
// CVS Revision History
//
// $Log: not supported by cvs2svn $
// Revision 1.23 2003/04/10 12:43:19 simont
// defines for pherypherals added
//
// Revision 1.22 2003/04/09 16:24:04 simont
// change wr_sft to 2 bit wire.
//
412,13 → 415,20
 
//
//program rom
oc8051_rom oc8051_rom1(.rst(wb_rst_i),
.clk(wb_clk_i),
.ea_int(ea_int),
`ifdef OC8051_ROM
oc8051_rom oc8051_rom1(.rst(wb_rst_i),
.clk(wb_clk_i),
.ea_int(ea_int),
.addr(iadr_o),
.data1(op1_i),
.data2(op2_i),
.data1(op1_i),
.data2(op2_i),
.data3(op3_i));
`else
assign ea_int = 1'b0;
assign op1_i = 8'h00;
assign op2_i = 8'h00;
assign op3_i = 8'h00;
`endif
 
//
//

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