URL
https://opencores.org/ocsvn/robust_reg/robust_reg/trunk
Subversion Repositories robust_reg
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- This comparison shows the changes necessary to convert path
/
- from Rev 13 to Rev 14
- ↔ Reverse comparison
Rev 13 → Rev 14
/robust_reg/trunk/src/base/def_regfile_fields.txt
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/robust_reg/trunk/src/base/def_regfile_regs.txt
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/robust_reg/trunk/src/base/regs.xls
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robust_reg/trunk/src/base/regs.xls
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Index: robust_reg/trunk/src/base/regfile.html
===================================================================
--- robust_reg/trunk/src/base/regfile.html (revision 13)
+++ robust_reg/trunk/src/base/regfile.html (revision 14)
@@ -33,7 +33,7 @@
-LOOP RX REG_NUM
+LOOP RX GROUP_REGS.NUM
- GROUP_REGS[RX]
/robust_reg/trunk/src/base/regfile.v
30,7 → 30,7
OUTFILE REGNAME_regfile.v |
INCLUDE def_regfile.txt |
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ITER RX REG_NUM |
ITER RX GROUP_REGS.NUM |
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module REGNAME_regfile (PORTS); |
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78,7 → 78,7
//---------------------- Write Operations --------------------------- |
assign wr_regGROUP_REGS.SON(TYPE != TYPE_RO).IDX = gpwrite & (paddr == GROUP_REGS); |
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LOOP RX REG_NUM |
LOOP RX GROUP_REGS.NUM |
IFDEF TRUE(GROUP_REGS[RX].TYPE == TYPE_RW) |
//GROUP_REGS[RX].DESC |
always @(posedge clk or posedge reset) |
/robust_reg/trunk/src/base/regfile.h
34,7 → 34,7
#define REGNAME_GROUP_REGS_ADDR 0xGROUP_REGS.ADDR |
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//fields |
LOOP RX REG_NUM |
LOOP RX GROUP_REGS.NUM |
//register GROUP_REGS[RX]: |
#define REGNAME_GROUP_REGRX_ADDR 0xGROUP_REGS[RX].ADDR |
#define REGNAME_GROUP_REGRX_START GROUP_REGRX.START |
/robust_reg/trunk/src/base/def_regfile.txt
1,3 → 1,4
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<##////////////////////////////////////////////////////////////////// |
//// //// |
//// Author: Eyal Hochberg //// |
29,8 → 30,7
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REQUIRE(1.4) |
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INCLUDE def_regfile_regs.txt |
INCLUDE def_regfile_fields.txt |
INCLUDE def_regs.txt |
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SWAP.GLOBAL MODEL_NAME regfile |
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59,3 → 59,9
pslverr 1 output |
pready 1 output |
} |
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SWAP ADD_REG(NAME, ADDR, TYPE, DESC) GROUP REGS extends { +NEWLINE NAME SON(CONST(ADDR) ADDR) SON(CONST(TYPE) TYPE) SON(CONST(DESC) DESC) +NEWLINE } |
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SWAP ADD_FIELD(REGNUM, NAME, BITS, START_BIT, DEFAULT, TYPE, DESC) GROUP REGREGNUM extends { +NEWLINE NAME BITS SON(START START_BIT) SON(CONST(DEFAULT) DEFAULT) SON(CONST(TYPE) TYPE) SON(CONST(DESC) DESC) +NEWLINE } |
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