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  • This comparison shows the changes necessary to convert path
    /
    from Rev 138 to Rev 139
    Reverse comparison

Rev 138 → Rev 139

/trunk/sw/cc/testbench.cc
1,4 → 1,4
/* $Id: testbench.cc,v 1.4 2008-04-26 18:08:12 sybreon Exp $
/* $Id: testbench.cc,v 1.5 2008-04-26 19:32:00 sybreon Exp $
**
** AEMB Function Verification C++ Testbench
** Copyright (C) 2004-2008 Shawn Tan <shawn.tan@aeste.net>
32,25 → 32,40
{
iprintf("AEMB2 32-bit Microprocessor Core\n");
 
iprintf("\nNumerical Tests\n");
// *** 1. FIBONACCI ***
iprintf("Fibonacci Test\n");
if (fibonacciTest(MAX_TEST) != EXIT_SUCCESS) trap(-1);
iprintf("1.\tBasic Integer\tPASS\n");
 
// *** 2. EUCLIDEAN ***
iprintf("Euclidean Test\n");
if (euclideanTest(MAX_TEST) != EXIT_SUCCESS) trap(-2);
iprintf("2.\tExtra Integer\tPASS\n");
 
// *** 3. NEWTON-RHAPSON ***
iprintf("Newton-Rhapson Test\n");
if (newtonTest(MAX_TEST) != EXIT_SUCCESS) trap(-3);
iprintf("3.\tFloating Point\tPASS\n");
 
iprintf("\nFunctional Tests\n");
// *** 4. MEMORY-ALLOC ***
if (memoryTest(MAX_TEST) != EXIT_SUCCESS) trap(-4);
iprintf("4.\tMemory Alloc\tPASS\n");
 
// *** 5. INTERRUPT ***
iprintf("5.\tInterrupt\tPASS\n");
// *** 6. EXTENSION ***
iprintf("6.\tExtension\tPASS\n");
 
// *** 9. PASSED ***
iprintf("*** PASSED ***\n");
iprintf("\n*** PASSED ***\n");
return EXIT_SUCCESS;
}
 
/*
$Log: not supported by cvs2svn $
Revision 1.4 2008/04/26 18:08:12 sybreon
Made single-thread compatible.
 
Revision 1.3 2008/04/26 00:25:19 sybreon
switched printf's to iprintf's because iprintf's don't work by
-O3 for some reason.
/trunk/sw/cc/aemb/msr.hh
1,4 → 1,4
/* $Id: msr.hh,v 1.6 2008-04-26 18:05:22 sybreon Exp $
/* $Id: msr.hh,v 1.7 2008-04-26 19:31:35 sybreon Exp $
**
** AEMB2 HI-PERFORMANCE CPU
** Copyright (C) 2004-2007 Shawn Tan Ser Ngiap <shawn.tan@aeste.net>
30,22 → 30,23
#ifndef AEMB_MSR_HH
#define AEMB_MSR_HH
 
#ifdef __cplusplus
namespace aemb {
#endif
 
const int MSR_BE = 0x00000001; ///< Buslock Enable
const int MSR_IE = 0x00000002; ///< Interrupt Enable
const int MSR_C = 0x00000004; ///< Arithmetic Carry
const int MSR_BIP = 0x00000008; ///< Break in Progress
#define MSR_BE (1 << 0) ///< Buslock Enable
#define MSR_IE (1 << 1) ///< Interrupt Enable
#define MSR_C (1 << 2) ///< Arithmetic Carry
#define MSR_BIP (1 << 3) ///< Break in Progress
const int MSR_MTX = 0x00000010; ///< Hardware Mutex
const int MSR_ICE = 0x00000020; ///< Instruction Cache Enable
const int MSR_DZ = 0x00000040; ///< Division by Zero
const int MSR_DCE = 0x00000080; ///< Data Cache Enable
#define MSR_MTX (1 << 4) ///< Hardware Mutex
#define MSR_ICE (1 << 5) ///< Instruction Cache Enable
#define MSR_DZ (1 << 6) ///< Division by Zero
#define MSR_DCE (1 << 7) ///< Data Cache Enable
//const int MSR_HTE = 0x10000000; ///< Hardware Threads Enable
const int MSR_PHA = 0x20000000; ///< Hardware Thread Phase
const int MSR_HTX = 0x40000000; ///< Hardware Threads Extension
const int MSR_CC = 0x80000004; ///< Carry Copy
#define MSR_PHA (1 << 29) ///< Hardware Thread Phase
#define MSR_HTX (1 << 30) ///< Hardware Threads Extension
#define MSR_CC (1 << 31) ///< Carry Copy
 
/**
Read the value of the MSR register
69,16 → 70,16
asm volatile ("mts rmsr, %0"::"r"(rmsr));
}
 
 
/**
Read and clear the MSR
@param rmsk clear mask
@return msr value
*/
 
inline int clrMSR(const short rmsk)
{
int tmp;
asm volatile ("msrclr %0, %1":"=r"(tmp):"K"(rmsk));
//asm volatile ("msrclr %0, %1":"=r"(tmp):"K"(rmsk):"memory");
return tmp;
}
 
87,10 → 88,11
@param rmsk set mask
@return msr value
*/
 
inline int setMSR(const short rmsk)
{
int tmp;
asm volatile ("msrset %0, %1":"=r"(tmp):"K"(rmsk));
//asm volatile ("msrset %0, %1":"=r"(tmp):"K"(rmsk):"memory");
return tmp;
}
 
97,45 → 99,50
/** Enable global interrupts */
inline void enableInterrupts()
{
putMSR(getMSR() | MSR_IE);
asm volatile ("msrset r0, %0"::"K"(MSR_IE):"memory");
}
 
/** Disable global interrupts */
inline void disableInterrupts()
{
putMSR(getMSR() & ~MSR_IE);
asm volatile ("msrclr r0, %0"::"K"(MSR_IE));
}
 
/** Enable data caches */
inline void enableDataCache()
{
putMSR(getMSR() | MSR_DCE);
asm volatile ("msrset r0, %0"::"K"(MSR_DCE));
}
 
/** Disable data caches */
inline void disableDataCache()
{
putMSR(getMSR() & ~MSR_DCE);
asm volatile ("msrclr r0, %0"::"K"(MSR_DCE));
}
 
/** Enable inst caches */
inline void enableInstCache()
{
putMSR(getMSR() | MSR_ICE);
asm volatile ("msrset r0, %0"::"K"(MSR_ICE));
}
 
/** Disable inst caches */
inline void disableInstCache()
{
putMSR(getMSR() & ~MSR_ICE);
asm volatile ("msrclr r0, %0"::"K"(MSR_ICE));
}
 
#ifdef __cplusplus
}
#endif
 
#endif
 
/*
$Log: not supported by cvs2svn $
Revision 1.6 2008/04/26 18:05:22 sybreon
Minor cosmetic changes.
 
Revision 1.5 2008/04/20 16:35:53 sybreon
Added C/C++ compatible #ifdef statements
 
/trunk/sw/cc/aemb/stdio.hh
1,4 → 1,4
/* $Id: stdio.hh,v 1.2 2008-04-26 18:05:22 sybreon Exp $
/* $Id: stdio.hh,v 1.3 2008-04-26 19:31:35 sybreon Exp $
**
** AEMB2 HI-PERFORMANCE CPU
** Copyright (C) 2004-2007 Shawn Tan Ser Ngiap <shawn.tan@aeste.net>
32,7 → 32,9
#ifndef AEMB_STDIO_HH
#define AEMB_STDIO_HH
 
#ifdef __cplusplus
extern "C" {
#endif
/**
Default stdout prototype.
50,12 → 52,17
*/
char inbyte();
 
#ifdef __cplusplus
}
#endif
 
#endif
 
/*
$Log: not supported by cvs2svn $
Revision 1.2 2008/04/26 18:05:22 sybreon
Minor cosmetic changes.
 
Revision 1.1 2008/04/09 19:48:37 sybreon
Added new C++ files
 
/trunk/sw/cc/aemb/stack.hh
1,4 → 1,4
/* $Id: stack.hh,v 1.4 2008-04-26 18:04:31 sybreon Exp $
/* $Id: stack.hh,v 1.5 2008-04-26 19:31:35 sybreon Exp $
**
** AEMB2 HI-PERFORMANCE CPU
** Copyright (C) 2004-2007 Shawn Tan Ser Ngiap <shawn.tan@aeste.net>
27,7 → 27,9
#ifndef AEMB_STACK_HH
#define AEMB_STACK_HH
 
#ifdef __cplusplus
namespace aemb {
#endif
 
/**
Reads the size of the memory space allocated for the stack in bytes.
111,12 → 113,17
}
}
 
#ifdef __cplusplus
}
#endif
 
#endif
 
/*
$Log: not supported by cvs2svn $
Revision 1.4 2008/04/26 18:04:31 sybreon
Updated software to freeze T0 and run T1.
 
Revision 1.3 2008/04/23 14:19:39 sybreon
Fixed minor bugs.
Initial use of hardware mutex.
/trunk/sw/cc/aemb/thread.hh
1,4 → 1,4
/* $Id: thread.hh,v 1.7 2008-04-26 18:05:22 sybreon Exp $
/* $Id: thread.hh,v 1.8 2008-04-26 19:31:35 sybreon Exp $
**
** AEMB2 HI-PERFORMANCE CPU
** Copyright (C) 2004-2007 Shawn Tan Ser Ngiap <shawn.tan@aeste.net>
32,7 → 32,9
#ifndef AEMB_THREAD_HH
#define AEMB_THREAD_HH
 
#ifdef __cplusplus
namespace aemb {
#endif
 
/**
Checks to see if currently executing Thread 1
39,7 → 41,7
@return true if is Thread 1
*/
inline bool isThread1()
inline int isThread1()
{
int rmsr = getMSR();
return ((rmsr & MSR_HTX) && (rmsr & MSR_PHA));
50,7 → 52,7
@return true if is Thread 0
*/
inline bool isThread0()
inline int isThread0()
{
int rmsr = getMSR();
return ((rmsr & MSR_HTX) && (!(rmsr & MSR_PHA)));
60,7 → 62,7
Checks to see if it is multi-threaded or not.
@return true if thread capable
*/
inline bool isThreaded()
inline int isThreaded()
{
int rmsr = getMSR();
return (rmsr & MSR_HTX);
136,12 → 138,17
}
}
 
#ifdef __cplusplus
}
#endif
 
#endif
 
/*
$Log: not supported by cvs2svn $
Revision 1.7 2008/04/26 18:05:22 sybreon
Minor cosmetic changes.
 
Revision 1.6 2008/04/23 14:19:39 sybreon
Fixed minor bugs.
Initial use of hardware mutex.
/trunk/sw/cc/aemb/core.hh
1,4 → 1,4
/* $Id: core.hh,v 1.1 2008-04-09 19:48:37 sybreon Exp $
/* $Id: core.hh,v 1.2 2008-04-26 19:31:35 sybreon Exp $
**
** AEMB2 HI-PERFORMANCE CPU
** Copyright (C) 2004-2007 Shawn Tan Ser Ngiap <shawn.tan@aeste.net>
37,12 → 37,16
/**
Unique namespace for all aemb library functions
*/
#ifdef __cplusplus
namespace aemb {
 
}
#endif
 
#endif
 
/*
$Log: not supported by cvs2svn $
Revision 1.1 2008/04/09 19:48:37 sybreon
Added new C++ files
 
*/
/trunk/sw/cc/aemb/heap.hh
1,4 → 1,4
/* $Id: heap.hh,v 1.3 2008-04-26 18:05:22 sybreon Exp $
/* $Id: heap.hh,v 1.4 2008-04-26 19:31:35 sybreon Exp $
**
** AEMB2 HI-PERFORMANCE CPU
** Copyright (C) 2004-2007 Shawn Tan Ser Ngiap <shawn.tan@aeste.net>
27,7 → 27,9
#ifndef AEMB_HEAP_HH
#define AEMB_HEAP_HH
 
#ifdef __cplusplus
namespace aemb {
#endif
 
/**
Extracts the heap size from the linker
65,13 → 67,17
return tmp;
}
 
#ifdef __cplusplus
}
 
#endif
#endif
 
/*
$Log: not supported by cvs2svn $
Revision 1.3 2008/04/26 18:05:22 sybreon
Minor cosmetic changes.
 
Revision 1.2 2008/04/20 16:35:53 sybreon
Added C/C++ compatible #ifdef statements
 
/trunk/sw/cc/aemb/hook.hh
1,4 → 1,4
/* $Id: hook.hh,v 1.6 2008-04-26 18:04:31 sybreon Exp $
/* $Id: hook.hh,v 1.7 2008-04-26 19:31:35 sybreon Exp $
**
** AEMB2 HI-PERFORMANCE CPU
** Copyright (C) 2004-2007 Shawn Tan Ser Ngiap <shawn.tan@aeste.net>
34,9 → 34,11
#ifndef AEMB_HOOK_HH
#define AEMB_HOOK_HH
 
#ifdef __cplusplus
namespace aemb {
extern "C" {
#endif
 
void _program_init();
void _program_clean();
46,7 → 48,9
//void __env_lock(struct _reent *reent);
//void __env_unlock(struct _reent *reent);
#ifdef __cplusplus
}
#endif
/**
Finalisation hook
90,7 → 94,7
(int *)getStack(),
(int *)getStackTop);
signalMutex(); // exit critical section
while (true) asm volatile ("nop"); // lock thread
while (1) asm volatile ("nop"); // lock thread
}
 
signalMutex(); // exit critical section
122,7 → 126,9
signalMutex();
}
 
#ifdef __cplusplus
}
#endif
 
#endif
 
135,6 → 141,9
 
/*
$Log: not supported by cvs2svn $
Revision 1.6 2008/04/26 18:04:31 sybreon
Updated software to freeze T0 and run T1.
 
Revision 1.5 2008/04/23 14:19:39 sybreon
Fixed minor bugs.
Initial use of hardware mutex.
/trunk/sw/cc/simboard.hh
1,4 → 1,4
/* $Id: simboard.hh,v 1.3 2008-04-26 18:07:19 sybreon Exp $
/* $Id: simboard.hh,v 1.4 2008-04-26 19:32:00 sybreon Exp $
**
** AEMB Function Verification C++ Testbench
** Copyright (C) 2004-2008 Shawn Tan <shawn.tan@aeste.net>
34,18 → 34,23
INTERRUPT TESTS
*/
 
#ifdef __cplusplus
using namespace aemb;
#endif
 
volatile int intr = -1;
 
void __attribute__ ((interrupt_handler)) interruptHandler()
{
intr = 0; // flag the interrupt
intr = 0; // flag the interrupt service routine
}
 
int interruptTest(int timeout)
{
aemb::enableInterrupts();
for (int timer=0; (timer < timeout) && (intr == -1); ++timer); // delay loop
aemb::disableInterrupts();
enableInterrupts();
int timer;
for (timer=0; (timer < timeout) && (intr == -1); ++timer); // delay loop
disableInterrupts();
return (intr == 0) ? EXIT_SUCCESS : EXIT_FAILURE;
}
 
122,6 → 127,9
 
/*
$Log: not supported by cvs2svn $
Revision 1.3 2008/04/26 18:07:19 sybreon
Minor cosmetic changes.
 
Revision 1.2 2008/04/21 12:13:12 sybreon
Passes arithmetic tests with single thread.
 

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