URL
https://opencores.org/ocsvn/or1k/or1k/trunk
Subversion Repositories or1k
Compare Revisions
- This comparison shows the changes necessary to convert path
/
- from Rev 1383 to Rev 1384
- ↔ Reverse comparison
Rev 1383 → Rev 1384
/trunk/or1ksim/cpu/or32/or32.c
20,6 → 20,9
|
/* |
* $Log: not supported by cvs2svn $ |
* Revision 1.41 2005/02/09 17:41:03 nogj |
* Mark a simulated cpu address as such, by introducing the new oraddr_t type |
* |
* Revision 1.40 2005/01/27 14:14:13 nogj |
* Remove the global op structure |
* |
339,7 → 342,7
EF(l_jr), OR32_IF_DELAY, it_jump }, |
{ "l.jalr", "rB", "01 0x2 ----- ----- BBBB B--- ---- ----", |
EF(l_jalr), OR32_IF_DELAY, it_jump }, |
{ "l.maci", "rB,I", "01 0x3 IIIII ----- BBBB BIII IIII IIII", |
{ "l.maci", "rA,I", "01 0x3 IIIII ----- AAAA AIII IIII IIII", |
EF(l_mac), 0, it_mac }, |
{ "l.cust1", "", "01 0xC ----- ----- ---- ---- ---- ----", |
EF(l_cust1), 0, it_unknown }, |
530,8 → 533,8
EF(l_extwz), 0, it_move }, |
{ "l.cmov", "rD,rA,rB", "11 0x8 DDDDD AAAAA BBBB B-00 ---- 0xE", |
EF(l_cmov), OR32_R_FLAG, it_move }, |
{ "l.ff1", "rD,rA,rB", "11 0x8 DDDDD AAAAA BBBB B-00 ---- 0xF", EFI, |
0, it_arith }, |
{ "l.ff1", "rD,rA", "11 0x8 DDDDD AAAAA ---- --00 ---- 0xF", EFI, 0, |
it_arith }, |
|
{ "l.sfeq", "rA,rB", "11 0x9 00000 AAAAA BBBB B--- ---- ----", |
EF(l_sfeq), OR32_W_FLAG, it_compare }, |
/trunk/gen_or1k_isa/sources/or32.c
20,6 → 20,9
|
/* |
* $Log: not supported by cvs2svn $ |
* Revision 1.41 2005/02/09 17:41:03 nogj |
* Mark a simulated cpu address as such, by introducing the new oraddr_t type |
* |
* Revision 1.40 2005/01/27 14:14:13 nogj |
* Remove the global op structure |
* |
339,7 → 342,7
EF(l_jr), OR32_IF_DELAY, it_jump }, |
{ "l.jalr", "rB", "01 0x2 ----- ----- BBBB B--- ---- ----", |
EF(l_jalr), OR32_IF_DELAY, it_jump }, |
{ "l.maci", "rB,I", "01 0x3 IIIII ----- BBBB BIII IIII IIII", |
{ "l.maci", "rA,I", "01 0x3 IIIII ----- AAAA AIII IIII IIII", |
EF(l_mac), 0, it_mac }, |
{ "l.cust1", "", "01 0xC ----- ----- ---- ---- ---- ----", |
EF(l_cust1), 0, it_unknown }, |
530,8 → 533,8
EF(l_extwz), 0, it_move }, |
{ "l.cmov", "rD,rA,rB", "11 0x8 DDDDD AAAAA BBBB B-00 ---- 0xE", |
EF(l_cmov), OR32_R_FLAG, it_move }, |
{ "l.ff1", "rD,rA,rB", "11 0x8 DDDDD AAAAA BBBB B-00 ---- 0xF", EFI, |
0, it_arith }, |
{ "l.ff1", "rD,rA", "11 0x8 DDDDD AAAAA ---- --00 ---- 0xF", EFI, 0, |
it_arith }, |
|
{ "l.sfeq", "rA,rB", "11 0x9 00000 AAAAA BBBB B--- ---- ----", |
EF(l_sfeq), OR32_W_FLAG, it_compare }, |
/trunk/gen_or1k_isa/sources/opcode/or32.c
20,6 → 20,9
|
/* |
* $Log: not supported by cvs2svn $ |
* Revision 1.41 2005/02/09 17:41:03 nogj |
* Mark a simulated cpu address as such, by introducing the new oraddr_t type |
* |
* Revision 1.40 2005/01/27 14:14:13 nogj |
* Remove the global op structure |
* |
339,7 → 342,7
EF(l_jr), OR32_IF_DELAY, it_jump }, |
{ "l.jalr", "rB", "01 0x2 ----- ----- BBBB B--- ---- ----", |
EF(l_jalr), OR32_IF_DELAY, it_jump }, |
{ "l.maci", "rB,I", "01 0x3 IIIII ----- BBBB BIII IIII IIII", |
{ "l.maci", "rA,I", "01 0x3 IIIII ----- AAAA AIII IIII IIII", |
EF(l_mac), 0, it_mac }, |
{ "l.cust1", "", "01 0xC ----- ----- ---- ---- ---- ----", |
EF(l_cust1), 0, it_unknown }, |
530,8 → 533,8
EF(l_extwz), 0, it_move }, |
{ "l.cmov", "rD,rA,rB", "11 0x8 DDDDD AAAAA BBBB B-00 ---- 0xE", |
EF(l_cmov), OR32_R_FLAG, it_move }, |
{ "l.ff1", "rD,rA,rB", "11 0x8 DDDDD AAAAA BBBB B-00 ---- 0xF", EFI, |
0, it_arith }, |
{ "l.ff1", "rD,rA", "11 0x8 DDDDD AAAAA ---- --00 ---- 0xF", EFI, 0, |
it_arith }, |
|
{ "l.sfeq", "rA,rB", "11 0x9 00000 AAAAA BBBB B--- ---- ----", |
EF(l_sfeq), OR32_W_FLAG, it_compare }, |
/trunk/insight/opcodes/or32.c
20,6 → 20,9
|
/* |
* $Log: not supported by cvs2svn $ |
* Revision 1.41 2005/02/09 17:41:03 nogj |
* Mark a simulated cpu address as such, by introducing the new oraddr_t type |
* |
* Revision 1.40 2005/01/27 14:14:13 nogj |
* Remove the global op structure |
* |
339,7 → 342,7
EF(l_jr), OR32_IF_DELAY, it_jump }, |
{ "l.jalr", "rB", "01 0x2 ----- ----- BBBB B--- ---- ----", |
EF(l_jalr), OR32_IF_DELAY, it_jump }, |
{ "l.maci", "rB,I", "01 0x3 IIIII ----- BBBB BIII IIII IIII", |
{ "l.maci", "rA,I", "01 0x3 IIIII ----- AAAA AIII IIII IIII", |
EF(l_mac), 0, it_mac }, |
{ "l.cust1", "", "01 0xC ----- ----- ---- ---- ---- ----", |
EF(l_cust1), 0, it_unknown }, |
530,8 → 533,8
EF(l_extwz), 0, it_move }, |
{ "l.cmov", "rD,rA,rB", "11 0x8 DDDDD AAAAA BBBB B-00 ---- 0xE", |
EF(l_cmov), OR32_R_FLAG, it_move }, |
{ "l.ff1", "rD,rA,rB", "11 0x8 DDDDD AAAAA BBBB B-00 ---- 0xF", EFI, |
0, it_arith }, |
{ "l.ff1", "rD,rA", "11 0x8 DDDDD AAAAA ---- --00 ---- 0xF", EFI, 0, |
it_arith }, |
|
{ "l.sfeq", "rA,rB", "11 0x9 00000 AAAAA BBBB B--- ---- ----", |
EF(l_sfeq), OR32_W_FLAG, it_compare }, |