URL
https://opencores.org/ocsvn/wb_dma/wb_dma/trunk
Subversion Repositories wb_dma
Compare Revisions
- This comparison shows the changes necessary to convert path
/
- from Rev 14 to Rev 15
- ↔ Reverse comparison
Rev 14 → Rev 15
/trunk/bench/verilog/wb_mast_model.v
11,8 → 11,9
//// //// |
///////////////////////////////////////////////////////////////////// |
//// //// |
//// Copyright (C) 2000 Rudolf Usselmann //// |
//// rudi@asics.ws //// |
//// Copyright (C) 2000-2002 Rudolf Usselmann //// |
//// www.asics.ws //// |
//// rudi@asics.ws //// |
//// //// |
//// This source file may be used and distributed without //// |
//// restriction provided that this copyright statement is not //// |
37,10 → 38,10
|
// CVS Log |
// |
// $Id: wb_mast_model.v,v 1.2 2001-09-07 15:34:36 rudi Exp $ |
// $Id: wb_mast_model.v,v 1.3 2002-02-01 01:55:44 rudi Exp $ |
// |
// $Date: 2001-09-07 15:34:36 $ |
// $Revision: 1.2 $ |
// $Date: 2002-02-01 01:55:44 $ |
// $Revision: 1.3 $ |
// $Author: rudi $ |
// $Locker: $ |
// $State: Exp $ |
47,6 → 48,10
// |
// Change History: |
// $Log: not supported by cvs2svn $ |
// Revision 1.2 2001/09/07 15:34:36 rudi |
// |
// Changed reset to active high. |
// |
// Revision 1.1 2001/07/29 08:57:02 rudi |
// |
// |
/trunk/bench/verilog/wb_slv_model.v
11,8 → 11,9
//// //// |
///////////////////////////////////////////////////////////////////// |
//// //// |
//// Copyright (C) 2001 Rudolf Usselmann //// |
//// rudi@asics.ws //// |
//// Copyright (C) 2000-2002 Rudolf Usselmann //// |
//// www.asics.ws //// |
//// rudi@asics.ws //// |
//// //// |
//// This source file may be used and distributed without //// |
//// restriction provided that this copyright statement is not //// |
37,10 → 38,10
|
// CVS Log |
// |
// $Id: wb_slv_model.v,v 1.1 2001-07-29 08:57:02 rudi Exp $ |
// $Id: wb_slv_model.v,v 1.2 2002-02-01 01:55:44 rudi Exp $ |
// |
// $Date: 2001-07-29 08:57:02 $ |
// $Revision: 1.1 $ |
// $Date: 2002-02-01 01:55:44 $ |
// $Revision: 1.2 $ |
// $Author: rudi $ |
// $Locker: $ |
// $State: Exp $ |
47,6 → 48,12
// |
// Change History: |
// $Log: not supported by cvs2svn $ |
// Revision 1.1 2001/07/29 08:57:02 rudi |
// |
// |
// 1) Changed Directory Structure |
// 2) Added restart signal (REST) |
// |
// Revision 1.1.1.1 2001/03/19 13:11:29 rudi |
// Initial Release |
// |
/trunk/bench/verilog/test_bench_top.v
11,8 → 11,9
//// //// |
///////////////////////////////////////////////////////////////////// |
//// //// |
//// Copyright (C) 2001 Rudolf Usselmann //// |
//// rudi@asics.ws //// |
//// Copyright (C) 2000-2002 Rudolf Usselmann //// |
//// www.asics.ws //// |
//// rudi@asics.ws //// |
//// //// |
//// This source file may be used and distributed without //// |
//// restriction provided that this copyright statement is not //// |
37,10 → 38,10
|
// CVS Log |
// |
// $Id: test_bench_top.v,v 1.4 2001-10-19 04:47:31 rudi Exp $ |
// $Id: test_bench_top.v,v 1.5 2002-02-01 01:55:44 rudi Exp $ |
// |
// $Date: 2001-10-19 04:47:31 $ |
// $Revision: 1.4 $ |
// $Date: 2002-02-01 01:55:44 $ |
// $Revision: 1.5 $ |
// $Author: rudi $ |
// $Locker: $ |
// $State: Exp $ |
47,6 → 48,10
// |
// Change History: |
// $Log: not supported by cvs2svn $ |
// Revision 1.4 2001/10/19 04:47:31 rudi |
// |
// - Made the core parameterized |
// |
// Revision 1.3 2001/09/07 15:34:36 rudi |
// |
// Changed reset to active high. |
220,7 → 225,7
|
// HERE IS WHERE THE TEST CASES GO ... |
|
if(0) // Full Regression Run |
if(1) // Full Regression Run |
begin |
$display(" ......................................................"); |
$display(" : :"); |
329,7 → 334,6
4'hf, |
4'hf |
) |
|
u0( |
.clk_i( clk ), |
.rst_i( rst ), |
/trunk/bench/verilog/wb_model_defines.v
11,8 → 11,9
//// //// |
///////////////////////////////////////////////////////////////////// |
//// //// |
//// Copyright (C) 2001 Rudolf Usselmann //// |
//// rudi@asics.ws //// |
//// Copyright (C) 2000-2002 Rudolf Usselmann //// |
//// www.asics.ws //// |
//// rudi@asics.ws //// |
//// //// |
//// This source file may be used and distributed without //// |
//// restriction provided that this copyright statement is not //// |
37,10 → 38,10
|
// CVS Log |
// |
// $Id: wb_model_defines.v,v 1.1 2001-07-29 08:57:02 rudi Exp $ |
// $Id: wb_model_defines.v,v 1.2 2002-02-01 01:55:44 rudi Exp $ |
// |
// $Date: 2001-07-29 08:57:02 $ |
// $Revision: 1.1 $ |
// $Date: 2002-02-01 01:55:44 $ |
// $Revision: 1.2 $ |
// $Author: rudi $ |
// $Locker: $ |
// $State: Exp $ |
47,6 → 48,12
// |
// Change History: |
// $Log: not supported by cvs2svn $ |
// Revision 1.1 2001/07/29 08:57:02 rudi |
// |
// |
// 1) Changed Directory Structure |
// 2) Added restart signal (REST) |
// |
// Revision 1.1.1.1 2001/03/19 13:12:48 rudi |
// Initial Release |
// |
/trunk/rtl/verilog/wb_dma_top.v
11,8 → 11,9
//// //// |
///////////////////////////////////////////////////////////////////// |
//// //// |
//// Copyright (C) 2001 Rudolf Usselmann //// |
//// rudi@asics.ws //// |
//// Copyright (C) 2000-2002 Rudolf Usselmann //// |
//// www.asics.ws //// |
//// rudi@asics.ws //// |
//// //// |
//// This source file may be used and distributed without //// |
//// restriction provided that this copyright statement is not //// |
37,10 → 38,10
|
// CVS Log |
// |
// $Id: wb_dma_top.v,v 1.4 2001-10-19 04:35:04 rudi Exp $ |
// $Id: wb_dma_top.v,v 1.5 2002-02-01 01:54:45 rudi Exp $ |
// |
// $Date: 2001-10-19 04:35:04 $ |
// $Revision: 1.4 $ |
// $Date: 2002-02-01 01:54:45 $ |
// $Revision: 1.5 $ |
// $Author: rudi $ |
// $Locker: $ |
// $State: Exp $ |
47,6 → 48,10
// |
// Change History: |
// $Log: not supported by cvs2svn $ |
// Revision 1.4 2001/10/19 04:35:04 rudi |
// |
// - Made the core parameterized |
// |
// Revision 1.3 2001/09/07 15:34:38 rudi |
// |
// Changed reset to active high. |
/trunk/rtl/verilog/wb_dma_wb_if.v
11,8 → 11,9
//// //// |
///////////////////////////////////////////////////////////////////// |
//// //// |
//// Copyright (C) 2001 Rudolf Usselmann //// |
//// rudi@asics.ws //// |
//// Copyright (C) 2000-2002 Rudolf Usselmann //// |
//// www.asics.ws //// |
//// rudi@asics.ws //// |
//// //// |
//// This source file may be used and distributed without //// |
//// restriction provided that this copyright statement is not //// |
37,10 → 38,10
|
// CVS Log |
// |
// $Id: wb_dma_wb_if.v,v 1.2 2001-10-19 04:35:04 rudi Exp $ |
// $Id: wb_dma_wb_if.v,v 1.3 2002-02-01 01:54:45 rudi Exp $ |
// |
// $Date: 2001-10-19 04:35:04 $ |
// $Revision: 1.2 $ |
// $Date: 2002-02-01 01:54:45 $ |
// $Revision: 1.3 $ |
// $Author: rudi $ |
// $Locker: $ |
// $State: Exp $ |
47,6 → 48,10
// |
// Change History: |
// $Log: not supported by cvs2svn $ |
// Revision 1.2 2001/10/19 04:35:04 rudi |
// |
// - Made the core parameterized |
// |
// Revision 1.1 2001/07/29 08:57:02 rudi |
// |
// |
/trunk/rtl/verilog/wb_dma_rf.v
11,8 → 11,9
//// //// |
///////////////////////////////////////////////////////////////////// |
//// //// |
//// Copyright (C) 2001 Rudolf Usselmann //// |
//// rudi@asics.ws //// |
//// Copyright (C) 2000-2002 Rudolf Usselmann //// |
//// www.asics.ws //// |
//// rudi@asics.ws //// |
//// //// |
//// This source file may be used and distributed without //// |
//// restriction provided that this copyright statement is not //// |
37,10 → 38,10
|
// CVS Log |
// |
// $Id: wb_dma_rf.v,v 1.3 2001-10-19 04:35:04 rudi Exp $ |
// $Id: wb_dma_rf.v,v 1.4 2002-02-01 01:54:45 rudi Exp $ |
// |
// $Date: 2001-10-19 04:35:04 $ |
// $Revision: 1.3 $ |
// $Date: 2002-02-01 01:54:45 $ |
// $Revision: 1.4 $ |
// $Author: rudi $ |
// $Locker: $ |
// $State: Exp $ |
47,6 → 48,10
// |
// Change History: |
// $Log: not supported by cvs2svn $ |
// Revision 1.3 2001/10/19 04:35:04 rudi |
// |
// - Made the core parameterized |
// |
// Revision 1.2 2001/08/15 05:40:30 rudi |
// |
// - Changed IO names to be more clear. |
/trunk/rtl/verilog/wb_dma_de.v
11,8 → 11,9
//// //// |
///////////////////////////////////////////////////////////////////// |
//// //// |
//// Copyright (C) 2001 Rudolf Usselmann //// |
//// rudi@asics.ws //// |
//// Copyright (C) 2000-2002 Rudolf Usselmann //// |
//// www.asics.ws //// |
//// rudi@asics.ws //// |
//// //// |
//// This source file may be used and distributed without //// |
//// restriction provided that this copyright statement is not //// |
37,10 → 38,10
|
// CVS Log |
// |
// $Id: wb_dma_de.v,v 1.2 2001-08-15 05:40:30 rudi Exp $ |
// $Id: wb_dma_de.v,v 1.3 2002-02-01 01:54:45 rudi Exp $ |
// |
// $Date: 2001-08-15 05:40:30 $ |
// $Revision: 1.2 $ |
// $Date: 2002-02-01 01:54:45 $ |
// $Revision: 1.3 $ |
// $Author: rudi $ |
// $Locker: $ |
// $State: Exp $ |
47,6 → 48,12
// |
// Change History: |
// $Log: not supported by cvs2svn $ |
// Revision 1.2 2001/08/15 05:40:30 rudi |
// |
// - Changed IO names to be more clear. |
// - Uniquifyed define names to be core specific. |
// - Added Section 3.10, describing DMA restart. |
// |
// Revision 1.1 2001/07/29 08:57:02 rudi |
// |
// |
260,8 → 267,8
|
// 30 Bit Incrementor (registered) |
wb_dma_inc30r u0( .clk( clk ), |
.in( adr0_cnt ), |
.out( adr0_cnt_next1 ) ); |
.in( adr0_cnt ), |
.out( adr0_cnt_next1 ) ); |
|
assign adr0_cnt_next[1:0] = adr0_cnt_next1[1:0]; |
assign adr0_cnt_next[2] = am0[4] ? adr0_cnt_next1[2] : adr0_cnt[2]; |
302,8 → 309,8
|
// 30 Bit Incrementor (registered) |
wb_dma_inc30r u1( .clk( clk ), |
.in( adr1_cnt ), |
.out( adr1_cnt_next1 ) ); |
.in( adr1_cnt ), |
.out( adr1_cnt_next1 ) ); |
|
assign adr1_cnt_next[1:0] = adr1_cnt_next1[1:0]; |
assign adr1_cnt_next[2] = am1[4] ? adr1_cnt_next1[2] : adr1_cnt[2]; |
365,12 → 372,10
tsz_dec <= #1 read & !read_r; |
|
//always @(posedge clk) |
// adr0_inc <= #1 rd_ack & read_r; |
always @(rd_ack or read_r) |
adr0_inc = rd_ack & read_r; |
|
//always @(posedge clk) |
// adr1_inc <= #1 wr_ack & write_r; |
always @(wr_ack or write_r) |
adr1_inc = wr_ack & write_r; |
|
/trunk/rtl/verilog/wb_dma_pri_enc_sub.v
11,8 → 11,9
//// //// |
///////////////////////////////////////////////////////////////////// |
//// //// |
//// Copyright (C) 2001 Rudolf Usselmann //// |
//// rudi@asics.ws //// |
//// Copyright (C) 2000-2002 Rudolf Usselmann //// |
//// www.asics.ws //// |
//// rudi@asics.ws //// |
//// //// |
//// This source file may be used and distributed without //// |
//// restriction provided that this copyright statement is not //// |
37,10 → 38,10
|
// CVS Log |
// |
// $Id: wb_dma_pri_enc_sub.v,v 1.3 2001-10-19 04:35:04 rudi Exp $ |
// $Id: wb_dma_pri_enc_sub.v,v 1.4 2002-02-01 01:54:45 rudi Exp $ |
// |
// $Date: 2001-10-19 04:35:04 $ |
// $Revision: 1.3 $ |
// $Date: 2002-02-01 01:54:45 $ |
// $Revision: 1.4 $ |
// $Author: rudi $ |
// $Locker: $ |
// $State: Exp $ |
47,6 → 48,10
// |
// Change History: |
// $Log: not supported by cvs2svn $ |
// Revision 1.3 2001/10/19 04:35:04 rudi |
// |
// - Made the core parameterized |
// |
// Revision 1.2 2001/08/15 05:40:30 rudi |
// |
// - Changed IO names to be more clear. |
/trunk/rtl/verilog/wb_dma_ch_pri_enc.v
11,8 → 11,9
//// //// |
///////////////////////////////////////////////////////////////////// |
//// //// |
//// Copyright (C) 2001 Rudolf Usselmann //// |
//// rudi@asics.ws //// |
//// Copyright (C) 2000-2002 Rudolf Usselmann //// |
//// www.asics.ws //// |
//// rudi@asics.ws //// |
//// //// |
//// This source file may be used and distributed without //// |
//// restriction provided that this copyright statement is not //// |
37,10 → 38,10
|
// CVS Log |
// |
// $Id: wb_dma_ch_pri_enc.v,v 1.4 2001-10-19 04:35:04 rudi Exp $ |
// $Id: wb_dma_ch_pri_enc.v,v 1.5 2002-02-01 01:54:44 rudi Exp $ |
// |
// $Date: 2001-10-19 04:35:04 $ |
// $Revision: 1.4 $ |
// $Date: 2002-02-01 01:54:44 $ |
// $Revision: 1.5 $ |
// $Author: rudi $ |
// $Locker: $ |
// $State: Exp $ |
47,6 → 48,10
// |
// Change History: |
// $Log: not supported by cvs2svn $ |
// Revision 1.4 2001/10/19 04:35:04 rudi |
// |
// - Made the core parameterized |
// |
// Revision 1.3 2001/08/15 05:40:30 rudi |
// |
// - Changed IO names to be more clear. |
/trunk/rtl/verilog/wb_dma_wb_mast.v
11,8 → 11,9
//// //// |
///////////////////////////////////////////////////////////////////// |
//// //// |
//// Copyright (C) 2001 Rudolf Usselmann //// |
//// rudi@asics.ws //// |
//// Copyright (C) 2000-2002 Rudolf Usselmann //// |
//// www.asics.ws //// |
//// rudi@asics.ws //// |
//// //// |
//// This source file may be used and distributed without //// |
//// restriction provided that this copyright statement is not //// |
37,10 → 38,10
|
// CVS Log |
// |
// $Id: wb_dma_wb_mast.v,v 1.1 2001-07-29 08:57:02 rudi Exp $ |
// $Id: wb_dma_wb_mast.v,v 1.2 2002-02-01 01:54:45 rudi Exp $ |
// |
// $Date: 2001-07-29 08:57:02 $ |
// $Revision: 1.1 $ |
// $Date: 2002-02-01 01:54:45 $ |
// $Revision: 1.2 $ |
// $Author: rudi $ |
// $Locker: $ |
// $State: Exp $ |
47,6 → 48,12
// |
// Change History: |
// $Log: not supported by cvs2svn $ |
// Revision 1.1 2001/07/29 08:57:02 rudi |
// |
// |
// 1) Changed Directory Structure |
// 2) Added restart signal (REST) |
// |
// Revision 1.2 2001/06/05 10:22:37 rudi |
// |
// |
/trunk/rtl/verilog/wb_dma_wb_slv.v
11,8 → 11,9
//// //// |
///////////////////////////////////////////////////////////////////// |
//// //// |
//// Copyright (C) 2001 Rudolf Usselmann //// |
//// rudi@asics.ws //// |
//// Copyright (C) 2000-2002 Rudolf Usselmann //// |
//// www.asics.ws //// |
//// rudi@asics.ws //// |
//// //// |
//// This source file may be used and distributed without //// |
//// restriction provided that this copyright statement is not //// |
37,10 → 38,10
|
// CVS Log |
// |
// $Id: wb_dma_wb_slv.v,v 1.3 2001-10-19 04:35:04 rudi Exp $ |
// $Id: wb_dma_wb_slv.v,v 1.4 2002-02-01 01:54:45 rudi Exp $ |
// |
// $Date: 2001-10-19 04:35:04 $ |
// $Revision: 1.3 $ |
// $Date: 2002-02-01 01:54:45 $ |
// $Revision: 1.4 $ |
// $Author: rudi $ |
// $Locker: $ |
// $State: Exp $ |
47,6 → 48,10
// |
// Change History: |
// $Log: not supported by cvs2svn $ |
// Revision 1.3 2001/10/19 04:35:04 rudi |
// |
// - Made the core parameterized |
// |
// Revision 1.2 2001/08/15 05:40:30 rudi |
// |
// - Changed IO names to be more clear. |
/trunk/rtl/verilog/wb_dma_ch_sel.v
11,8 → 11,9
//// //// |
///////////////////////////////////////////////////////////////////// |
//// //// |
//// Copyright (C) 2001 Rudolf Usselmann //// |
//// rudi@asics.ws //// |
//// Copyright (C) 2000-2002 Rudolf Usselmann //// |
//// www.asics.ws //// |
//// rudi@asics.ws //// |
//// //// |
//// This source file may be used and distributed without //// |
//// restriction provided that this copyright statement is not //// |
37,10 → 38,10
|
// CVS Log |
// |
// $Id: wb_dma_ch_sel.v,v 1.3 2001-10-19 04:35:04 rudi Exp $ |
// $Id: wb_dma_ch_sel.v,v 1.4 2002-02-01 01:54:45 rudi Exp $ |
// |
// $Date: 2001-10-19 04:35:04 $ |
// $Revision: 1.3 $ |
// $Date: 2002-02-01 01:54:45 $ |
// $Revision: 1.4 $ |
// $Author: rudi $ |
// $Locker: $ |
// $State: Exp $ |
47,6 → 48,10
// |
// Change History: |
// $Log: not supported by cvs2svn $ |
// Revision 1.3 2001/10/19 04:35:04 rudi |
// |
// - Made the core parameterized |
// |
// Revision 1.2 2001/08/15 05:40:30 rudi |
// |
// - Changed IO names to be more clear. |
/trunk/rtl/verilog/wb_dma_defines.v
11,8 → 11,9
//// //// |
///////////////////////////////////////////////////////////////////// |
//// //// |
//// Copyright (C) 2001 Rudolf Usselmann //// |
//// rudi@asics.ws //// |
//// Copyright (C) 2000-2002 Rudolf Usselmann //// |
//// www.asics.ws //// |
//// rudi@asics.ws //// |
//// //// |
//// This source file may be used and distributed without //// |
//// restriction provided that this copyright statement is not //// |
37,10 → 38,10
|
// CVS Log |
// |
// $Id: wb_dma_defines.v,v 1.4 2001-10-19 04:35:04 rudi Exp $ |
// $Id: wb_dma_defines.v,v 1.5 2002-02-01 01:54:45 rudi Exp $ |
// |
// $Date: 2001-10-19 04:35:04 $ |
// $Revision: 1.4 $ |
// $Date: 2002-02-01 01:54:45 $ |
// $Revision: 1.5 $ |
// $Author: rudi $ |
// $Locker: $ |
// $State: Exp $ |
47,6 → 48,10
// |
// Change History: |
// $Log: not supported by cvs2svn $ |
// Revision 1.4 2001/10/19 04:35:04 rudi |
// |
// - Made the core parameterized |
// |
// Revision 1.3 2001/09/07 15:34:38 rudi |
// |
// Changed reset to active high. |
/trunk/rtl/verilog/wb_dma_ch_arb.v
11,8 → 11,9
//// //// |
///////////////////////////////////////////////////////////////////// |
//// //// |
//// Copyright (C) 2001 Rudolf Usselmann //// |
//// rudi@asics.ws //// |
//// Copyright (C) 2000-2002 Rudolf Usselmann //// |
//// www.asics.ws //// |
//// rudi@asics.ws //// |
//// //// |
//// This source file may be used and distributed without //// |
//// restriction provided that this copyright statement is not //// |
37,10 → 38,10
|
// CVS Log |
// |
// $Id: wb_dma_ch_arb.v,v 1.1 2001-07-29 08:57:02 rudi Exp $ |
// $Id: wb_dma_ch_arb.v,v 1.2 2002-02-01 01:54:44 rudi Exp $ |
// |
// $Date: 2001-07-29 08:57:02 $ |
// $Revision: 1.1 $ |
// $Date: 2002-02-01 01:54:44 $ |
// $Revision: 1.2 $ |
// $Author: rudi $ |
// $Locker: $ |
// $State: Exp $ |
47,6 → 48,12
// |
// Change History: |
// $Log: not supported by cvs2svn $ |
// Revision 1.1 2001/07/29 08:57:02 rudi |
// |
// |
// 1) Changed Directory Structure |
// 2) Added restart signal (REST) |
// |
// Revision 1.4 2001/06/14 08:51:25 rudi |
// |
// |
/trunk/rtl/verilog/wb_dma_inc30r.v
11,8 → 11,9
//// //// |
///////////////////////////////////////////////////////////////////// |
//// //// |
//// Copyright (C) 2001 Rudolf Usselmann //// |
//// rudi@asics.ws //// |
//// Copyright (C) 2000-2002 Rudolf Usselmann //// |
//// www.asics.ws //// |
//// rudi@asics.ws //// |
//// //// |
//// This source file may be used and distributed without //// |
//// restriction provided that this copyright statement is not //// |
37,10 → 38,10
|
// CVS Log |
// |
// $Id: wb_dma_inc30r.v,v 1.1 2001-07-29 08:57:02 rudi Exp $ |
// $Id: wb_dma_inc30r.v,v 1.2 2002-02-01 01:54:45 rudi Exp $ |
// |
// $Date: 2001-07-29 08:57:02 $ |
// $Revision: 1.1 $ |
// $Date: 2002-02-01 01:54:45 $ |
// $Revision: 1.2 $ |
// $Author: rudi $ |
// $Locker: $ |
// $State: Exp $ |
47,6 → 48,12
// |
// Change History: |
// $Log: not supported by cvs2svn $ |
// Revision 1.1 2001/07/29 08:57:02 rudi |
// |
// |
// 1) Changed Directory Structure |
// 2) Added restart signal (REST) |
// |
// Revision 1.2 2001/06/05 10:22:37 rudi |
// |
// |
/trunk/rtl/verilog/wb_dma_ch_rf.v
11,8 → 11,9
//// //// |
///////////////////////////////////////////////////////////////////// |
//// //// |
//// Copyright (C) 2001 Rudolf Usselmann //// |
//// rudi@asics.ws //// |
//// Copyright (C) 2000-2002 Rudolf Usselmann //// |
//// www.asics.ws //// |
//// rudi@asics.ws //// |
//// //// |
//// This source file may be used and distributed without //// |
//// restriction provided that this copyright statement is not //// |
37,10 → 38,10
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// CVS Log |
// |
// $Id: wb_dma_ch_rf.v,v 1.4 2001-10-30 02:06:17 rudi Exp $ |
// $Id: wb_dma_ch_rf.v,v 1.5 2002-02-01 01:54:45 rudi Exp $ |
// |
// $Date: 2001-10-30 02:06:17 $ |
// $Revision: 1.4 $ |
// $Date: 2002-02-01 01:54:45 $ |
// $Revision: 1.5 $ |
// $Author: rudi $ |
// $Locker: $ |
// $State: Exp $ |
47,6 → 48,10
// |
// Change History: |
// $Log: not supported by cvs2svn $ |
// Revision 1.4 2001/10/30 02:06:17 rudi |
// |
// - Fixed problem where synthesis tools would instantiate latches instead of flip-flops |
// |
// Revision 1.3 2001/10/19 04:35:04 rudi |
// |
// - Made the core parameterized |