OpenCores
URL https://opencores.org/ocsvn/rise/rise/trunk

Subversion Repositories rise

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    from Rev 144 to Rev 145
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Rev 144 → Rev 145

/trunk/simulation/rise.mpf
209,39 → 209,45
Project_Version = 6
Project_DefaultLib = work
Project_SortMethod = unused
Project_Files_Count = 16
Project_Files_Count = 19
Project_File_0 = C:/Projects/RISE/vhdl/barrel.vhd
Project_File_P_0 = vhdl_novitalcheck 0 file_type vhdl group_id 0 vhdl_nodebug 0 vhdl_1164 1 vhdl_noload 0 vhdl_synth 0 vhdl_enable0In 0 folder {Top Level} last_compile 1168773985 vhdl_disableopt 0 vhdl_vital 0 vhdl_vopt 0 vhdl_warn1 1 vhdl_explicit 1 vhdl_warn2 1 vhdl_showsource 0 vhdl_warn3 1 vhdl_0InOptions {} vhdl_warn4 1 vhdl_options {} vhdl_warn5 1 ood 0 compile_to work compile_order 14 cover_nosub 0 dont_compile 0 vhdl_use93 93
Project_File_1 = C:/Projects/RISE/vhdl/tb_rise.vhd
Project_File_P_1 = vhdl_novitalcheck 0 file_type vhdl group_id 0 vhdl_nodebug 0 vhdl_1164 1 vhdl_noload 0 vhdl_synth 0 vhdl_enable0In 0 folder {Top Level} last_compile 1168985980 vhdl_disableopt 0 vhdl_vital 0 vhdl_vopt 0 vhdl_warn1 1 vhdl_explicit 1 vhdl_warn2 1 vhdl_showsource 0 vhdl_warn3 1 vhdl_0InOptions {} vhdl_warn4 1 vhdl_options {} vhdl_warn5 1 ood 0 compile_to work compile_order 11 cover_nosub 0 dont_compile 0 vhdl_use93 93
Project_File_2 = C:/Projects/rise/vhdl/rise_pack_sim.vhd
Project_File_P_2 = vhdl_novitalcheck 0 file_type vhdl group_id 0 vhdl_nodebug 0 vhdl_1164 1 vhdl_noload 0 vhdl_synth 0 vhdl_enable0In 0 folder {Top Level} last_compile 1168772314 vhdl_disableopt 0 vhdl_vital 0 vhdl_warn1 1 vhdl_vopt 0 vhdl_showsource 0 vhdl_warn2 1 vhdl_explicit 1 vhdl_0InOptions {} vhdl_warn3 1 vhdl_options {} vhdl_warn4 1 ood 0 vhdl_warn5 1 compile_to work compile_order 1 dont_compile 0 cover_nosub 0 vhdl_use93 93
Project_File_3 = C:/Projects/RISE/vhdl/rlu.vhd
Project_File_P_3 = vhdl_novitalcheck 0 file_type vhdl group_id 0 vhdl_nodebug 0 vhdl_1164 1 vhdl_noload 0 vhdl_synth 0 vhdl_enable0In 0 folder {Top Level} last_compile 1168792249 vhdl_disableopt 0 vhdl_vital 0 vhdl_warn1 1 vhdl_vopt 0 vhdl_showsource 0 vhdl_warn2 1 vhdl_explicit 1 vhdl_0InOptions {} vhdl_warn3 1 vhdl_options {} vhdl_warn4 1 ood 0 vhdl_warn5 1 compile_to work compile_order 10 dont_compile 0 cover_nosub 0 vhdl_use93 93
Project_File_4 = C:/Projects/RISE/vhdl/idmem.vhd
Project_File_P_4 = vhdl_novitalcheck 0 file_type vhdl group_id 0 vhdl_nodebug 0 vhdl_1164 1 vhdl_noload 0 vhdl_synth 0 vhdl_enable0In 0 folder {Top Level} last_compile 1168792283 vhdl_disableopt 0 vhdl_vital 0 vhdl_vopt 0 vhdl_warn1 1 vhdl_explicit 1 vhdl_warn2 1 vhdl_showsource 0 vhdl_warn3 1 vhdl_0InOptions {} vhdl_warn4 1 vhdl_options {} vhdl_warn5 1 ood 0 compile_to work compile_order 15 cover_nosub 0 dont_compile 0 vhdl_use93 93
Project_File_5 = C:/Projects/RISE/vhdl/wb_stage.vhd
Project_File_P_5 = vhdl_novitalcheck 0 file_type vhdl group_id 0 vhdl_nodebug 0 vhdl_1164 1 vhdl_noload 0 vhdl_synth 0 vhdl_enable0In 0 folder {Top Level} last_compile 1168989804 vhdl_disableopt 0 vhdl_vital 0 vhdl_vopt 0 vhdl_warn1 1 vhdl_explicit 1 vhdl_warn2 1 vhdl_showsource 0 vhdl_warn3 1 vhdl_0InOptions {} vhdl_warn4 1 vhdl_options {} vhdl_warn5 1 ood 0 compile_to work compile_order 2 cover_nosub 0 dont_compile 0 vhdl_use93 93
Project_File_6 = C:/Projects/RISE/vhdl/register_file.vhd
Project_File_P_6 = vhdl_novitalcheck 0 file_type vhdl group_id 0 vhdl_nodebug 0 vhdl_1164 1 vhdl_noload 0 vhdl_synth 0 vhdl_enable0In 0 folder {Top Level} last_compile 1168772314 vhdl_disableopt 0 vhdl_vital 0 vhdl_warn1 1 vhdl_vopt 0 vhdl_showsource 0 vhdl_warn2 1 vhdl_explicit 1 vhdl_0InOptions {} vhdl_warn3 1 vhdl_options {} vhdl_warn4 1 ood 0 vhdl_warn5 1 compile_to work compile_order 7 dont_compile 0 cover_nosub 0 vhdl_use93 93
Project_File_7 = C:/Projects/rise/vhdl/rise_const_pack.vhd
Project_File_P_7 = vhdl_novitalcheck 0 file_type vhdl group_id 0 vhdl_nodebug 0 vhdl_1164 1 vhdl_noload 0 vhdl_synth 0 vhdl_enable0In 0 folder {Top Level} last_compile 1168772314 vhdl_disableopt 0 vhdl_vital 0 vhdl_warn1 1 vhdl_vopt 0 vhdl_showsource 0 vhdl_warn2 1 vhdl_explicit 1 vhdl_0InOptions {} vhdl_warn3 1 vhdl_options {} vhdl_warn4 1 ood 0 vhdl_warn5 1 compile_to work compile_order 0 dont_compile 0 cover_nosub 0 vhdl_use93 93
Project_File_8 = C:/Projects/RISE/vhdl/ex_stage.vhd
Project_File_P_8 = vhdl_novitalcheck 0 file_type vhdl group_id 0 vhdl_nodebug 0 vhdl_1164 1 vhdl_noload 0 vhdl_synth 0 vhdl_enable0In 0 folder {Top Level} last_compile 1168987085 vhdl_disableopt 0 vhdl_vital 0 vhdl_vopt 0 vhdl_warn1 1 vhdl_explicit 1 vhdl_warn2 1 vhdl_showsource 0 vhdl_warn3 1 vhdl_0InOptions {} vhdl_warn4 1 vhdl_options {} vhdl_warn5 1 ood 0 compile_to work compile_order 12 cover_nosub 0 dont_compile 0 vhdl_use93 93
Project_File_9 = C:/Projects/RISE/vhdl/id_stage.vhd
Project_File_P_9 = vhdl_novitalcheck 0 file_type vhdl group_id 0 vhdl_nodebug 0 vhdl_1164 1 vhdl_noload 0 vhdl_synth 0 vhdl_enable0In 0 folder {Top Level} last_compile 1168989788 vhdl_disableopt 0 vhdl_vital 0 vhdl_warn1 1 vhdl_vopt 0 vhdl_showsource 0 vhdl_warn2 1 vhdl_explicit 1 vhdl_0InOptions {} vhdl_warn3 1 vhdl_options {} vhdl_warn4 1 ood 0 vhdl_warn5 1 compile_to work compile_order 13 dont_compile 0 cover_nosub 0 vhdl_use93 93
Project_File_10 = C:/Projects/RISE/vhdl/imem.vhd
Project_File_P_10 = vhdl_novitalcheck 0 file_type vhdl group_id 0 vhdl_nodebug 0 vhdl_1164 1 vhdl_noload 0 vhdl_synth 0 vhdl_enable0In 0 folder {Top Level} last_compile 1168985980 vhdl_disableopt 0 vhdl_vital 0 vhdl_vopt 0 vhdl_warn1 1 vhdl_explicit 1 vhdl_warn2 1 vhdl_showsource 0 vhdl_warn3 1 vhdl_0InOptions {} vhdl_warn4 1 vhdl_options {} vhdl_warn5 1 ood 0 compile_to work compile_order 5 cover_nosub 0 dont_compile 0 vhdl_use93 93
Project_File_11 = C:/Projects/RISE/vhdl/rise_pack.vhd
Project_File_P_11 = vhdl_novitalcheck 0 file_type vhdl group_id 0 vhdl_nodebug 0 vhdl_1164 1 vhdl_noload 0 vhdl_synth 0 vhdl_enable0In 0 folder {Top Level} last_compile 1168772314 vhdl_disableopt 0 vhdl_vital 0 vhdl_warn1 1 vhdl_vopt 0 vhdl_showsource 0 vhdl_warn2 1 vhdl_explicit 1 vhdl_0InOptions {} vhdl_warn3 1 vhdl_options {} vhdl_warn4 1 ood 0 vhdl_warn5 1 compile_to work compile_order 9 dont_compile 0 cover_nosub 0 vhdl_use93 93
Project_File_12 = C:/Projects/RISE/vhdl/if_stage.vhd
Project_File_P_12 = vhdl_novitalcheck 0 file_type vhdl group_id 0 vhdl_nodebug 0 vhdl_1164 1 vhdl_noload 0 vhdl_synth 0 vhdl_enable0In 0 folder {Top Level} last_compile 1168987162 vhdl_disableopt 0 vhdl_vital 0 vhdl_vopt 0 vhdl_warn1 1 vhdl_explicit 1 vhdl_warn2 1 vhdl_showsource 0 vhdl_warn3 1 vhdl_0InOptions {} vhdl_warn4 1 vhdl_options {} vhdl_warn5 1 ood 0 compile_to work compile_order 4 cover_nosub 0 dont_compile 0 vhdl_use93 93
Project_File_13 = C:/Projects/RISE/vhdl/mem_stage.vhd
Project_File_P_13 = vhdl_novitalcheck 0 file_type vhdl group_id 0 vhdl_nodebug 0 vhdl_1164 1 vhdl_noload 0 vhdl_synth 0 vhdl_enable0In 0 folder {Top Level} last_compile 1168985586 vhdl_disableopt 0 vhdl_vital 0 vhdl_vopt 0 vhdl_warn1 1 vhdl_explicit 1 vhdl_warn2 1 vhdl_showsource 0 vhdl_warn3 1 vhdl_0InOptions {} vhdl_warn4 1 vhdl_options {} vhdl_warn5 1 ood 0 compile_to work compile_order 6 cover_nosub 0 dont_compile 0 vhdl_use93 93
Project_File_14 = C:/Projects/RISE/vhdl/dmem.vhd
Project_File_P_14 = vhdl_novitalcheck 0 file_type vhdl group_id 0 vhdl_nodebug 0 vhdl_1164 1 vhdl_noload 0 vhdl_synth 0 vhdl_enable0In 0 folder {Top Level} last_compile 1168985980 vhdl_disableopt 0 vhdl_vital 0 vhdl_vopt 0 vhdl_warn1 1 vhdl_explicit 1 vhdl_warn2 1 vhdl_showsource 0 vhdl_warn3 1 vhdl_0InOptions {} vhdl_warn4 1 vhdl_options {} vhdl_warn5 1 ood 0 compile_to work compile_order 3 cover_nosub 0 dont_compile 0 vhdl_use93 93
Project_File_15 = C:/Projects/RISE/vhdl/rise.vhd
Project_File_P_15 = vhdl_novitalcheck 0 file_type vhdl group_id 0 vhdl_nodebug 0 vhdl_1164 1 vhdl_noload 0 vhdl_synth 0 vhdl_enable0In 0 folder {Top Level} last_compile 1168985980 vhdl_disableopt 0 vhdl_vital 0 vhdl_vopt 0 vhdl_warn1 1 vhdl_explicit 1 vhdl_warn2 1 vhdl_showsource 0 vhdl_warn3 1 vhdl_0InOptions {} vhdl_warn4 1 vhdl_options {} vhdl_warn5 1 ood 0 compile_to work compile_order 8 cover_nosub 0 dont_compile 0 vhdl_use93 93
Project_File_P_0 = vhdl_novitalcheck 0 file_type vhdl group_id 0 vhdl_nodebug 0 vhdl_1164 1 vhdl_noload 0 vhdl_synth 0 vhdl_enable0In 0 folder {Top Level} last_compile 1168773985 vhdl_disableopt 0 vhdl_vital 0 vhdl_warn1 1 vhdl_vopt 0 vhdl_showsource 0 vhdl_warn2 1 vhdl_explicit 1 vhdl_0InOptions {} vhdl_warn3 1 vhdl_options {} vhdl_warn4 1 ood 0 vhdl_warn5 1 compile_to work compile_order 8 dont_compile 0 cover_nosub 0 vhdl_use93 93
Project_File_1 = C:/Projects/RISE/vhdl/rise_pack_sim.vhd
Project_File_P_1 = vhdl_novitalcheck 0 file_type vhdl group_id 0 vhdl_nodebug 0 vhdl_1164 1 vhdl_noload 0 vhdl_synth 0 vhdl_enable0In 0 folder {Top Level} last_compile 1168772314 vhdl_disableopt 0 vhdl_vital 0 vhdl_vopt 0 vhdl_warn1 1 vhdl_explicit 1 vhdl_warn2 1 vhdl_showsource 0 vhdl_warn3 1 vhdl_0InOptions {} vhdl_warn4 1 vhdl_options {} vhdl_warn5 1 ood 0 compile_to work compile_order 18 cover_nosub 0 dont_compile 0 vhdl_use93 93
Project_File_2 = C:/Projects/RISE/vhdl/sc_uart.vhd
Project_File_P_2 = vhdl_novitalcheck 0 file_type vhdl group_id 0 vhdl_nodebug 0 vhdl_1164 1 vhdl_noload 0 vhdl_synth 0 vhdl_enable0In 0 folder {Top Level} last_compile 1169751074 vhdl_disableopt 0 vhdl_vital 0 vhdl_warn1 1 vhdl_vopt 0 vhdl_showsource 0 vhdl_warn2 1 vhdl_explicit 1 vhdl_0InOptions {} vhdl_warn3 1 vhdl_options {} vhdl_warn4 1 ood 0 vhdl_warn5 1 compile_to work compile_order 6 dont_compile 0 cover_nosub 0 vhdl_use93 93
Project_File_3 = C:/Projects/RISE/vhdl/tb_rise_uart.vhd
Project_File_P_3 = vhdl_novitalcheck 0 file_type vhdl group_id 0 vhdl_nodebug 0 vhdl_1164 1 vhdl_noload 0 vhdl_synth 0 vhdl_enable0In 0 folder {Top Level} last_compile 1169752657 vhdl_disableopt 0 vhdl_vital 0 vhdl_vopt 0 vhdl_warn1 1 vhdl_explicit 1 vhdl_warn2 1 vhdl_showsource 0 vhdl_warn3 1 vhdl_0InOptions {} vhdl_warn4 1 vhdl_options {} vhdl_warn5 1 ood 0 compile_to work compile_order 17 cover_nosub 0 dont_compile 0 vhdl_use93 93
Project_File_4 = C:/Projects/RISE/vhdl/rlu.vhd
Project_File_P_4 = vhdl_novitalcheck 0 file_type vhdl group_id 0 vhdl_nodebug 0 vhdl_1164 1 vhdl_noload 0 vhdl_synth 0 vhdl_enable0In 0 folder {Top Level} last_compile 1168792249 vhdl_disableopt 0 vhdl_vital 0 vhdl_warn1 1 vhdl_vopt 0 vhdl_showsource 0 vhdl_warn2 1 vhdl_explicit 1 vhdl_0InOptions {} vhdl_warn3 1 vhdl_options {} vhdl_warn4 1 ood 0 vhdl_warn5 1 compile_to work compile_order 5 dont_compile 0 cover_nosub 0 vhdl_use93 93
Project_File_5 = C:/Projects/RISE/vhdl/register_file.vhd
Project_File_P_5 = vhdl_novitalcheck 0 file_type vhdl group_id 0 vhdl_nodebug 0 vhdl_1164 1 vhdl_noload 0 vhdl_synth 0 vhdl_enable0In 0 folder {Top Level} last_compile 1168772314 vhdl_disableopt 0 vhdl_vital 0 vhdl_warn1 1 vhdl_vopt 0 vhdl_showsource 0 vhdl_warn2 1 vhdl_explicit 1 vhdl_0InOptions {} vhdl_warn3 1 vhdl_options {} vhdl_warn4 1 ood 0 vhdl_warn5 1 compile_to work compile_order 15 dont_compile 0 cover_nosub 0 vhdl_use93 93
Project_File_6 = C:/Projects/RISE/vhdl/idmem.vhd
Project_File_P_6 = vhdl_novitalcheck 0 file_type vhdl group_id 0 vhdl_nodebug 0 vhdl_1164 1 vhdl_noload 0 vhdl_synth 0 vhdl_enable0In 0 folder {Top Level} last_compile 1169751074 vhdl_disableopt 0 vhdl_vital 0 vhdl_warn1 1 vhdl_vopt 0 vhdl_showsource 0 vhdl_warn2 1 vhdl_explicit 1 vhdl_0InOptions {} vhdl_warn3 1 vhdl_options {} vhdl_warn4 1 ood 0 vhdl_warn5 1 compile_to work compile_order 2 dont_compile 0 cover_nosub 0 vhdl_use93 93
Project_File_7 = C:/Projects/RISE/vhdl/fifo.vhd
Project_File_P_7 = vhdl_novitalcheck 0 file_type vhdl group_id 0 vhdl_nodebug 0 vhdl_1164 1 vhdl_noload 0 vhdl_synth 0 vhdl_enable0In 0 folder {Top Level} last_compile 1169751074 vhdl_disableopt 0 vhdl_vital 0 vhdl_warn1 1 vhdl_vopt 0 vhdl_showsource 0 vhdl_warn2 1 vhdl_explicit 1 vhdl_0InOptions {} vhdl_warn3 1 vhdl_options {} vhdl_warn4 1 ood 0 vhdl_warn5 1 compile_to work compile_order 1 dont_compile 0 cover_nosub 0 vhdl_use93 93
Project_File_8 = C:/Projects/RISE/vhdl/wb_stage.vhd
Project_File_P_8 = vhdl_novitalcheck 0 file_type vhdl group_id 0 vhdl_nodebug 0 vhdl_1164 1 vhdl_noload 0 vhdl_synth 0 vhdl_enable0In 0 folder {Top Level} last_compile 1169751074 vhdl_disableopt 0 vhdl_vital 0 vhdl_warn1 1 vhdl_vopt 0 vhdl_showsource 0 vhdl_warn2 1 vhdl_explicit 1 vhdl_0InOptions {} vhdl_warn3 1 vhdl_options {} vhdl_warn4 1 ood 0 vhdl_warn5 1 compile_to work compile_order 7 dont_compile 0 cover_nosub 0 vhdl_use93 93
Project_File_9 = C:/Projects/RISE/examples/uart_complex.vhd
Project_File_P_9 = vhdl_novitalcheck 0 file_type vhdl group_id 0 vhdl_nodebug 0 vhdl_1164 1 vhdl_noload 0 vhdl_synth 0 vhdl_enable0In 0 folder {Top Level} last_compile 1169750077 vhdl_disableopt 0 vhdl_vital 0 vhdl_warn1 1 vhdl_vopt 0 vhdl_showsource 0 vhdl_warn2 1 vhdl_explicit 1 vhdl_0InOptions {} vhdl_warn3 1 vhdl_options {} vhdl_warn4 1 ood 0 vhdl_warn5 1 compile_to work compile_order 0 dont_compile 0 cover_nosub 0 vhdl_use93 93
Project_File_10 = C:/Projects/RISE/vhdl/rise_const_pack.vhd
Project_File_P_10 = vhdl_novitalcheck 0 file_type vhdl group_id 0 vhdl_nodebug 0 vhdl_1164 1 vhdl_noload 0 vhdl_synth 0 vhdl_enable0In 0 folder {Top Level} last_compile 1168772314 vhdl_disableopt 0 vhdl_vital 0 vhdl_warn1 1 vhdl_vopt 0 vhdl_showsource 0 vhdl_warn2 1 vhdl_explicit 1 vhdl_0InOptions {} vhdl_warn3 1 vhdl_options {} vhdl_warn4 1 ood 0 vhdl_warn5 1 compile_to work compile_order 3 dont_compile 0 cover_nosub 0 vhdl_use93 93
Project_File_11 = C:/Projects/RISE/vhdl/ex_stage.vhd
Project_File_P_11 = vhdl_novitalcheck 0 file_type vhdl group_id 0 vhdl_nodebug 0 vhdl_1164 1 vhdl_noload 0 vhdl_synth 0 vhdl_enable0In 0 folder {Top Level} last_compile 1168987085 vhdl_disableopt 0 vhdl_vital 0 vhdl_warn1 1 vhdl_vopt 0 vhdl_showsource 0 vhdl_warn2 1 vhdl_explicit 1 vhdl_0InOptions {} vhdl_warn3 1 vhdl_options {} vhdl_warn4 1 ood 0 vhdl_warn5 1 compile_to work compile_order 10 dont_compile 0 cover_nosub 0 vhdl_use93 93
Project_File_12 = C:/Projects/RISE/vhdl/imem.vhd
Project_File_P_12 = vhdl_novitalcheck 0 file_type vhdl group_id 0 vhdl_nodebug 0 vhdl_1164 1 vhdl_noload 0 vhdl_synth 0 vhdl_enable0In 0 folder {Top Level} last_compile 1168985980 vhdl_disableopt 0 vhdl_vital 0 vhdl_warn1 1 vhdl_vopt 0 vhdl_showsource 0 vhdl_warn2 1 vhdl_explicit 1 vhdl_0InOptions {} vhdl_warn3 1 vhdl_options {} vhdl_warn4 1 ood 0 vhdl_warn5 1 compile_to work compile_order 13 dont_compile 0 cover_nosub 0 vhdl_use93 93
Project_File_13 = C:/Projects/RISE/vhdl/id_stage.vhd
Project_File_P_13 = vhdl_novitalcheck 0 file_type vhdl group_id 0 vhdl_nodebug 0 vhdl_1164 1 vhdl_noload 0 vhdl_synth 0 vhdl_enable0In 0 folder {Top Level} last_compile 1169070455 vhdl_disableopt 0 vhdl_vital 0 vhdl_warn1 1 vhdl_vopt 0 vhdl_showsource 0 vhdl_warn2 1 vhdl_explicit 1 vhdl_0InOptions {} vhdl_warn3 1 vhdl_options {} vhdl_warn4 1 ood 0 vhdl_warn5 1 compile_to work compile_order 11 dont_compile 0 cover_nosub 0 vhdl_use93 93
Project_File_14 = C:/Projects/RISE/vhdl/rise_pack.vhd
Project_File_P_14 = vhdl_novitalcheck 0 file_type vhdl group_id 0 vhdl_nodebug 0 vhdl_1164 1 vhdl_noload 0 vhdl_synth 0 vhdl_enable0In 0 folder {Top Level} last_compile 1169751074 vhdl_disableopt 0 vhdl_vital 0 vhdl_warn1 1 vhdl_vopt 0 vhdl_showsource 0 vhdl_warn2 1 vhdl_explicit 1 vhdl_0InOptions {} vhdl_warn3 1 vhdl_options {} vhdl_warn4 1 ood 0 vhdl_warn5 1 compile_to work compile_order 4 dont_compile 0 cover_nosub 0 vhdl_use93 93
Project_File_15 = C:/Projects/RISE/vhdl/if_stage.vhd
Project_File_P_15 = vhdl_novitalcheck 0 file_type vhdl group_id 0 vhdl_nodebug 0 vhdl_1164 1 vhdl_noload 0 vhdl_synth 0 vhdl_enable0In 0 folder {Top Level} last_compile 1169751074 vhdl_disableopt 0 vhdl_vital 0 vhdl_vopt 0 vhdl_warn1 1 vhdl_explicit 1 vhdl_warn2 1 vhdl_showsource 0 vhdl_warn3 1 vhdl_0InOptions {} vhdl_warn4 1 vhdl_options {} vhdl_warn5 1 ood 1 compile_to work compile_order 12 cover_nosub 0 dont_compile 0 vhdl_use93 93
Project_File_16 = C:/Projects/RISE/vhdl/mem_stage.vhd
Project_File_P_16 = vhdl_novitalcheck 0 file_type vhdl group_id 0 vhdl_nodebug 0 vhdl_1164 1 vhdl_noload 0 vhdl_synth 0 vhdl_enable0In 0 folder {Top Level} last_compile 1169751074 vhdl_disableopt 0 vhdl_vital 0 vhdl_warn1 1 vhdl_vopt 0 vhdl_showsource 0 vhdl_warn2 1 vhdl_explicit 1 vhdl_0InOptions {} vhdl_warn3 1 vhdl_options {} vhdl_warn4 1 ood 0 vhdl_warn5 1 compile_to work compile_order 14 dont_compile 0 cover_nosub 0 vhdl_use93 93
Project_File_17 = C:/Projects/RISE/vhdl/dmem.vhd
Project_File_P_17 = vhdl_novitalcheck 0 file_type vhdl group_id 0 vhdl_nodebug 0 vhdl_1164 1 vhdl_noload 0 vhdl_synth 0 vhdl_enable0In 0 folder {Top Level} last_compile 1169751074 vhdl_disableopt 0 vhdl_vital 0 vhdl_warn1 1 vhdl_vopt 0 vhdl_showsource 0 vhdl_warn2 1 vhdl_explicit 1 vhdl_0InOptions {} vhdl_warn3 1 vhdl_options {} vhdl_warn4 1 ood 0 vhdl_warn5 1 compile_to work compile_order 9 dont_compile 0 cover_nosub 0 vhdl_use93 93
Project_File_18 = C:/Projects/RISE/vhdl/rise.vhd
Project_File_P_18 = vhdl_novitalcheck 0 file_type vhdl group_id 0 vhdl_nodebug 0 vhdl_1164 1 vhdl_noload 0 vhdl_synth 0 vhdl_enable0In 0 folder {Top Level} last_compile 1169751074 vhdl_disableopt 0 vhdl_vital 0 vhdl_warn1 1 vhdl_vopt 0 vhdl_showsource 0 vhdl_warn2 1 vhdl_explicit 1 vhdl_0InOptions {} vhdl_warn3 1 vhdl_options {} vhdl_warn4 1 ood 0 vhdl_warn5 1 compile_to work compile_order 16 dont_compile 0 cover_nosub 0 vhdl_use93 93
Project_Sim_Count = 1
Project_Sim_0 = RISE TB
Project_Sim_P_0 = Generics {} timing default -std_output {} -nopsl 0 +notimingchecks 0 -L {} selected_du {} -hazards 0 -sdf {} ok 1 folder {Top Level} -0in 0 -nosva 0 -absentisempty 0 +pulse_r {} -multisource_delay {} OtherArgs {} +pulse_e {} -t default -vital2.2b 0 +plusarg {} -sdfnoerror 0 -coverage 0 vopt_env 0 is_vopt_flow 0 -memprof 0 additional_dus work.tb_rise_vhd -nofileshare 0 -noglitch 0 +no_pulse_msg 0 -assertdebug 0 -wlf {} -std_input {} -Lf {} -sdfnowarn 0 -assertfile {} -0in_options {}
273,6 → 279,6
XML_CustomDoubleClick =
LOGFILE_DoubleClick = Edit
LOGFILE_CustomDoubleClick =
EditorState = {tabbed horizontal 1} {C:/Projects/RISE/vhdl/mem_stage.vhd 0 1} {C:/Projects/RISE/vhdl/rise.vhd 0 0} {C:/Projects/RISE/vhdl/id_stage.vhd 0 0} {C:/Projects/RISE/vhdl/dmem.vhd 0 0} {C:/Projects/RISE/vhdl/wb_stage.vhd 0 0} {C:/Projects/RISE/vhdl/ex_stage.vhd 0 0} {C:/Projects/RISE/vhdl/tb_rise.vhd 0 0} {C:/Projects/RISE/vhdl/if_stage.vhd 0 0} {C:/Projects/RISE/vhdl/barrel.vhd 0 0} {C:/Projects/RISE/vhdl/idmem.vhd 0 0}
EditorState = {tabbed horizontal 1} {C:/Projects/RISE/vhdl/mem_stage.vhd 0 0} {C:/Projects/RISE/vhdl/rise.vhd 0 0} {C:/Projects/RISE/vhdl/id_stage.vhd 0 0} {C:/Projects/RISE/vhdl/dmem.vhd 0 0} {C:/Projects/RISE/vhdl/wb_stage.vhd 0 0} {C:/Projects/RISE/vhdl/ex_stage.vhd 0 0} {C:/Projects/RISE/vhdl/tb_rise.vhd 0 0} {C:/Projects/RISE/vhdl/if_stage.vhd 0 0} {C:/Projects/RISE/vhdl/barrel.vhd 0 0} {C:/Projects/RISE/vhdl/idmem.vhd 0 0} {C:/Projects/RISE/examples/demo.vhd 0 0} {C:/Projects/RISE/vhdl/tb_rise_uart.vhd 0 0} {C:/Projects/RISE/examples/uart_complex.vhd 0 1}
Project_Major_Version = 6
Project_Minor_Version = 1

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