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URL https://opencores.org/ocsvn/or1k/or1k/trunk

Subversion Repositories or1k

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  • This comparison shows the changes necessary to convert path 
    /
    from Rev 1454 to Rev 1455
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  •

Rev 1454 → Rev 1455

/trunk/or1ksim/sim-config.h
190,7 → 190,6
int init; /* Whether we are still initilizing sim */
int script_file_specified; /* Whether script file was already loaded */
char *filename; /* Original Command Simulator file (CZ) */
int output_cfg; /* Whether sim is to output cfg files */
char script_fn[STR_SIZE]; /* Script file read */
int iprompt; /* Interactive prompt */
int cont_run; /* Continuos run versus single
/trunk/or1ksim/toplevel.c
68,7 → 68,7
#include "cuc.h"
 
/* CVS revision number. */
const char rcsrev[] = "$Revision: 1.123 $";
const char rcsrev[] = "$Revision: 1.124 $";
 
inline void debug(int level, const char *format, ...)
{
385,8 → 385,6
PRINTF(" -f or --file load script file [sim.cfg]\n");
PRINTF(" --enable-profile enable profiling.\n");
PRINTF(" --enable-mprofile enable memory profiling.\n");
PRINTF(" --output-cfg prints C structure of current\n");
PRINTF(" configuration to standard output\n");
PRINTF("\nor : %s ", argv[0]);
mp_help ();
PRINTF("\nor : %s ", argv[0]);
404,10 → 402,6
if (!runtime.sim.script_file_specified && config.sim.verbose)
fprintf (stderr, "WARNING: No config file read, assuming default configuration.\n");
if (runtime.sim.output_cfg) {
output_cfg (stdout);
exit (0);
}
print_config();
sim_init ();
signal(SIGINT, ctrl_c);
/trunk/or1ksim/sim-config.c
225,10 → 225,6
runtime.simcmd.mprofile = 1;
argv++; argc--;
} else
if (strcmp(*argv, "--output-cfg") == 0) {
runtime.sim.output_cfg = 1;
argv++; argc--;
} else
if (strcmp(*argv, "-d") == 0) {
parse_dbchs(*(++argv));
argv++; argc -= 2;
740,7 → 736,7
sprintf(ctmp, "%s/.or1k/%s", home, filename);
if ((f = fopen (filename, "rt")) != NULL
|| home != NULL && !(local = 0) && (f = fopen (ctmp, "rt")) != NULL) {
if (config.sim.verbose && !runtime.sim.output_cfg)
if (config.sim.verbose)
PRINTF ("Reading script file from '%s'...\n", local ? filename : ctmp);
strcpy (runtime.sim.script_fn, local ? filename : ctmp);
 
880,69 → 876,3
}
}
 
/* Outputs C structure of current config to file */
void output_cfg (FILE *f)
{
int i, comma;
fprintf (f, "/* This file was automatically generated by or1ksim,\n"
" using --output-cfg switch (cfg file '%s'). */\n"
"const static struct config config = {\n", runtime.sim.script_fn);
fprintf (f, " tick:{enabled:%i},\n", config.tick.enabled);
 
fprintf (f, " memory:{pattern:%i, random_seed:%i, type:%s, nmemories:%i, table:{", config.memory.pattern, config.memory.random_seed,
config.memory.type == MT_UNKNOWN ? "MT_UNKNOWN" : config.memory.type == MT_PATTERN ? "MT_PATTERN" : "MT_RANDOM", config.memory.nmemories);
comma = 0;
for (i = 0; i < config.memory.nmemories; i++) {
fprintf (f, "%s\n {ce:%i, baseaddr:0x%08lx, size:0x%08lx, name:\"%s\", log:\"%s\", delayr:%i, delayw:%i}",
comma ? "," :"", config.memory.table[i].ce, config.memory.table[i].baseaddr, config.memory.table[i].size, config.memory.table[i].name,
config.memory.table[i].log, config.memory.table[i].delayr, config.memory.table[i].delayw);
comma = 1;
}
fprintf (f, "}},\n");
fprintf (f, " immu:{enabled:%i, nways:%i, nsets:%i, pagesize:%i, entrysize:%i, ustates:%i, missdelay:%i, hitdelay:%i},\n",
config.immu.enabled, config.immu.nways, config.immu.nsets, config.immu.pagesize, config.immu.entrysize, config.immu.ustates,
config.immu.missdelay, config.immu.hitdelay);
fprintf (f, " dmmu:{enabled:%i, nways:%i, nsets:%i, pagesize:%i, entrysize:%i, ustates:%i, missdelay:%i, hitdelay:%i},\n",
config.dmmu.enabled, config.dmmu.nways, config.dmmu.nsets, config.dmmu.pagesize, config.dmmu.entrysize, config.dmmu.ustates,
config.dmmu.missdelay, config.dmmu.hitdelay);
 
fprintf (f, " ic:{enabled:%i, nways:%i, nsets:%i, blocksize:%i, ustates:%i, missdelay:%i, hitdelay:%i},\n",
config.ic.enabled, config.ic.nways, config.ic.nsets, config.ic.blocksize, config.ic.ustates,
config.ic.missdelay, config.ic.hitdelay);
 
fprintf (f, " dc:{enabled:%i, nways:%i, nsets:%i, blocksize:%i, ustates:%i,\n"
" load_missdelay:%i, load_hitdelay:%i, store_missdelay:%i, store_hitdelay:%i},\n",
config.dc.enabled, config.dc.nways, config.dc.nsets, config.dc.blocksize, config.dc.ustates,
config.dc.load_missdelay, config.dc.load_hitdelay, config.dc.store_missdelay, config.dc.store_hitdelay);
 
fprintf (f, " bpb:{enabled:%i, sbp_bnf_fwd:%i, sbp_bf_fwd:%i, btic:%i, missdelay:%i, hitdelay:%i},\n",
config.bpb.enabled, config.bpb.sbp_bnf_fwd, config.bpb.sbp_bf_fwd, config.bpb.btic, config.bpb.missdelay, config.bpb.hitdelay);
 
fprintf (f, " cpu:{upr:0x%08lx, ver:0x%04lx, rev:0x%04lx, superscalar:%i, hazards:%i, dependstats:%i,\n"
" sr:0x%08x},\n",
config.cpu.upr, config.cpu.ver, config.cpu.rev, config.cpu.superscalar, config.cpu.hazards, config.cpu.dependstats,
config.cpu.sr);
fprintf (f, " sim:{debug:%i, verbose:%i, profile:%i, prof_fn:\"%s\", mprofile:%i, mprof_fn:\"%s\",\n",
config.sim.debug, config.sim.verbose, config.sim.profile, config.sim.prof_fn, config.sim.mprofile, config.sim.mprof_fn);
fprintf (f, " history:%i, exe_log:%i, exe_log_fn:\"%s\", clkcycle_ps:%li,\n",
config.sim.history, config.sim.exe_log, config.sim.exe_log_fn, config.sim.clkcycle_ps);
 
fprintf (f, " spr_log:%i, spr_log_fn:\"%s\"},\n",
config.sim.spr_log, config.sim.spr_log_fn);
 
fprintf (f, " debug:{enabled:%i, gdb_enabled:%i, server_port:%i, vapi_id:0x%08lx},\n",
config.debug.enabled, config.debug.gdb_enabled, config.debug.server_port, config.debug.vapi_id);
fprintf (f, " vapi:{enabled:%i, server_port:%i, log_enabled:%i, hide_device_id:%i, vapi_fn:\"%s\"},\n",
config.vapi.enabled, config.vapi.server_port, config.vapi.log_enabled, config.vapi.hide_device_id, config.vapi.vapi_fn);
fprintf (f, " pm:{enabled:%i}\n",
config.pm.enabled);
 
fprintf (f, "};\n");
}

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