OpenCores
URL https://opencores.org/ocsvn/or1k/or1k/trunk

Subversion Repositories or1k

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  • This comparison shows the changes necessary to convert path
    /
    from Rev 1466 to Rev 1467
    Reverse comparison

Rev 1466 → Rev 1467

/trunk/or1ksim/peripheral/dma.c
124,13 → 124,6
 
addr -= dma->baseaddr;
 
if ( addr % 4 != 0 ) {
fprintf( stderr, "dma_read32( 0x%"PRIxADDR" ): Not register-aligned\n",
addr + dma->baseaddr );
runtime.sim.cont_run = 0;
return 0;
}
 
if ( addr < DMA_CH_BASE ) {
/* case of global (not per-channel) registers */
switch( addr ) {
142,7 → 135,6
default:
fprintf( stderr, "dma_read32( 0x%"PRIxADDR" ): Illegal register\n",
addr + dma->baseaddr );
runtime.sim.cont_run = 0;
return 0;
}
} else {
187,12 → 179,6
 
addr -= dma->baseaddr;
 
if ( addr % 4 != 0 ) {
fprintf( stderr, "dma_write32( 0x%"PRIxADDR", 0x%08"PRIx32" ): Not register-aligned\n", addr + dma->baseaddr, value );
runtime.sim.cont_run = 0;
return;
}
 
/* case of global (not per-channel) registers */
if ( addr < DMA_CH_BASE ) {
switch( addr ) {
208,7 → 194,6
default:
fprintf( stderr, "dma_write32( 0x%"PRIxADDR" ): Illegal register\n",
addr + dma->baseaddr );
runtime.sim.cont_run = 0;
return;
}
} else {
/trunk/or1ksim/peripheral/vga.c
72,7 → 72,6
vga->palette[1][addr - VGA_CLUTB] = value & 0x00ffffff;
} else {
fprintf( stderr, "vga_write32( 0x%"PRIxADDR", 0x%08"PRIx32" ): Out of range\n", addr + vga->baseaddr, value);
runtime.sim.cont_run = 0;
return;
}
break;
101,7 → 100,6
return vga->palette[1][addr - VGA_CLUTB];
} else {
fprintf( stderr, "vga_read32( 0x%"PRIxADDR" ): Out of range\n", addr);
runtime.sim.cont_run = 0;
return 0;
}
break;

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