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URL https://opencores.org/ocsvn/iso7816_3_master/iso7816_3_master/trunk

Subversion Repositories iso7816_3_master

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    from Rev 15 to Rev 16
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Rev 15 → Rev 16

/iso7816_3_master/trunk/test/ComTxDriverTasks.v
29,7 → 29,7
NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
`default_nettype none
 
`include "HexStringConversion.v"
 
//low level tasks
/iso7816_3_master/trunk/test/ComDriverTasks.v
29,10 → 29,10
NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
`default_nettype none
`include "ComRxDriverTasks.v"
`include "ComTxDriverTasks.v"
 
`include "ComRxDriverTasks.v"
`include "ComTxDriverTasks.v"
 
task waitEndOfRun;
begin
@(posedge COM_clk)
/iso7816_3_master/trunk/sources/RxCore.v
32,7 → 32,16
`default_nettype none
`timescale 1ns / 1ps
 
module RxCore(
module RxCore
#(//parameters to override
parameter CLOCK_PER_BIT_WIDTH = 13, //allow to support default speed of ISO7816
parameter PRECISE_STOP_BIT = 0, //if 1, stopBit signal goes high exactly at start of stop bit instead of middle of parity bit
//default conventions (nothing to do with iso7816's convention, this is configured dynamically by the inputs)
parameter START_BIT = 1'b0,
parameter STOP_BIT1 = 1'b1,
parameter STOP_BIT2 = 1'b1
)
(
output reg [7:0] dataOut,
output reg overrunErrorFlag, //new data has been received before dataOut was read
output reg dataOutReadyFlag, //new data available
59,15 → 68,6
input wire [CLOCK_PER_BIT_WIDTH-1:0] bitClocksCounter
);
 
//parameters to override
parameter CLOCK_PER_BIT_WIDTH = 13; //allow to support default speed of ISO7816
parameter PRECISE_STOP_BIT = 0; //if 1, stopBit signal goes high exactly at start of stop bit instead of middle of parity bit
 
//default conventions
parameter START_BIT = 1'b0;
parameter STOP_BIT1 = 1'b1;
parameter STOP_BIT2 = 1'b1;
 
//constant definition for states
localparam IDLE_STATE = 3'b000;
localparam START_STATE = 3'b001;

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