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URL https://opencores.org/ocsvn/m1_core/m1_core/trunk

Subversion Repositories m1_core

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    from Rev 15 to Rev 16
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Rev 15 → Rev 16

/trunk/hdl/rtl/m1_cpu/m1_cpu.v
233,7 → 233,7
// Wires connected to the Divider module instance
wire[31:0] div_a_i = id_ex_alu_a;
wire[31:0] div_b_i = id_ex_alu_b;
wire div_signed_i;
wire div_signed_i = id_ex_alu_signed;
wire[31:0] div_quotient_o;
wire[31:0] div_remainder_o;
reg div_req_i; // Alternating Bit Protocol (ABP) request must be stored
288,8 → 288,8
SysCon[24] <= 0; SysCon[25] <= 0; SysCon[26] <= 0; SysCon[27] <= 0; SysCon[28] <= 0; SysCon[29] <= 0; SysCon[30] <= 0; SysCon[31] <= 0;
 
// Initialize ABP requests to instantiated modules
mul_req_i <= 0;
div_req_i <= 0;
mul_req_i = 0;
div_req_i = 0;
 
// Latch 1: IF/ID
if_id_opcode <= `NOP;
1907,7 → 1907,11
end else begin
 
$display("INFO: CPU(%m)-MEM: Propagating value %X", ex_mem_aluout);
mem_wb_value <= ex_mem_aluout;
if(ex_mem_desthi) begin // Swap halves
mem_wb_value[63:32] <= ex_mem_aluout[31:0];
mem_wb_value[31:0] <= ex_mem_aluout[63:32];
end else // Default case
mem_wb_value <= ex_mem_aluout;
 
end
 

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