URL
https://opencores.org/ocsvn/rise/rise/trunk
Subversion Repositories rise
Compare Revisions
- This comparison shows the changes necessary to convert path
/
- from Rev 15 to Rev 16
- ↔ Reverse comparison
Rev 15 → Rev 16
/trunk/vhdl/rise.vhd
48,8 → 48,10
signal rz_sig : REGISTER_T; |
signal sr_id_sig : SR_REGISTER_T; |
signal lock_register_sig : LOCK_REGISTER_T; |
signal set_reg_lock_sig : std_logic; |
signal lock_reg_addr_sig : REGISTER_ADDR_T; |
signal set_reg_lock0_sig : std_logic; |
signal lock_reg_addr0_sig : REGISTER_ADDR_T; |
signal set_reg_lock1_sig : std_logic; |
signal lock_reg_addr1_sig : REGISTER_ADDR_T; |
signal stall_in_id_sig : std_logic; |
signal stall_out_id_sig : std_logic; |
signal clear_in_id_sig : std_logic; |
72,7 → 74,8
signal lr_sig : PC_REGISTER_T; |
signal sr_wb_sig : SR_REGISTER_T; |
signal clear_out_wb_sig : std_logic; |
signal clear_reg_lock_sig : std_logic; |
signal clear_reg_lock0_sig : std_logic; |
signal clear_reg_lock1_sig : std_logic; |
-- imem signals |
signal data_in_imem_sig : MEM_DATA_T; -- unused at the moment |
|
106,7 → 109,7
rx_addr : out REGISTER_ADDR_T; |
ry_addr : out REGISTER_ADDR_T; |
rz_addr : out REGISTER_ADDR_T; |
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rx : in REGISTER_T; |
ry : in REGISTER_T; |
rz : in REGISTER_T; |
113,9 → 116,11
sr : in SR_REGISTER_T; |
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lock_register : in LOCK_REGISTER_T; |
set_reg_lock : out std_logic; |
lock_reg_addr : out REGISTER_ADDR_T; |
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set_reg_lock0 : out std_logic; |
lock_reg_addr0 : out REGISTER_ADDR_T; |
set_reg_lock1 : out std_logic; |
lock_reg_addr1 : out REGISTER_ADDR_T; |
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stall_in : in std_logic; |
stall_out : out std_logic; |
clear_in : in std_logic); |
151,7 → 156,7
clear_in : in std_logic; |
clear_out : out std_logic); |
end component; |
|
|
component wb_stage |
port ( |
clk : in std_logic; |
158,15 → 163,15
reset : in std_logic; |
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mem_wb_register : in MEM_WB_REGISTER_T; |
|
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dreg_addr : out REGISTER_ADDR_T; |
dreg : out REGISTER_T; |
|
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lr : out PC_REGISTER_T; |
sr : out SR_REGISTER_T; |
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clear_out : out std_logic; |
|
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clear_reg_lock : out std_logic); |
end component; |
|
211,7 → 216,7
data_in : in MEM_DATA_T; |
data_out : out MEM_DATA_T); |
end component; |
|
|
component rlu |
port ( |
clk : in std_logic; |
219,9 → 224,13
|
lock_register : out LOCK_REGISTER_T; |
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clear_reg_lock : in std_logic; |
set_reg_lock : in std_logic; |
reg_addr : in REGISTER_ADDR_T); |
clear_reg_lock0 : in std_logic; |
set_reg_lock0 : in std_logic; |
reg_addr0 : in REGISTER_ADDR_T; |
|
clear_reg_lock1 : in std_logic; |
set_reg_lock1 : in std_logic; |
reg_addr1 : in REGISTER_ADDR_T ); |
end component; |
|
begin -- rise_rtl |
255,7 → 264,7
rx_addr => rx_addr_sig, |
ry_addr => ry_addr_sig, |
rz_addr => rz_addr_sig, |
|
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rx => rx_sig, |
ry => ry_sig, |
rz => rz_sig, |
262,9 → 271,11
sr => sr_id_sig, |
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lock_register => lock_register_sig, |
set_reg_lock => set_reg_lock_sig, |
lock_reg_addr => lock_reg_addr_sig, |
|
set_reg_lock0 => set_reg_lock0_sig, |
lock_reg_addr0 => lock_reg_addr0_sig, |
set_reg_lock1 => set_reg_lock1_sig, |
lock_reg_addr1 => lock_reg_addr1_sig, |
|
stall_in => stall_in_id_sig, |
stall_out => stall_out_id_sig, |
clear_in => clear_in_id_sig); |
297,7 → 308,7
stall_out => stall_out_mem_sig, |
clear_in => clear_in_mem_sig, |
clear_out => clear_out_mem_sig); |
|
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wb_stage_unit : wb_stage |
port map ( |
clk => clk, |
304,16 → 315,16
reset => reset, |
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mem_wb_register => mem_wb_register_sig, |
|
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dreg_addr => dreg_addr_sig, |
dreg => dreg_sig, |
|
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lr => lr_sig, |
sr => sr_wb_sig, |
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clear_out => clear_out_wb_sig, |
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clear_reg_lock => clear_reg_lock_sig); |
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clear_reg_lock => clear_reg_lock0_sig); |
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register_file_unit : register_file |
port map ( |
344,7 → 355,7
addr => imem_addr_sig, |
data_in => data_in_imem_sig, |
data_out => imem_data_sig); |
|
|
dmem_unit : dmem |
port map ( |
clk => clk, |
353,7 → 364,7
addr => dmem_addr_sig, |
data_in => dmem_data_out_sig, |
data_out => dmem_data_in_sig); |
|
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rlu_unit : rlu |
port map ( |
clk => clk, |
361,9 → 372,14
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lock_register => lock_register_sig, |
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clear_reg_lock => clear_reg_lock_sig, |
set_reg_lock => set_reg_lock_sig, |
reg_addr => lock_reg_addr_sig); |
clear_reg_lock0 => clear_reg_lock0_sig, |
set_reg_lock0 => set_reg_lock0_sig, |
reg_addr0 => lock_reg_addr0_sig, |
|
clear_reg_lock1 => clear_reg_lock1_sig, |
set_reg_lock1 => set_reg_lock1_sig, |
reg_addr1 => lock_reg_addr1_sig |
); |
|
clear_in_if_sig <= clear_out_ex_sig or clear_out_mem_sig or clear_out_wb_sig; |
clear_in_id_sig <= clear_in_if_sig; |