URL
https://opencores.org/ocsvn/uart_fpga_slow_control_migrated/uart_fpga_slow_control_migrated/trunk
Subversion Repositories uart_fpga_slow_control_migrated
Compare Revisions
- This comparison shows the changes necessary to convert path
/
- from Rev 15 to Rev 16
- ↔ Reverse comparison
Rev 15 → Rev 16
/uart_fpga_slow_control/trunk/code/ab_top.vhd
57,6 → 57,8
entity ab_top is |
port( |
clk_uart_29MHz_i : in std_logic; |
uart_rst_i : in std_logic; |
uart_leds_o : out std_logic_vector(7 downto 0); |
clk_uart_monitor_o : out std_logic; |
-- ##################### |
-- ADD your registers toward the rest of the logic here |