OpenCores
URL https://opencores.org/ocsvn/or1k/or1k/trunk

Subversion Repositories or1k

Compare Revisions

  • This comparison shows the changes necessary to convert path
    /
    from Rev 1524 to Rev 1525
    Reverse comparison

Rev 1524 → Rev 1525

/trunk/or1ksim/cpu/or32/op_support.c
197,7 → 197,7
void op_support_analysis(void)
{
upd_sim_cycles();
if(ADDR_PAGE(cpu_state.pc) != cpu_state.pc)
if(IADDR_PAGE(cpu_state.pc) != cpu_state.pc)
upd_reg_from_t(cpu_state.pc - (cpu_state.delay_insn ? 4 : 0), 0);
else
upd_reg_from_t(cpu_state.pc, 0);
/trunk/or1ksim/cpu/or32/dyn_rec.c
381,7 → 381,7
struct dyn_page *new_dp(oraddr_t page)
{
struct dyn_page *dp = malloc(sizeof(struct dyn_page));
dp->or_page = ADDR_PAGE(page);
dp->or_page = IADDR_PAGE(page);
 
dp->locs = malloc(sizeof(void *) * (config.immu.pagesize / 4));
 
417,9 → 417,9
extern int immu_ex_from_insn;
 
if(cpu_state.delay_insn) {
/* If an instruction pagefault or ITLB would occur, it must appear to have
* come from the jumped-to address */
if(ADDR_PAGE(addr) == ADDR_PAGE(cpu_state.pc_delay)) {
/* If an instruction pagefault or an ITLB miss would occur, it must appear
* to have come from the jumped-to address */
if(IADDR_PAGE(addr) == IADDR_PAGE(cpu_state.pc_delay)) {
immu_ex_from_insn = 1;
immu_translate(addr + 4);
immu_ex_from_insn = 0;
428,7 → 428,7
return;
}
 
if(ADDR_PAGE(addr) == ADDR_PAGE(addr + 4)) {
if(IADDR_PAGE(addr) == IADDR_PAGE(addr + 4)) {
/* If the next instruction is on another page then the immu will be checked
* when the jump to the next page happens */
immu_ex_from_insn = 1;
495,7 → 495,7
/* If the execution is currently in the page that was touched then recompile
* it now and jump back to the point of execution */
check = cpu_state.delay_insn ? cpu_state.pc_delay : get_pc() + 4;
if(ADDR_PAGE(check) == dp->or_page) {
if(IADDR_PAGE(check) == dp->or_page) {
run_sched_out_of_line(1);
recompile_page(dp);
 
1042,8 → 1042,8
 
/* Mark the jump as non page local if the delay slot instruction is on the
* next page to the jump instruction. This should not be needed */
if((ADDR_PAGE(j_ea) != ADDR_PAGE(opq->insn_addr)) ||
(ADDR_PAGE(opq->insn_addr) != ADDR_PAGE(opq->insn_addr + 4)))
if((IADDR_PAGE(j_ea) != IADDR_PAGE(opq->insn_addr)) ||
(IADDR_PAGE(opq->insn_addr) != IADDR_PAGE(opq->insn_addr + 4)))
/* We can't do anything as the j_ea (as passed to find_jump_loc) is a
* VIRTUAL offset and the next physical page may not be the next VIRTUAL
* page */
1095,7 → 1095,7
 
jump_local = find_jump_loc(opq->insn_addr + off, opq);
 
if(ADDR_PAGE(opq->insn_addr) != ADDR_PAGE(opq->insn_addr + 4)) {
if(IADDR_PAGE(opq->insn_addr) != IADDR_PAGE(opq->insn_addr + 4)) {
gen_op_set_pc_delay_imm(opq, 1, off);
gen_op_do_sched(opq, 1);
return;
1356,7 → 1356,7
}
}
 
if(ADDR_PAGE(opq->insn_addr) != ADDR_PAGE(opq->insn_addr + 4)) {
if(IADDR_PAGE(opq->insn_addr) != IADDR_PAGE(opq->insn_addr + 4)) {
gen_op_check_flag_delay(opq, 1, param[0] << 2);
gen_op_do_sched(opq, 1);
opq->not_jump_loc = -1;
1386,7 → 1386,7
}
}
 
if(ADDR_PAGE(opq->insn_addr) != ADDR_PAGE(opq->insn_addr + 4)) {
if(IADDR_PAGE(opq->insn_addr) != IADDR_PAGE(opq->insn_addr + 4)) {
gen_op_check_not_flag_delay(opq, 1, param[0] << 2);
gen_op_do_sched(opq, 1);
opq->not_jump_loc = -1;
/trunk/or1ksim/cpu/common/abstract.h
160,7 → 160,7
#endif /* ! LONGEST */
 
/* Returns the page that addr belongs to */
#define ADDR_PAGE(addr) ((addr) & ~(config.immu.pagesize - 1))
#define IADDR_PAGE(addr) ((addr) & ~(config.immu.pagesize - 1))
 
/* History of execution */
#define HISTEXEC_LEN 200
/trunk/or1ksim/cpu/or1k/except.c
170,7 → 170,7
/* Save the registers that are in the temporaries */
if(!cpu_state.ts_current) {
if(cpu_state.delay_insn &&
(ADDR_PAGE(cpu_state.pc) == ADDR_PAGE(cpu_state.pc - 4)))
(IADDR_PAGE(cpu_state.pc) == IADDR_PAGE(cpu_state.pc - 4)))
upd_reg_from_t(cpu_state.pc - 4, 0);
else
upd_reg_from_t(cpu_state.pc, 0);

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.