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URL https://opencores.org/ocsvn/or1k/or1k/trunk

Subversion Repositories or1k

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  • This comparison shows the changes necessary to convert path 
    /
    from Rev 1536 to Rev 1537
    ↔ Reverse comparison
  •

Rev 1536 → Rev 1537

/trunk/or1ksim/sim-config.h
124,8 → 124,6
int exe_log_end; /* Last instruction to log, -1 if continuous */
int exe_log_marker; /* If nonzero, place markers before each exe_log_marker instructions */
char exe_log_fn[STR_SIZE]; /* RTL state comparison filename */
int spr_log; /* Print out SPR states */
char spr_log_fn[STR_SIZE]; /* SPR state log filename */
char fstdout[STR_SIZE]; /* stdout filename */
long clkcycle_ps; /* Clock duration in ps */
long system_kfreq; /* System frequency in kHz*/
164,7 → 162,6
FILE *fprof; /* Profiler file */
FILE *fmprof; /* Memory profiler file */
FILE *fexe_log; /* RTL state comparison file */
FILE *fspr_log; /* SPR state log file */
FILE *fout; /* file for standard output */
int init; /* Whether we are still initilizing sim */
int script_file_specified; /* Whether script file was already loaded */
/trunk/or1ksim/debug/debug_unit.c
229,10 → 229,6
case JTAG_CHAIN_DEBUG_UNIT:
*data = mfspr(address);
TRACE_(jtag)("READ (%08lx) = %08lx\n", address, *data);
if (runtime.sim.fspr_log) {
fprintf(runtime.sim.fspr_log, "Read from SPR : [%08X] -> [%08lX]\n",
address, *data);
}
break;
case JTAG_CHAIN_TRACE:
*data = 0; /* Scan chain not yet implemented */
256,10 → 252,6
{
case JTAG_CHAIN_DEBUG_UNIT:
TRACE_(jtag)("WRITE (%08x) = %08lx\n", address, data);
if (runtime.sim.fspr_log) {
fprintf(runtime.sim.fspr_log, "Write to SPR : [%08X] <- [%08lX]\n",
address, data);
}
mtspr(address, data);
break;
case JTAG_CHAIN_TRACE:
/trunk/or1ksim/sim.cfg
372,14 → 372,6
filename for the exection log file.
valid only if 'exe_log' is set
 
spr_log = 0/1
'0': log reads/writes to/from sprs
'1': don't log reads/write to/from sprs
 
spr_log_fn = "<filename>"
filename for the sprs log file.
valid only if 'spr_log' is set
clkcycle = <value>[ps|ns|us|ms]
specifies time measurement for one cycle
*/
399,8 → 391,6
exe_log_marker = 10000
exe_log_fn = "executed.log"
 
spr_log = 0
spr_log_fn = "spr.log"
clkcycle = 100ns
end
 
/trunk/or1ksim/cpu/or32/insnset.c
434,10 → 434,6
uint16_t regno = PARAM0 + PARAM2;
uorreg_t value = PARAM1;
 
if (runtime.sim.fspr_log) {
fprintf(runtime.sim.fspr_log, "Write to SPR : [%08"PRIx16"] <- [%08"PRIx32"]\n", regno, value);
}
 
if (cpu_state.sprs[SPR_SR] & SPR_SR_SM)
mtspr(regno, value);
else {
449,10 → 445,6
uint16_t regno = PARAM1 + PARAM2;
uorreg_t value = mfspr(regno);
 
if (runtime.sim.fspr_log) {
fprintf(runtime.sim.fspr_log, "Read from SPR : [%08"PRIx16"] -> [%08"PRIx32"]\n", regno, value);
}
 
if (cpu_state.sprs[SPR_SR] & SPR_SR_SM)
SET_PARAM0(value);
else {
/trunk/or1ksim/toplevel.c
68,7 → 68,7
#include "cuc.h"
 
/* CVS revision number. */
const char rcsrev[] = "$Revision: 1.128 $";
const char rcsrev[] = "$Revision: 1.129 $";
 
inline void debug(int level, const char *format, ...)
{
236,15 → 236,6
}
}
 
if (config.sim.spr_log) {
PRINTF("OPENING SPRLOG\n");
runtime.sim.fspr_log = fopen(config.sim.spr_log_fn, "wt+");
if (!runtime.sim.fspr_log) {
PRINTF("ERROR: Problems opening spr_log file.\n");
exit(1);
}
}
 
if(runtime.sim.filename) {
unsigned long endaddr = 0xFFFFFFFF;
endaddr = loadcode(runtime.sim.filename, 0, 0); /* MM170901 always load at address zero. */
/trunk/or1ksim/sim-config.c
72,9 → 72,7
config.sim.exe_log_start = 0;
config.sim.exe_log_end = 0;
config.sim.exe_log_marker = 0;
config.sim.spr_log = 0;
strcpy (config.sim.exe_log_fn, "executed.log");
strcpy (config.sim.spr_log_fn, "spr.log");
config.sim.profile = 0;
config.sim.mprofile = 0;
 
149,7 → 147,6
/* Sim */
runtime.sim.fexe_log = NULL;
runtime.sim.fspr_log = NULL;
runtime.sim.iprompt = 0;
runtime.sim.fprof = NULL;
runtime.sim.fmprof = NULL;
373,14 → 370,6
strcpy(config.sim.fstdout, val.str_val);
}
 
void sim_spr_log (union param_val val, void *dat) {
config.sim.spr_log = val.int_val;
}
 
void sim_spr_log_fn (union param_val val, void *dat) {
strcpy(config.sim.spr_log_fn, val.str_val);
}
 
void reg_sim_sec (void) {
struct config_section *sec = reg_config_sec("sim", NULL, NULL);
 
397,8 → 386,6
reg_config_param(sec, "exe_log_end", paramt_int, sim_exe_log_end);
reg_config_param(sec, "exe_log_marker", paramt_int, sim_exe_log_marker);
reg_config_param(sec, "exe_log_fn", paramt_str, sim_exe_log_fn);
reg_config_param(sec, "spr_log", paramt_int, sim_spr_log);
reg_config_param(sec, "spr_log_fn", paramt_str, sim_spr_log_fn);
reg_config_param(sec, "clkcycle", paramt_word, sim_clkcycle);
reg_config_param(sec, "stdout", paramt_str, sim_stdout);
}

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