URL
https://opencores.org/ocsvn/or1k/or1k/trunk
Subversion Repositories or1k
Compare Revisions
- This comparison shows the changes necessary to convert path
/
- from Rev 1598 to Rev 1599
- ↔ Reverse comparison
Rev 1598 → Rev 1599
/trunk/rc203soc/syn/synplicity/rc203.tcl
18,7 → 18,7
add_file "../../rtl/verilog/rc203/rc203_romcontroller.v" |
add_file "../../rtl/verilog/rc203/rc203_ethcontroller.v" |
|
# RAM wrapppers |
# RAM wrapppers (you can use unisim.v instead) |
add_file "../RAMB4_S16_S16.v" |
add_file "../RAMB4_S4.v" |
add_file "../RAMB4_S16.v" |
109,9 → 109,9
add_file "../../rtl/verilog/or1200/rtl/verilog/or1200_spram_256x21.v" |
#add_file "../../rtl/verilog/or1200/rtl/verilog/or1200_spram_32x24.v" |
#add_file "../../rtl/verilog/or1200/rtl/verilog/or1200_spram_512x20.v" |
#add_file "../../rtl/verilog/or1200/rtl/verilog/or1200_spram_64x14.v" |
#add_file "../../rtl/verilog/or1200/rtl/verilog/or1200_spram_64x22.v" |
#add_file "../../rtl/verilog/or1200/rtl/verilog/or1200_spram_64x24.v" |
add_file "../../rtl/verilog/or1200/rtl/verilog/or1200_spram_64x14.v" |
add_file "../../rtl/verilog/or1200/rtl/verilog/or1200_spram_64x22.v" |
add_file "../../rtl/verilog/or1200/rtl/verilog/or1200_spram_64x24.v" |
|
# Top files |
add_file "../../rtl/verilog/tc_top.v" |