OpenCores
URL https://opencores.org/ocsvn/sardmips/sardmips/trunk

Subversion Repositories sardmips

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  • This comparison shows the changes necessary to convert path
    /
    from Rev 16 to Rev 17
    Reverse comparison

Rev 16 → Rev 17

/trunk/source/cpu/id_stage/control.cpp
441,7 → 441,7
else
{
if(lrs == RS_MFC0)
{
{
cp0_inst.write(CP0_MFC0);
cp0_reg_rw.write(SC_LOGIC_0);
id_mfc0.write(SC_LOGIC_1);
453,7 → 453,7
#ifdef ONEHOT_DEBUG
inst_mfc0.write(SC_LOGIC_1);
#endif
}
}
else
if(lrs == RS_MTC0)
{
/trunk/source/cpu/id_stage/regfile_high.h
1,5 → 1,5
//
// $Id: regfile_high.h,v 1.1 2006-01-25 17:00:04 igorloi Exp $
// $Id: regfile_high.h,v 1.2 2006-02-09 15:39:39 igorloi Exp $
//
 
#ifndef _REGFILE_H
30,7 → 30,7
SC_CTOR(regfile)
{
SC_METHOD(storeregister);
sensitive_neg << in_clk;
sensitive_pos << in_clk;
SC_METHOD(loadregister);
sensitive << rs << rt << in_clk;
/trunk/source/cpu/ex_stage.cpp
3,4 → 3,3
// $Id: ex_stage.cpp,v 1.00 2004/12/23 22:253:00 DIEE Cagliari
//
#include "ex_stage.h"
/trunk/source/cpu/ex_stage.h
245,4 → 245,3
};
 
#endif
 
/trunk/source/cpu/mem_stage/flag_interr.cpp
48,4 → 48,4
}
else
current_state = next_state;
}
}
/trunk/source/constants/constants.h
1,5 → 1,5
//
// $Id: constants.h,v 1.1 2006-01-25 17:00:00 igorloi Exp $
// $Id: constants.h,v 1.2 2006-02-09 15:39:38 igorloi Exp $
//
#ifndef _CONSTANTS_H
#define _CONSTANTS_H
144,7 → 144,7
#define FUNC_WAIT "100000"
 
 
#define RS_MFC0 "00000" // only 5 bit
#define RS_MFC0 "00000"
#define RS_MTC0 "00100"
 
 
/trunk/source/constants/config.h
4,7 → 4,7
/*
add Pipelined Multiplicator
*/
//#define _MULT_PIPELINE_
#define _MULT_PIPELINE_
 
/*
set the depth of the pipeline Multiplicator

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