URL
https://opencores.org/ocsvn/ion/ion/trunk
Subversion Repositories ion
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- This comparison shows the changes necessary to convert path
/
- from Rev 161 to Rev 162
- ↔ Reverse comparison
Rev 161 → Rev 162
/ion/trunk/src/mips_mpu1_template.vhdl
8,7 → 8,7
-- to test external memory interface and cache-cpu interface without the cache |
-- functionality getting in the way. |
-------------------------------------------------------------------------------- |
-- Copyright (C) 2010 Jose A. Ruiz |
-- Copyright (C) 2011 Jose A. Ruiz |
-- |
-- This source file may be used and distributed without |
-- restriction provided that this copyright statement is not |
/ion/trunk/src/mips_tb0_template.vhdl
21,7 → 21,7
-- |
-- WARNING: Will only work on Modelsim; uses custom library SignalSpy. |
--############################################################################## |
-- Copyright (C) 2010 Jose A. Ruiz |
-- Copyright (C) 2011 Jose A. Ruiz |
-- |
-- This source file may be used and distributed without |
-- restriction provided that this copyright statement is not |
/ion/trunk/src/mips_tb2_template.vhdl
22,7 → 22,7
-- |
-- WARNING: Will only work on Modelsim; uses custom library SignalSpy. |
--############################################################################## |
-- Copyright (C) 2010 Jose A. Ruiz |
-- Copyright (C) 2011 Jose A. Ruiz |
-- |
-- This source file may be used and distributed without |
-- restriction provided that this copyright statement is not |
/ion/trunk/vhdl/demo/rs232_rx.vhdl
4,7 → 4,7
-- WARNING: Hacked up for light8080 demo. Poor performance, no formal testing! |
-- I don't advise using this in for any general purpose. |
--############################################################################## |
-- Copyright (C) 2010 Jose A. Ruiz |
-- Copyright (C) 2011 Jose A. Ruiz |
-- |
-- This source file may be used and distributed without |
-- restriction provided that this copyright statement is not |
/ion/trunk/vhdl/demo/rs232_tx.vhdl
4,7 → 4,7
-- WARNING: Hacked up for light8080 demo. Poor performance, no formal testing! |
-- I don't advise using this in for any general purpose. |
--############################################################################## |
-- Copyright (C) 2010 Jose A. Ruiz |
-- Copyright (C) 2011 Jose A. Ruiz |
-- |
-- This source file may be used and distributed without |
-- restriction provided that this copyright statement is not |
/ion/trunk/vhdl/demo/c2sb_demo.vhdl
6,7 → 6,7
-------------------------------------------------------------------------------- |
-- NOTE: See note at bottom of file about optional use of PLL. |
--############################################################################## |
-- Copyright (C) 2010 Jose A. Ruiz |
-- Copyright (C) 2011 Jose A. Ruiz |
-- |
-- This source file may be used and distributed without |
-- restriction provided that this copyright statement is not |
/ion/trunk/vhdl/mips_alu.vhdl
2,7 → 2,7
-- mips_alu.vhdl -- integer arithmetic ALU, excluding mult/div functionality. |
-- |
-------------------------------------------------------------------------------- |
-- Copyright (C) 2010 Jose A. Ruiz |
-- Copyright (C) 2011 Jose A. Ruiz |
-- |
-- This source file may be used and distributed without |
-- restriction provided that this copyright statement is not |
/ion/trunk/vhdl/mips_pkg.vhdl
10,7 → 10,7
-- new IO registers). |
-- Please see the module c2sb_demo and mips_mcu for examples of memory decoding. |
-------------------------------------------------------------------------------- |
-- Copyright (C) 2010 Jose A. Ruiz |
-- Copyright (C) 2011 Jose A. Ruiz |
-- |
-- This source file may be used and distributed without |
-- restriction provided that this copyright statement is not |
/ion/trunk/vhdl/sdram_controller.vhdl
12,7 → 12,7
-- 4) No. of banks is hardcoded to 4. |
-- |
-------------------------------------------------------------------------------- |
-- Copyright (C) 2010 Jose A. Ruiz |
-- Copyright (C) 2011 Jose A. Ruiz |
-- |
-- This source file may be used and distributed without |
-- restriction provided that this copyright statement is not |
/ion/trunk/vhdl/mips_cache.vhdl
141,7 → 141,7
-- it would be better to insert an extra cycle after the wait states in |
-- the sram read state machine. |
-------------------------------------------------------------------------------- |
-- Copyright (C) 2010 Jose A. Ruiz |
-- Copyright (C) 2011 Jose A. Ruiz |
-- |
-- This source file may be used and distributed without |
-- restriction provided that this copyright statement is not |
/ion/trunk/vhdl/mips_shifter.vhdl
2,7 → 2,7
-- mips_shifter.vhdl -- combinational barrel shifter |
-- |
-------------------------------------------------------------------------------- |
-- Copyright (C) 2010 Jose A. Ruiz |
-- Copyright (C) 2011 Jose A. Ruiz |
-- |
-- This source file may be used and distributed without |
-- restriction provided that this copyright statement is not |
/ion/trunk/vhdl/mips_cpu.vhdl
40,7 → 40,7
-- stage. |
-- This can be easily fixed but is not very urgent. |
-------------------------------------------------------------------------------- |
-- Copyright (C) 2010 Jose A. Ruiz |
-- Copyright (C) 2011 Jose A. Ruiz |
-- |
-- This source file may be used and distributed without |
-- restriction provided that this copyright statement is not |