URL
https://opencores.org/ocsvn/or1k/or1k/trunk
Subversion Repositories or1k
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- This comparison shows the changes necessary to convert path
/
- from Rev 1651 to Rev 1652
- ↔ Reverse comparison
Rev 1651 → Rev 1652
/trunk/or1ksim/cpu/or1k/sprs.c
163,10 → 163,10
/* Mask reserved bits in DTLBMR and DTLBMR registers */ |
if ( (regno >= SPR_DTLBMR_BASE(0)) && (regno < SPR_DTLBTR_LAST(3))) { |
if((regno & 0xff) < 0x80) |
cpu_state.sprs[regno] = ((value / config.dmmu.pagesize) * config.dmmu.pagesize) | |
cpu_state.sprs[regno] = DADDR_PAGE(value) | |
(value & (SPR_DTLBMR_V | SPR_DTLBMR_PL1 | SPR_DTLBMR_CID | SPR_DTLBMR_LRU)); |
else |
cpu_state.sprs[regno] = ((value / config.dmmu.pagesize) * config.dmmu.pagesize) | |
cpu_state.sprs[regno] = DADDR_PAGE(value) | |
(value & (SPR_DTLBTR_CC | SPR_DTLBTR_CI | SPR_DTLBTR_WBC | SPR_DTLBTR_WOM | |
SPR_DTLBTR_A | SPR_DTLBTR_D | SPR_DTLBTR_URE | SPR_DTLBTR_UWE | SPR_DTLBTR_SRE | |
SPR_DTLBTR_SWE)); |
177,10 → 177,10
TRACE_(immu)("Writting to an mmu way (reg: %"PRIx16", value: %"PRIx32")\n", |
regno, value); |
if((regno & 0xff) < 0x80) |
cpu_state.sprs[regno] = ((value / config.immu.pagesize) * config.immu.pagesize) | |
cpu_state.sprs[regno] = IADDR_PAGE(value) | |
(value & (SPR_ITLBMR_V | SPR_ITLBMR_PL1 | SPR_ITLBMR_CID | SPR_ITLBMR_LRU)); |
else |
cpu_state.sprs[regno] = ((value / config.immu.pagesize) * config.immu.pagesize) | |
cpu_state.sprs[regno] = IADDR_PAGE(value) | |
(value & (SPR_ITLBTR_CC | SPR_ITLBTR_CI | SPR_ITLBTR_WBC | SPR_ITLBTR_WOM | |
SPR_ITLBTR_A | SPR_ITLBTR_D | SPR_ITLBTR_SXE | SPR_ITLBTR_UXE)); |
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