URL
https://opencores.org/ocsvn/socgen/socgen/trunk
Subversion Repositories socgen
Compare Revisions
- This comparison shows the changes necessary to convert path
/
- from Rev 17 to Rev 18
- ↔ Reverse comparison
Rev 17 → Rev 18
/socgen/trunk/geda/dot_gEDA/gafrc
0,0 → 1,97
(reset-component-library) |
(reset-source-library) |
|
;;; |
;;; Add the default component libraries |
;;; |
|
(define geda-sym-path (build-path geda-data-path "sym")) |
|
; NOTE: Some of the below component libraries below are commented out. |
; This was done because there are conflicting filenames within these |
; libraries. |
(for-each |
(lambda (dir) |
(if (list? dir) |
(component-library (build-path geda-sym-path (car dir)) (cadr dir)) |
(component-library (build-path geda-sym-path dir))) |
) |
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|
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|
|
(reverse '( |
; "local" |
; Generic symbols |
; ("analog" "Basic devices") |
; ("connector" "Connectors (generic)") |
; ("diode" "Diodes (generic)") |
; ("io" "Input/output (generic)") |
; ("power" "Power rails") |
; ("radio" "Radio elements (generic)") |
; ("switch" "Switches (generic)") |
("titleblock" "Titleblocks (generic)") |
; ("IEC417" "IEC 60417") |
; Common logic series |
; ("74" "74-series logic") |
; ("4000" "4000-series logic") |
; ("ecl" "ECL logic") |
; Simulation |
; ("cascade" "Cascade simulation elements") |
; ("spice" "SPICE simulation elements") |
; ("switcap" "SWITCAP simulation elements") |
; ASIC design |
("asic" "Basic devices (ASIC)") |
("asicpads" "Contact pads (ASIC)") |
; Manufacturers |
; ("allegro" "Allegro Microsystems") |
; ("altera" "Altera") |
; ("amphenol" "Connectors (Amphenol)") |
; ("apex" "Apex Microtechnology") |
; ("dec" "DEC") |
; ("idt" "IDT") |
; ("irf" "International Rectifier") |
; ("lattice" "Lattice Semiconductor") |
; ("linear" "Linear Technology") |
; ("maxim" "Maxim/Dallas") |
; ("minicircuits" "Mini-Circuits") |
; ("national" "National Semiconductor") |
; ("philips" "Philips Electronics") |
; ("st" "ST Microelectronics") |
; ("xilinx" "Xilinx") |
; Misc. stuff |
; ("bus" "PC104 bus") |
; ("memory" "Memory devices (misc)") |
; ("micro" "Microcontrollers (misc)") |
; ("transistor" "Transistors (misc)") |
; ("tube" "Vacuum tubes (misc)") |
; ("rf" "RF elements (misc)") |
; ("pla" "Programmable logic arrays (misc)") |
; ("supervisor" "Microprocessor supervisors (misc)") |
; ("opto" "Optocouplers (misc)") |
; ("relay" "Relays (misc)") |
("misc" "Misc. unsorted symbols") |
|
; Other |
|
"verilog" |
; ("vhdl") |
; ("gnetman") |
))) |
|
|
(component-library "${HOME}/.gEDA/sym/frames") |
(component-library "${HOME}/.gEDA/sym/regs") |
(component-library "${HOME}/.gEDA/sym/pads") |
(component-library "${HOME}/.gEDA/sym/ports") |
(component-library "${PWD}/sym/") |
(source-library "${PWD}/sch") |
|
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/socgen/trunk/geda/dot_gEDA/sym/regs/veg_rst.sym
0,0 → 1,57
v 20100214 2 |
L 300 650 375 600 3 0 0 0 -1 -1 |
L 375 600 300 550 3 0 0 0 -1 -1 |
B 300 300 1000 1600 3 0 0 0 -1 -1 0 -1 -1 -1 -1 -1 |
T 1800 1800 5 10 0 0 0 0 1 |
device=REGISTER_V_RST |
P 300 600 0 600 1 0 1 |
{ |
T 200 650 5 8 0 1 0 6 1 |
pinnumber=2 |
T 200 550 5 8 0 1 0 8 1 |
pinseq=3 |
T 375 600 9 8 1 1 0 0 1 |
pinlabel=CLK |
T 375 600 5 8 0 1 0 2 1 |
pintype=clk |
} |
P 300 1600 0 1600 1 1 1 |
{ |
T 200 1650 5 8 0 1 0 6 1 |
pinnumber=1 |
T 200 1550 5 8 0 1 0 8 1 |
pinseq=2 |
T 350 1600 9 8 1 1 0 0 1 |
pinlabel=D |
T 350 1600 5 8 0 1 0 2 1 |
pintype=in |
} |
P 1600 1600 1300 1600 1 1 0 |
{ |
T 1400 1650 5 8 0 1 0 0 1 |
pinnumber=3 |
T 1400 1550 5 8 0 1 0 2 1 |
pinseq=5 |
T 1250 1600 9 8 1 1 0 6 1 |
pinlabel=Q |
T 1250 1600 5 8 0 1 0 8 1 |
pintype=out |
} |
P 800 0 800 200 1 0 0 |
{ |
T 850 100 5 8 0 1 0 0 1 |
pinnumber=4 |
T 850 100 5 8 0 1 0 2 1 |
pinseq=4 |
T 800 350 9 8 1 1 0 3 1 |
pinlabel=\_RST\_ |
T 800 450 5 8 0 1 0 3 1 |
pintype=in |
} |
V 800 250 50 6 0 0 0 -1 -1 0 -1 -1 -1 -1 -1 |
T 1300 2000 8 10 1 1 0 6 1 |
refdes=U? |
T 1800 2600 5 10 0 0 0 0 1 |
description=D-flip-flop vector with reset |
|
|
/socgen/trunk/geda/dot_gEDA/sym/regs/reg.sym
0,0 → 1,43
v 20100214 2 |
L 300 650 375 600 3 0 0 0 -1 -1 |
L 375 600 300 550 3 0 0 0 -1 -1 |
B 300 300 1000 1600 3 0 0 0 -1 -1 0 -1 -1 -1 -1 -1 |
T 1800 1800 5 10 0 0 0 0 1 |
device=REGISTER |
P 300 600 0 600 1 0 1 |
{ |
T 200 650 5 8 0 1 0 6 1 |
pinnumber=2 |
T 200 550 5 8 0 1 0 8 1 |
pinseq=3 |
T 375 600 9 8 1 1 0 0 1 |
pinlabel=CLK |
T 375 600 5 8 0 1 0 2 1 |
pintype=clk |
} |
P 300 1600 0 1600 1 0 1 |
{ |
T 200 1650 5 8 0 1 0 6 1 |
pinnumber=1 |
T 200 1550 5 8 0 1 0 8 1 |
pinseq=2 |
T 350 1600 9 8 1 1 0 0 1 |
pinlabel=D |
T 350 1600 5 8 0 1 0 2 1 |
pintype=in |
} |
P 1600 1600 1300 1600 1 0 0 |
{ |
T 1400 1650 5 8 0 1 0 0 1 |
pinnumber=3 |
T 1400 1550 5 8 0 1 0 2 1 |
pinseq=5 |
T 1250 1600 9 8 1 1 0 6 1 |
pinlabel=Q |
T 1250 1600 5 8 0 1 0 8 1 |
pintype=out |
} |
T 1300 2000 8 10 1 1 0 6 1 |
refdes=U? |
T 1800 2600 5 10 0 0 0 0 1 |
description=D-flip-flop |
/socgen/trunk/geda/dot_gEDA/sym/regs/veg.sym
0,0 → 1,43
v 20100214 2 |
L 300 650 375 600 3 0 0 0 -1 -1 |
L 375 600 300 550 3 0 0 0 -1 -1 |
B 300 300 1000 1600 3 0 0 0 -1 -1 0 -1 -1 -1 -1 -1 |
T 1800 1800 5 10 0 0 0 0 1 |
device=REGISTER_V |
P 300 600 0 600 1 0 1 |
{ |
T 200 650 5 8 0 1 0 6 1 |
pinnumber=2 |
T 200 550 5 8 0 1 0 8 1 |
pinseq=3 |
T 375 600 9 8 1 1 0 0 1 |
pinlabel=CLK |
T 375 600 5 8 0 1 0 2 1 |
pintype=clk |
} |
P 300 1600 0 1600 1 1 1 |
{ |
T 200 1650 5 8 0 1 0 6 1 |
pinnumber=1 |
T 200 1550 5 8 0 1 0 8 1 |
pinseq=2 |
T 350 1600 9 8 1 1 0 0 1 |
pinlabel=D |
T 350 1600 5 8 0 1 0 2 1 |
pintype=in |
} |
P 1600 1600 1300 1600 1 1 0 |
{ |
T 1400 1650 5 8 0 1 0 0 1 |
pinnumber=3 |
T 1400 1550 5 8 0 1 0 2 1 |
pinseq=5 |
T 1250 1600 9 8 1 1 0 6 1 |
pinlabel=Q |
T 1250 1600 5 8 0 1 0 8 1 |
pintype=out |
} |
T 1300 2000 8 10 1 1 0 6 1 |
refdes=U? |
T 1800 2600 5 10 0 0 0 0 1 |
description=D-flip-flop vector |
/socgen/trunk/geda/dot_gEDA/sym/regs/reg_rst.sym
0,0 → 1,57
v 20100214 2 |
L 300 650 375 600 3 0 0 0 -1 -1 |
L 375 600 300 550 3 0 0 0 -1 -1 |
B 300 300 1000 1600 3 0 0 0 -1 -1 0 -1 -1 -1 -1 -1 |
T 1800 1800 5 10 0 0 0 0 1 |
device=REGISTER_RST |
P 300 600 0 600 1 0 1 |
{ |
T 200 650 5 8 0 1 0 6 1 |
pinnumber=2 |
T 200 550 5 8 0 1 0 8 1 |
pinseq=3 |
T 375 600 9 8 1 1 0 0 1 |
pinlabel=CLK |
T 375 600 5 8 0 1 0 2 1 |
pintype=clk |
} |
P 300 1600 0 1600 1 0 1 |
{ |
T 200 1650 5 8 0 1 0 6 1 |
pinnumber=1 |
T 200 1550 5 8 0 1 0 8 1 |
pinseq=2 |
T 350 1600 9 8 1 1 0 0 1 |
pinlabel=D |
T 350 1600 5 8 0 1 0 2 1 |
pintype=in |
} |
P 1600 1600 1300 1600 1 0 0 |
{ |
T 1400 1650 5 8 0 1 0 0 1 |
pinnumber=3 |
T 1400 1550 5 8 0 1 0 2 1 |
pinseq=5 |
T 1250 1600 9 8 1 1 0 6 1 |
pinlabel=Q |
T 1250 1600 5 8 0 1 0 8 1 |
pintype=out |
} |
P 800 0 800 200 1 0 0 |
{ |
T 850 100 5 8 0 1 0 0 1 |
pinnumber=4 |
T 850 100 5 8 0 1 0 2 1 |
pinseq=4 |
T 800 350 9 8 1 1 0 3 1 |
pinlabel=\_RST\_ |
T 800 450 5 8 0 1 0 3 1 |
pintype=in |
} |
V 800 250 50 6 0 0 0 -1 -1 0 -1 -1 -1 -1 -1 |
T 1300 2000 8 10 1 1 0 6 1 |
refdes=U? |
T 1800 2600 5 10 0 0 0 0 1 |
description=D-flip-flop with reset |
|
|
/socgen/trunk/geda/dot_gEDA/sym/pads/in_pad.sym
0,0 → 1,18
v 20100214 2 |
P 1300 200 1100 200 4 0 0 |
{ |
T 770 438 5 10 0 1 0 0 1 |
pinnumber=PAD_IN |
T 570 138 5 10 0 0 0 0 1 |
pinseq=1 |
} |
T 84 221 2 10 0 1 0 0 1 |
device=IPAD |
T 0 500 5 10 1 1 0 0 1 |
refdes=P? |
B 0 0 400 400 3 0 0 0 -1 -1 0 -1 -1 -1 -1 -1 |
B 100 100 200 200 3 0 0 0 -1 -1 0 -1 -1 -1 -1 -1 |
L 700 400 700 0 3 0 0 0 -1 -1 |
L 700 0 1100 200 3 0 0 0 -1 -1 |
L 700 400 1100 200 3 0 0 0 -1 -1 |
L 400 200 700 200 3 0 0 0 -1 -1 |
/socgen/trunk/geda/dot_gEDA/sym/pads/out_pad.sym
0,0 → 1,18
v 20100214 2 |
P 0 200 200 200 4 0 0 |
{ |
T 302 135 5 10 0 1 0 0 1 |
pinnumber=PAD_OUT |
T 302 135 5 10 0 0 0 0 1 |
pinseq=1 |
} |
T 302 218 5 10 0 1 0 0 1 |
device=OPAD |
T 1300 500 5 10 1 1 0 6 1 |
refdes=P? |
B 900 0 400 400 3 0 0 0 -1 -1 0 -1 -1 -1 -1 -1 |
B 1000 100 200 200 3 0 0 0 -1 -1 0 -1 -1 -1 -1 -1 |
L 600 200 200 400 3 0 0 0 -1 -1 |
L 600 200 200 0 3 0 0 0 -1 -1 |
L 200 400 200 0 3 0 0 0 -1 -1 |
L 900 200 600 200 3 0 0 0 -1 -1 |
/socgen/trunk/geda/dot_gEDA/sym/pads/io_pad.sym
0,0 → 1,38
v 20100214 2 |
P 0 600 200 600 4 0 0 |
{ |
T 302 535 5 10 0 1 0 0 1 |
pinnumber=PAD_OUT |
T 302 535 5 10 0 0 0 0 1 |
pinseq=1 |
} |
P 0 1000 404 1000 4 0 0 |
{ |
T 302 935 5 10 0 1 0 0 1 |
pinnumber=PAD_OE |
T 302 935 5 10 0 0 0 0 1 |
pinseq=3 |
} |
T 302 218 5 10 0 1 0 0 1 |
device=TPAD |
T 1300 900 5 10 1 1 0 6 1 |
refdes=P? |
B 900 400 400 400 3 0 0 0 -1 -1 0 -1 -1 -1 -1 -1 |
B 1000 500 200 200 3 0 0 0 -1 -1 0 -1 -1 -1 -1 -1 |
L 600 600 200 800 3 0 0 0 -1 -1 |
L 600 600 200 400 3 0 0 0 -1 -1 |
L 200 800 200 400 3 0 0 0 -1 -1 |
L 900 600 600 600 3 0 0 0 -1 -1 |
L 400 700 400 1000 4 10 0 0 -1 -1 |
L 200 200 600 0 3 0 0 0 -1 -1 |
L 200 200 600 400 3 0 0 0 -1 -1 |
L 600 400 600 0 3 0 0 0 -1 -1 |
P 0 200 200 200 4 0 0 |
{ |
T 302 135 5 10 0 1 0 0 1 |
pinnumber=PAD_IN |
T 302 135 5 10 0 0 0 0 1 |
pinseq=2 |
} |
L 600 200 700 200 3 0 0 0 -1 -1 |
L 700 600 700 200 3 0 0 0 -1 -1 |
/socgen/trunk/geda/dot_gEDA/sym/pads/tri_pad.sym
0,0 → 1,26
v 20100214 2 |
P 0 200 200 200 4 0 0 |
{ |
T 302 135 5 10 0 1 0 0 1 |
pinnumber=PAD_OUT |
T 302 135 5 10 0 0 0 0 1 |
pinseq=1 |
} |
P 0 600 404 600 4 0 0 |
{ |
T 302 535 5 10 0 1 0 0 1 |
pinnumber=PAD_OE |
T 302 535 5 10 0 0 0 0 1 |
pinseq=1 |
} |
T 302 218 5 10 0 1 0 0 1 |
device=TPAD |
T 1300 500 5 10 1 1 0 6 1 |
refdes=P? |
B 900 0 400 400 3 0 0 0 -1 -1 0 -1 -1 -1 -1 -1 |
B 1000 100 200 200 3 0 0 0 -1 -1 0 -1 -1 -1 -1 -1 |
L 600 200 200 400 3 0 0 0 -1 -1 |
L 600 200 200 0 3 0 0 0 -1 -1 |
L 200 400 200 0 3 0 0 0 -1 -1 |
L 900 200 600 200 3 0 0 0 -1 -1 |
L 400 300 400 600 4 10 0 0 -1 -1 |
/socgen/trunk/geda/dot_gEDA/sym/ports/in_port.sym
0,0 → 1,17
v 20031231 1 |
L 0 200 600 200 3 0 0 0 -1 -1 |
L 600 200 700 100 3 0 0 0 -1 -1 |
L 700 100 600 0 3 0 0 0 -1 -1 |
L 600 0 0 0 3 0 0 0 -1 -1 |
L 0 0 0 200 3 0 0 0 -1 -1 |
P 900 100 700 100 4 0 0 |
{ |
T 170 38 5 10 1 1 0 0 1 |
pinnumber=IPAD |
T 170 38 5 10 0 0 0 0 1 |
pinseq=1 |
} |
T 84 221 2 10 0 1 0 0 1 |
device=IPAD |
T 700 100 5 10 1 1 0 0 1 |
refdes=P? |
/socgen/trunk/geda/dot_gEDA/sym/ports/out_port.sym
0,0 → 1,17
v 20031231 1 |
L 200 100 300 0 3 0 0 0 -1 -1 |
L 300 0 900 0 3 0 0 0 -1 -1 |
L 900 0 900 200 3 0 0 0 -1 -1 |
L 900 200 300 200 3 0 0 0 -1 -1 |
L 300 200 200 100 3 0 0 0 -1 -1 |
P 0 100 200 100 4 0 0 |
{ |
T 302 35 5 10 1 1 0 0 1 |
pinnumber=OPAD |
T 302 35 5 10 0 0 0 0 1 |
pinseq=1 |
} |
T 302 218 5 10 0 1 0 0 1 |
device=OPAD |
T 200 100 5 10 1 1 0 6 1 |
refdes=P? |
/socgen/trunk/geda/dot_gEDA/sym/ports/io_port.sym
0,0 → 1,18
v 20031231 1 |
L 800 100 700 0 3 0 0 0 -1 -1 |
L 700 0 100 0 3 0 0 0 -1 -1 |
L 100 0 0 100 3 0 0 0 -1 -1 |
L 0 100 100 200 3 0 0 0 -1 -1 |
L 100 200 700 200 3 0 0 0 -1 -1 |
L 700 200 800 100 3 0 0 0 -1 -1 |
P 1000 100 800 100 4 0 0 |
{ |
T 125 36 5 10 1 1 0 0 1 |
pinnumber=IOPAD |
T 125 36 5 10 0 0 0 0 1 |
pinseq=1 |
} |
T 113 221 2 10 0 1 0 0 1 |
device=IOPAD |
T 800 100 5 10 1 1 0 0 1 |
refdes=P? |
/socgen/trunk/geda/dot_gEDA/sym/ports/in_port_v.sym
0,0 → 1,17
v 20031231 1 |
L 0 200 600 200 3 0 0 0 -1 -1 |
L 600 200 700 100 3 0 0 0 -1 -1 |
L 700 100 600 0 3 0 0 0 -1 -1 |
L 600 0 0 0 3 0 0 0 -1 -1 |
L 0 0 0 200 3 0 0 0 -1 -1 |
P 900 100 700 100 10 1 0 |
{ |
T 170 38 5 10 1 1 0 0 1 |
pinnumber=IPAD |
T 170 38 5 10 0 0 0 0 1 |
pinseq=1 |
} |
T 84 221 2 10 0 1 0 0 1 |
device=IPAD |
T 700 100 5 10 1 1 0 0 1 |
refdes=P? |
/socgen/trunk/geda/dot_gEDA/sym/ports/out_port_v.sym
0,0 → 1,17
v 20031231 1 |
L 200 100 300 0 3 0 0 0 -1 -1 |
L 300 0 900 0 3 0 0 0 -1 -1 |
L 900 0 900 200 3 0 0 0 -1 -1 |
L 900 200 300 200 3 0 0 0 -1 -1 |
L 300 200 200 100 3 0 0 0 -1 -1 |
P 0 100 200 100 10 1 0 |
{ |
T 302 35 5 10 1 1 0 0 1 |
pinnumber=OPAD |
T 302 35 5 10 0 0 0 0 1 |
pinseq=1 |
} |
T 302 218 5 10 0 1 0 0 1 |
device=OPAD |
T 200 100 5 10 1 1 0 6 1 |
refdes=P? |
/socgen/trunk/geda/dot_gEDA/sym/ports/io_port_v.sym
0,0 → 1,18
v 20031231 1 |
L 800 100 700 0 3 0 0 0 -1 -1 |
L 700 0 100 0 3 0 0 0 -1 -1 |
L 100 0 0 100 3 0 0 0 -1 -1 |
L 0 100 100 200 3 0 0 0 -1 -1 |
L 100 200 700 200 3 0 0 0 -1 -1 |
L 700 200 800 100 3 0 0 0 -1 -1 |
P 1000 100 800 100 10 1 0 |
{ |
T 125 36 5 10 1 1 0 0 1 |
pinnumber=IOPAD |
T 125 36 5 10 0 0 0 0 1 |
pinseq=1 |
} |
T 113 221 2 10 0 1 0 0 1 |
device=IOPAD |
T 800 100 5 10 1 1 0 0 1 |
refdes=P? |
/socgen/trunk/geda/dot_gEDA/sym/frames/frame_1200x768.sym
0,0 → 1,2
v 20100214 1 |
B 0 0 13333 8530 3 0 0 0 -1 -1 0 -1 -1 -1 -1 -1 |
/socgen/trunk/geda/dot_gEDA/sym/frames/frame_1600x1200.sym
0,0 → 1,2
v 20100214 1 |
B 0 0 17777 13333 3 0 0 0 -1 -1 0 -1 -1 -1 -1 -1 |
/socgen/trunk/geda/dot_gEDA/sym/frames/frame_1280x960.sym
0,0 → 1,2
v 20100214 1 |
B 0 0 14222 10667 3 0 0 0 -1 -1 0 -1 -1 -1 -1 -1 |
/socgen/trunk/geda/dot_gEDA/sym/frames/frame_320x240.sym
0,0 → 1,2
v 20100214 1 |
B 0 0 3560 2670 3 0 0 0 -1 -1 0 -1 -1 -1 -1 -1 |
/socgen/trunk/geda/dot_gEDA/sym/frames/frame_3200x2400.sym
0,0 → 1,2
v 20100214 1 |
B 0 0 35554 26667 3 0 0 0 -1 -1 0 -1 -1 -1 -1 -1 |
/socgen/trunk/geda/dot_gEDA/sym/frames/frame_800x600.sym
0,0 → 1,2
v 20100214 1 |
B 0 0 8888 6667 3 0 0 0 -1 -1 0 -1 -1 -1 -1 -1 |
/socgen/trunk/geda/dot_gEDA/sym/frames/frame_640x480.sym
0,0 → 1,2
v 20100214 1 |
B 0 0 7111 5340 3 0 0 0 -1 -1 0 -1 -1 -1 -1 -1 |
/socgen/trunk/geda/dot_gEDA/gschemrc
0,0 → 1,115
; -*-Scheme-*- |
; |
; Init file for gschem |
; |
|
; magnetic-net-mode string |
; |
; Controls the initial setting of the magnetic net mode. The magnetic |
; net mode marks a possible connection that is close to the current |
; cursor position |
(magnetic-net-mode "enabled") |
;(magnetic-net-mode "disabled") |
|
|
; log-window string |
; |
; Controls if the log message window is mapped when gschem is started up |
; Possible options: |
; startup - opened up when gschem starts |
; later - NOT opened up when gschem starts |
; (can be opened by Options/Show Log Window) |
; |
;(log-window "startup") |
(log-window "later") |
|
; window-size width height |
; |
; Specifies the size of the drawing area window. The width and height |
; are specified in pixels and do not include the three menu bars and |
; scrollbars (so the window will be larger than the specified |
; measurements). Try to keep an aspect ratio of 1.333333 if at all possible. |
; These numbers are NOT the true size of the window, but of the drawing area. |
; |
;(window-size 650 487) ; Good size for 800x600 |
;(window-size 900 650) ; Good size for 1024x768 |
;(window-size 950 712) ; Good size for 1152x864 |
(window-size 1100 825) ; Good size for 1280x1024 |
|
|
; output-type string |
; |
; Controls what is actually printed |
; string is either "extents" or "extents no margins" or |
; "current window" |
; |
;(output-type "extents") |
(output-type "extents no margins") |
;(output-type "current window") |
;;; (output-type "limits") "limits" is considered deprecated and should |
;;; not be used. |
|
; output-orientation string |
; |
; Controls which way the output page is layed out (landscape or portrait) |
; |
;(output-orientation "portrait") |
(output-orientation "landscape") |
|
; output-color string |
; |
; Controls if output (postscript) is color (enabled) or black/white (disabled) |
; |
(output-color "disabled") |
;(output-color "enabled") |
|
|
; image-color string |
; |
; Controls if image (png) is color (enabled) or black/white (disabled) |
; |
(image-color "enabled") |
;(image-color "disabled") |
|
; Bus ripper controls |
; The following keywords control the auto bus ripper addition code |
; |
; bus-ripper-size : Sets the size of the auto bus rippers. |
; bus-ripper-type : Sets the bus ripper type either a "component" or |
; plain "net" |
; bus-ripper-syname : If above is set to component, specify the symbol name. |
; The symbol must exist in a component library |
; bus-ripper-rotation : Either "symmetric" or "non-symmetric". This deals |
; with how the bus ripper symbol is rotated when it |
; is auto added to a schematic. |
; |
|
; The default bus ripper |
(bus-ripper-size 200) |
(bus-ripper-type "component") |
(bus-ripper-symname "busripper-1.sym") |
(bus-ripper-rotation "non-symmetric") |
|
; A symmetric alternative |
;(bus-ripper-size 200) |
;(bus-ripper-type "component") |
;(bus-ripper-symname "busripper-2.sym") |
;(bus-ripper-rotation "symmetric") |
|
; A simple net |
;(bus-ripper-size 200) |
;(bus-ripper-type "net") |
|
|
; If you don't want a titleblock to be added automatically, then add one of |
; the following lines to your gschemrc file (without the semicolon). |
; There are several ways, so just choose one: |
(define default-titleblock "") |
; (define default-titleblock '()) |
; (define default-titleblock #f) |
; |
;(define default-titleblock "title-B.sym") |
|
|
|
|
/socgen/trunk/geda/Makefile
0,0 → 1,16
SHELL=/bin/sh |
MAKE=make |
CUR_DIR=$(shell pwd) |
home=$(CUR_DIR)/.. |
|
|
|
.PHONY install_geda: |
install_geda: |
cp -r dot_gEDA ~/.gEDA;\ |
) |
|
|
|
|
|
/socgen/trunk/bin/ver2gedasch
181,7 → 181,7
|
while( $name =pop(@invads)) |
{ |
printf FILE ("C $in_pad $pin_y 1 0 0 ipad_2.sym \n{\nT $in_edg $pin_y $color $size 1 1 0 6 1 1\nrefdes=%s\n}\n",$name); |
printf FILE ("C $in_pad $pin_y 1 0 0 in_port_v.sym \n{\nT $in_edg $pin_y $color $size 1 1 0 6 1 1\nrefdes=%s\n}\n",$name); |
$pin_y = $pin_y +400; |
} |
|
188,7 → 188,7
|
while( $name =pop(@inpads)) |
{ |
printf FILE ("C $in_pad $pin_y 1 0 0 ipad_1.sym \n{\nT $in_edg $pin_y $color $size 1 1 0 6 1 1 \nrefdes=%s\n}\n",$name); |
printf FILE ("C $in_pad $pin_y 1 0 0 in_port.sym \n{\nT $in_edg $pin_y $color $size 1 1 0 6 1 1 \nrefdes=%s\n}\n",$name); |
$pin_y = $pin_y +400; |
} |
|
196,7 → 196,7
|
while( $name =pop(@inoutvads)) |
{ |
printf FILE ("C $in_pad $pin_y 1 0 0 iopad_2.sym \n{\nT $in_edg $pin_y $color $size 1 1 0 6 1 1\nrefdes=%s\n}\n",$name); |
printf FILE ("C $in_pad $pin_y 1 0 0 io_port_v.sym \n{\nT $in_edg $pin_y $color $size 1 1 0 6 1 1\nrefdes=%s\n}\n",$name); |
$pin_y = $pin_y +400; |
} |
|
203,7 → 203,7
|
while( $name =pop(@inoutpads)) |
{ |
printf FILE ("C $in_pad $pin_y 1 0 0 iopad_1.sym \n{\nT $in_edg $pin_y $color $size 1 1 0 6 1 1 \nrefdes=%s\n}\n",$name); |
printf FILE ("C $in_pad $pin_y 1 0 0 io_port.sym \n{\nT $in_edg $pin_y $color $size 1 1 0 6 1 1 \nrefdes=%s\n}\n",$name); |
$pin_y = $pin_y +400; |
} |
|
214,7 → 214,7
|
while( $name =pop(@outvads)) |
{ |
printf FILE ("C $out_pad $pin_y 1 0 0 opad_2.sym\n{\nT $out_edg $pin_y $color $size 1 1 0 0 1 1 \nrefdes=%s\n}\n",$name); |
printf FILE ("C $out_pad $pin_y 1 0 0 out_port_v.sym\n{\nT $out_edg $pin_y $color $size 1 1 0 0 1 1 \nrefdes=%s\n}\n",$name); |
$pin_y = $pin_y +400; |
} |
|
221,7 → 221,7
|
while( $name =pop(@outpads)) |
{ |
printf FILE ("C $out_pad $pin_y 1 0 0 opad_1.sym\n{\nT $out_edg $pin_y $color $size 1 1 0 0 1 1\nrefdes=%s\n}\n",$name); |
printf FILE ("C $out_pad $pin_y 1 0 0 out_port.sym\n{\nT $out_edg $pin_y $color $size 1 1 0 0 1 1\nrefdes=%s\n}\n",$name); |
$pin_y = $pin_y +400; |
} |
|
/socgen/trunk/projects/pic_micro/ip/soc_mouse/doc/geda/drawing/sym/io_module_mouse_ps2.sym
0,0 → 1,146
v 20100214 1 |
B 300 0 2900 2300 3 60 0 0 -1 -1 0 -1 -1 -1 -1 -1 |
T 400 2450 5 10 1 1 0 0 1 1 |
device=io_module_mouse_ps2 |
T 400 2650 8 10 1 1 0 0 1 1 |
refdes=U? |
P 300 200 0 200 10 1 1 |
{ |
T 400 200 5 10 1 1 0 1 1 1 |
pinnumber=wdata[7:0] |
T 400 200 5 10 0 1 0 1 1 1 |
pinseq=1 |
} |
P 300 400 0 400 10 1 1 |
{ |
T 400 400 5 10 1 1 0 1 1 1 |
pinnumber=waddr[7:0] |
T 400 400 5 10 0 1 0 1 1 1 |
pinseq=2 |
} |
P 300 600 0 600 10 1 1 |
{ |
T 400 600 5 10 1 1 0 1 1 1 |
pinnumber=raddr[7:0] |
T 400 600 5 10 0 1 0 1 1 1 |
pinseq=3 |
} |
P 300 800 0 800 4 0 1 |
{ |
T 400 800 5 10 1 1 0 1 1 1 |
pinnumber=wr |
T 400 800 5 10 0 1 0 1 1 1 |
pinseq=4 |
} |
P 300 1000 0 1000 4 0 1 |
{ |
T 400 1000 5 10 1 1 0 1 1 1 |
pinnumber=reset |
T 400 1000 5 10 0 1 0 1 1 1 |
pinseq=5 |
} |
P 300 1200 0 1200 4 0 1 |
{ |
T 400 1200 5 10 1 1 0 1 1 1 |
pinnumber=rd |
T 400 1200 5 10 0 1 0 1 1 1 |
pinseq=6 |
} |
P 300 1400 0 1400 4 0 1 |
{ |
T 400 1400 5 10 1 1 0 1 1 1 |
pinnumber=ps2_data_in |
T 400 1400 5 10 0 1 0 1 1 1 |
pinseq=7 |
} |
P 300 1600 0 1600 4 0 1 |
{ |
T 400 1600 5 10 1 1 0 1 1 1 |
pinnumber=ps2_clk_in |
T 400 1600 5 10 0 1 0 1 1 1 |
pinseq=8 |
} |
P 300 1800 0 1800 4 0 1 |
{ |
T 400 1800 5 10 1 1 0 1 1 1 |
pinnumber=cs |
T 400 1800 5 10 0 1 0 1 1 1 |
pinseq=9 |
} |
P 300 2000 0 2000 4 0 1 |
{ |
T 400 2000 5 10 1 1 0 1 1 1 |
pinnumber=clk |
T 400 2000 5 10 0 1 0 1 1 1 |
pinseq=10 |
} |
P 3200 200 3500 200 10 1 1 |
{ |
T 3100 200 5 10 1 1 0 7 1 1 |
pinnumber=y_pos[9:0] |
T 3100 200 5 10 0 1 0 7 1 1 |
pinseq=11 |
} |
P 3200 400 3500 400 10 1 1 |
{ |
T 3100 400 5 10 1 1 0 7 1 1 |
pinnumber=x_pos[9:0] |
T 3100 400 5 10 0 1 0 7 1 1 |
pinseq=12 |
} |
P 3200 600 3500 600 10 1 1 |
{ |
T 3100 600 5 10 1 1 0 7 1 1 |
pinnumber=rdata[7:0] |
T 3100 600 5 10 0 1 0 7 1 1 |
pinseq=13 |
} |
P 3200 800 3500 800 4 0 1 |
{ |
T 3100 800 5 10 1 1 0 7 1 1 |
pinnumber=rcv_data_avail |
T 3200 800 5 10 0 1 0 7 1 1 |
pinseq=14 |
} |
P 3200 1000 3500 1000 4 0 1 |
{ |
T 3100 1000 5 10 1 1 0 7 1 1 |
pinnumber=ps2_data_oe |
T 3200 1000 5 10 0 1 0 7 1 1 |
pinseq=15 |
} |
P 3200 1200 3500 1200 4 0 1 |
{ |
T 3100 1200 5 10 1 1 0 7 1 1 |
pinnumber=ps2_clk_oe |
T 3200 1200 5 10 0 1 0 7 1 1 |
pinseq=16 |
} |
P 3200 1400 3500 1400 4 0 1 |
{ |
T 3100 1400 5 10 1 1 0 7 1 1 |
pinnumber=new_packet |
T 3200 1400 5 10 0 1 0 7 1 1 |
pinseq=17 |
} |
P 3200 1600 3500 1600 4 0 1 |
{ |
T 3100 1600 5 10 1 1 0 7 1 1 |
pinnumber=ms_right |
T 3200 1600 5 10 0 1 0 7 1 1 |
pinseq=18 |
} |
P 3200 1800 3500 1800 4 0 1 |
{ |
T 3100 1800 5 10 1 1 0 7 1 1 |
pinnumber=ms_mid |
T 3200 1800 5 10 0 1 0 7 1 1 |
pinseq=19 |
} |
P 3200 2000 3500 2000 4 0 1 |
{ |
T 3100 2000 5 10 1 1 0 7 1 1 |
pinnumber=ms_left |
T 3200 2000 5 10 0 1 0 7 1 1 |
pinseq=20 |
} |
/socgen/trunk/projects/pic_micro/ip/soc_mouse/doc/geda/drawing/sym/io_module_mouse_utimer.sym
0,0 → 1,69
v 20100214 1 |
B 300 0 3500 1900 3 60 0 0 -1 -1 0 -1 -1 -1 -1 -1 |
T 400 2050 5 10 1 1 0 0 1 1 |
device=io_module_mouse_utimer |
T 400 2250 8 10 1 1 0 0 1 1 |
refdes=U? |
P 300 200 0 200 10 1 1 |
{ |
T 400 200 5 10 1 1 0 1 1 1 |
pinnumber=wdata[7:0] |
T 400 200 5 10 0 1 0 1 1 1 |
pinseq=1 |
} |
P 300 400 0 400 10 1 1 |
{ |
T 400 400 5 10 1 1 0 1 1 1 |
pinnumber=waddr[ADDR_WIDTH-1:0] |
T 400 400 5 10 0 1 0 1 1 1 |
pinseq=2 |
} |
P 300 600 0 600 10 1 1 |
{ |
T 400 600 5 10 1 1 0 1 1 1 |
pinnumber=raddr[ADDR_WIDTH-1:0] |
T 400 600 5 10 0 1 0 1 1 1 |
pinseq=3 |
} |
P 300 800 0 800 4 0 1 |
{ |
T 400 800 5 10 1 1 0 1 1 1 |
pinnumber=wr |
T 400 800 5 10 0 1 0 1 1 1 |
pinseq=4 |
} |
P 300 1000 0 1000 4 0 1 |
{ |
T 400 1000 5 10 1 1 0 1 1 1 |
pinnumber=reset |
T 400 1000 5 10 0 1 0 1 1 1 |
pinseq=5 |
} |
P 300 1200 0 1200 4 0 1 |
{ |
T 400 1200 5 10 1 1 0 1 1 1 |
pinnumber=rd |
T 400 1200 5 10 0 1 0 1 1 1 |
pinseq=6 |
} |
P 300 1400 0 1400 4 0 1 |
{ |
T 400 1400 5 10 1 1 0 1 1 1 |
pinnumber=cs |
T 400 1400 5 10 0 1 0 1 1 1 |
pinseq=7 |
} |
P 300 1600 0 1600 4 0 1 |
{ |
T 400 1600 5 10 1 1 0 1 1 1 |
pinnumber=clk |
T 400 1600 5 10 0 1 0 1 1 1 |
pinseq=8 |
} |
P 3800 200 4100 200 10 1 1 |
{ |
T 3700 200 5 10 1 1 0 7 1 1 |
pinnumber=rdata[7:0] |
T 3700 200 5 10 0 1 0 7 1 1 |
pinseq=9 |
} |
/socgen/trunk/projects/pic_micro/ip/soc_mouse/doc/geda/drawing/sym/uart.sym
0,0 → 1,146
v 20100214 1 |
B 300 0 4700 2700 3 60 0 0 -1 -1 0 -1 -1 -1 -1 -1 |
T 400 2850 5 10 1 1 0 0 1 1 |
device=uart |
T 400 3050 8 10 1 1 0 0 1 1 |
refdes=U? |
P 300 200 0 200 10 1 1 |
{ |
T 400 200 5 10 1 1 0 1 1 1 |
pinnumber=txd_data_in[SIZE-1:0] |
T 400 200 5 10 0 1 0 1 1 1 |
pinseq=1 |
} |
P 300 400 0 400 4 0 1 |
{ |
T 400 400 5 10 1 1 0 1 1 1 |
pinnumber=txd_parity |
T 400 400 5 10 0 1 0 1 1 1 |
pinseq=2 |
} |
P 300 600 0 600 4 0 1 |
{ |
T 400 600 5 10 1 1 0 1 1 1 |
pinnumber=txd_load |
T 400 600 5 10 0 1 0 1 1 1 |
pinseq=3 |
} |
P 300 800 0 800 4 0 1 |
{ |
T 400 800 5 10 1 1 0 1 1 1 |
pinnumber=txd_force_parity |
T 400 800 5 10 0 1 0 1 1 1 |
pinseq=4 |
} |
P 300 1000 0 1000 4 0 1 |
{ |
T 400 1000 5 10 1 1 0 1 1 1 |
pinnumber=txd_break |
T 400 1000 5 10 0 1 0 1 1 1 |
pinseq=5 |
} |
P 300 1200 0 1200 4 0 1 |
{ |
T 400 1200 5 10 1 1 0 1 1 1 |
pinnumber=rxd_parity |
T 400 1200 5 10 0 1 0 1 1 1 |
pinseq=6 |
} |
P 300 1400 0 1400 4 0 1 |
{ |
T 400 1400 5 10 1 1 0 1 1 1 |
pinnumber=rxd_pad_in |
T 400 1400 5 10 0 1 0 1 1 1 |
pinseq=7 |
} |
P 300 1600 0 1600 4 0 1 |
{ |
T 400 1600 5 10 1 1 0 1 1 1 |
pinnumber=rxd_force_parity |
T 400 1600 5 10 0 1 0 1 1 1 |
pinseq=8 |
} |
P 300 1800 0 1800 4 0 1 |
{ |
T 400 1800 5 10 1 1 0 1 1 1 |
pinnumber=rts_in |
T 400 1800 5 10 0 1 0 1 1 1 |
pinseq=9 |
} |
P 300 2000 0 2000 4 0 1 |
{ |
T 400 2000 5 10 1 1 0 1 1 1 |
pinnumber=reset |
T 400 2000 5 10 0 1 0 1 1 1 |
pinseq=10 |
} |
P 300 2200 0 2200 4 0 1 |
{ |
T 400 2200 5 10 1 1 0 1 1 1 |
pinnumber=cts_pad_in |
T 400 2200 5 10 0 1 0 1 1 1 |
pinseq=11 |
} |
P 300 2400 0 2400 4 0 1 |
{ |
T 400 2400 5 10 1 1 0 1 1 1 |
pinnumber=clk |
T 400 2400 5 10 0 1 0 1 1 1 |
pinseq=12 |
} |
P 5000 200 5300 200 10 1 1 |
{ |
T 4900 200 5 10 1 1 0 7 1 1 |
pinnumber=rxd_data_out[SIZE-1:0] |
T 4900 200 5 10 0 1 0 7 1 1 |
pinseq=13 |
} |
P 5000 400 5300 400 4 0 1 |
{ |
T 4900 400 5 10 1 1 0 7 1 1 |
pinnumber=txd_pad_out |
T 5000 400 5 10 0 1 0 7 1 1 |
pinseq=14 |
} |
P 5000 600 5300 600 4 0 1 |
{ |
T 4900 600 5 10 1 1 0 7 1 1 |
pinnumber=txd_buffer_empty |
T 5000 600 5 10 0 1 0 7 1 1 |
pinseq=15 |
} |
P 5000 800 5300 800 4 0 1 |
{ |
T 4900 800 5 10 1 1 0 7 1 1 |
pinnumber=rxd_stop_error |
T 5000 800 5 10 0 1 0 7 1 1 |
pinseq=16 |
} |
P 5000 1000 5300 1000 4 0 1 |
{ |
T 4900 1000 5 10 1 1 0 7 1 1 |
pinnumber=rxd_parity_error |
T 5000 1000 5 10 0 1 0 7 1 1 |
pinseq=17 |
} |
P 5000 1200 5300 1200 4 0 1 |
{ |
T 4900 1200 5 10 1 1 0 7 1 1 |
pinnumber=rxd_buffer_full |
T 5000 1200 5 10 0 1 0 7 1 1 |
pinseq=18 |
} |
P 5000 1400 5300 1400 4 0 1 |
{ |
T 4900 1400 5 10 1 1 0 7 1 1 |
pinnumber=rts_pad_out |
T 5000 1400 5 10 0 1 0 7 1 1 |
pinseq=19 |
} |
P 5000 1600 5300 1600 4 0 1 |
{ |
T 4900 1600 5 10 1 1 0 7 1 1 |
pinnumber=cts_out |
T 5000 1600 5 10 0 1 0 7 1 1 |
pinseq=20 |
} |
/socgen/trunk/projects/pic_micro/ip/soc_mouse/doc/geda/drawing/sym/uart_xmit.sym
0,0 → 1,76
v 20100214 1 |
B 300 0 4100 1900 3 60 0 0 -1 -1 0 -1 -1 -1 -1 -1 |
T 400 2050 5 10 1 1 0 0 1 1 |
device=uart_xmit |
T 400 2250 8 10 1 1 0 0 1 1 |
refdes=U? |
P 300 200 0 200 10 1 1 |
{ |
T 400 200 5 10 1 1 0 1 1 1 |
pinnumber=txd_data_in[SIZE-1:0] |
T 400 200 5 10 0 1 0 1 1 1 |
pinseq=1 |
} |
P 300 400 0 400 4 0 1 |
{ |
T 400 400 5 10 1 1 0 1 1 1 |
pinnumber=txd_load |
T 400 400 5 10 0 1 0 1 1 1 |
pinseq=2 |
} |
P 300 600 0 600 4 0 1 |
{ |
T 400 600 5 10 1 1 0 1 1 1 |
pinnumber=txd_break |
T 400 600 5 10 0 1 0 1 1 1 |
pinseq=3 |
} |
P 300 800 0 800 4 0 1 |
{ |
T 400 800 5 10 1 1 0 1 1 1 |
pinnumber=reset |
T 400 800 5 10 0 1 0 1 1 1 |
pinseq=4 |
} |
P 300 1000 0 1000 4 0 1 |
{ |
T 400 1000 5 10 1 1 0 1 1 1 |
pinnumber=parity |
T 400 1000 5 10 0 1 0 1 1 1 |
pinseq=5 |
} |
P 300 1200 0 1200 4 0 1 |
{ |
T 400 1200 5 10 1 1 0 1 1 1 |
pinnumber=force_parity |
T 400 1200 5 10 0 1 0 1 1 1 |
pinseq=6 |
} |
P 300 1400 0 1400 4 0 1 |
{ |
T 400 1400 5 10 1 1 0 1 1 1 |
pinnumber=clk |
T 400 1400 5 10 0 1 0 1 1 1 |
pinseq=7 |
} |
P 300 1600 0 1600 4 0 1 |
{ |
T 400 1600 5 10 1 1 0 1 1 1 |
pinnumber=baud_clk |
T 400 1600 5 10 0 1 0 1 1 1 |
pinseq=8 |
} |
P 4400 200 4700 200 4 0 1 |
{ |
T 4300 200 5 10 1 1 0 7 1 1 |
pinnumber=txd_pad_out |
T 4400 200 5 10 0 1 0 7 1 1 |
pinseq=9 |
} |
P 4400 400 4700 400 4 0 1 |
{ |
T 4300 400 5 10 1 1 0 7 1 1 |
pinnumber=txd_buffer_empty |
T 4400 400 5 10 0 1 0 7 1 1 |
pinseq=10 |
} |
/socgen/trunk/projects/pic_micro/ip/soc_mouse/doc/geda/drawing/sym/cde_sram.sym
0,0 → 1,62
v 20100214 1 |
B 300 0 4500 1700 3 60 0 0 -1 -1 0 -1 -1 -1 -1 -1 |
T 400 1850 5 10 1 1 0 0 1 1 |
device=cde_sram |
T 400 2050 8 10 1 1 0 0 1 1 |
refdes=U? |
P 300 200 0 200 10 1 1 |
{ |
T 400 200 5 10 1 1 0 1 1 1 |
pinnumber=Write_Data[WIDTH-1:0] |
T 400 200 5 10 0 1 0 1 1 1 |
pinseq=1 |
} |
P 300 400 0 400 10 1 1 |
{ |
T 400 400 5 10 1 1 0 1 1 1 |
pinnumber=WR_Add[ADDR-1:0] |
T 400 400 5 10 0 1 0 1 1 1 |
pinseq=2 |
} |
P 300 600 0 600 10 1 1 |
{ |
T 400 600 5 10 1 1 0 1 1 1 |
pinnumber=RD_Add[ADDR-1:0] |
T 400 600 5 10 0 1 0 1 1 1 |
pinseq=3 |
} |
P 300 800 0 800 4 0 1 |
{ |
T 400 800 5 10 1 1 0 1 1 1 |
pinnumber=clk |
T 400 800 5 10 0 1 0 1 1 1 |
pinseq=4 |
} |
P 300 1000 0 1000 4 0 1 |
{ |
T 400 1000 5 10 1 1 0 1 1 1 |
pinnumber=WR |
T 400 1000 5 10 0 1 0 1 1 1 |
pinseq=5 |
} |
P 300 1200 0 1200 4 0 1 |
{ |
T 400 1200 5 10 1 1 0 1 1 1 |
pinnumber=RD |
T 400 1200 5 10 0 1 0 1 1 1 |
pinseq=6 |
} |
P 300 1400 0 1400 4 0 1 |
{ |
T 400 1400 5 10 1 1 0 1 1 1 |
pinnumber=CS |
T 400 1400 5 10 0 1 0 1 1 1 |
pinseq=7 |
} |
P 4800 200 5100 200 10 1 1 |
{ |
T 4700 200 5 10 1 1 0 7 1 1 |
pinnumber=Read_Data[WIDTH-1:0] |
T 4700 200 5 10 0 1 0 7 1 1 |
pinseq=8 |
} |
/socgen/trunk/projects/pic_micro/ip/soc_mouse/doc/geda/drawing/sym/io_module_mouse_uart.sym
0,0 → 1,111
v 20100214 1 |
B 300 0 2500 2300 3 60 0 0 -1 -1 0 -1 -1 -1 -1 -1 |
T 400 2450 5 10 1 1 0 0 1 1 |
device=io_module_mouse_uart |
T 400 2650 8 10 1 1 0 0 1 1 |
refdes=U? |
P 300 200 0 200 10 1 1 |
{ |
T 400 200 5 10 1 1 0 1 1 1 |
pinnumber=wdata[7:0] |
T 400 200 5 10 0 1 0 1 1 1 |
pinseq=1 |
} |
P 300 400 0 400 10 1 1 |
{ |
T 400 400 5 10 1 1 0 1 1 1 |
pinnumber=waddr[7:0] |
T 400 400 5 10 0 1 0 1 1 1 |
pinseq=2 |
} |
P 300 600 0 600 10 1 1 |
{ |
T 400 600 5 10 1 1 0 1 1 1 |
pinnumber=raddr[7:0] |
T 400 600 5 10 0 1 0 1 1 1 |
pinseq=3 |
} |
P 300 800 0 800 4 0 1 |
{ |
T 400 800 5 10 1 1 0 1 1 1 |
pinnumber=wr |
T 400 800 5 10 0 1 0 1 1 1 |
pinseq=4 |
} |
P 300 1000 0 1000 4 0 1 |
{ |
T 400 1000 5 10 1 1 0 1 1 1 |
pinnumber=rxd_pad_in |
T 400 1000 5 10 0 1 0 1 1 1 |
pinseq=5 |
} |
P 300 1200 0 1200 4 0 1 |
{ |
T 400 1200 5 10 1 1 0 1 1 1 |
pinnumber=reset |
T 400 1200 5 10 0 1 0 1 1 1 |
pinseq=6 |
} |
P 300 1400 0 1400 4 0 1 |
{ |
T 400 1400 5 10 1 1 0 1 1 1 |
pinnumber=rd |
T 400 1400 5 10 0 1 0 1 1 1 |
pinseq=7 |
} |
P 300 1600 0 1600 4 0 1 |
{ |
T 400 1600 5 10 1 1 0 1 1 1 |
pinnumber=cts_pad_in |
T 400 1600 5 10 0 1 0 1 1 1 |
pinseq=8 |
} |
P 300 1800 0 1800 4 0 1 |
{ |
T 400 1800 5 10 1 1 0 1 1 1 |
pinnumber=cs |
T 400 1800 5 10 0 1 0 1 1 1 |
pinseq=9 |
} |
P 300 2000 0 2000 4 0 1 |
{ |
T 400 2000 5 10 1 1 0 1 1 1 |
pinnumber=clk |
T 400 2000 5 10 0 1 0 1 1 1 |
pinseq=10 |
} |
P 2800 200 3100 200 10 1 1 |
{ |
T 2700 200 5 10 1 1 0 7 1 1 |
pinnumber=rdata[7:0] |
T 2700 200 5 10 0 1 0 7 1 1 |
pinseq=11 |
} |
P 2800 400 3100 400 4 0 1 |
{ |
T 2700 400 5 10 1 1 0 7 1 1 |
pinnumber=txd_pad_out |
T 2800 400 5 10 0 1 0 7 1 1 |
pinseq=12 |
} |
P 2800 600 3100 600 4 0 1 |
{ |
T 2700 600 5 10 1 1 0 7 1 1 |
pinnumber=tx_irq |
T 2800 600 5 10 0 1 0 7 1 1 |
pinseq=13 |
} |
P 2800 800 3100 800 4 0 1 |
{ |
T 2700 800 5 10 1 1 0 7 1 1 |
pinnumber=rx_irq |
T 2800 800 5 10 0 1 0 7 1 1 |
pinseq=14 |
} |
P 2800 1000 3100 1000 4 0 1 |
{ |
T 2700 1000 5 10 1 1 0 7 1 1 |
pinnumber=rts_pad_out |
T 2800 1000 5 10 0 1 0 7 1 1 |
pinseq=15 |
} |
/socgen/trunk/projects/pic_micro/ip/soc_mouse/doc/geda/drawing/sym/io_module_mouse_pic.sym
0,0 → 1,90
v 20100214 1 |
B 300 0 3500 2100 3 60 0 0 -1 -1 0 -1 -1 -1 -1 -1 |
T 400 2250 5 10 1 1 0 0 1 1 |
device=io_module_mouse_pic |
T 400 2450 8 10 1 1 0 0 1 1 |
refdes=U? |
P 300 200 0 200 10 1 1 |
{ |
T 400 200 5 10 1 1 0 1 1 1 |
pinnumber=wdata[7:0] |
T 400 200 5 10 0 1 0 1 1 1 |
pinseq=1 |
} |
P 300 400 0 400 10 1 1 |
{ |
T 400 400 5 10 1 1 0 1 1 1 |
pinnumber=waddr[ADDR_WIDTH-1:0] |
T 400 400 5 10 0 1 0 1 1 1 |
pinseq=2 |
} |
P 300 600 0 600 10 1 1 |
{ |
T 400 600 5 10 1 1 0 1 1 1 |
pinnumber=raddr[ADDR_WIDTH-1:0] |
T 400 600 5 10 0 1 0 1 1 1 |
pinseq=3 |
} |
P 300 800 0 800 10 1 1 |
{ |
T 400 800 5 10 1 1 0 1 1 1 |
pinnumber=int_in[7:0] |
T 400 800 5 10 0 1 0 1 1 1 |
pinseq=4 |
} |
P 300 1000 0 1000 4 0 1 |
{ |
T 400 1000 5 10 1 1 0 1 1 1 |
pinnumber=wr |
T 400 1000 5 10 0 1 0 1 1 1 |
pinseq=5 |
} |
P 300 1200 0 1200 4 0 1 |
{ |
T 400 1200 5 10 1 1 0 1 1 1 |
pinnumber=reset |
T 400 1200 5 10 0 1 0 1 1 1 |
pinseq=6 |
} |
P 300 1400 0 1400 4 0 1 |
{ |
T 400 1400 5 10 1 1 0 1 1 1 |
pinnumber=rd |
T 400 1400 5 10 0 1 0 1 1 1 |
pinseq=7 |
} |
P 300 1600 0 1600 4 0 1 |
{ |
T 400 1600 5 10 1 1 0 1 1 1 |
pinnumber=cs |
T 400 1600 5 10 0 1 0 1 1 1 |
pinseq=8 |
} |
P 300 1800 0 1800 4 0 1 |
{ |
T 400 1800 5 10 1 1 0 1 1 1 |
pinnumber=clk |
T 400 1800 5 10 0 1 0 1 1 1 |
pinseq=9 |
} |
P 3800 200 4100 200 10 1 1 |
{ |
T 3700 200 5 10 1 1 0 7 1 1 |
pinnumber=rdata[7:0] |
T 3700 200 5 10 0 1 0 7 1 1 |
pinseq=10 |
} |
P 3800 400 4100 400 4 0 1 |
{ |
T 3700 400 5 10 1 1 0 7 1 1 |
pinnumber=nmi_out |
T 3800 400 5 10 0 1 0 7 1 1 |
pinseq=11 |
} |
P 3800 600 4100 600 4 0 1 |
{ |
T 3700 600 5 10 1 1 0 7 1 1 |
pinnumber=irq_out |
T 3800 600 5 10 0 1 0 7 1 1 |
pinseq=12 |
} |
/socgen/trunk/projects/pic_micro/ip/soc_mouse/doc/geda/drawing/sym/io_module_mouse.sym
0,0 → 1,209
v 20100214 1 |
B 300 0 5000 3500 3 60 0 0 -1 -1 0 -1 -1 -1 -1 -1 |
T 400 3650 5 10 1 1 0 0 1 1 |
device=io_module_mouse |
T 400 3850 8 10 1 1 0 0 1 1 |
refdes=U? |
P 300 200 0 200 10 1 1 |
{ |
T 400 200 5 10 1 1 0 1 1 1 |
pinnumber=wdata[7:0] |
T 400 200 5 10 0 1 0 1 1 1 |
pinseq=1 |
} |
P 300 400 0 400 10 1 1 |
{ |
T 400 400 5 10 1 1 0 1 1 1 |
pinnumber=waddr[ADDR_WIDTH-BASE_WIDTH-1:0] |
T 400 400 5 10 0 1 0 1 1 1 |
pinseq=2 |
} |
P 300 600 0 600 10 1 1 |
{ |
T 400 600 5 10 1 1 0 1 1 1 |
pinnumber=ext_irq_in[7:0] |
T 400 600 5 10 0 1 0 1 1 1 |
pinseq=3 |
} |
P 300 800 0 800 10 1 1 |
{ |
T 400 800 5 10 1 1 0 1 1 1 |
pinnumber=addr[ADDR_WIDTH-1:0] |
T 400 800 5 10 0 1 0 1 1 1 |
pinseq=4 |
} |
P 300 1000 0 1000 4 0 1 |
{ |
T 400 1000 5 10 1 1 0 1 1 1 |
pinnumber=wr |
T 400 1000 5 10 0 1 0 1 1 1 |
pinseq=5 |
} |
P 300 1200 0 1200 4 0 1 |
{ |
T 400 1200 5 10 1 1 0 1 1 1 |
pinnumber=rxd_pad_in |
T 400 1200 5 10 0 1 0 1 1 1 |
pinseq=6 |
} |
P 300 1400 0 1400 4 0 1 |
{ |
T 400 1400 5 10 1 1 0 1 1 1 |
pinnumber=reset |
T 400 1400 5 10 0 1 0 1 1 1 |
pinseq=7 |
} |
P 300 1600 0 1600 4 0 1 |
{ |
T 400 1600 5 10 1 1 0 1 1 1 |
pinnumber=rd |
T 400 1600 5 10 0 1 0 1 1 1 |
pinseq=8 |
} |
P 300 1800 0 1800 4 0 1 |
{ |
T 400 1800 5 10 1 1 0 1 1 1 |
pinnumber=ps2_data_in |
T 400 1800 5 10 0 1 0 1 1 1 |
pinseq=9 |
} |
P 300 2000 0 2000 4 0 1 |
{ |
T 400 2000 5 10 1 1 0 1 1 1 |
pinnumber=ps2_clk_in |
T 400 2000 5 10 0 1 0 1 1 1 |
pinseq=10 |
} |
P 300 2200 0 2200 4 0 1 |
{ |
T 400 2200 5 10 1 1 0 1 1 1 |
pinnumber=enable |
T 400 2200 5 10 0 1 0 1 1 1 |
pinseq=11 |
} |
P 300 2400 0 2400 4 0 1 |
{ |
T 400 2400 5 10 1 1 0 1 1 1 |
pinnumber=cts_pad_in |
T 400 2400 5 10 0 1 0 1 1 1 |
pinseq=12 |
} |
P 300 2600 0 2600 4 0 1 |
{ |
T 400 2600 5 10 1 1 0 1 1 1 |
pinnumber=clk |
T 400 2600 5 10 0 1 0 1 1 1 |
pinseq=13 |
} |
P 5300 200 5600 200 10 1 1 |
{ |
T 5200 200 5 10 1 1 0 7 1 1 |
pinnumber=y_pos[9:0] |
T 5200 200 5 10 0 1 0 7 1 1 |
pinseq=14 |
} |
P 5300 400 5600 400 10 1 1 |
{ |
T 5200 400 5 10 1 1 0 7 1 1 |
pinnumber=x_pos[9:0] |
T 5200 400 5 10 0 1 0 7 1 1 |
pinseq=15 |
} |
P 5300 600 5600 600 10 1 1 |
{ |
T 5200 600 5 10 1 1 0 7 1 1 |
pinnumber=rdata[7:0] |
T 5200 600 5 10 0 1 0 7 1 1 |
pinseq=16 |
} |
P 5300 800 5600 800 4 0 1 |
{ |
T 5200 800 5 10 1 1 0 7 1 1 |
pinnumber=txd_pad_out |
T 5300 800 5 10 0 1 0 7 1 1 |
pinseq=17 |
} |
P 5300 1000 5600 1000 4 0 1 |
{ |
T 5200 1000 5 10 1 1 0 7 1 1 |
pinnumber=tx_irq |
T 5300 1000 5 10 0 1 0 7 1 1 |
pinseq=18 |
} |
P 5300 1200 5600 1200 4 0 1 |
{ |
T 5200 1200 5 10 1 1 0 7 1 1 |
pinnumber=rx_irq |
T 5300 1200 5 10 0 1 0 7 1 1 |
pinseq=19 |
} |
P 5300 1400 5600 1400 4 0 1 |
{ |
T 5200 1400 5 10 1 1 0 7 1 1 |
pinnumber=rts_pad_out |
T 5300 1400 5 10 0 1 0 7 1 1 |
pinseq=20 |
} |
P 5300 1600 5600 1600 4 0 1 |
{ |
T 5200 1600 5 10 1 1 0 7 1 1 |
pinnumber=ps2_data_oe |
T 5300 1600 5 10 0 1 0 7 1 1 |
pinseq=21 |
} |
P 5300 1800 5600 1800 4 0 1 |
{ |
T 5200 1800 5 10 1 1 0 7 1 1 |
pinnumber=ps2_data_avail |
T 5300 1800 5 10 0 1 0 7 1 1 |
pinseq=22 |
} |
P 5300 2000 5600 2000 4 0 1 |
{ |
T 5200 2000 5 10 1 1 0 7 1 1 |
pinnumber=ps2_clk_oe |
T 5300 2000 5 10 0 1 0 7 1 1 |
pinseq=23 |
} |
P 5300 2200 5600 2200 4 0 1 |
{ |
T 5200 2200 5 10 1 1 0 7 1 1 |
pinnumber=pic_nmi |
T 5300 2200 5 10 0 1 0 7 1 1 |
pinseq=24 |
} |
P 5300 2400 5600 2400 4 0 1 |
{ |
T 5200 2400 5 10 1 1 0 7 1 1 |
pinnumber=pic_irq |
T 5300 2400 5 10 0 1 0 7 1 1 |
pinseq=25 |
} |
P 5300 2600 5600 2600 4 0 1 |
{ |
T 5200 2600 5 10 1 1 0 7 1 1 |
pinnumber=new_packet |
T 5300 2600 5 10 0 1 0 7 1 1 |
pinseq=26 |
} |
P 5300 2800 5600 2800 4 0 1 |
{ |
T 5200 2800 5 10 1 1 0 7 1 1 |
pinnumber=ms_right |
T 5300 2800 5 10 0 1 0 7 1 1 |
pinseq=27 |
} |
P 5300 3000 5600 3000 4 0 1 |
{ |
T 5200 3000 5 10 1 1 0 7 1 1 |
pinnumber=ms_mid |
T 5300 3000 5 10 0 1 0 7 1 1 |
pinseq=28 |
} |
P 5300 3200 5600 3200 4 0 1 |
{ |
T 5200 3200 5 10 1 1 0 7 1 1 |
pinnumber=ms_left |
T 5300 3200 5 10 0 1 0 7 1 1 |
pinseq=29 |
} |
/socgen/trunk/projects/pic_micro/ip/soc_mouse/doc/geda/drawing/sym/ps2_interface.sym
0,0 → 1,132
v 20100214 1 |
B 300 0 3100 2500 3 60 0 0 -1 -1 0 -1 -1 -1 -1 -1 |
T 400 2650 5 10 1 1 0 0 1 1 |
device=ps2_interface |
T 400 2850 8 10 1 1 0 0 1 1 |
refdes=U? |
P 300 200 0 200 10 1 1 |
{ |
T 400 200 5 10 1 1 0 1 1 1 |
pinnumber=tx_data[7:0] |
T 400 200 5 10 0 1 0 1 1 1 |
pinseq=1 |
} |
P 300 400 0 400 4 0 1 |
{ |
T 400 400 5 10 1 1 0 1 1 1 |
pinnumber=write |
T 400 400 5 10 0 1 0 1 1 1 |
pinseq=2 |
} |
P 300 600 0 600 4 0 1 |
{ |
T 400 600 5 10 1 1 0 1 1 1 |
pinnumber=reset |
T 400 600 5 10 0 1 0 1 1 1 |
pinseq=3 |
} |
P 300 800 0 800 4 0 1 |
{ |
T 400 800 5 10 1 1 0 1 1 1 |
pinnumber=ps2_data_in |
T 400 800 5 10 0 1 0 1 1 1 |
pinseq=4 |
} |
P 300 1000 0 1000 4 0 1 |
{ |
T 400 1000 5 10 1 1 0 1 1 1 |
pinnumber=ps2_clk_in |
T 400 1000 5 10 0 1 0 1 1 1 |
pinseq=5 |
} |
P 300 1200 0 1200 4 0 1 |
{ |
T 400 1200 5 10 1 1 0 1 1 1 |
pinnumber=clr_rx_full |
T 400 1200 5 10 0 1 0 1 1 1 |
pinseq=6 |
} |
P 300 1400 0 1400 4 0 1 |
{ |
T 400 1400 5 10 1 1 0 1 1 1 |
pinnumber=clk |
T 400 1400 5 10 0 1 0 1 1 1 |
pinseq=7 |
} |
P 3400 200 3700 200 10 1 1 |
{ |
T 3300 200 5 10 1 1 0 7 1 1 |
pinnumber=rx_data[7:0] |
T 3300 200 5 10 0 1 0 7 1 1 |
pinseq=8 |
} |
P 3400 400 3700 400 4 0 1 |
{ |
T 3300 400 5 10 1 1 0 7 1 1 |
pinnumber=tx_ack_error |
T 3400 400 5 10 0 1 0 7 1 1 |
pinseq=9 |
} |
P 3400 600 3700 600 4 0 1 |
{ |
T 3300 600 5 10 1 1 0 7 1 1 |
pinnumber=rx_parity_rcv |
T 3400 600 5 10 0 1 0 7 1 1 |
pinseq=10 |
} |
P 3400 800 3700 800 4 0 1 |
{ |
T 3300 800 5 10 1 1 0 7 1 1 |
pinnumber=rx_parity_error |
T 3400 800 5 10 0 1 0 7 1 1 |
pinseq=11 |
} |
P 3400 1000 3700 1000 4 0 1 |
{ |
T 3300 1000 5 10 1 1 0 7 1 1 |
pinnumber=rx_parity_cal |
T 3400 1000 5 10 0 1 0 7 1 1 |
pinseq=12 |
} |
P 3400 1200 3700 1200 4 0 1 |
{ |
T 3300 1200 5 10 1 1 0 7 1 1 |
pinnumber=rx_full |
T 3400 1200 5 10 0 1 0 7 1 1 |
pinseq=13 |
} |
P 3400 1400 3700 1400 4 0 1 |
{ |
T 3300 1400 5 10 1 1 0 7 1 1 |
pinnumber=rx_frame_error |
T 3400 1400 5 10 0 1 0 7 1 1 |
pinseq=14 |
} |
P 3400 1600 3700 1600 4 0 1 |
{ |
T 3300 1600 5 10 1 1 0 7 1 1 |
pinnumber=read |
T 3400 1600 5 10 0 1 0 7 1 1 |
pinseq=15 |
} |
P 3400 1800 3700 1800 4 0 1 |
{ |
T 3300 1800 5 10 1 1 0 7 1 1 |
pinnumber=ps2_data_oe |
T 3400 1800 5 10 0 1 0 7 1 1 |
pinseq=16 |
} |
P 3400 2000 3700 2000 4 0 1 |
{ |
T 3300 2000 5 10 1 1 0 7 1 1 |
pinnumber=ps2_clk_oe |
T 3400 2000 5 10 0 1 0 7 1 1 |
pinseq=17 |
} |
P 3400 2200 3700 2200 4 0 1 |
{ |
T 3300 2200 5 10 1 1 0 7 1 1 |
pinnumber=busy |
T 3400 2200 5 10 0 1 0 7 1 1 |
pinseq=18 |
} |
/socgen/trunk/projects/pic_micro/ip/soc_mouse/doc/geda/drawing/sym/ps2_interface_fsm.sym
0,0 → 1,118
v 20100214 1 |
B 300 0 3600 2100 3 60 0 0 -1 -1 0 -1 -1 -1 -1 -1 |
T 400 2250 5 10 1 1 0 0 1 1 |
device=ps2_interface_fsm |
T 400 2450 8 10 1 1 0 0 1 1 |
refdes=U? |
P 300 200 0 200 10 1 1 |
{ |
T 400 200 5 10 1 1 0 1 1 1 |
pinnumber=bit_count[3:0] |
T 400 200 5 10 0 1 0 1 1 1 |
pinseq=1 |
} |
P 300 400 0 400 4 0 1 |
{ |
T 400 400 5 10 1 1 0 1 1 1 |
pinnumber=write |
T 400 400 5 10 0 1 0 1 1 1 |
pinseq=2 |
} |
P 300 600 0 600 4 0 1 |
{ |
T 400 600 5 10 1 1 0 1 1 1 |
pinnumber=usec_delay_done |
T 400 600 5 10 0 1 0 1 1 1 |
pinseq=3 |
} |
P 300 800 0 800 4 0 1 |
{ |
T 400 800 5 10 1 1 0 1 1 1 |
pinnumber=reset |
T 400 800 5 10 0 1 0 1 1 1 |
pinseq=4 |
} |
P 300 1000 0 1000 4 0 1 |
{ |
T 400 1000 5 10 1 1 0 1 1 1 |
pinnumber=ps2_idle |
T 400 1000 5 10 0 1 0 1 1 1 |
pinseq=5 |
} |
P 300 1200 0 1200 4 0 1 |
{ |
T 400 1200 5 10 1 1 0 1 1 1 |
pinnumber=ps2_clk_fall |
T 400 1200 5 10 0 1 0 1 1 1 |
pinseq=6 |
} |
P 300 1400 0 1400 4 0 1 |
{ |
T 400 1400 5 10 1 1 0 1 1 1 |
pinnumber=frame0 |
T 400 1400 5 10 0 1 0 1 1 1 |
pinseq=7 |
} |
P 300 1600 0 1600 4 0 1 |
{ |
T 400 1600 5 10 1 1 0 1 1 1 |
pinnumber=force_startbit |
T 400 1600 5 10 0 1 0 1 1 1 |
pinseq=8 |
} |
P 300 1800 0 1800 4 0 1 |
{ |
T 400 1800 5 10 1 1 0 1 1 1 |
pinnumber=clk |
T 400 1800 5 10 0 1 0 1 1 1 |
pinseq=9 |
} |
P 3900 200 4200 200 4 0 1 |
{ |
T 3800 200 5 10 1 1 0 7 1 1 |
pinnumber=shift_frame |
T 3900 200 5 10 0 1 0 7 1 1 |
pinseq=10 |
} |
P 3900 400 4200 400 4 0 1 |
{ |
T 3800 400 5 10 1 1 0 7 1 1 |
pinnumber=ps2_data_oe |
T 3900 400 5 10 0 1 0 7 1 1 |
pinseq=11 |
} |
P 3900 600 4200 600 4 0 1 |
{ |
T 3800 600 5 10 1 1 0 7 1 1 |
pinnumber=ps2_clk_oe |
T 3900 600 5 10 0 1 0 7 1 1 |
pinseq=12 |
} |
P 3900 800 4200 800 4 0 1 |
{ |
T 3800 800 5 10 1 1 0 7 1 1 |
pinnumber=load_tx_data |
T 3900 800 5 10 0 1 0 7 1 1 |
pinseq=13 |
} |
P 3900 1000 4200 1000 4 0 1 |
{ |
T 3800 1000 5 10 1 1 0 7 1 1 |
pinnumber=load_rx_data |
T 3900 1000 5 10 0 1 0 7 1 1 |
pinseq=14 |
} |
P 3900 1200 4200 1200 4 0 1 |
{ |
T 3800 1200 5 10 1 1 0 7 1 1 |
pinnumber=enable_usec_delay |
T 3900 1200 5 10 0 1 0 7 1 1 |
pinseq=15 |
} |
P 3900 1400 4200 1400 4 0 1 |
{ |
T 3800 1400 5 10 1 1 0 7 1 1 |
pinnumber=busy |
T 3900 1400 5 10 0 1 0 7 1 1 |
pinseq=16 |
} |
/socgen/trunk/projects/pic_micro/ip/soc_mouse/doc/geda/drawing/sym/soc_mouse.sym
0,0 → 1,146
v 20100214 1 |
B 300 0 3400 3100 3 60 0 0 -1 -1 0 -1 -1 -1 -1 -1 |
T 400 3250 5 10 1 1 0 0 1 1 |
device=soc_mouse |
T 400 3450 8 10 1 1 0 0 1 1 |
refdes=U? |
P 300 200 0 200 4 0 1 |
{ |
T 400 200 5 10 1 1 0 1 1 1 |
pinnumber=rxd_pad_in |
T 400 200 5 10 0 1 0 1 1 1 |
pinseq=1 |
} |
P 300 400 0 400 4 0 1 |
{ |
T 400 400 5 10 1 1 0 1 1 1 |
pinnumber=reset |
T 400 400 5 10 0 1 0 1 1 1 |
pinseq=2 |
} |
P 300 600 0 600 4 0 1 |
{ |
T 400 600 5 10 1 1 0 1 1 1 |
pinnumber=ps2_data_pad_in |
T 400 600 5 10 0 1 0 1 1 1 |
pinseq=3 |
} |
P 300 800 0 800 4 0 1 |
{ |
T 400 800 5 10 1 1 0 1 1 1 |
pinnumber=ps2_clk_pad_in |
T 400 800 5 10 0 1 0 1 1 1 |
pinseq=4 |
} |
P 300 1000 0 1000 4 0 1 |
{ |
T 400 1000 5 10 1 1 0 1 1 1 |
pinnumber=cts_pad_in |
T 400 1000 5 10 0 1 0 1 1 1 |
pinseq=5 |
} |
P 300 1200 0 1200 4 0 1 |
{ |
T 400 1200 5 10 1 1 0 1 1 1 |
pinnumber=clk |
T 400 1200 5 10 0 1 0 1 1 1 |
pinseq=6 |
} |
P 3700 200 4000 200 10 1 1 |
{ |
T 3600 200 5 10 1 1 0 7 1 1 |
pinnumber=y_pos[9:0] |
T 3600 200 5 10 0 1 0 7 1 1 |
pinseq=7 |
} |
P 3700 400 4000 400 10 1 1 |
{ |
T 3600 400 5 10 1 1 0 7 1 1 |
pinnumber=x_pos[9:0] |
T 3600 400 5 10 0 1 0 7 1 1 |
pinseq=8 |
} |
P 3700 600 4000 600 10 1 1 |
{ |
T 3600 600 5 10 1 1 0 7 1 1 |
pinnumber=portcout[7:0] |
T 3600 600 5 10 0 1 0 7 1 1 |
pinseq=9 |
} |
P 3700 800 4000 800 10 1 1 |
{ |
T 3600 800 5 10 1 1 0 7 1 1 |
pinnumber=portbout[7:0] |
T 3600 800 5 10 0 1 0 7 1 1 |
pinseq=10 |
} |
P 3700 1000 4000 1000 10 1 1 |
{ |
T 3600 1000 5 10 1 1 0 7 1 1 |
pinnumber=portaout[7:0] |
T 3600 1000 5 10 0 1 0 7 1 1 |
pinseq=11 |
} |
P 3700 1200 4000 1200 10 1 1 |
{ |
T 3600 1200 5 10 1 1 0 7 1 1 |
pinnumber=inst_addr[10:0] |
T 3600 1200 5 10 0 1 0 7 1 1 |
pinseq=12 |
} |
P 3700 1400 4000 1400 4 0 1 |
{ |
T 3600 1400 5 10 1 1 0 7 1 1 |
pinnumber=txd_pad_out |
T 3700 1400 5 10 0 1 0 7 1 1 |
pinseq=13 |
} |
P 3700 1600 4000 1600 4 0 1 |
{ |
T 3600 1600 5 10 1 1 0 7 1 1 |
pinnumber=rts_pad_out |
T 3700 1600 5 10 0 1 0 7 1 1 |
pinseq=14 |
} |
P 3700 1800 4000 1800 4 0 1 |
{ |
T 3600 1800 5 10 1 1 0 7 1 1 |
pinnumber=ps2_data_pad_oe |
T 3700 1800 5 10 0 1 0 7 1 1 |
pinseq=15 |
} |
P 3700 2000 4000 2000 4 0 1 |
{ |
T 3600 2000 5 10 1 1 0 7 1 1 |
pinnumber=ps2_clk_pad_oe |
T 3700 2000 5 10 0 1 0 7 1 1 |
pinseq=16 |
} |
P 3700 2200 4000 2200 4 0 1 |
{ |
T 3600 2200 5 10 1 1 0 7 1 1 |
pinnumber=new_packet |
T 3700 2200 5 10 0 1 0 7 1 1 |
pinseq=17 |
} |
P 3700 2400 4000 2400 4 0 1 |
{ |
T 3600 2400 5 10 1 1 0 7 1 1 |
pinnumber=ms_right |
T 3700 2400 5 10 0 1 0 7 1 1 |
pinseq=18 |
} |
P 3700 2600 4000 2600 4 0 1 |
{ |
T 3600 2600 5 10 1 1 0 7 1 1 |
pinnumber=ms_mid |
T 3700 2600 5 10 0 1 0 7 1 1 |
pinseq=19 |
} |
P 3700 2800 4000 2800 4 0 1 |
{ |
T 3600 2800 5 10 1 1 0 7 1 1 |
pinnumber=ms_left |
T 3700 2800 5 10 0 1 0 7 1 1 |
pinseq=20 |
} |
/socgen/trunk/projects/pic_micro/ip/soc_mouse/doc/geda/drawing/sym/uart_baudgen.sym
0,0 → 1,27
v 20100214 1 |
B 300 0 2100 700 3 60 0 0 -1 -1 0 -1 -1 -1 -1 -1 |
T 400 850 5 10 1 1 0 0 1 1 |
device=uart_baudgen |
T 400 1050 8 10 1 1 0 0 1 1 |
refdes=U? |
P 300 200 0 200 4 0 1 |
{ |
T 400 200 5 10 1 1 0 1 1 1 |
pinnumber=reset |
T 400 200 5 10 0 1 0 1 1 1 |
pinseq=1 |
} |
P 300 400 0 400 4 0 1 |
{ |
T 400 400 5 10 1 1 0 1 1 1 |
pinnumber=clk |
T 400 400 5 10 0 1 0 1 1 1 |
pinseq=2 |
} |
P 2400 200 2700 200 4 0 1 |
{ |
T 2300 200 5 10 1 1 0 7 1 1 |
pinnumber=baud_clk_out |
T 2400 200 5 10 0 1 0 7 1 1 |
pinseq=3 |
} |
/socgen/trunk/projects/pic_micro/ip/soc_mouse/doc/geda/drawing/sym/pic16c5x.sym
0,0 → 1,139
v 20100214 1 |
B 300 0 3100 3100 3 60 0 0 -1 -1 0 -1 -1 -1 -1 -1 |
T 400 3250 5 10 1 1 0 0 1 1 |
device=pic16c5x |
T 400 3450 8 10 1 1 0 0 1 1 |
refdes=U? |
P 300 200 0 200 10 1 1 |
{ |
T 400 200 5 10 1 1 0 1 1 1 |
pinnumber=portcin[7:0] |
T 400 200 5 10 0 1 0 1 1 1 |
pinseq=1 |
} |
P 300 400 0 400 10 1 1 |
{ |
T 400 400 5 10 1 1 0 1 1 1 |
pinnumber=portbin[7:0] |
T 400 400 5 10 0 1 0 1 1 1 |
pinseq=2 |
} |
P 300 600 0 600 10 1 1 |
{ |
T 400 600 5 10 1 1 0 1 1 1 |
pinnumber=portain[7:0] |
T 400 600 5 10 0 1 0 1 1 1 |
pinseq=3 |
} |
P 300 800 0 800 4 0 1 |
{ |
T 400 800 5 10 1 1 0 1 1 1 |
pinnumber=rst_in |
T 400 800 5 10 0 1 0 1 1 1 |
pinseq=4 |
} |
P 300 1000 0 1000 4 0 1 |
{ |
T 400 1000 5 10 1 1 0 1 1 1 |
pinnumber=clk |
T 400 1000 5 10 0 1 0 1 1 1 |
pinseq=5 |
} |
P 3400 200 3700 200 10 1 1 |
{ |
T 3300 200 5 10 1 1 0 7 1 1 |
pinnumber=trisc[7:0] |
T 3300 200 5 10 0 1 0 7 1 1 |
pinseq=6 |
} |
P 3400 400 3700 400 10 1 1 |
{ |
T 3300 400 5 10 1 1 0 7 1 1 |
pinnumber=trisb[7:0] |
T 3300 400 5 10 0 1 0 7 1 1 |
pinseq=7 |
} |
P 3400 600 3700 600 10 1 1 |
{ |
T 3300 600 5 10 1 1 0 7 1 1 |
pinnumber=trisa[7:0] |
T 3300 600 5 10 0 1 0 7 1 1 |
pinseq=8 |
} |
P 3400 800 3700 800 10 1 1 |
{ |
T 3300 800 5 10 1 1 0 7 1 1 |
pinnumber=tmr0[7:0] |
T 3300 800 5 10 0 1 0 7 1 1 |
pinseq=9 |
} |
P 3400 1000 3700 1000 10 1 1 |
{ |
T 3300 1000 5 10 1 1 0 7 1 1 |
pinnumber=portcout[7:0] |
T 3300 1000 5 10 0 1 0 7 1 1 |
pinseq=10 |
} |
P 3400 1200 3700 1200 10 1 1 |
{ |
T 3300 1200 5 10 1 1 0 7 1 1 |
pinnumber=portbout[7:0] |
T 3300 1200 5 10 0 1 0 7 1 1 |
pinseq=11 |
} |
P 3400 1400 3700 1400 10 1 1 |
{ |
T 3300 1400 5 10 1 1 0 7 1 1 |
pinnumber=portaout[7:0] |
T 3300 1400 5 10 0 1 0 7 1 1 |
pinseq=12 |
} |
P 3400 1600 3700 1600 10 1 1 |
{ |
T 3300 1600 5 10 1 1 0 7 1 1 |
pinnumber=option[7:0] |
T 3300 1600 5 10 0 1 0 7 1 1 |
pinseq=13 |
} |
P 3400 1800 3700 1800 10 1 1 |
{ |
T 3300 1800 5 10 1 1 0 7 1 1 |
pinnumber=inst_addr[10:0] |
T 3300 1800 5 10 0 1 0 7 1 1 |
pinseq=14 |
} |
P 3400 2000 3700 2000 4 0 1 |
{ |
T 3300 2000 5 10 1 1 0 7 1 1 |
pinnumber=wdt_clr |
T 3400 2000 5 10 0 1 0 7 1 1 |
pinseq=15 |
} |
P 3400 2200 3700 2200 4 0 1 |
{ |
T 3300 2200 5 10 1 1 0 7 1 1 |
pinnumber=sleep |
T 3400 2200 5 10 0 1 0 7 1 1 |
pinseq=16 |
} |
P 3400 2400 3700 2400 4 0 1 |
{ |
T 3300 2400 5 10 1 1 0 7 1 1 |
pinnumber=portc_we |
T 3400 2400 5 10 0 1 0 7 1 1 |
pinseq=17 |
} |
P 3400 2600 3700 2600 4 0 1 |
{ |
T 3300 2600 5 10 1 1 0 7 1 1 |
pinnumber=portb_we |
T 3400 2600 5 10 0 1 0 7 1 1 |
pinseq=18 |
} |
P 3400 2800 3700 2800 4 0 1 |
{ |
T 3300 2800 5 10 1 1 0 7 1 1 |
pinnumber=porta_we |
T 3400 2800 5 10 0 1 0 7 1 1 |
pinseq=19 |
} |
/socgen/trunk/projects/pic_micro/ip/soc_mouse/doc/geda/drawing/sym/pic16c5x_alu.sym
0,0 → 1,69
v 20100214 1 |
B 300 0 2100 1300 3 60 0 0 -1 -1 0 -1 -1 -1 -1 -1 |
T 400 1450 5 10 1 1 0 0 1 1 |
device=pic16c5x_alu |
T 400 1650 8 10 1 1 0 0 1 1 |
refdes=U? |
P 300 200 0 200 10 1 1 |
{ |
T 400 200 5 10 1 1 0 1 1 1 |
pinnumber=s2[7:0] |
T 400 200 5 10 0 1 0 1 1 1 |
pinseq=1 |
} |
P 300 400 0 400 10 1 1 |
{ |
T 400 400 5 10 1 1 0 1 1 1 |
pinnumber=s1[7:0] |
T 400 400 5 10 0 1 0 1 1 1 |
pinseq=2 |
} |
P 300 600 0 600 10 1 1 |
{ |
T 400 600 5 10 1 1 0 1 1 1 |
pinnumber=op[3:0] |
T 400 600 5 10 0 1 0 1 1 1 |
pinseq=3 |
} |
P 300 800 0 800 10 1 1 |
{ |
T 400 800 5 10 1 1 0 1 1 1 |
pinnumber=mask[7:0] |
T 400 800 5 10 0 1 0 1 1 1 |
pinseq=4 |
} |
P 300 1000 0 1000 4 0 1 |
{ |
T 400 1000 5 10 1 1 0 1 1 1 |
pinnumber=c_in |
T 400 1000 5 10 0 1 0 1 1 1 |
pinseq=5 |
} |
P 2400 200 2700 200 10 1 1 |
{ |
T 2300 200 5 10 1 1 0 7 1 1 |
pinnumber=out[7:0] |
T 2300 200 5 10 0 1 0 7 1 1 |
pinseq=6 |
} |
P 2400 400 2700 400 4 0 1 |
{ |
T 2300 400 5 10 1 1 0 7 1 1 |
pinnumber=z |
T 2400 400 5 10 0 1 0 7 1 1 |
pinseq=7 |
} |
P 2400 600 2700 600 4 0 1 |
{ |
T 2300 600 5 10 1 1 0 7 1 1 |
pinnumber=dc |
T 2400 600 5 10 0 1 0 7 1 1 |
pinseq=8 |
} |
P 2400 800 2700 800 4 0 1 |
{ |
T 2300 800 5 10 1 1 0 7 1 1 |
pinnumber=c |
T 2400 800 5 10 0 1 0 7 1 1 |
pinseq=9 |
} |
/socgen/trunk/projects/pic_micro/ip/soc_mouse/doc/geda/drawing/sym/cde_lifo.sym
0,0 → 1,48
v 20100214 1 |
B 300 0 3300 1300 3 60 0 0 -1 -1 0 -1 -1 -1 -1 -1 |
T 400 1450 5 10 1 1 0 0 1 1 |
device=cde_lifo |
T 400 1650 8 10 1 1 0 0 1 1 |
refdes=U? |
P 300 200 0 200 10 1 1 |
{ |
T 400 200 5 10 1 1 0 1 1 1 |
pinnumber=din[WIDTH-1:0] |
T 400 200 5 10 0 1 0 1 1 1 |
pinseq=1 |
} |
P 300 400 0 400 4 0 1 |
{ |
T 400 400 5 10 1 1 0 1 1 1 |
pinnumber=reset |
T 400 400 5 10 0 1 0 1 1 1 |
pinseq=2 |
} |
P 300 600 0 600 4 0 1 |
{ |
T 400 600 5 10 1 1 0 1 1 1 |
pinnumber=push |
T 400 600 5 10 0 1 0 1 1 1 |
pinseq=3 |
} |
P 300 800 0 800 4 0 1 |
{ |
T 400 800 5 10 1 1 0 1 1 1 |
pinnumber=pop |
T 400 800 5 10 0 1 0 1 1 1 |
pinseq=4 |
} |
P 300 1000 0 1000 4 0 1 |
{ |
T 400 1000 5 10 1 1 0 1 1 1 |
pinnumber=clk |
T 400 1000 5 10 0 1 0 1 1 1 |
pinseq=5 |
} |
P 3600 200 3900 200 10 1 1 |
{ |
T 3500 200 5 10 1 1 0 7 1 1 |
pinnumber=dout[WIDTH-1:0] |
T 3500 200 5 10 0 1 0 7 1 1 |
pinseq=6 |
} |
/socgen/trunk/projects/pic_micro/ip/soc_mouse/doc/geda/drawing/sym/cde_sync_with_hysteresis.sym
0,0 → 1,48
v 20100214 1 |
B 300 0 4200 900 3 60 0 0 -1 -1 0 -1 -1 -1 -1 -1 |
T 400 1050 5 10 1 1 0 0 1 1 |
device=cde_sync_with_hysteresis |
T 400 1250 8 10 1 1 0 0 1 1 |
refdes=U? |
P 300 200 0 200 10 1 1 |
{ |
T 400 200 5 10 1 1 0 1 1 1 |
pinnumber=data_in[WIDTH-1:0] |
T 400 200 5 10 0 1 0 1 1 1 |
pinseq=1 |
} |
P 300 400 0 400 4 0 1 |
{ |
T 400 400 5 10 1 1 0 1 1 1 |
pinnumber=reset |
T 400 400 5 10 0 1 0 1 1 1 |
pinseq=2 |
} |
P 300 600 0 600 4 0 1 |
{ |
T 400 600 5 10 1 1 0 1 1 1 |
pinnumber=clk |
T 400 600 5 10 0 1 0 1 1 1 |
pinseq=3 |
} |
P 4500 200 4800 200 10 1 1 |
{ |
T 4400 200 5 10 1 1 0 7 1 1 |
pinnumber=data_rise[WIDTH-1:0] |
T 4400 200 5 10 0 1 0 7 1 1 |
pinseq=4 |
} |
P 4500 400 4800 400 10 1 1 |
{ |
T 4400 400 5 10 1 1 0 7 1 1 |
pinnumber=data_out[WIDTH-1:0] |
T 4400 400 5 10 0 1 0 7 1 1 |
pinseq=5 |
} |
P 4500 600 4800 600 10 1 1 |
{ |
T 4400 600 5 10 1 1 0 7 1 1 |
pinnumber=data_fall[WIDTH-1:0] |
T 4400 600 5 10 0 1 0 7 1 1 |
pinseq=6 |
} |
/socgen/trunk/projects/pic_micro/ip/soc_mouse/doc/geda/drawing/sym/pic16c5x_register_file.sym
0,0 → 1,125
v 20100214 1 |
B 300 0 2900 3500 3 60 0 0 -1 -1 0 -1 -1 -1 -1 -1 |
T 400 3650 5 10 1 1 0 0 1 1 |
device=pic16c5x_register_file |
T 400 3850 8 10 1 1 0 0 1 1 |
refdes=U? |
P 300 200 0 200 10 1 1 |
{ |
T 400 200 5 10 1 1 0 1 1 1 |
pinnumber=tmr0_next[7:0] |
T 400 200 5 10 0 1 0 1 1 1 |
pinseq=1 |
} |
P 300 400 0 400 10 1 1 |
{ |
T 400 400 5 10 1 1 0 1 1 1 |
pinnumber=status_next[7:0] |
T 400 400 5 10 0 1 0 1 1 1 |
pinseq=2 |
} |
P 300 600 0 600 10 1 1 |
{ |
T 400 600 5 10 1 1 0 1 1 1 |
pinnumber=src1_sel_[1:0] |
T 400 600 5 10 0 1 0 1 1 1 |
pinseq=3 |
} |
P 300 800 0 800 10 1 1 |
{ |
T 400 800 5 10 1 1 0 1 1 1 |
pinnumber=rf_wr_data[7:0] |
T 400 800 5 10 0 1 0 1 1 1 |
pinseq=4 |
} |
P 300 1000 0 1000 10 1 1 |
{ |
T 400 1000 5 10 1 1 0 1 1 1 |
pinnumber=portc_r[7:0] |
T 400 1000 5 10 0 1 0 1 1 1 |
pinseq=5 |
} |
P 300 1200 0 1200 10 1 1 |
{ |
T 400 1200 5 10 1 1 0 1 1 1 |
pinnumber=portb_r[7:0] |
T 400 1200 5 10 0 1 0 1 1 1 |
pinseq=6 |
} |
P 300 1400 0 1400 10 1 1 |
{ |
T 400 1400 5 10 1 1 0 1 1 1 |
pinnumber=porta_r[7:0] |
T 400 1400 5 10 0 1 0 1 1 1 |
pinseq=7 |
} |
P 300 1600 0 1600 10 1 1 |
{ |
T 400 1600 5 10 1 1 0 1 1 1 |
pinnumber=pc_r[7:0] |
T 400 1600 5 10 0 1 0 1 1 1 |
pinseq=8 |
} |
P 300 1800 0 1800 10 1 1 |
{ |
T 400 1800 5 10 1 1 0 1 1 1 |
pinnumber=instr_0[7:0] |
T 400 1800 5 10 0 1 0 1 1 1 |
pinseq=9 |
} |
P 300 2000 0 2000 4 0 1 |
{ |
T 400 2000 5 10 1 1 0 1 1 1 |
pinnumber=valid |
T 400 2000 5 10 0 1 0 1 1 1 |
pinseq=10 |
} |
P 300 2200 0 2200 4 0 1 |
{ |
T 400 2200 5 10 1 1 0 1 1 1 |
pinnumber=rst |
T 400 2200 5 10 0 1 0 1 1 1 |
pinseq=11 |
} |
P 300 2400 0 2400 4 0 1 |
{ |
T 400 2400 5 10 1 1 0 1 1 1 |
pinnumber=rf_we3 |
T 400 2400 5 10 0 1 0 1 1 1 |
pinseq=12 |
} |
P 300 2600 0 2600 4 0 1 |
{ |
T 400 2600 5 10 1 1 0 1 1 1 |
pinnumber=rf_we1 |
T 400 2600 5 10 0 1 0 1 1 1 |
pinseq=13 |
} |
P 300 2800 0 2800 4 0 1 |
{ |
T 400 2800 5 10 1 1 0 1 1 1 |
pinnumber=instd_zero |
T 400 2800 5 10 0 1 0 1 1 1 |
pinseq=14 |
} |
P 300 3000 0 3000 4 0 1 |
{ |
T 400 3000 5 10 1 1 0 1 1 1 |
pinnumber=fsr_we |
T 400 3000 5 10 0 1 0 1 1 1 |
pinseq=15 |
} |
P 300 3200 0 3200 4 0 1 |
{ |
T 400 3200 5 10 1 1 0 1 1 1 |
pinnumber=clk |
T 400 3200 5 10 0 1 0 1 1 1 |
pinseq=16 |
} |
P 3200 200 3500 200 10 1 1 |
{ |
T 3100 200 5 10 1 1 0 7 1 1 |
pinnumber=src1[7:0] |
T 3100 200 5 10 0 1 0 7 1 1 |
pinseq=17 |
} |
/socgen/trunk/projects/pic_micro/ip/soc_mouse/doc/geda/drawing/sym/uart_rcvr.sym
0,0 → 1,76
v 20100214 1 |
B 300 0 3800 1500 3 60 0 0 -1 -1 0 -1 -1 -1 -1 -1 |
T 400 1650 5 10 1 1 0 0 1 1 |
device=uart_rcvr |
T 400 1850 8 10 1 1 0 0 1 1 |
refdes=U? |
P 300 200 0 200 4 0 1 |
{ |
T 400 200 5 10 1 1 0 1 1 1 |
pinnumber=rxd_pad_in |
T 400 200 5 10 0 1 0 1 1 1 |
pinseq=1 |
} |
P 300 400 0 400 4 0 1 |
{ |
T 400 400 5 10 1 1 0 1 1 1 |
pinnumber=reset |
T 400 400 5 10 0 1 0 1 1 1 |
pinseq=2 |
} |
P 300 600 0 600 4 0 1 |
{ |
T 400 600 5 10 1 1 0 1 1 1 |
pinnumber=parity |
T 400 600 5 10 0 1 0 1 1 1 |
pinseq=3 |
} |
P 300 800 0 800 4 0 1 |
{ |
T 400 800 5 10 1 1 0 1 1 1 |
pinnumber=force_parity |
T 400 800 5 10 0 1 0 1 1 1 |
pinseq=4 |
} |
P 300 1000 0 1000 4 0 1 |
{ |
T 400 1000 5 10 1 1 0 1 1 1 |
pinnumber=clk |
T 400 1000 5 10 0 1 0 1 1 1 |
pinseq=5 |
} |
P 300 1200 0 1200 4 0 1 |
{ |
T 400 1200 5 10 1 1 0 1 1 1 |
pinnumber=baud_clk |
T 400 1200 5 10 0 1 0 1 1 1 |
pinseq=6 |
} |
P 4100 200 4400 200 10 1 1 |
{ |
T 4000 200 5 10 1 1 0 7 1 1 |
pinnumber=rxd_data_out[SIZE-1:0] |
T 4000 200 5 10 0 1 0 7 1 1 |
pinseq=7 |
} |
P 4100 400 4400 400 4 0 1 |
{ |
T 4000 400 5 10 1 1 0 7 1 1 |
pinnumber=rxd_stop_error |
T 4100 400 5 10 0 1 0 7 1 1 |
pinseq=8 |
} |
P 4100 600 4400 600 4 0 1 |
{ |
T 4000 600 5 10 1 1 0 7 1 1 |
pinnumber=rxd_parity_error |
T 4100 600 5 10 0 1 0 7 1 1 |
pinseq=9 |
} |
P 4100 800 4400 800 4 0 1 |
{ |
T 4000 800 5 10 1 1 0 7 1 1 |
pinnumber=rxd_buffer_full |
T 4100 800 5 10 0 1 0 7 1 1 |
pinseq=10 |
} |
/socgen/trunk/projects/pic_micro/ip/soc_mouse/doc/geda/drawing/sch/pic16c5x_alu.sch
0,0 → 1,46
v 20100214 1 |
C 1100 300 1 0 0 in_port_v.sym |
{ |
T 1100 300 5 10 1 1 0 6 1 1 |
refdes=s2[7:0] |
} |
C 1100 700 1 0 0 in_port_v.sym |
{ |
T 1100 700 5 10 1 1 0 6 1 1 |
refdes=s1[7:0] |
} |
C 1100 1100 1 0 0 in_port_v.sym |
{ |
T 1100 1100 5 10 1 1 0 6 1 1 |
refdes=op[3:0] |
} |
C 1100 1500 1 0 0 in_port_v.sym |
{ |
T 1100 1500 5 10 1 1 0 6 1 1 |
refdes=mask[7:0] |
} |
C 1100 1900 1 0 0 in_port.sym |
{ |
T 1100 1900 5 10 1 1 0 6 1 1 |
refdes=c_in |
} |
C 3200 300 1 0 0 out_port_v.sym |
{ |
T 4200 300 5 10 1 1 0 0 1 1 |
refdes=out[7:0] |
} |
C 3200 700 1 0 0 out_port.sym |
{ |
T 4200 700 5 10 1 1 0 0 1 1 |
refdes=z |
} |
C 3200 1100 1 0 0 out_port.sym |
{ |
T 4200 1100 5 10 1 1 0 0 1 1 |
refdes=dc |
} |
C 3200 1500 1 0 0 out_port.sym |
{ |
T 4200 1500 5 10 1 1 0 0 1 1 |
refdes=c |
} |
/socgen/trunk/projects/pic_micro/ip/soc_mouse/doc/geda/drawing/sch/cde_lifo.sch
0,0 → 1,31
v 20100214 1 |
C 1600 300 1 0 0 in_port_v.sym |
{ |
T 1600 300 5 10 1 1 0 6 1 1 |
refdes=din[WIDTH-1:0] |
} |
C 1600 700 1 0 0 in_port.sym |
{ |
T 1600 700 5 10 1 1 0 6 1 1 |
refdes=reset |
} |
C 1600 1100 1 0 0 in_port.sym |
{ |
T 1600 1100 5 10 1 1 0 6 1 1 |
refdes=push |
} |
C 1600 1500 1 0 0 in_port.sym |
{ |
T 1600 1500 5 10 1 1 0 6 1 1 |
refdes=pop |
} |
C 1600 1900 1 0 0 in_port.sym |
{ |
T 1600 1900 5 10 1 1 0 6 1 1 |
refdes=clk |
} |
C 4400 300 1 0 0 out_port_v.sym |
{ |
T 5400 300 5 10 1 1 0 0 1 1 |
refdes=dout[WIDTH-1:0] |
} |
/socgen/trunk/projects/pic_micro/ip/soc_mouse/doc/geda/drawing/sch/cde_sync_with_hysteresis.sch
0,0 → 1,31
v 20100214 1 |
C 2000 300 1 0 0 in_port_v.sym |
{ |
T 2000 300 5 10 1 1 0 6 1 1 |
refdes=data_in[WIDTH-1:0] |
} |
C 2000 700 1 0 0 in_port.sym |
{ |
T 2000 700 5 10 1 1 0 6 1 1 |
refdes=reset |
} |
C 2000 1100 1 0 0 in_port.sym |
{ |
T 2000 1100 5 10 1 1 0 6 1 1 |
refdes=clk |
} |
C 5300 300 1 0 0 out_port_v.sym |
{ |
T 6300 300 5 10 1 1 0 0 1 1 |
refdes=data_rise[WIDTH-1:0] |
} |
C 5300 700 1 0 0 out_port_v.sym |
{ |
T 6300 700 5 10 1 1 0 0 1 1 |
refdes=data_out[WIDTH-1:0] |
} |
C 5300 1100 1 0 0 out_port_v.sym |
{ |
T 6300 1100 5 10 1 1 0 0 1 1 |
refdes=data_fall[WIDTH-1:0] |
} |
/socgen/trunk/projects/pic_micro/ip/soc_mouse/doc/geda/drawing/sch/pic16c5x_register_file.sch
0,0 → 1,86
v 20100214 1 |
C 1800 300 1 0 0 in_port_v.sym |
{ |
T 1800 300 5 10 1 1 0 6 1 1 |
refdes=tmr0_next[7:0] |
} |
C 1800 700 1 0 0 in_port_v.sym |
{ |
T 1800 700 5 10 1 1 0 6 1 1 |
refdes=status_next[7:0] |
} |
C 1800 1100 1 0 0 in_port_v.sym |
{ |
T 1800 1100 5 10 1 1 0 6 1 1 |
refdes=src1_sel_[1:0] |
} |
C 1800 1500 1 0 0 in_port_v.sym |
{ |
T 1800 1500 5 10 1 1 0 6 1 1 |
refdes=rf_wr_data[7:0] |
} |
C 1800 1900 1 0 0 in_port_v.sym |
{ |
T 1800 1900 5 10 1 1 0 6 1 1 |
refdes=portc_r[7:0] |
} |
C 1800 2300 1 0 0 in_port_v.sym |
{ |
T 1800 2300 5 10 1 1 0 6 1 1 |
refdes=portb_r[7:0] |
} |
C 1800 2700 1 0 0 in_port_v.sym |
{ |
T 1800 2700 5 10 1 1 0 6 1 1 |
refdes=porta_r[7:0] |
} |
C 1800 3100 1 0 0 in_port_v.sym |
{ |
T 1800 3100 5 10 1 1 0 6 1 1 |
refdes=pc_r[7:0] |
} |
C 1800 3500 1 0 0 in_port_v.sym |
{ |
T 1800 3500 5 10 1 1 0 6 1 1 |
refdes=instr_0[7:0] |
} |
C 1800 3900 1 0 0 in_port.sym |
{ |
T 1800 3900 5 10 1 1 0 6 1 1 |
refdes=valid |
} |
C 1800 4300 1 0 0 in_port.sym |
{ |
T 1800 4300 5 10 1 1 0 6 1 1 |
refdes=rst |
} |
C 1800 4700 1 0 0 in_port.sym |
{ |
T 1800 4700 5 10 1 1 0 6 1 1 |
refdes=rf_we3 |
} |
C 1800 5100 1 0 0 in_port.sym |
{ |
T 1800 5100 5 10 1 1 0 6 1 1 |
refdes=rf_we1 |
} |
C 1800 5500 1 0 0 in_port.sym |
{ |
T 1800 5500 5 10 1 1 0 6 1 1 |
refdes=instd_zero |
} |
C 1800 5900 1 0 0 in_port.sym |
{ |
T 1800 5900 5 10 1 1 0 6 1 1 |
refdes=fsr_we |
} |
C 1800 6300 1 0 0 in_port.sym |
{ |
T 1800 6300 5 10 1 1 0 6 1 1 |
refdes=clk |
} |
C 4000 300 1 0 0 out_port_v.sym |
{ |
T 5000 300 5 10 1 1 0 0 1 1 |
refdes=src1[7:0] |
} |
/socgen/trunk/projects/pic_micro/ip/soc_mouse/doc/geda/drawing/sch/uart_rcvr.sch
0,0 → 1,51
v 20100214 1 |
C 1400 300 1 0 0 in_port.sym |
{ |
T 1400 300 5 10 1 1 0 6 1 1 |
refdes=rxd_pad_in |
} |
C 1400 700 1 0 0 in_port.sym |
{ |
T 1400 700 5 10 1 1 0 6 1 1 |
refdes=reset |
} |
C 1400 1100 1 0 0 in_port.sym |
{ |
T 1400 1100 5 10 1 1 0 6 1 1 |
refdes=parity |
} |
C 1400 1500 1 0 0 in_port.sym |
{ |
T 1400 1500 5 10 1 1 0 6 1 1 |
refdes=force_parity |
} |
C 1400 1900 1 0 0 in_port.sym |
{ |
T 1400 1900 5 10 1 1 0 6 1 1 |
refdes=clk |
} |
C 1400 2300 1 0 0 in_port.sym |
{ |
T 1400 2300 5 10 1 1 0 6 1 1 |
refdes=baud_clk |
} |
C 4900 300 1 0 0 out_port_v.sym |
{ |
T 5900 300 5 10 1 1 0 0 1 1 |
refdes=rxd_data_out[SIZE-1:0] |
} |
C 4900 700 1 0 0 out_port.sym |
{ |
T 5900 700 5 10 1 1 0 0 1 1 |
refdes=rxd_stop_error |
} |
C 4900 1100 1 0 0 out_port.sym |
{ |
T 5900 1100 5 10 1 1 0 0 1 1 |
refdes=rxd_parity_error |
} |
C 4900 1500 1 0 0 out_port.sym |
{ |
T 5900 1500 5 10 1 1 0 0 1 1 |
refdes=rxd_buffer_full |
} |
/socgen/trunk/projects/pic_micro/ip/soc_mouse/doc/geda/drawing/sch/io_module_mouse_ps2.sch
0,0 → 1,101
v 20100214 1 |
C 1300 300 1 0 0 in_port_v.sym |
{ |
T 1300 300 5 10 1 1 0 6 1 1 |
refdes=wdata[7:0] |
} |
C 1300 700 1 0 0 in_port_v.sym |
{ |
T 1300 700 5 10 1 1 0 6 1 1 |
refdes=waddr[7:0] |
} |
C 1300 1100 1 0 0 in_port_v.sym |
{ |
T 1300 1100 5 10 1 1 0 6 1 1 |
refdes=raddr[7:0] |
} |
C 1300 1500 1 0 0 in_port.sym |
{ |
T 1300 1500 5 10 1 1 0 6 1 1 |
refdes=wr |
} |
C 1300 1900 1 0 0 in_port.sym |
{ |
T 1300 1900 5 10 1 1 0 6 1 1 |
refdes=reset |
} |
C 1300 2300 1 0 0 in_port.sym |
{ |
T 1300 2300 5 10 1 1 0 6 1 1 |
refdes=rd |
} |
C 1300 2700 1 0 0 in_port.sym |
{ |
T 1300 2700 5 10 1 1 0 6 1 1 |
refdes=ps2_data_in |
} |
C 1300 3100 1 0 0 in_port.sym |
{ |
T 1300 3100 5 10 1 1 0 6 1 1 |
refdes=ps2_clk_in |
} |
C 1300 3500 1 0 0 in_port.sym |
{ |
T 1300 3500 5 10 1 1 0 6 1 1 |
refdes=cs |
} |
C 1300 3900 1 0 0 in_port.sym |
{ |
T 1300 3900 5 10 1 1 0 6 1 1 |
refdes=clk |
} |
C 4000 300 1 0 0 out_port_v.sym |
{ |
T 5000 300 5 10 1 1 0 0 1 1 |
refdes=y_pos[9:0] |
} |
C 4000 700 1 0 0 out_port_v.sym |
{ |
T 5000 700 5 10 1 1 0 0 1 1 |
refdes=x_pos[9:0] |
} |
C 4000 1100 1 0 0 out_port_v.sym |
{ |
T 5000 1100 5 10 1 1 0 0 1 1 |
refdes=rdata[7:0] |
} |
C 4000 1500 1 0 0 out_port.sym |
{ |
T 5000 1500 5 10 1 1 0 0 1 1 |
refdes=rcv_data_avail |
} |
C 4000 1900 1 0 0 out_port.sym |
{ |
T 5000 1900 5 10 1 1 0 0 1 1 |
refdes=ps2_data_oe |
} |
C 4000 2300 1 0 0 out_port.sym |
{ |
T 5000 2300 5 10 1 1 0 0 1 1 |
refdes=ps2_clk_oe |
} |
C 4000 2700 1 0 0 out_port.sym |
{ |
T 5000 2700 5 10 1 1 0 0 1 1 |
refdes=new_packet |
} |
C 4000 3100 1 0 0 out_port.sym |
{ |
T 5000 3100 5 10 1 1 0 0 1 1 |
refdes=ms_right |
} |
C 4000 3500 1 0 0 out_port.sym |
{ |
T 5000 3500 5 10 1 1 0 0 1 1 |
refdes=ms_mid |
} |
C 4000 3900 1 0 0 out_port.sym |
{ |
T 5000 3900 5 10 1 1 0 0 1 1 |
refdes=ms_left |
} |
/socgen/trunk/projects/pic_micro/ip/soc_mouse/doc/geda/drawing/sch/io_module_mouse_utimer.sch
0,0 → 1,46
v 20100214 1 |
C 2300 300 1 0 0 in_port_v.sym |
{ |
T 2300 300 5 10 1 1 0 6 1 1 |
refdes=wdata[7:0] |
} |
C 2300 700 1 0 0 in_port_v.sym |
{ |
T 2300 700 5 10 1 1 0 6 1 1 |
refdes=waddr[ADDR_WIDTH-1:0] |
} |
C 2300 1100 1 0 0 in_port_v.sym |
{ |
T 2300 1100 5 10 1 1 0 6 1 1 |
refdes=raddr[ADDR_WIDTH-1:0] |
} |
C 2300 1500 1 0 0 in_port.sym |
{ |
T 2300 1500 5 10 1 1 0 6 1 1 |
refdes=wr |
} |
C 2300 1900 1 0 0 in_port.sym |
{ |
T 2300 1900 5 10 1 1 0 6 1 1 |
refdes=reset |
} |
C 2300 2300 1 0 0 in_port.sym |
{ |
T 2300 2300 5 10 1 1 0 6 1 1 |
refdes=rd |
} |
C 2300 2700 1 0 0 in_port.sym |
{ |
T 2300 2700 5 10 1 1 0 6 1 1 |
refdes=cs |
} |
C 2300 3100 1 0 0 in_port.sym |
{ |
T 2300 3100 5 10 1 1 0 6 1 1 |
refdes=clk |
} |
C 4600 300 1 0 0 out_port_v.sym |
{ |
T 5600 300 5 10 1 1 0 0 1 1 |
refdes=rdata[7:0] |
} |
/socgen/trunk/projects/pic_micro/ip/soc_mouse/doc/geda/drawing/sch/uart.sch
0,0 → 1,101
v 20100214 1 |
C 2300 300 1 0 0 in_port_v.sym |
{ |
T 2300 300 5 10 1 1 0 6 1 1 |
refdes=txd_data_in[SIZE-1:0] |
} |
C 2300 700 1 0 0 in_port.sym |
{ |
T 2300 700 5 10 1 1 0 6 1 1 |
refdes=txd_parity |
} |
C 2300 1100 1 0 0 in_port.sym |
{ |
T 2300 1100 5 10 1 1 0 6 1 1 |
refdes=txd_load |
} |
C 2300 1500 1 0 0 in_port.sym |
{ |
T 2300 1500 5 10 1 1 0 6 1 1 |
refdes=txd_force_parity |
} |
C 2300 1900 1 0 0 in_port.sym |
{ |
T 2300 1900 5 10 1 1 0 6 1 1 |
refdes=txd_break |
} |
C 2300 2300 1 0 0 in_port.sym |
{ |
T 2300 2300 5 10 1 1 0 6 1 1 |
refdes=rxd_parity |
} |
C 2300 2700 1 0 0 in_port.sym |
{ |
T 2300 2700 5 10 1 1 0 6 1 1 |
refdes=rxd_pad_in |
} |
C 2300 3100 1 0 0 in_port.sym |
{ |
T 2300 3100 5 10 1 1 0 6 1 1 |
refdes=rxd_force_parity |
} |
C 2300 3500 1 0 0 in_port.sym |
{ |
T 2300 3500 5 10 1 1 0 6 1 1 |
refdes=rts_in |
} |
C 2300 3900 1 0 0 in_port.sym |
{ |
T 2300 3900 5 10 1 1 0 6 1 1 |
refdes=reset |
} |
C 2300 4300 1 0 0 in_port.sym |
{ |
T 2300 4300 5 10 1 1 0 6 1 1 |
refdes=cts_pad_in |
} |
C 2300 4700 1 0 0 in_port.sym |
{ |
T 2300 4700 5 10 1 1 0 6 1 1 |
refdes=clk |
} |
C 5800 300 1 0 0 out_port_v.sym |
{ |
T 6800 300 5 10 1 1 0 0 1 1 |
refdes=rxd_data_out[SIZE-1:0] |
} |
C 5800 700 1 0 0 out_port.sym |
{ |
T 6800 700 5 10 1 1 0 0 1 1 |
refdes=txd_pad_out |
} |
C 5800 1100 1 0 0 out_port.sym |
{ |
T 6800 1100 5 10 1 1 0 0 1 1 |
refdes=txd_buffer_empty |
} |
C 5800 1500 1 0 0 out_port.sym |
{ |
T 6800 1500 5 10 1 1 0 0 1 1 |
refdes=rxd_stop_error |
} |
C 5800 1900 1 0 0 out_port.sym |
{ |
T 6800 1900 5 10 1 1 0 0 1 1 |
refdes=rxd_parity_error |
} |
C 5800 2300 1 0 0 out_port.sym |
{ |
T 6800 2300 5 10 1 1 0 0 1 1 |
refdes=rxd_buffer_full |
} |
C 5800 2700 1 0 0 out_port.sym |
{ |
T 6800 2700 5 10 1 1 0 0 1 1 |
refdes=rts_pad_out |
} |
C 5800 3100 1 0 0 out_port.sym |
{ |
T 6800 3100 5 10 1 1 0 0 1 1 |
refdes=cts_out |
} |
/socgen/trunk/projects/pic_micro/ip/soc_mouse/doc/geda/drawing/sch/uart_xmit.sch
0,0 → 1,51
v 20100214 1 |
C 2300 300 1 0 0 in_port_v.sym |
{ |
T 2300 300 5 10 1 1 0 6 1 1 |
refdes=txd_data_in[SIZE-1:0] |
} |
C 2300 700 1 0 0 in_port.sym |
{ |
T 2300 700 5 10 1 1 0 6 1 1 |
refdes=txd_load |
} |
C 2300 1100 1 0 0 in_port.sym |
{ |
T 2300 1100 5 10 1 1 0 6 1 1 |
refdes=txd_break |
} |
C 2300 1500 1 0 0 in_port.sym |
{ |
T 2300 1500 5 10 1 1 0 6 1 1 |
refdes=reset |
} |
C 2300 1900 1 0 0 in_port.sym |
{ |
T 2300 1900 5 10 1 1 0 6 1 1 |
refdes=parity |
} |
C 2300 2300 1 0 0 in_port.sym |
{ |
T 2300 2300 5 10 1 1 0 6 1 1 |
refdes=force_parity |
} |
C 2300 2700 1 0 0 in_port.sym |
{ |
T 2300 2700 5 10 1 1 0 6 1 1 |
refdes=clk |
} |
C 2300 3100 1 0 0 in_port.sym |
{ |
T 2300 3100 5 10 1 1 0 6 1 1 |
refdes=baud_clk |
} |
C 5200 300 1 0 0 out_port.sym |
{ |
T 6200 300 5 10 1 1 0 0 1 1 |
refdes=txd_pad_out |
} |
C 5200 700 1 0 0 out_port.sym |
{ |
T 6200 700 5 10 1 1 0 0 1 1 |
refdes=txd_buffer_empty |
} |
/socgen/trunk/projects/pic_micro/ip/soc_mouse/doc/geda/drawing/sch/cde_sram.sch
0,0 → 1,41
v 20100214 1 |
C 2300 300 1 0 0 in_port_v.sym |
{ |
T 2300 300 5 10 1 1 0 6 1 1 |
refdes=Write_Data[WIDTH-1:0] |
} |
C 2300 700 1 0 0 in_port_v.sym |
{ |
T 2300 700 5 10 1 1 0 6 1 1 |
refdes=WR_Add[ADDR-1:0] |
} |
C 2300 1100 1 0 0 in_port_v.sym |
{ |
T 2300 1100 5 10 1 1 0 6 1 1 |
refdes=RD_Add[ADDR-1:0] |
} |
C 2300 1500 1 0 0 in_port.sym |
{ |
T 2300 1500 5 10 1 1 0 6 1 1 |
refdes=clk |
} |
C 2300 1900 1 0 0 in_port.sym |
{ |
T 2300 1900 5 10 1 1 0 6 1 1 |
refdes=WR |
} |
C 2300 2300 1 0 0 in_port.sym |
{ |
T 2300 2300 5 10 1 1 0 6 1 1 |
refdes=RD |
} |
C 2300 2700 1 0 0 in_port.sym |
{ |
T 2300 2700 5 10 1 1 0 6 1 1 |
refdes=CS |
} |
C 5600 300 1 0 0 out_port_v.sym |
{ |
T 6600 300 5 10 1 1 0 0 1 1 |
refdes=Read_Data[WIDTH-1:0] |
} |
/socgen/trunk/projects/pic_micro/ip/soc_mouse/doc/geda/drawing/sch/io_module_mouse_pic.sch
0,0 → 1,61
v 20100214 1 |
C 2300 300 1 0 0 in_port_v.sym |
{ |
T 2300 300 5 10 1 1 0 6 1 1 |
refdes=wdata[7:0] |
} |
C 2300 700 1 0 0 in_port_v.sym |
{ |
T 2300 700 5 10 1 1 0 6 1 1 |
refdes=waddr[ADDR_WIDTH-1:0] |
} |
C 2300 1100 1 0 0 in_port_v.sym |
{ |
T 2300 1100 5 10 1 1 0 6 1 1 |
refdes=raddr[ADDR_WIDTH-1:0] |
} |
C 2300 1500 1 0 0 in_port_v.sym |
{ |
T 2300 1500 5 10 1 1 0 6 1 1 |
refdes=int_in[7:0] |
} |
C 2300 1900 1 0 0 in_port.sym |
{ |
T 2300 1900 5 10 1 1 0 6 1 1 |
refdes=wr |
} |
C 2300 2300 1 0 0 in_port.sym |
{ |
T 2300 2300 5 10 1 1 0 6 1 1 |
refdes=reset |
} |
C 2300 2700 1 0 0 in_port.sym |
{ |
T 2300 2700 5 10 1 1 0 6 1 1 |
refdes=rd |
} |
C 2300 3100 1 0 0 in_port.sym |
{ |
T 2300 3100 5 10 1 1 0 6 1 1 |
refdes=cs |
} |
C 2300 3500 1 0 0 in_port.sym |
{ |
T 2300 3500 5 10 1 1 0 6 1 1 |
refdes=clk |
} |
C 4600 300 1 0 0 out_port_v.sym |
{ |
T 5600 300 5 10 1 1 0 0 1 1 |
refdes=rdata[7:0] |
} |
C 4600 700 1 0 0 out_port.sym |
{ |
T 5600 700 5 10 1 1 0 0 1 1 |
refdes=nmi_out |
} |
C 4600 1100 1 0 0 out_port.sym |
{ |
T 5600 1100 5 10 1 1 0 0 1 1 |
refdes=irq_out |
} |
/socgen/trunk/projects/pic_micro/ip/soc_mouse/doc/geda/drawing/sch/io_module_mouse_uart.sch
0,0 → 1,76
v 20100214 1 |
C 1200 300 1 0 0 in_port_v.sym |
{ |
T 1200 300 5 10 1 1 0 6 1 1 |
refdes=wdata[7:0] |
} |
C 1200 700 1 0 0 in_port_v.sym |
{ |
T 1200 700 5 10 1 1 0 6 1 1 |
refdes=waddr[7:0] |
} |
C 1200 1100 1 0 0 in_port_v.sym |
{ |
T 1200 1100 5 10 1 1 0 6 1 1 |
refdes=raddr[7:0] |
} |
C 1200 1500 1 0 0 in_port.sym |
{ |
T 1200 1500 5 10 1 1 0 6 1 1 |
refdes=wr |
} |
C 1200 1900 1 0 0 in_port.sym |
{ |
T 1200 1900 5 10 1 1 0 6 1 1 |
refdes=rxd_pad_in |
} |
C 1200 2300 1 0 0 in_port.sym |
{ |
T 1200 2300 5 10 1 1 0 6 1 1 |
refdes=reset |
} |
C 1200 2700 1 0 0 in_port.sym |
{ |
T 1200 2700 5 10 1 1 0 6 1 1 |
refdes=rd |
} |
C 1200 3100 1 0 0 in_port.sym |
{ |
T 1200 3100 5 10 1 1 0 6 1 1 |
refdes=cts_pad_in |
} |
C 1200 3500 1 0 0 in_port.sym |
{ |
T 1200 3500 5 10 1 1 0 6 1 1 |
refdes=cs |
} |
C 1200 3900 1 0 0 in_port.sym |
{ |
T 1200 3900 5 10 1 1 0 6 1 1 |
refdes=clk |
} |
C 3600 300 1 0 0 out_port_v.sym |
{ |
T 4600 300 5 10 1 1 0 0 1 1 |
refdes=rdata[7:0] |
} |
C 3600 700 1 0 0 out_port.sym |
{ |
T 4600 700 5 10 1 1 0 0 1 1 |
refdes=txd_pad_out |
} |
C 3600 1100 1 0 0 out_port.sym |
{ |
T 4600 1100 5 10 1 1 0 0 1 1 |
refdes=tx_irq |
} |
C 3600 1500 1 0 0 out_port.sym |
{ |
T 4600 1500 5 10 1 1 0 0 1 1 |
refdes=rx_irq |
} |
C 3600 1900 1 0 0 out_port.sym |
{ |
T 4600 1900 5 10 1 1 0 0 1 1 |
refdes=rts_pad_out |
} |
/socgen/trunk/projects/pic_micro/ip/soc_mouse/doc/geda/drawing/sch/io_module_mouse.sch
0,0 → 1,146
v 20100214 1 |
C 3400 300 1 0 0 in_port_v.sym |
{ |
T 3400 300 5 10 1 1 0 6 1 1 |
refdes=wdata[7:0] |
} |
C 3400 700 1 0 0 in_port_v.sym |
{ |
T 3400 700 5 10 1 1 0 6 1 1 |
refdes=waddr[ADDR_WIDTH-BASE_WIDTH-1:0] |
} |
C 3400 1100 1 0 0 in_port_v.sym |
{ |
T 3400 1100 5 10 1 1 0 6 1 1 |
refdes=ext_irq_in[7:0] |
} |
C 3400 1500 1 0 0 in_port_v.sym |
{ |
T 3400 1500 5 10 1 1 0 6 1 1 |
refdes=addr[ADDR_WIDTH-1:0] |
} |
C 3400 1900 1 0 0 in_port.sym |
{ |
T 3400 1900 5 10 1 1 0 6 1 1 |
refdes=wr |
} |
C 3400 2300 1 0 0 in_port.sym |
{ |
T 3400 2300 5 10 1 1 0 6 1 1 |
refdes=rxd_pad_in |
} |
C 3400 2700 1 0 0 in_port.sym |
{ |
T 3400 2700 5 10 1 1 0 6 1 1 |
refdes=reset |
} |
C 3400 3100 1 0 0 in_port.sym |
{ |
T 3400 3100 5 10 1 1 0 6 1 1 |
refdes=rd |
} |
C 3400 3500 1 0 0 in_port.sym |
{ |
T 3400 3500 5 10 1 1 0 6 1 1 |
refdes=ps2_data_in |
} |
C 3400 3900 1 0 0 in_port.sym |
{ |
T 3400 3900 5 10 1 1 0 6 1 1 |
refdes=ps2_clk_in |
} |
C 3400 4300 1 0 0 in_port.sym |
{ |
T 3400 4300 5 10 1 1 0 6 1 1 |
refdes=enable |
} |
C 3400 4700 1 0 0 in_port.sym |
{ |
T 3400 4700 5 10 1 1 0 6 1 1 |
refdes=cts_pad_in |
} |
C 3400 5100 1 0 0 in_port.sym |
{ |
T 3400 5100 5 10 1 1 0 6 1 1 |
refdes=clk |
} |
C 6100 300 1 0 0 out_port_v.sym |
{ |
T 7100 300 5 10 1 1 0 0 1 1 |
refdes=y_pos[9:0] |
} |
C 6100 700 1 0 0 out_port_v.sym |
{ |
T 7100 700 5 10 1 1 0 0 1 1 |
refdes=x_pos[9:0] |
} |
C 6100 1100 1 0 0 out_port_v.sym |
{ |
T 7100 1100 5 10 1 1 0 0 1 1 |
refdes=rdata[7:0] |
} |
C 6100 1500 1 0 0 out_port.sym |
{ |
T 7100 1500 5 10 1 1 0 0 1 1 |
refdes=txd_pad_out |
} |
C 6100 1900 1 0 0 out_port.sym |
{ |
T 7100 1900 5 10 1 1 0 0 1 1 |
refdes=tx_irq |
} |
C 6100 2300 1 0 0 out_port.sym |
{ |
T 7100 2300 5 10 1 1 0 0 1 1 |
refdes=rx_irq |
} |
C 6100 2700 1 0 0 out_port.sym |
{ |
T 7100 2700 5 10 1 1 0 0 1 1 |
refdes=rts_pad_out |
} |
C 6100 3100 1 0 0 out_port.sym |
{ |
T 7100 3100 5 10 1 1 0 0 1 1 |
refdes=ps2_data_oe |
} |
C 6100 3500 1 0 0 out_port.sym |
{ |
T 7100 3500 5 10 1 1 0 0 1 1 |
refdes=ps2_data_avail |
} |
C 6100 3900 1 0 0 out_port.sym |
{ |
T 7100 3900 5 10 1 1 0 0 1 1 |
refdes=ps2_clk_oe |
} |
C 6100 4300 1 0 0 out_port.sym |
{ |
T 7100 4300 5 10 1 1 0 0 1 1 |
refdes=pic_nmi |
} |
C 6100 4700 1 0 0 out_port.sym |
{ |
T 7100 4700 5 10 1 1 0 0 1 1 |
refdes=pic_irq |
} |
C 6100 5100 1 0 0 out_port.sym |
{ |
T 7100 5100 5 10 1 1 0 0 1 1 |
refdes=new_packet |
} |
C 6100 5500 1 0 0 out_port.sym |
{ |
T 7100 5500 5 10 1 1 0 0 1 1 |
refdes=ms_right |
} |
C 6100 5900 1 0 0 out_port.sym |
{ |
T 7100 5900 5 10 1 1 0 0 1 1 |
refdes=ms_mid |
} |
C 6100 6300 1 0 0 out_port.sym |
{ |
T 7100 6300 5 10 1 1 0 0 1 1 |
refdes=ms_left |
} |
/socgen/trunk/projects/pic_micro/ip/soc_mouse/doc/geda/drawing/sch/ps2_interface.sch
0,0 → 1,91
v 20100214 1 |
C 1400 300 1 0 0 in_port_v.sym |
{ |
T 1400 300 5 10 1 1 0 6 1 1 |
refdes=tx_data[7:0] |
} |
C 1400 700 1 0 0 in_port.sym |
{ |
T 1400 700 5 10 1 1 0 6 1 1 |
refdes=write |
} |
C 1400 1100 1 0 0 in_port.sym |
{ |
T 1400 1100 5 10 1 1 0 6 1 1 |
refdes=reset |
} |
C 1400 1500 1 0 0 in_port.sym |
{ |
T 1400 1500 5 10 1 1 0 6 1 1 |
refdes=ps2_data_in |
} |
C 1400 1900 1 0 0 in_port.sym |
{ |
T 1400 1900 5 10 1 1 0 6 1 1 |
refdes=ps2_clk_in |
} |
C 1400 2300 1 0 0 in_port.sym |
{ |
T 1400 2300 5 10 1 1 0 6 1 1 |
refdes=clr_rx_full |
} |
C 1400 2700 1 0 0 in_port.sym |
{ |
T 1400 2700 5 10 1 1 0 6 1 1 |
refdes=clk |
} |
C 4200 300 1 0 0 out_port_v.sym |
{ |
T 5200 300 5 10 1 1 0 0 1 1 |
refdes=rx_data[7:0] |
} |
C 4200 700 1 0 0 out_port.sym |
{ |
T 5200 700 5 10 1 1 0 0 1 1 |
refdes=tx_ack_error |
} |
C 4200 1100 1 0 0 out_port.sym |
{ |
T 5200 1100 5 10 1 1 0 0 1 1 |
refdes=rx_parity_rcv |
} |
C 4200 1500 1 0 0 out_port.sym |
{ |
T 5200 1500 5 10 1 1 0 0 1 1 |
refdes=rx_parity_error |
} |
C 4200 1900 1 0 0 out_port.sym |
{ |
T 5200 1900 5 10 1 1 0 0 1 1 |
refdes=rx_parity_cal |
} |
C 4200 2300 1 0 0 out_port.sym |
{ |
T 5200 2300 5 10 1 1 0 0 1 1 |
refdes=rx_full |
} |
C 4200 2700 1 0 0 out_port.sym |
{ |
T 5200 2700 5 10 1 1 0 0 1 1 |
refdes=rx_frame_error |
} |
C 4200 3100 1 0 0 out_port.sym |
{ |
T 5200 3100 5 10 1 1 0 0 1 1 |
refdes=read |
} |
C 4200 3500 1 0 0 out_port.sym |
{ |
T 5200 3500 5 10 1 1 0 0 1 1 |
refdes=ps2_data_oe |
} |
C 4200 3900 1 0 0 out_port.sym |
{ |
T 5200 3900 5 10 1 1 0 0 1 1 |
refdes=ps2_clk_oe |
} |
C 4200 4300 1 0 0 out_port.sym |
{ |
T 5200 4300 5 10 1 1 0 0 1 1 |
refdes=busy |
} |
/socgen/trunk/projects/pic_micro/ip/soc_mouse/doc/geda/drawing/sch/ps2_interface_fsm.sch
0,0 → 1,81
v 20100214 1 |
C 1700 300 1 0 0 in_port_v.sym |
{ |
T 1700 300 5 10 1 1 0 6 1 1 |
refdes=bit_count[3:0] |
} |
C 1700 700 1 0 0 in_port.sym |
{ |
T 1700 700 5 10 1 1 0 6 1 1 |
refdes=write |
} |
C 1700 1100 1 0 0 in_port.sym |
{ |
T 1700 1100 5 10 1 1 0 6 1 1 |
refdes=usec_delay_done |
} |
C 1700 1500 1 0 0 in_port.sym |
{ |
T 1700 1500 5 10 1 1 0 6 1 1 |
refdes=reset |
} |
C 1700 1900 1 0 0 in_port.sym |
{ |
T 1700 1900 5 10 1 1 0 6 1 1 |
refdes=ps2_idle |
} |
C 1700 2300 1 0 0 in_port.sym |
{ |
T 1700 2300 5 10 1 1 0 6 1 1 |
refdes=ps2_clk_fall |
} |
C 1700 2700 1 0 0 in_port.sym |
{ |
T 1700 2700 5 10 1 1 0 6 1 1 |
refdes=frame0 |
} |
C 1700 3100 1 0 0 in_port.sym |
{ |
T 1700 3100 5 10 1 1 0 6 1 1 |
refdes=force_startbit |
} |
C 1700 3500 1 0 0 in_port.sym |
{ |
T 1700 3500 5 10 1 1 0 6 1 1 |
refdes=clk |
} |
C 4700 300 1 0 0 out_port.sym |
{ |
T 5700 300 5 10 1 1 0 0 1 1 |
refdes=shift_frame |
} |
C 4700 700 1 0 0 out_port.sym |
{ |
T 5700 700 5 10 1 1 0 0 1 1 |
refdes=ps2_data_oe |
} |
C 4700 1100 1 0 0 out_port.sym |
{ |
T 5700 1100 5 10 1 1 0 0 1 1 |
refdes=ps2_clk_oe |
} |
C 4700 1500 1 0 0 out_port.sym |
{ |
T 5700 1500 5 10 1 1 0 0 1 1 |
refdes=load_tx_data |
} |
C 4700 1900 1 0 0 out_port.sym |
{ |
T 5700 1900 5 10 1 1 0 0 1 1 |
refdes=load_rx_data |
} |
C 4700 2300 1 0 0 out_port.sym |
{ |
T 5700 2300 5 10 1 1 0 0 1 1 |
refdes=enable_usec_delay |
} |
C 4700 2700 1 0 0 out_port.sym |
{ |
T 5700 2700 5 10 1 1 0 0 1 1 |
refdes=busy |
} |
/socgen/trunk/projects/pic_micro/ip/soc_mouse/doc/geda/drawing/sch/soc_mouse.sch
0,0 → 1,101
v 20100214 1 |
C 1700 300 1 0 0 in_port.sym |
{ |
T 1700 300 5 10 1 1 0 6 1 1 |
refdes=rxd_pad_in |
} |
C 1700 700 1 0 0 in_port.sym |
{ |
T 1700 700 5 10 1 1 0 6 1 1 |
refdes=reset |
} |
C 1700 1100 1 0 0 in_port.sym |
{ |
T 1700 1100 5 10 1 1 0 6 1 1 |
refdes=ps2_data_pad_in |
} |
C 1700 1500 1 0 0 in_port.sym |
{ |
T 1700 1500 5 10 1 1 0 6 1 1 |
refdes=ps2_clk_pad_in |
} |
C 1700 1900 1 0 0 in_port.sym |
{ |
T 1700 1900 5 10 1 1 0 6 1 1 |
refdes=cts_pad_in |
} |
C 1700 2300 1 0 0 in_port.sym |
{ |
T 1700 2300 5 10 1 1 0 6 1 1 |
refdes=clk |
} |
C 4500 300 1 0 0 out_port_v.sym |
{ |
T 5500 300 5 10 1 1 0 0 1 1 |
refdes=y_pos[9:0] |
} |
C 4500 700 1 0 0 out_port_v.sym |
{ |
T 5500 700 5 10 1 1 0 0 1 1 |
refdes=x_pos[9:0] |
} |
C 4500 1100 1 0 0 out_port_v.sym |
{ |
T 5500 1100 5 10 1 1 0 0 1 1 |
refdes=portcout[7:0] |
} |
C 4500 1500 1 0 0 out_port_v.sym |
{ |
T 5500 1500 5 10 1 1 0 0 1 1 |
refdes=portbout[7:0] |
} |
C 4500 1900 1 0 0 out_port_v.sym |
{ |
T 5500 1900 5 10 1 1 0 0 1 1 |
refdes=portaout[7:0] |
} |
C 4500 2300 1 0 0 out_port_v.sym |
{ |
T 5500 2300 5 10 1 1 0 0 1 1 |
refdes=inst_addr[10:0] |
} |
C 4500 2700 1 0 0 out_port.sym |
{ |
T 5500 2700 5 10 1 1 0 0 1 1 |
refdes=txd_pad_out |
} |
C 4500 3100 1 0 0 out_port.sym |
{ |
T 5500 3100 5 10 1 1 0 0 1 1 |
refdes=rts_pad_out |
} |
C 4500 3500 1 0 0 out_port.sym |
{ |
T 5500 3500 5 10 1 1 0 0 1 1 |
refdes=ps2_data_pad_oe |
} |
C 4500 3900 1 0 0 out_port.sym |
{ |
T 5500 3900 5 10 1 1 0 0 1 1 |
refdes=ps2_clk_pad_oe |
} |
C 4500 4300 1 0 0 out_port.sym |
{ |
T 5500 4300 5 10 1 1 0 0 1 1 |
refdes=new_packet |
} |
C 4500 4700 1 0 0 out_port.sym |
{ |
T 5500 4700 5 10 1 1 0 0 1 1 |
refdes=ms_right |
} |
C 4500 5100 1 0 0 out_port.sym |
{ |
T 5500 5100 5 10 1 1 0 0 1 1 |
refdes=ms_mid |
} |
C 4500 5500 1 0 0 out_port.sym |
{ |
T 5500 5500 5 10 1 1 0 0 1 1 |
refdes=ms_left |
} |
/socgen/trunk/projects/pic_micro/ip/soc_mouse/doc/geda/drawing/sch/uart_baudgen.sch
0,0 → 1,16
v 20100214 1 |
C 700 300 1 0 0 in_port.sym |
{ |
T 700 300 5 10 1 1 0 6 1 1 |
refdes=reset |
} |
C 700 700 1 0 0 in_port.sym |
{ |
T 700 700 5 10 1 1 0 6 1 1 |
refdes=clk |
} |
C 3200 300 1 0 0 out_port.sym |
{ |
T 4200 300 5 10 1 1 0 0 1 1 |
refdes=baud_clk_out |
} |
/socgen/trunk/projects/pic_micro/ip/soc_mouse/doc/geda/drawing/sch/pic16c5x.sch
0,0 → 1,96
v 20100214 1 |
C 1400 300 1 0 0 in_port_v.sym |
{ |
T 1400 300 5 10 1 1 0 6 1 1 |
refdes=portcin[7:0] |
} |
C 1400 700 1 0 0 in_port_v.sym |
{ |
T 1400 700 5 10 1 1 0 6 1 1 |
refdes=portbin[7:0] |
} |
C 1400 1100 1 0 0 in_port_v.sym |
{ |
T 1400 1100 5 10 1 1 0 6 1 1 |
refdes=portain[7:0] |
} |
C 1400 1500 1 0 0 in_port.sym |
{ |
T 1400 1500 5 10 1 1 0 6 1 1 |
refdes=rst_in |
} |
C 1400 1900 1 0 0 in_port.sym |
{ |
T 1400 1900 5 10 1 1 0 6 1 1 |
refdes=clk |
} |
C 4200 300 1 0 0 out_port_v.sym |
{ |
T 5200 300 5 10 1 1 0 0 1 1 |
refdes=trisc[7:0] |
} |
C 4200 700 1 0 0 out_port_v.sym |
{ |
T 5200 700 5 10 1 1 0 0 1 1 |
refdes=trisb[7:0] |
} |
C 4200 1100 1 0 0 out_port_v.sym |
{ |
T 5200 1100 5 10 1 1 0 0 1 1 |
refdes=trisa[7:0] |
} |
C 4200 1500 1 0 0 out_port_v.sym |
{ |
T 5200 1500 5 10 1 1 0 0 1 1 |
refdes=tmr0[7:0] |
} |
C 4200 1900 1 0 0 out_port_v.sym |
{ |
T 5200 1900 5 10 1 1 0 0 1 1 |
refdes=portcout[7:0] |
} |
C 4200 2300 1 0 0 out_port_v.sym |
{ |
T 5200 2300 5 10 1 1 0 0 1 1 |
refdes=portbout[7:0] |
} |
C 4200 2700 1 0 0 out_port_v.sym |
{ |
T 5200 2700 5 10 1 1 0 0 1 1 |
refdes=portaout[7:0] |
} |
C 4200 3100 1 0 0 out_port_v.sym |
{ |
T 5200 3100 5 10 1 1 0 0 1 1 |
refdes=option[7:0] |
} |
C 4200 3500 1 0 0 out_port_v.sym |
{ |
T 5200 3500 5 10 1 1 0 0 1 1 |
refdes=inst_addr[10:0] |
} |
C 4200 3900 1 0 0 out_port.sym |
{ |
T 5200 3900 5 10 1 1 0 0 1 1 |
refdes=wdt_clr |
} |
C 4200 4300 1 0 0 out_port.sym |
{ |
T 5200 4300 5 10 1 1 0 0 1 1 |
refdes=sleep |
} |
C 4200 4700 1 0 0 out_port.sym |
{ |
T 5200 4700 5 10 1 1 0 0 1 1 |
refdes=portc_we |
} |
C 4200 5100 1 0 0 out_port.sym |
{ |
T 5200 5100 5 10 1 1 0 0 1 1 |
refdes=portb_we |
} |
C 4200 5500 1 0 0 out_port.sym |
{ |
T 5200 5500 5 10 1 1 0 0 1 1 |
refdes=porta_we |
} |
/socgen/trunk/projects/pic_micro/ip/mrisc/doc/geda/drawing/sch/mrisc_fifo4.sch
1,25 → 1,25
v 20100214 1 |
C 1600 300 1 0 0 ipad_2.sym |
C 1600 300 1 0 0 in_port_v.sym |
{ |
T 1600 300 5 10 1 1 0 6 1 1 |
refdes=din[WIDTH-1:0] |
} |
C 1600 700 1 0 0 ipad_1.sym |
C 1600 700 1 0 0 in_port.sym |
{ |
T 1600 700 5 10 1 1 0 6 1 1 |
refdes=push |
} |
C 1600 1100 1 0 0 ipad_1.sym |
C 1600 1100 1 0 0 in_port.sym |
{ |
T 1600 1100 5 10 1 1 0 6 1 1 |
refdes=pop |
} |
C 1600 1500 1 0 0 ipad_1.sym |
C 1600 1500 1 0 0 in_port.sym |
{ |
T 1600 1500 5 10 1 1 0 6 1 1 |
refdes=clk |
} |
C 4400 300 1 0 0 opad_2.sym |
C 4400 300 1 0 0 out_port_v.sym |
{ |
T 5400 300 5 10 1 1 0 0 1 1 |
refdes=dout[WIDTH-1:0] |
/socgen/trunk/projects/pic_micro/ip/mrisc/doc/geda/drawing/sch/mrisc_presclr_wdt.sch
1,45 → 1,45
v 20100214 1 |
C 1300 300 1 0 0 ipad_2.sym |
C 1300 300 1 0 0 in_port_v.sym |
{ |
T 1300 300 5 10 1 1 0 6 1 1 |
refdes=option[5:0] |
} |
C 1300 700 1 0 0 ipad_1.sym |
C 1300 700 1 0 0 in_port.sym |
{ |
T 1300 700 5 10 1 1 0 6 1 1 |
refdes=wdt_en |
} |
C 1300 1100 1 0 0 ipad_1.sym |
C 1300 1100 1 0 0 in_port.sym |
{ |
T 1300 1100 5 10 1 1 0 6 1 1 |
refdes=wdt_clr |
} |
C 1300 1500 1 0 0 ipad_1.sym |
C 1300 1500 1 0 0 in_port.sym |
{ |
T 1300 1500 5 10 1 1 0 6 1 1 |
refdes=tmr0_we |
} |
C 1300 1900 1 0 0 ipad_1.sym |
C 1300 1900 1 0 0 in_port.sym |
{ |
T 1300 1900 5 10 1 1 0 6 1 1 |
refdes=tcki |
} |
C 1300 2300 1 0 0 ipad_1.sym |
C 1300 2300 1 0 0 in_port.sym |
{ |
T 1300 2300 5 10 1 1 0 6 1 1 |
refdes=rst |
} |
C 1300 2700 1 0 0 ipad_1.sym |
C 1300 2700 1 0 0 in_port.sym |
{ |
T 1300 2700 5 10 1 1 0 6 1 1 |
refdes=clk |
} |
C 3700 300 1 0 0 opad_1.sym |
C 3700 300 1 0 0 out_port.sym |
{ |
T 4700 300 5 10 1 1 0 0 1 1 |
refdes=wdt_to |
} |
C 3700 700 1 0 0 opad_1.sym |
C 3700 700 1 0 0 out_port.sym |
{ |
T 4700 700 5 10 1 1 0 0 1 1 |
refdes=tmr0_cnt_en |
/socgen/trunk/projects/pic_micro/ip/mrisc/doc/geda/drawing/sch/cde_sram.sch
1,40 → 1,40
v 20100214 1 |
C 2300 300 1 0 0 ipad_2.sym |
C 2300 300 1 0 0 in_port_v.sym |
{ |
T 2300 300 5 10 1 1 0 6 1 1 |
refdes=Write_Data[WIDTH-1:0] |
} |
C 2300 700 1 0 0 ipad_2.sym |
C 2300 700 1 0 0 in_port_v.sym |
{ |
T 2300 700 5 10 1 1 0 6 1 1 |
refdes=WR_Add[ADDR-1:0] |
} |
C 2300 1100 1 0 0 ipad_2.sym |
C 2300 1100 1 0 0 in_port_v.sym |
{ |
T 2300 1100 5 10 1 1 0 6 1 1 |
refdes=RD_Add[ADDR-1:0] |
} |
C 2300 1500 1 0 0 ipad_1.sym |
C 2300 1500 1 0 0 in_port.sym |
{ |
T 2300 1500 5 10 1 1 0 6 1 1 |
refdes=clk |
} |
C 2300 1900 1 0 0 ipad_1.sym |
C 2300 1900 1 0 0 in_port.sym |
{ |
T 2300 1900 5 10 1 1 0 6 1 1 |
refdes=WR |
} |
C 2300 2300 1 0 0 ipad_1.sym |
C 2300 2300 1 0 0 in_port.sym |
{ |
T 2300 2300 5 10 1 1 0 6 1 1 |
refdes=RD |
} |
C 2300 2700 1 0 0 ipad_1.sym |
C 2300 2700 1 0 0 in_port.sym |
{ |
T 2300 2700 5 10 1 1 0 6 1 1 |
refdes=CS |
} |
C 5600 300 1 0 0 opad_2.sym |
C 5600 300 1 0 0 out_port_v.sym |
{ |
T 6600 300 5 10 1 1 0 0 1 1 |
refdes=Read_Data[WIDTH-1:0] |
/socgen/trunk/projects/pic_micro/ip/mrisc/doc/geda/drawing/sch/mrisc.sch
1,90 → 1,90
v 20100214 1 |
C 1700 300 1 0 0 ipad_2.sym |
C 1700 300 1 0 0 in_port_v.sym |
{ |
T 1700 300 5 10 1 1 0 6 1 1 |
refdes=portcin[7:0] |
} |
C 1700 700 1 0 0 ipad_2.sym |
C 1700 700 1 0 0 in_port_v.sym |
{ |
T 1700 700 5 10 1 1 0 6 1 1 |
refdes=portbin[7:0] |
} |
C 1700 1100 1 0 0 ipad_2.sym |
C 1700 1100 1 0 0 in_port_v.sym |
{ |
T 1700 1100 5 10 1 1 0 6 1 1 |
refdes=portain[7:0] |
} |
C 1700 1500 1 0 0 ipad_2.sym |
C 1700 1500 1 0 0 in_port_v.sym |
{ |
T 1700 1500 5 10 1 1 0 6 1 1 |
refdes=inst_data[11:0] |
} |
C 1700 1900 1 0 0 ipad_1.sym |
C 1700 1900 1 0 0 in_port.sym |
{ |
T 1700 1900 5 10 1 1 0 6 1 1 |
refdes=wdt_en |
} |
C 1700 2300 1 0 0 ipad_1.sym |
C 1700 2300 1 0 0 in_port.sym |
{ |
T 1700 2300 5 10 1 1 0 6 1 1 |
refdes=tcki |
} |
C 1700 2700 1 0 0 ipad_1.sym |
C 1700 2700 1 0 0 in_port.sym |
{ |
T 1700 2700 5 10 1 1 0 6 1 1 |
refdes=rst_in |
} |
C 1700 3100 1 0 0 ipad_1.sym |
C 1700 3100 1 0 0 in_port.sym |
{ |
T 1700 3100 5 10 1 1 0 6 1 1 |
refdes=clk |
} |
C 4500 300 1 0 0 opad_2.sym |
C 4500 300 1 0 0 out_port_v.sym |
{ |
T 5500 300 5 10 1 1 0 0 1 1 |
refdes=trisc[7:0] |
} |
C 4500 700 1 0 0 opad_2.sym |
C 4500 700 1 0 0 out_port_v.sym |
{ |
T 5500 700 5 10 1 1 0 0 1 1 |
refdes=trisb[7:0] |
} |
C 4500 1100 1 0 0 opad_2.sym |
C 4500 1100 1 0 0 out_port_v.sym |
{ |
T 5500 1100 5 10 1 1 0 0 1 1 |
refdes=trisa[7:0] |
} |
C 4500 1500 1 0 0 opad_2.sym |
C 4500 1500 1 0 0 out_port_v.sym |
{ |
T 5500 1500 5 10 1 1 0 0 1 1 |
refdes=portcout[7:0] |
} |
C 4500 1900 1 0 0 opad_2.sym |
C 4500 1900 1 0 0 out_port_v.sym |
{ |
T 5500 1900 5 10 1 1 0 0 1 1 |
refdes=portbout[7:0] |
} |
C 4500 2300 1 0 0 opad_2.sym |
C 4500 2300 1 0 0 out_port_v.sym |
{ |
T 5500 2300 5 10 1 1 0 0 1 1 |
refdes=portaout[7:0] |
} |
C 4500 2700 1 0 0 opad_2.sym |
C 4500 2700 1 0 0 out_port_v.sym |
{ |
T 5500 2700 5 10 1 1 0 0 1 1 |
refdes=inst_addr[10:0] |
} |
C 4500 3100 1 0 0 opad_1.sym |
C 4500 3100 1 0 0 out_port.sym |
{ |
T 5500 3100 5 10 1 1 0 0 1 1 |
refdes=portc_we |
} |
C 4500 3500 1 0 0 opad_1.sym |
C 4500 3500 1 0 0 out_port.sym |
{ |
T 5500 3500 5 10 1 1 0 0 1 1 |
refdes=portb_we |
} |
C 4500 3900 1 0 0 opad_1.sym |
C 4500 3900 1 0 0 out_port.sym |
{ |
T 5500 3900 5 10 1 1 0 0 1 1 |
refdes=porta_we |
/socgen/trunk/projects/pic_micro/ip/mrisc/doc/geda/drawing/sch/mrisc_alu.sch
1,45 → 1,45
v 20100214 1 |
C 1100 300 1 0 0 ipad_2.sym |
C 1100 300 1 0 0 in_port_v.sym |
{ |
T 1100 300 5 10 1 1 0 6 1 1 |
refdes=s2[7:0] |
} |
C 1100 700 1 0 0 ipad_2.sym |
C 1100 700 1 0 0 in_port_v.sym |
{ |
T 1100 700 5 10 1 1 0 6 1 1 |
refdes=s1[7:0] |
} |
C 1100 1100 1 0 0 ipad_2.sym |
C 1100 1100 1 0 0 in_port_v.sym |
{ |
T 1100 1100 5 10 1 1 0 6 1 1 |
refdes=op[3:0] |
} |
C 1100 1500 1 0 0 ipad_2.sym |
C 1100 1500 1 0 0 in_port_v.sym |
{ |
T 1100 1500 5 10 1 1 0 6 1 1 |
refdes=mask[7:0] |
} |
C 1100 1900 1 0 0 ipad_1.sym |
C 1100 1900 1 0 0 in_port.sym |
{ |
T 1100 1900 5 10 1 1 0 6 1 1 |
refdes=c_in |
} |
C 3200 300 1 0 0 opad_2.sym |
C 3200 300 1 0 0 out_port_v.sym |
{ |
T 4200 300 5 10 1 1 0 0 1 1 |
refdes=out[7:0] |
} |
C 3200 700 1 0 0 opad_1.sym |
C 3200 700 1 0 0 out_port.sym |
{ |
T 4200 700 5 10 1 1 0 0 1 1 |
refdes=z |
} |
C 3200 1100 1 0 0 opad_1.sym |
C 3200 1100 1 0 0 out_port.sym |
{ |
T 4200 1100 5 10 1 1 0 0 1 1 |
refdes=dc |
} |
C 3200 1500 1 0 0 opad_1.sym |
C 3200 1500 1 0 0 out_port.sym |
{ |
T 4200 1500 5 10 1 1 0 0 1 1 |
refdes=c |
/socgen/trunk/projects/pic_micro/ip/mrisc/doc/geda/drawing/sch/mrisc_register_file.sch
1,45 → 1,45
v 20100214 1 |
C 1700 300 1 0 0 ipad_2.sym |
C 1700 300 1 0 0 in_port_v.sym |
{ |
T 1700 300 5 10 1 1 0 6 1 1 |
refdes=rf_wr_data[7:0] |
} |
C 1700 700 1 0 0 ipad_2.sym |
C 1700 700 1 0 0 in_port_v.sym |
{ |
T 1700 700 5 10 1 1 0 6 1 1 |
refdes=rf_wr_bnk[1:0] |
} |
C 1700 1100 1 0 0 ipad_2.sym |
C 1700 1100 1 0 0 in_port_v.sym |
{ |
T 1700 1100 5 10 1 1 0 6 1 1 |
refdes=rf_wr_addr[4:0] |
} |
C 1700 1500 1 0 0 ipad_2.sym |
C 1700 1500 1 0 0 in_port_v.sym |
{ |
T 1700 1500 5 10 1 1 0 6 1 1 |
refdes=rf_rd_bnk[1:0] |
} |
C 1700 1900 1 0 0 ipad_2.sym |
C 1700 1900 1 0 0 in_port_v.sym |
{ |
T 1700 1900 5 10 1 1 0 6 1 1 |
refdes=rf_rd_addr[4:0] |
} |
C 1700 2300 1 0 0 ipad_1.sym |
C 1700 2300 1 0 0 in_port.sym |
{ |
T 1700 2300 5 10 1 1 0 6 1 1 |
refdes=rst |
} |
C 1700 2700 1 0 0 ipad_1.sym |
C 1700 2700 1 0 0 in_port.sym |
{ |
T 1700 2700 5 10 1 1 0 6 1 1 |
refdes=rf_we |
} |
C 1700 3100 1 0 0 ipad_1.sym |
C 1700 3100 1 0 0 in_port.sym |
{ |
T 1700 3100 5 10 1 1 0 6 1 1 |
refdes=clk |
} |
C 4500 300 1 0 0 opad_2.sym |
C 4500 300 1 0 0 out_port_v.sym |
{ |
T 5500 300 5 10 1 1 0 0 1 1 |
refdes=rf_rd_data[7:0] |
/socgen/trunk/projects/pic_micro/ip/mrisc/doc/png/mrisc.png
Cannot display: file marked as a binary type.
svn:mime-type = application/octet-stream
socgen/trunk/projects/pic_micro/ip/mrisc/doc/png/mrisc.png
Property changes :
Added: svn:mime-type
## -0,0 +1 ##
+application/octet-stream
\ No newline at end of property
Index: socgen/trunk/projects/logic/ip/ps2_interface/doc/geda/drawing/sch/cde_sync_with_hysteresis.sch
===================================================================
--- socgen/trunk/projects/logic/ip/ps2_interface/doc/geda/drawing/sch/cde_sync_with_hysteresis.sch (nonexistent)
+++ socgen/trunk/projects/logic/ip/ps2_interface/doc/geda/drawing/sch/cde_sync_with_hysteresis.sch (revision 18)
@@ -0,0 +1,31 @@
+v 20100214 1
+C 2000 300 1 0 0 in_port_v.sym
+{
+T 2000 300 5 10 1 1 0 6 1 1
+refdes=data_in[WIDTH-1:0]
+}
+C 2000 700 1 0 0 in_port.sym
+{
+T 2000 700 5 10 1 1 0 6 1 1
+refdes=reset
+}
+C 2000 1100 1 0 0 in_port.sym
+{
+T 2000 1100 5 10 1 1 0 6 1 1
+refdes=clk
+}
+C 5300 300 1 0 0 out_port_v.sym
+{
+T 6300 300 5 10 1 1 0 0 1 1
+refdes=data_rise[WIDTH-1:0]
+}
+C 5300 700 1 0 0 out_port_v.sym
+{
+T 6300 700 5 10 1 1 0 0 1 1
+refdes=data_out[WIDTH-1:0]
+}
+C 5300 1100 1 0 0 out_port_v.sym
+{
+T 6300 1100 5 10 1 1 0 0 1 1
+refdes=data_fall[WIDTH-1:0]
+}
Index: socgen/trunk/projects/logic/ip/ps2_interface/doc/geda/drawing/sch/ps2_interface.sch
===================================================================
--- socgen/trunk/projects/logic/ip/ps2_interface/doc/geda/drawing/sch/ps2_interface.sch (nonexistent)
+++ socgen/trunk/projects/logic/ip/ps2_interface/doc/geda/drawing/sch/ps2_interface.sch (revision 18)
@@ -0,0 +1,91 @@
+v 20100214 1
+C 1400 300 1 0 0 in_port_v.sym
+{
+T 1400 300 5 10 1 1 0 6 1 1
+refdes=tx_data[7:0]
+}
+C 1400 700 1 0 0 in_port.sym
+{
+T 1400 700 5 10 1 1 0 6 1 1
+refdes=write
+}
+C 1400 1100 1 0 0 in_port.sym
+{
+T 1400 1100 5 10 1 1 0 6 1 1
+refdes=reset
+}
+C 1400 1500 1 0 0 in_port.sym
+{
+T 1400 1500 5 10 1 1 0 6 1 1
+refdes=ps2_data_in
+}
+C 1400 1900 1 0 0 in_port.sym
+{
+T 1400 1900 5 10 1 1 0 6 1 1
+refdes=ps2_clk_in
+}
+C 1400 2300 1 0 0 in_port.sym
+{
+T 1400 2300 5 10 1 1 0 6 1 1
+refdes=clr_rx_full
+}
+C 1400 2700 1 0 0 in_port.sym
+{
+T 1400 2700 5 10 1 1 0 6 1 1
+refdes=clk
+}
+C 4200 300 1 0 0 out_port_v.sym
+{
+T 5200 300 5 10 1 1 0 0 1 1
+refdes=rx_data[7:0]
+}
+C 4200 700 1 0 0 out_port.sym
+{
+T 5200 700 5 10 1 1 0 0 1 1
+refdes=tx_ack_error
+}
+C 4200 1100 1 0 0 out_port.sym
+{
+T 5200 1100 5 10 1 1 0 0 1 1
+refdes=rx_parity_rcv
+}
+C 4200 1500 1 0 0 out_port.sym
+{
+T 5200 1500 5 10 1 1 0 0 1 1
+refdes=rx_parity_error
+}
+C 4200 1900 1 0 0 out_port.sym
+{
+T 5200 1900 5 10 1 1 0 0 1 1
+refdes=rx_parity_cal
+}
+C 4200 2300 1 0 0 out_port.sym
+{
+T 5200 2300 5 10 1 1 0 0 1 1
+refdes=rx_full
+}
+C 4200 2700 1 0 0 out_port.sym
+{
+T 5200 2700 5 10 1 1 0 0 1 1
+refdes=rx_frame_error
+}
+C 4200 3100 1 0 0 out_port.sym
+{
+T 5200 3100 5 10 1 1 0 0 1 1
+refdes=read
+}
+C 4200 3500 1 0 0 out_port.sym
+{
+T 5200 3500 5 10 1 1 0 0 1 1
+refdes=ps2_data_oe
+}
+C 4200 3900 1 0 0 out_port.sym
+{
+T 5200 3900 5 10 1 1 0 0 1 1
+refdes=ps2_clk_oe
+}
+C 4200 4300 1 0 0 out_port.sym
+{
+T 5200 4300 5 10 1 1 0 0 1 1
+refdes=busy
+}
Index: socgen/trunk/projects/logic/ip/ps2_interface/doc/geda/drawing/sch/ps2_interface_fsm.sch
===================================================================
--- socgen/trunk/projects/logic/ip/ps2_interface/doc/geda/drawing/sch/ps2_interface_fsm.sch (nonexistent)
+++ socgen/trunk/projects/logic/ip/ps2_interface/doc/geda/drawing/sch/ps2_interface_fsm.sch (revision 18)
@@ -0,0 +1,81 @@
+v 20100214 1
+C 1700 300 1 0 0 in_port_v.sym
+{
+T 1700 300 5 10 1 1 0 6 1 1
+refdes=bit_count[3:0]
+}
+C 1700 700 1 0 0 in_port.sym
+{
+T 1700 700 5 10 1 1 0 6 1 1
+refdes=write
+}
+C 1700 1100 1 0 0 in_port.sym
+{
+T 1700 1100 5 10 1 1 0 6 1 1
+refdes=usec_delay_done
+}
+C 1700 1500 1 0 0 in_port.sym
+{
+T 1700 1500 5 10 1 1 0 6 1 1
+refdes=reset
+}
+C 1700 1900 1 0 0 in_port.sym
+{
+T 1700 1900 5 10 1 1 0 6 1 1
+refdes=ps2_idle
+}
+C 1700 2300 1 0 0 in_port.sym
+{
+T 1700 2300 5 10 1 1 0 6 1 1
+refdes=ps2_clk_fall
+}
+C 1700 2700 1 0 0 in_port.sym
+{
+T 1700 2700 5 10 1 1 0 6 1 1
+refdes=frame0
+}
+C 1700 3100 1 0 0 in_port.sym
+{
+T 1700 3100 5 10 1 1 0 6 1 1
+refdes=force_startbit
+}
+C 1700 3500 1 0 0 in_port.sym
+{
+T 1700 3500 5 10 1 1 0 6 1 1
+refdes=clk
+}
+C 4700 300 1 0 0 out_port.sym
+{
+T 5700 300 5 10 1 1 0 0 1 1
+refdes=shift_frame
+}
+C 4700 700 1 0 0 out_port.sym
+{
+T 5700 700 5 10 1 1 0 0 1 1
+refdes=ps2_data_oe
+}
+C 4700 1100 1 0 0 out_port.sym
+{
+T 5700 1100 5 10 1 1 0 0 1 1
+refdes=ps2_clk_oe
+}
+C 4700 1500 1 0 0 out_port.sym
+{
+T 5700 1500 5 10 1 1 0 0 1 1
+refdes=load_tx_data
+}
+C 4700 1900 1 0 0 out_port.sym
+{
+T 5700 1900 5 10 1 1 0 0 1 1
+refdes=load_rx_data
+}
+C 4700 2300 1 0 0 out_port.sym
+{
+T 5700 2300 5 10 1 1 0 0 1 1
+refdes=enable_usec_delay
+}
+C 4700 2700 1 0 0 out_port.sym
+{
+T 5700 2700 5 10 1 1 0 0 1 1
+refdes=busy
+}
Index: socgen/trunk/projects/logic/ip/ps2_interface/doc/png/ps2_interface.png
===================================================================
Cannot display: file marked as a binary type.
svn:mime-type = application/octet-stream
Index: socgen/trunk/projects/logic/ip/ps2_interface/doc/png/ps2_interface.png
===================================================================
--- socgen/trunk/projects/logic/ip/ps2_interface/doc/png/ps2_interface.png (nonexistent)
+++ socgen/trunk/projects/logic/ip/ps2_interface/doc/png/ps2_interface.png (revision 18)
socgen/trunk/projects/logic/ip/ps2_interface/doc/png/ps2_interface.png
Property changes :
Added: svn:mime-type
## -0,0 +1 ##
+application/octet-stream
\ No newline at end of property
Index: socgen/trunk/projects/logic/ip/disp_io/doc/geda/drawing/sch/disp_io.sch
===================================================================
--- socgen/trunk/projects/logic/ip/disp_io/doc/geda/drawing/sch/disp_io.sch (nonexistent)
+++ socgen/trunk/projects/logic/ip/disp_io/doc/geda/drawing/sch/disp_io.sch (revision 18)
@@ -0,0 +1,66 @@
+v 20100214 1
+C 1700 300 1 0 0 in_port_v.sym
+{
+T 1700 300 5 10 1 1 0 6 1 1
+refdes=sw_pad_in[7:0]
+}
+C 1700 700 1 0 0 in_port_v.sym
+{
+T 1700 700 5 10 1 1 0 6 1 1
+refdes=btn_pad_in[3:0]
+}
+C 1700 1100 1 0 0 in_port_v.sym
+{
+T 1700 1100 5 10 1 1 0 6 1 1
+refdes=PosL[7:0]
+}
+C 1700 1500 1 0 0 in_port_v.sym
+{
+T 1700 1500 5 10 1 1 0 6 1 1
+refdes=PosD[15:0]
+}
+C 1700 1900 1 0 0 in_port.sym
+{
+T 1700 1900 5 10 1 1 0 6 1 1
+refdes=reset
+}
+C 1700 2300 1 0 0 in_port.sym
+{
+T 1700 2300 5 10 1 1 0 6 1 1
+refdes=one_usec
+}
+C 1700 2700 1 0 0 in_port.sym
+{
+T 1700 2700 5 10 1 1 0 6 1 1
+refdes=clk
+}
+C 4600 300 1 0 0 out_port_v.sym
+{
+T 5600 300 5 10 1 1 0 0 1 1
+refdes=seg_pad_out[6:0]
+}
+C 4600 700 1 0 0 out_port_v.sym
+{
+T 5600 700 5 10 1 1 0 0 1 1
+refdes=led_pad_out[7:0]
+}
+C 4600 1100 1 0 0 out_port_v.sym
+{
+T 5600 1100 5 10 1 1 0 0 1 1
+refdes=an_pad_out[3:0]
+}
+C 4600 1500 1 0 0 out_port_v.sym
+{
+T 5600 1500 5 10 1 1 0 0 1 1
+refdes=PosS[7:0]
+}
+C 4600 1900 1 0 0 out_port_v.sym
+{
+T 5600 1900 5 10 1 1 0 0 1 1
+refdes=PosB[3:0]
+}
+C 4600 2300 1 0 0 out_port.sym
+{
+T 5600 2300 5 10 1 1 0 0 1 1
+refdes=dp_pad_out
+}
Index: socgen/trunk/projects/logic/ip/disp_io/doc/png/disp_io.png
===================================================================
Cannot display: file marked as a binary type.
svn:mime-type = application/octet-stream
Index: socgen/trunk/projects/logic/ip/disp_io/doc/png/disp_io.png
===================================================================
--- socgen/trunk/projects/logic/ip/disp_io/doc/png/disp_io.png (nonexistent)
+++ socgen/trunk/projects/logic/ip/disp_io/doc/png/disp_io.png (revision 18)
socgen/trunk/projects/logic/ip/disp_io/doc/png/disp_io.png
Property changes :
Added: svn:mime-type
## -0,0 +1 ##
+application/octet-stream
\ No newline at end of property
Index: socgen/trunk/projects/logic/ip/uart/doc/geda/drawing/sch/uart_rcvr.sch
===================================================================
--- socgen/trunk/projects/logic/ip/uart/doc/geda/drawing/sch/uart_rcvr.sch (revision 17)
+++ socgen/trunk/projects/logic/ip/uart/doc/geda/drawing/sch/uart_rcvr.sch (revision 18)
@@ -1,50 +1,50 @@
v 20100214 1
-C 1400 300 1 0 0 ipad_1.sym
+C 1400 300 1 0 0 in_port.sym
{
T 1400 300 5 10 1 1 0 6 1 1
refdes=rxd_pad_in
}
-C 1400 700 1 0 0 ipad_1.sym
+C 1400 700 1 0 0 in_port.sym
{
T 1400 700 5 10 1 1 0 6 1 1
refdes=reset
}
-C 1400 1100 1 0 0 ipad_1.sym
+C 1400 1100 1 0 0 in_port.sym
{
T 1400 1100 5 10 1 1 0 6 1 1
refdes=parity
}
-C 1400 1500 1 0 0 ipad_1.sym
+C 1400 1500 1 0 0 in_port.sym
{
T 1400 1500 5 10 1 1 0 6 1 1
refdes=force_parity
}
-C 1400 1900 1 0 0 ipad_1.sym
+C 1400 1900 1 0 0 in_port.sym
{
T 1400 1900 5 10 1 1 0 6 1 1
refdes=clk
}
-C 1400 2300 1 0 0 ipad_1.sym
+C 1400 2300 1 0 0 in_port.sym
{
T 1400 2300 5 10 1 1 0 6 1 1
refdes=baud_clk
}
-C 4900 300 1 0 0 opad_2.sym
+C 4900 300 1 0 0 out_port_v.sym
{
T 5900 300 5 10 1 1 0 0 1 1
refdes=rxd_data_out[SIZE-1:0]
}
-C 4900 700 1 0 0 opad_1.sym
+C 4900 700 1 0 0 out_port.sym
{
T 5900 700 5 10 1 1 0 0 1 1
refdes=rxd_stop_error
}
-C 4900 1100 1 0 0 opad_1.sym
+C 4900 1100 1 0 0 out_port.sym
{
T 5900 1100 5 10 1 1 0 0 1 1
refdes=rxd_parity_error
}
-C 4900 1500 1 0 0 opad_1.sym
+C 4900 1500 1 0 0 out_port.sym
{
T 5900 1500 5 10 1 1 0 0 1 1
refdes=rxd_buffer_full
Index: socgen/trunk/projects/logic/ip/uart/doc/geda/drawing/sch/uart.sch
===================================================================
--- socgen/trunk/projects/logic/ip/uart/doc/geda/drawing/sch/uart.sch (revision 17)
+++ socgen/trunk/projects/logic/ip/uart/doc/geda/drawing/sch/uart.sch (revision 18)
@@ -1,100 +1,100 @@
v 20100214 1
-C 2300 300 1 0 0 ipad_2.sym
+C 2300 300 1 0 0 in_port_v.sym
{
T 2300 300 5 10 1 1 0 6 1 1
refdes=txd_data_in[SIZE-1:0]
}
-C 2300 700 1 0 0 ipad_1.sym
+C 2300 700 1 0 0 in_port.sym
{
T 2300 700 5 10 1 1 0 6 1 1
refdes=txd_parity
}
-C 2300 1100 1 0 0 ipad_1.sym
+C 2300 1100 1 0 0 in_port.sym
{
T 2300 1100 5 10 1 1 0 6 1 1
refdes=txd_load
}
-C 2300 1500 1 0 0 ipad_1.sym
+C 2300 1500 1 0 0 in_port.sym
{
T 2300 1500 5 10 1 1 0 6 1 1
refdes=txd_force_parity
}
-C 2300 1900 1 0 0 ipad_1.sym
+C 2300 1900 1 0 0 in_port.sym
{
T 2300 1900 5 10 1 1 0 6 1 1
refdes=txd_break
}
-C 2300 2300 1 0 0 ipad_1.sym
+C 2300 2300 1 0 0 in_port.sym
{
T 2300 2300 5 10 1 1 0 6 1 1
refdes=rxd_parity
}
-C 2300 2700 1 0 0 ipad_1.sym
+C 2300 2700 1 0 0 in_port.sym
{
T 2300 2700 5 10 1 1 0 6 1 1
refdes=rxd_pad_in
}
-C 2300 3100 1 0 0 ipad_1.sym
+C 2300 3100 1 0 0 in_port.sym
{
T 2300 3100 5 10 1 1 0 6 1 1
refdes=rxd_force_parity
}
-C 2300 3500 1 0 0 ipad_1.sym
+C 2300 3500 1 0 0 in_port.sym
{
T 2300 3500 5 10 1 1 0 6 1 1
refdes=rts_in
}
-C 2300 3900 1 0 0 ipad_1.sym
+C 2300 3900 1 0 0 in_port.sym
{
T 2300 3900 5 10 1 1 0 6 1 1
refdes=reset
}
-C 2300 4300 1 0 0 ipad_1.sym
+C 2300 4300 1 0 0 in_port.sym
{
T 2300 4300 5 10 1 1 0 6 1 1
refdes=cts_pad_in
}
-C 2300 4700 1 0 0 ipad_1.sym
+C 2300 4700 1 0 0 in_port.sym
{
T 2300 4700 5 10 1 1 0 6 1 1
refdes=clk
}
-C 5800 300 1 0 0 opad_2.sym
+C 5800 300 1 0 0 out_port_v.sym
{
T 6800 300 5 10 1 1 0 0 1 1
refdes=rxd_data_out[SIZE-1:0]
}
-C 5800 700 1 0 0 opad_1.sym
+C 5800 700 1 0 0 out_port.sym
{
T 6800 700 5 10 1 1 0 0 1 1
refdes=txd_pad_out
}
-C 5800 1100 1 0 0 opad_1.sym
+C 5800 1100 1 0 0 out_port.sym
{
T 6800 1100 5 10 1 1 0 0 1 1
refdes=txd_buffer_empty
}
-C 5800 1500 1 0 0 opad_1.sym
+C 5800 1500 1 0 0 out_port.sym
{
T 6800 1500 5 10 1 1 0 0 1 1
refdes=rxd_stop_error
}
-C 5800 1900 1 0 0 opad_1.sym
+C 5800 1900 1 0 0 out_port.sym
{
T 6800 1900 5 10 1 1 0 0 1 1
refdes=rxd_parity_error
}
-C 5800 2300 1 0 0 opad_1.sym
+C 5800 2300 1 0 0 out_port.sym
{
T 6800 2300 5 10 1 1 0 0 1 1
refdes=rxd_buffer_full
}
-C 5800 2700 1 0 0 opad_1.sym
+C 5800 2700 1 0 0 out_port.sym
{
T 6800 2700 5 10 1 1 0 0 1 1
refdes=rts_pad_out
}
-C 5800 3100 1 0 0 opad_1.sym
+C 5800 3100 1 0 0 out_port.sym
{
T 6800 3100 5 10 1 1 0 0 1 1
refdes=cts_out
Index: socgen/trunk/projects/logic/ip/uart/doc/geda/drawing/sch/uart_xmit.sch
===================================================================
--- socgen/trunk/projects/logic/ip/uart/doc/geda/drawing/sch/uart_xmit.sch (revision 17)
+++ socgen/trunk/projects/logic/ip/uart/doc/geda/drawing/sch/uart_xmit.sch (revision 18)
@@ -1,50 +1,50 @@
v 20100214 1
-C 2300 300 1 0 0 ipad_2.sym
+C 2300 300 1 0 0 in_port_v.sym
{
T 2300 300 5 10 1 1 0 6 1 1
refdes=txd_data_in[SIZE-1:0]
}
-C 2300 700 1 0 0 ipad_1.sym
+C 2300 700 1 0 0 in_port.sym
{
T 2300 700 5 10 1 1 0 6 1 1
refdes=txd_load
}
-C 2300 1100 1 0 0 ipad_1.sym
+C 2300 1100 1 0 0 in_port.sym
{
T 2300 1100 5 10 1 1 0 6 1 1
refdes=txd_break
}
-C 2300 1500 1 0 0 ipad_1.sym
+C 2300 1500 1 0 0 in_port.sym
{
T 2300 1500 5 10 1 1 0 6 1 1
refdes=reset
}
-C 2300 1900 1 0 0 ipad_1.sym
+C 2300 1900 1 0 0 in_port.sym
{
T 2300 1900 5 10 1 1 0 6 1 1
refdes=parity
}
-C 2300 2300 1 0 0 ipad_1.sym
+C 2300 2300 1 0 0 in_port.sym
{
T 2300 2300 5 10 1 1 0 6 1 1
refdes=force_parity
}
-C 2300 2700 1 0 0 ipad_1.sym
+C 2300 2700 1 0 0 in_port.sym
{
T 2300 2700 5 10 1 1 0 6 1 1
refdes=clk
}
-C 2300 3100 1 0 0 ipad_1.sym
+C 2300 3100 1 0 0 in_port.sym
{
T 2300 3100 5 10 1 1 0 6 1 1
refdes=baud_clk
}
-C 5200 300 1 0 0 opad_1.sym
+C 5200 300 1 0 0 out_port.sym
{
T 6200 300 5 10 1 1 0 0 1 1
refdes=txd_pad_out
}
-C 5200 700 1 0 0 opad_1.sym
+C 5200 700 1 0 0 out_port.sym
{
T 6200 700 5 10 1 1 0 0 1 1
refdes=txd_buffer_empty
Index: socgen/trunk/projects/logic/ip/uart/doc/geda/drawing/sch/uart_baudgen.sch
===================================================================
--- socgen/trunk/projects/logic/ip/uart/doc/geda/drawing/sch/uart_baudgen.sch (revision 17)
+++ socgen/trunk/projects/logic/ip/uart/doc/geda/drawing/sch/uart_baudgen.sch (revision 18)
@@ -1,15 +1,15 @@
v 20100214 1
-C 700 300 1 0 0 ipad_1.sym
+C 700 300 1 0 0 in_port.sym
{
T 700 300 5 10 1 1 0 6 1 1
refdes=reset
}
-C 700 700 1 0 0 ipad_1.sym
+C 700 700 1 0 0 in_port.sym
{
T 700 700 5 10 1 1 0 6 1 1
refdes=clk
}
-C 3200 300 1 0 0 opad_1.sym
+C 3200 300 1 0 0 out_port.sym
{
T 4200 300 5 10 1 1 0 0 1 1
refdes=baud_clk_out
Index: socgen/trunk/projects/logic/ip/uart/doc/png/uart.png
===================================================================
Cannot display: file marked as a binary type.
svn:mime-type = application/octet-stream
Index: socgen/trunk/projects/logic/ip/uart/doc/png/uart.png
===================================================================
--- socgen/trunk/projects/logic/ip/uart/doc/png/uart.png (nonexistent)
+++ socgen/trunk/projects/logic/ip/uart/doc/png/uart.png (revision 18)
socgen/trunk/projects/logic/ip/uart/doc/png/uart.png
Property changes :
Added: svn:mime-type
## -0,0 +1 ##
+application/octet-stream
\ No newline at end of property
Index: socgen/trunk/projects/logic/ip/io_module/doc/geda/drawing/sch/cde_sync_with_hysteresis.sch
===================================================================
--- socgen/trunk/projects/logic/ip/io_module/doc/geda/drawing/sch/cde_sync_with_hysteresis.sch (nonexistent)
+++ socgen/trunk/projects/logic/ip/io_module/doc/geda/drawing/sch/cde_sync_with_hysteresis.sch (revision 18)
@@ -0,0 +1,31 @@
+v 20100214 1
+C 2000 300 1 0 0 in_port_v.sym
+{
+T 2000 300 5 10 1 1 0 6 1 1
+refdes=data_in[WIDTH-1:0]
+}
+C 2000 700 1 0 0 in_port.sym
+{
+T 2000 700 5 10 1 1 0 6 1 1
+refdes=reset
+}
+C 2000 1100 1 0 0 in_port.sym
+{
+T 2000 1100 5 10 1 1 0 6 1 1
+refdes=clk
+}
+C 5300 300 1 0 0 out_port_v.sym
+{
+T 6300 300 5 10 1 1 0 0 1 1
+refdes=data_rise[WIDTH-1:0]
+}
+C 5300 700 1 0 0 out_port_v.sym
+{
+T 6300 700 5 10 1 1 0 0 1 1
+refdes=data_out[WIDTH-1:0]
+}
+C 5300 1100 1 0 0 out_port_v.sym
+{
+T 6300 1100 5 10 1 1 0 0 1 1
+refdes=data_fall[WIDTH-1:0]
+}
Index: socgen/trunk/projects/logic/ip/io_module/doc/geda/drawing/sch/ps2_interface.sch
===================================================================
--- socgen/trunk/projects/logic/ip/io_module/doc/geda/drawing/sch/ps2_interface.sch (nonexistent)
+++ socgen/trunk/projects/logic/ip/io_module/doc/geda/drawing/sch/ps2_interface.sch (revision 18)
@@ -0,0 +1,91 @@
+v 20100214 1
+C 1400 300 1 0 0 in_port_v.sym
+{
+T 1400 300 5 10 1 1 0 6 1 1
+refdes=tx_data[7:0]
+}
+C 1400 700 1 0 0 in_port.sym
+{
+T 1400 700 5 10 1 1 0 6 1 1
+refdes=write
+}
+C 1400 1100 1 0 0 in_port.sym
+{
+T 1400 1100 5 10 1 1 0 6 1 1
+refdes=reset
+}
+C 1400 1500 1 0 0 in_port.sym
+{
+T 1400 1500 5 10 1 1 0 6 1 1
+refdes=ps2_data_in
+}
+C 1400 1900 1 0 0 in_port.sym
+{
+T 1400 1900 5 10 1 1 0 6 1 1
+refdes=ps2_clk_in
+}
+C 1400 2300 1 0 0 in_port.sym
+{
+T 1400 2300 5 10 1 1 0 6 1 1
+refdes=clr_rx_full
+}
+C 1400 2700 1 0 0 in_port.sym
+{
+T 1400 2700 5 10 1 1 0 6 1 1
+refdes=clk
+}
+C 4200 300 1 0 0 out_port_v.sym
+{
+T 5200 300 5 10 1 1 0 0 1 1
+refdes=rx_data[7:0]
+}
+C 4200 700 1 0 0 out_port.sym
+{
+T 5200 700 5 10 1 1 0 0 1 1
+refdes=tx_ack_error
+}
+C 4200 1100 1 0 0 out_port.sym
+{
+T 5200 1100 5 10 1 1 0 0 1 1
+refdes=rx_parity_rcv
+}
+C 4200 1500 1 0 0 out_port.sym
+{
+T 5200 1500 5 10 1 1 0 0 1 1
+refdes=rx_parity_error
+}
+C 4200 1900 1 0 0 out_port.sym
+{
+T 5200 1900 5 10 1 1 0 0 1 1
+refdes=rx_parity_cal
+}
+C 4200 2300 1 0 0 out_port.sym
+{
+T 5200 2300 5 10 1 1 0 0 1 1
+refdes=rx_full
+}
+C 4200 2700 1 0 0 out_port.sym
+{
+T 5200 2700 5 10 1 1 0 0 1 1
+refdes=rx_frame_error
+}
+C 4200 3100 1 0 0 out_port.sym
+{
+T 5200 3100 5 10 1 1 0 0 1 1
+refdes=read
+}
+C 4200 3500 1 0 0 out_port.sym
+{
+T 5200 3500 5 10 1 1 0 0 1 1
+refdes=ps2_data_oe
+}
+C 4200 3900 1 0 0 out_port.sym
+{
+T 5200 3900 5 10 1 1 0 0 1 1
+refdes=ps2_clk_oe
+}
+C 4200 4300 1 0 0 out_port.sym
+{
+T 5200 4300 5 10 1 1 0 0 1 1
+refdes=busy
+}
Index: socgen/trunk/projects/logic/ip/io_module/doc/geda/drawing/sch/io_module_pic.sch
===================================================================
--- socgen/trunk/projects/logic/ip/io_module/doc/geda/drawing/sch/io_module_pic.sch (nonexistent)
+++ socgen/trunk/projects/logic/ip/io_module/doc/geda/drawing/sch/io_module_pic.sch (revision 18)
@@ -0,0 +1,61 @@
+v 20100214 1
+C 2300 300 1 0 0 in_port_v.sym
+{
+T 2300 300 5 10 1 1 0 6 1 1
+refdes=wdata[7:0]
+}
+C 2300 700 1 0 0 in_port_v.sym
+{
+T 2300 700 5 10 1 1 0 6 1 1
+refdes=waddr[ADDR_WIDTH-1:0]
+}
+C 2300 1100 1 0 0 in_port_v.sym
+{
+T 2300 1100 5 10 1 1 0 6 1 1
+refdes=raddr[ADDR_WIDTH-1:0]
+}
+C 2300 1500 1 0 0 in_port_v.sym
+{
+T 2300 1500 5 10 1 1 0 6 1 1
+refdes=int_in[7:0]
+}
+C 2300 1900 1 0 0 in_port.sym
+{
+T 2300 1900 5 10 1 1 0 6 1 1
+refdes=wr
+}
+C 2300 2300 1 0 0 in_port.sym
+{
+T 2300 2300 5 10 1 1 0 6 1 1
+refdes=reset
+}
+C 2300 2700 1 0 0 in_port.sym
+{
+T 2300 2700 5 10 1 1 0 6 1 1
+refdes=rd
+}
+C 2300 3100 1 0 0 in_port.sym
+{
+T 2300 3100 5 10 1 1 0 6 1 1
+refdes=cs
+}
+C 2300 3500 1 0 0 in_port.sym
+{
+T 2300 3500 5 10 1 1 0 6 1 1
+refdes=clk
+}
+C 4600 300 1 0 0 out_port_v.sym
+{
+T 5600 300 5 10 1 1 0 0 1 1
+refdes=rdata[7:0]
+}
+C 4600 700 1 0 0 out_port.sym
+{
+T 5600 700 5 10 1 1 0 0 1 1
+refdes=nmi_out
+}
+C 4600 1100 1 0 0 out_port.sym
+{
+T 5600 1100 5 10 1 1 0 0 1 1
+refdes=irq_out
+}
Index: socgen/trunk/projects/logic/ip/io_module/doc/geda/drawing/sch/uart_rcvr.sch
===================================================================
--- socgen/trunk/projects/logic/ip/io_module/doc/geda/drawing/sch/uart_rcvr.sch (nonexistent)
+++ socgen/trunk/projects/logic/ip/io_module/doc/geda/drawing/sch/uart_rcvr.sch (revision 18)
@@ -0,0 +1,51 @@
+v 20100214 1
+C 1400 300 1 0 0 in_port.sym
+{
+T 1400 300 5 10 1 1 0 6 1 1
+refdes=rxd_pad_in
+}
+C 1400 700 1 0 0 in_port.sym
+{
+T 1400 700 5 10 1 1 0 6 1 1
+refdes=reset
+}
+C 1400 1100 1 0 0 in_port.sym
+{
+T 1400 1100 5 10 1 1 0 6 1 1
+refdes=parity
+}
+C 1400 1500 1 0 0 in_port.sym
+{
+T 1400 1500 5 10 1 1 0 6 1 1
+refdes=force_parity
+}
+C 1400 1900 1 0 0 in_port.sym
+{
+T 1400 1900 5 10 1 1 0 6 1 1
+refdes=clk
+}
+C 1400 2300 1 0 0 in_port.sym
+{
+T 1400 2300 5 10 1 1 0 6 1 1
+refdes=baud_clk
+}
+C 4900 300 1 0 0 out_port_v.sym
+{
+T 5900 300 5 10 1 1 0 0 1 1
+refdes=rxd_data_out[SIZE-1:0]
+}
+C 4900 700 1 0 0 out_port.sym
+{
+T 5900 700 5 10 1 1 0 0 1 1
+refdes=rxd_stop_error
+}
+C 4900 1100 1 0 0 out_port.sym
+{
+T 5900 1100 5 10 1 1 0 0 1 1
+refdes=rxd_parity_error
+}
+C 4900 1500 1 0 0 out_port.sym
+{
+T 5900 1500 5 10 1 1 0 0 1 1
+refdes=rxd_buffer_full
+}
Index: socgen/trunk/projects/logic/ip/io_module/doc/geda/drawing/sch/io_module_uart.sch
===================================================================
--- socgen/trunk/projects/logic/ip/io_module/doc/geda/drawing/sch/io_module_uart.sch (nonexistent)
+++ socgen/trunk/projects/logic/ip/io_module/doc/geda/drawing/sch/io_module_uart.sch (revision 18)
@@ -0,0 +1,76 @@
+v 20100214 1
+C 1200 300 1 0 0 in_port_v.sym
+{
+T 1200 300 5 10 1 1 0 6 1 1
+refdes=wdata[7:0]
+}
+C 1200 700 1 0 0 in_port_v.sym
+{
+T 1200 700 5 10 1 1 0 6 1 1
+refdes=waddr[7:0]
+}
+C 1200 1100 1 0 0 in_port_v.sym
+{
+T 1200 1100 5 10 1 1 0 6 1 1
+refdes=raddr[7:0]
+}
+C 1200 1500 1 0 0 in_port.sym
+{
+T 1200 1500 5 10 1 1 0 6 1 1
+refdes=wr
+}
+C 1200 1900 1 0 0 in_port.sym
+{
+T 1200 1900 5 10 1 1 0 6 1 1
+refdes=rxd_pad_in
+}
+C 1200 2300 1 0 0 in_port.sym
+{
+T 1200 2300 5 10 1 1 0 6 1 1
+refdes=reset
+}
+C 1200 2700 1 0 0 in_port.sym
+{
+T 1200 2700 5 10 1 1 0 6 1 1
+refdes=rd
+}
+C 1200 3100 1 0 0 in_port.sym
+{
+T 1200 3100 5 10 1 1 0 6 1 1
+refdes=cts_pad_in
+}
+C 1200 3500 1 0 0 in_port.sym
+{
+T 1200 3500 5 10 1 1 0 6 1 1
+refdes=cs
+}
+C 1200 3900 1 0 0 in_port.sym
+{
+T 1200 3900 5 10 1 1 0 6 1 1
+refdes=clk
+}
+C 3600 300 1 0 0 out_port_v.sym
+{
+T 4600 300 5 10 1 1 0 0 1 1
+refdes=rdata[7:0]
+}
+C 3600 700 1 0 0 out_port.sym
+{
+T 4600 700 5 10 1 1 0 0 1 1
+refdes=txd_pad_out
+}
+C 3600 1100 1 0 0 out_port.sym
+{
+T 4600 1100 5 10 1 1 0 0 1 1
+refdes=tx_irq
+}
+C 3600 1500 1 0 0 out_port.sym
+{
+T 4600 1500 5 10 1 1 0 0 1 1
+refdes=rx_irq
+}
+C 3600 1900 1 0 0 out_port.sym
+{
+T 4600 1900 5 10 1 1 0 0 1 1
+refdes=rts_pad_out
+}
Index: socgen/trunk/projects/logic/ip/io_module/doc/geda/drawing/sch/ps2_interface_fsm.sch
===================================================================
--- socgen/trunk/projects/logic/ip/io_module/doc/geda/drawing/sch/ps2_interface_fsm.sch (nonexistent)
+++ socgen/trunk/projects/logic/ip/io_module/doc/geda/drawing/sch/ps2_interface_fsm.sch (revision 18)
@@ -0,0 +1,81 @@
+v 20100214 1
+C 1700 300 1 0 0 in_port_v.sym
+{
+T 1700 300 5 10 1 1 0 6 1 1
+refdes=bit_count[3:0]
+}
+C 1700 700 1 0 0 in_port.sym
+{
+T 1700 700 5 10 1 1 0 6 1 1
+refdes=write
+}
+C 1700 1100 1 0 0 in_port.sym
+{
+T 1700 1100 5 10 1 1 0 6 1 1
+refdes=usec_delay_done
+}
+C 1700 1500 1 0 0 in_port.sym
+{
+T 1700 1500 5 10 1 1 0 6 1 1
+refdes=reset
+}
+C 1700 1900 1 0 0 in_port.sym
+{
+T 1700 1900 5 10 1 1 0 6 1 1
+refdes=ps2_idle
+}
+C 1700 2300 1 0 0 in_port.sym
+{
+T 1700 2300 5 10 1 1 0 6 1 1
+refdes=ps2_clk_fall
+}
+C 1700 2700 1 0 0 in_port.sym
+{
+T 1700 2700 5 10 1 1 0 6 1 1
+refdes=frame0
+}
+C 1700 3100 1 0 0 in_port.sym
+{
+T 1700 3100 5 10 1 1 0 6 1 1
+refdes=force_startbit
+}
+C 1700 3500 1 0 0 in_port.sym
+{
+T 1700 3500 5 10 1 1 0 6 1 1
+refdes=clk
+}
+C 4700 300 1 0 0 out_port.sym
+{
+T 5700 300 5 10 1 1 0 0 1 1
+refdes=shift_frame
+}
+C 4700 700 1 0 0 out_port.sym
+{
+T 5700 700 5 10 1 1 0 0 1 1
+refdes=ps2_data_oe
+}
+C 4700 1100 1 0 0 out_port.sym
+{
+T 5700 1100 5 10 1 1 0 0 1 1
+refdes=ps2_clk_oe
+}
+C 4700 1500 1 0 0 out_port.sym
+{
+T 5700 1500 5 10 1 1 0 0 1 1
+refdes=load_tx_data
+}
+C 4700 1900 1 0 0 out_port.sym
+{
+T 5700 1900 5 10 1 1 0 0 1 1
+refdes=load_rx_data
+}
+C 4700 2300 1 0 0 out_port.sym
+{
+T 5700 2300 5 10 1 1 0 0 1 1
+refdes=enable_usec_delay
+}
+C 4700 2700 1 0 0 out_port.sym
+{
+T 5700 2700 5 10 1 1 0 0 1 1
+refdes=busy
+}
Index: socgen/trunk/projects/logic/ip/io_module/doc/geda/drawing/sch/io_module_gpio.sch
===================================================================
--- socgen/trunk/projects/logic/ip/io_module/doc/geda/drawing/sch/io_module_gpio.sch (nonexistent)
+++ socgen/trunk/projects/logic/ip/io_module/doc/geda/drawing/sch/io_module_gpio.sch (revision 18)
@@ -0,0 +1,86 @@
+v 20100214 1
+C 2300 300 1 0 0 in_port_v.sym
+{
+T 2300 300 5 10 1 1 0 6 1 1
+refdes=wdata[7:0]
+}
+C 2300 700 1 0 0 in_port_v.sym
+{
+T 2300 700 5 10 1 1 0 6 1 1
+refdes=waddr[ADDR_WIDTH-1:0]
+}
+C 2300 1100 1 0 0 in_port_v.sym
+{
+T 2300 1100 5 10 1 1 0 6 1 1
+refdes=raddr[ADDR_WIDTH-1:0]
+}
+C 2300 1500 1 0 0 in_port_v.sym
+{
+T 2300 1500 5 10 1 1 0 6 1 1
+refdes=gpio_1_in[7:0]
+}
+C 2300 1900 1 0 0 in_port_v.sym
+{
+T 2300 1900 5 10 1 1 0 6 1 1
+refdes=gpio_0_in[7:0]
+}
+C 2300 2300 1 0 0 in_port.sym
+{
+T 2300 2300 5 10 1 1 0 6 1 1
+refdes=wr
+}
+C 2300 2700 1 0 0 in_port.sym
+{
+T 2300 2700 5 10 1 1 0 6 1 1
+refdes=reset
+}
+C 2300 3100 1 0 0 in_port.sym
+{
+T 2300 3100 5 10 1 1 0 6 1 1
+refdes=rd
+}
+C 2300 3500 1 0 0 in_port.sym
+{
+T 2300 3500 5 10 1 1 0 6 1 1
+refdes=cs
+}
+C 2300 3900 1 0 0 in_port.sym
+{
+T 2300 3900 5 10 1 1 0 6 1 1
+refdes=clk
+}
+C 5100 300 1 0 0 out_port_v.sym
+{
+T 6100 300 5 10 1 1 0 0 1 1
+refdes=rdata[7:0]
+}
+C 5100 700 1 0 0 out_port_v.sym
+{
+T 6100 700 5 10 1 1 0 0 1 1
+refdes=gpio_1_out[7:0]
+}
+C 5100 1100 1 0 0 out_port_v.sym
+{
+T 6100 1100 5 10 1 1 0 0 1 1
+refdes=gpio_1_oe[7:0]
+}
+C 5100 1500 1 0 0 out_port_v.sym
+{
+T 6100 1500 5 10 1 1 0 0 1 1
+refdes=gpio_1_lat[7:0]
+}
+C 5100 1900 1 0 0 out_port_v.sym
+{
+T 6100 1900 5 10 1 1 0 0 1 1
+refdes=gpio_0_out[7:0]
+}
+C 5100 2300 1 0 0 out_port_v.sym
+{
+T 6100 2300 5 10 1 1 0 0 1 1
+refdes=gpio_0_oe[7:0]
+}
+C 5100 2700 1 0 0 out_port_v.sym
+{
+T 6100 2700 5 10 1 1 0 0 1 1
+refdes=gpio_0_lat[7:0]
+}
Index: socgen/trunk/projects/logic/ip/io_module/doc/geda/drawing/sch/uart.sch
===================================================================
--- socgen/trunk/projects/logic/ip/io_module/doc/geda/drawing/sch/uart.sch (nonexistent)
+++ socgen/trunk/projects/logic/ip/io_module/doc/geda/drawing/sch/uart.sch (revision 18)
@@ -0,0 +1,101 @@
+v 20100214 1
+C 2300 300 1 0 0 in_port_v.sym
+{
+T 2300 300 5 10 1 1 0 6 1 1
+refdes=txd_data_in[SIZE-1:0]
+}
+C 2300 700 1 0 0 in_port.sym
+{
+T 2300 700 5 10 1 1 0 6 1 1
+refdes=txd_parity
+}
+C 2300 1100 1 0 0 in_port.sym
+{
+T 2300 1100 5 10 1 1 0 6 1 1
+refdes=txd_load
+}
+C 2300 1500 1 0 0 in_port.sym
+{
+T 2300 1500 5 10 1 1 0 6 1 1
+refdes=txd_force_parity
+}
+C 2300 1900 1 0 0 in_port.sym
+{
+T 2300 1900 5 10 1 1 0 6 1 1
+refdes=txd_break
+}
+C 2300 2300 1 0 0 in_port.sym
+{
+T 2300 2300 5 10 1 1 0 6 1 1
+refdes=rxd_parity
+}
+C 2300 2700 1 0 0 in_port.sym
+{
+T 2300 2700 5 10 1 1 0 6 1 1
+refdes=rxd_pad_in
+}
+C 2300 3100 1 0 0 in_port.sym
+{
+T 2300 3100 5 10 1 1 0 6 1 1
+refdes=rxd_force_parity
+}
+C 2300 3500 1 0 0 in_port.sym
+{
+T 2300 3500 5 10 1 1 0 6 1 1
+refdes=rts_in
+}
+C 2300 3900 1 0 0 in_port.sym
+{
+T 2300 3900 5 10 1 1 0 6 1 1
+refdes=reset
+}
+C 2300 4300 1 0 0 in_port.sym
+{
+T 2300 4300 5 10 1 1 0 6 1 1
+refdes=cts_pad_in
+}
+C 2300 4700 1 0 0 in_port.sym
+{
+T 2300 4700 5 10 1 1 0 6 1 1
+refdes=clk
+}
+C 5800 300 1 0 0 out_port_v.sym
+{
+T 6800 300 5 10 1 1 0 0 1 1
+refdes=rxd_data_out[SIZE-1:0]
+}
+C 5800 700 1 0 0 out_port.sym
+{
+T 6800 700 5 10 1 1 0 0 1 1
+refdes=txd_pad_out
+}
+C 5800 1100 1 0 0 out_port.sym
+{
+T 6800 1100 5 10 1 1 0 0 1 1
+refdes=txd_buffer_empty
+}
+C 5800 1500 1 0 0 out_port.sym
+{
+T 6800 1500 5 10 1 1 0 0 1 1
+refdes=rxd_stop_error
+}
+C 5800 1900 1 0 0 out_port.sym
+{
+T 6800 1900 5 10 1 1 0 0 1 1
+refdes=rxd_parity_error
+}
+C 5800 2300 1 0 0 out_port.sym
+{
+T 6800 2300 5 10 1 1 0 0 1 1
+refdes=rxd_buffer_full
+}
+C 5800 2700 1 0 0 out_port.sym
+{
+T 6800 2700 5 10 1 1 0 0 1 1
+refdes=rts_pad_out
+}
+C 5800 3100 1 0 0 out_port.sym
+{
+T 6800 3100 5 10 1 1 0 0 1 1
+refdes=cts_out
+}
Index: socgen/trunk/projects/logic/ip/io_module/doc/geda/drawing/sch/io_module.sch
===================================================================
--- socgen/trunk/projects/logic/ip/io_module/doc/geda/drawing/sch/io_module.sch (nonexistent)
+++ socgen/trunk/projects/logic/ip/io_module/doc/geda/drawing/sch/io_module.sch (revision 18)
@@ -0,0 +1,191 @@
+v 20100214 1
+C 3400 300 1 0 0 in_port_v.sym
+{
+T 3400 300 5 10 1 1 0 6 1 1
+refdes=wdata[7:0]
+}
+C 3400 700 1 0 0 in_port_v.sym
+{
+T 3400 700 5 10 1 1 0 6 1 1
+refdes=waddr[ADDR_WIDTH-BASE_WIDTH-1:0]
+}
+C 3400 1100 1 0 0 in_port_v.sym
+{
+T 3400 1100 5 10 1 1 0 6 1 1
+refdes=gpio_1_in[7:0]
+}
+C 3400 1500 1 0 0 in_port_v.sym
+{
+T 3400 1500 5 10 1 1 0 6 1 1
+refdes=gpio_0_in[7:0]
+}
+C 3400 1900 1 0 0 in_port_v.sym
+{
+T 3400 1900 5 10 1 1 0 6 1 1
+refdes=ext_irq_in[7:0]
+}
+C 3400 2300 1 0 0 in_port_v.sym
+{
+T 3400 2300 5 10 1 1 0 6 1 1
+refdes=addr[ADDR_WIDTH-1:0]
+}
+C 3400 2700 1 0 0 in_port.sym
+{
+T 3400 2700 5 10 1 1 0 6 1 1
+refdes=wr
+}
+C 3400 3100 1 0 0 in_port.sym
+{
+T 3400 3100 5 10 1 1 0 6 1 1
+refdes=rxd_pad_in
+}
+C 3400 3500 1 0 0 in_port.sym
+{
+T 3400 3500 5 10 1 1 0 6 1 1
+refdes=reset
+}
+C 3400 3900 1 0 0 in_port.sym
+{
+T 3400 3900 5 10 1 1 0 6 1 1
+refdes=rd
+}
+C 3400 4300 1 0 0 in_port.sym
+{
+T 3400 4300 5 10 1 1 0 6 1 1
+refdes=ps2_data_in
+}
+C 3400 4700 1 0 0 in_port.sym
+{
+T 3400 4700 5 10 1 1 0 6 1 1
+refdes=ps2_clk_in
+}
+C 3400 5100 1 0 0 in_port.sym
+{
+T 3400 5100 5 10 1 1 0 6 1 1
+refdes=enable
+}
+C 3400 5500 1 0 0 in_port.sym
+{
+T 3400 5500 5 10 1 1 0 6 1 1
+refdes=cts_pad_in
+}
+C 3400 5900 1 0 0 in_port.sym
+{
+T 3400 5900 5 10 1 1 0 6 1 1
+refdes=clk
+}
+C 6200 300 1 0 0 out_port_v.sym
+{
+T 7200 300 5 10 1 1 0 0 1 1
+refdes=y_pos[9:0]
+}
+C 6200 700 1 0 0 out_port_v.sym
+{
+T 7200 700 5 10 1 1 0 0 1 1
+refdes=x_pos[9:0]
+}
+C 6200 1100 1 0 0 out_port_v.sym
+{
+T 7200 1100 5 10 1 1 0 0 1 1
+refdes=timer_irq[1:0]
+}
+C 6200 1500 1 0 0 out_port_v.sym
+{
+T 7200 1500 5 10 1 1 0 0 1 1
+refdes=rdata[7:0]
+}
+C 6200 1900 1 0 0 out_port_v.sym
+{
+T 7200 1900 5 10 1 1 0 0 1 1
+refdes=gpio_1_out[7:0]
+}
+C 6200 2300 1 0 0 out_port_v.sym
+{
+T 7200 2300 5 10 1 1 0 0 1 1
+refdes=gpio_1_oe[7:0]
+}
+C 6200 2700 1 0 0 out_port_v.sym
+{
+T 7200 2700 5 10 1 1 0 0 1 1
+refdes=gpio_1_lat[7:0]
+}
+C 6200 3100 1 0 0 out_port_v.sym
+{
+T 7200 3100 5 10 1 1 0 0 1 1
+refdes=gpio_0_out[7:0]
+}
+C 6200 3500 1 0 0 out_port_v.sym
+{
+T 7200 3500 5 10 1 1 0 0 1 1
+refdes=gpio_0_oe[7:0]
+}
+C 6200 3900 1 0 0 out_port_v.sym
+{
+T 7200 3900 5 10 1 1 0 0 1 1
+refdes=gpio_0_lat[7:0]
+}
+C 6200 4300 1 0 0 out_port.sym
+{
+T 7200 4300 5 10 1 1 0 0 1 1
+refdes=txd_pad_out
+}
+C 6200 4700 1 0 0 out_port.sym
+{
+T 7200 4700 5 10 1 1 0 0 1 1
+refdes=tx_irq
+}
+C 6200 5100 1 0 0 out_port.sym
+{
+T 7200 5100 5 10 1 1 0 0 1 1
+refdes=rx_irq
+}
+C 6200 5500 1 0 0 out_port.sym
+{
+T 7200 5500 5 10 1 1 0 0 1 1
+refdes=rts_pad_out
+}
+C 6200 5900 1 0 0 out_port.sym
+{
+T 7200 5900 5 10 1 1 0 0 1 1
+refdes=ps2_data_oe
+}
+C 6200 6300 1 0 0 out_port.sym
+{
+T 7200 6300 5 10 1 1 0 0 1 1
+refdes=ps2_data_avail
+}
+C 6200 6700 1 0 0 out_port.sym
+{
+T 7200 6700 5 10 1 1 0 0 1 1
+refdes=ps2_clk_oe
+}
+C 6200 7100 1 0 0 out_port.sym
+{
+T 7200 7100 5 10 1 1 0 0 1 1
+refdes=pic_nmi
+}
+C 6200 7500 1 0 0 out_port.sym
+{
+T 7200 7500 5 10 1 1 0 0 1 1
+refdes=pic_irq
+}
+C 6200 7900 1 0 0 out_port.sym
+{
+T 7200 7900 5 10 1 1 0 0 1 1
+refdes=new_packet
+}
+C 6200 8300 1 0 0 out_port.sym
+{
+T 7200 8300 5 10 1 1 0 0 1 1
+refdes=ms_right
+}
+C 6200 8700 1 0 0 out_port.sym
+{
+T 7200 8700 5 10 1 1 0 0 1 1
+refdes=ms_mid
+}
+C 6200 9100 1 0 0 out_port.sym
+{
+T 7200 9100 5 10 1 1 0 0 1 1
+refdes=ms_left
+}
Index: socgen/trunk/projects/logic/ip/io_module/doc/geda/drawing/sch/uart_xmit.sch
===================================================================
--- socgen/trunk/projects/logic/ip/io_module/doc/geda/drawing/sch/uart_xmit.sch (nonexistent)
+++ socgen/trunk/projects/logic/ip/io_module/doc/geda/drawing/sch/uart_xmit.sch (revision 18)
@@ -0,0 +1,51 @@
+v 20100214 1
+C 2300 300 1 0 0 in_port_v.sym
+{
+T 2300 300 5 10 1 1 0 6 1 1
+refdes=txd_data_in[SIZE-1:0]
+}
+C 2300 700 1 0 0 in_port.sym
+{
+T 2300 700 5 10 1 1 0 6 1 1
+refdes=txd_load
+}
+C 2300 1100 1 0 0 in_port.sym
+{
+T 2300 1100 5 10 1 1 0 6 1 1
+refdes=txd_break
+}
+C 2300 1500 1 0 0 in_port.sym
+{
+T 2300 1500 5 10 1 1 0 6 1 1
+refdes=reset
+}
+C 2300 1900 1 0 0 in_port.sym
+{
+T 2300 1900 5 10 1 1 0 6 1 1
+refdes=parity
+}
+C 2300 2300 1 0 0 in_port.sym
+{
+T 2300 2300 5 10 1 1 0 6 1 1
+refdes=force_parity
+}
+C 2300 2700 1 0 0 in_port.sym
+{
+T 2300 2700 5 10 1 1 0 6 1 1
+refdes=clk
+}
+C 2300 3100 1 0 0 in_port.sym
+{
+T 2300 3100 5 10 1 1 0 6 1 1
+refdes=baud_clk
+}
+C 5200 300 1 0 0 out_port.sym
+{
+T 6200 300 5 10 1 1 0 0 1 1
+refdes=txd_pad_out
+}
+C 5200 700 1 0 0 out_port.sym
+{
+T 6200 700 5 10 1 1 0 0 1 1
+refdes=txd_buffer_empty
+}
Index: socgen/trunk/projects/logic/ip/io_module/doc/geda/drawing/sch/io_module_timer.sch
===================================================================
--- socgen/trunk/projects/logic/ip/io_module/doc/geda/drawing/sch/io_module_timer.sch (nonexistent)
+++ socgen/trunk/projects/logic/ip/io_module/doc/geda/drawing/sch/io_module_timer.sch (revision 18)
@@ -0,0 +1,51 @@
+v 20100214 1
+C 2300 300 1 0 0 in_port_v.sym
+{
+T 2300 300 5 10 1 1 0 6 1 1
+refdes=wdata[7:0]
+}
+C 2300 700 1 0 0 in_port_v.sym
+{
+T 2300 700 5 10 1 1 0 6 1 1
+refdes=waddr[ADDR_WIDTH-1:0]
+}
+C 2300 1100 1 0 0 in_port_v.sym
+{
+T 2300 1100 5 10 1 1 0 6 1 1
+refdes=raddr[ADDR_WIDTH-1:0]
+}
+C 2300 1500 1 0 0 in_port.sym
+{
+T 2300 1500 5 10 1 1 0 6 1 1
+refdes=wr
+}
+C 2300 1900 1 0 0 in_port.sym
+{
+T 2300 1900 5 10 1 1 0 6 1 1
+refdes=reset
+}
+C 2300 2300 1 0 0 in_port.sym
+{
+T 2300 2300 5 10 1 1 0 6 1 1
+refdes=rd
+}
+C 2300 2700 1 0 0 in_port.sym
+{
+T 2300 2700 5 10 1 1 0 6 1 1
+refdes=cs
+}
+C 2300 3100 1 0 0 in_port.sym
+{
+T 2300 3100 5 10 1 1 0 6 1 1
+refdes=clk
+}
+C 5100 300 1 0 0 out_port_v.sym
+{
+T 6100 300 5 10 1 1 0 0 1 1
+refdes=rdata[7:0]
+}
+C 5100 700 1 0 0 out_port_v.sym
+{
+T 6100 700 5 10 1 1 0 0 1 1
+refdes=irq[TIMERS-1:0]
+}
Index: socgen/trunk/projects/logic/ip/io_module/doc/geda/drawing/sch/uart_baudgen.sch
===================================================================
--- socgen/trunk/projects/logic/ip/io_module/doc/geda/drawing/sch/uart_baudgen.sch (nonexistent)
+++ socgen/trunk/projects/logic/ip/io_module/doc/geda/drawing/sch/uart_baudgen.sch (revision 18)
@@ -0,0 +1,16 @@
+v 20100214 1
+C 700 300 1 0 0 in_port.sym
+{
+T 700 300 5 10 1 1 0 6 1 1
+refdes=reset
+}
+C 700 700 1 0 0 in_port.sym
+{
+T 700 700 5 10 1 1 0 6 1 1
+refdes=clk
+}
+C 3200 300 1 0 0 out_port.sym
+{
+T 4200 300 5 10 1 1 0 0 1 1
+refdes=baud_clk_out
+}
Index: socgen/trunk/projects/logic/ip/io_module/doc/geda/drawing/sch/io_module_ps2.sch
===================================================================
--- socgen/trunk/projects/logic/ip/io_module/doc/geda/drawing/sch/io_module_ps2.sch (nonexistent)
+++ socgen/trunk/projects/logic/ip/io_module/doc/geda/drawing/sch/io_module_ps2.sch (revision 18)
@@ -0,0 +1,101 @@
+v 20100214 1
+C 1300 300 1 0 0 in_port_v.sym
+{
+T 1300 300 5 10 1 1 0 6 1 1
+refdes=wdata[7:0]
+}
+C 1300 700 1 0 0 in_port_v.sym
+{
+T 1300 700 5 10 1 1 0 6 1 1
+refdes=waddr[7:0]
+}
+C 1300 1100 1 0 0 in_port_v.sym
+{
+T 1300 1100 5 10 1 1 0 6 1 1
+refdes=raddr[7:0]
+}
+C 1300 1500 1 0 0 in_port.sym
+{
+T 1300 1500 5 10 1 1 0 6 1 1
+refdes=wr
+}
+C 1300 1900 1 0 0 in_port.sym
+{
+T 1300 1900 5 10 1 1 0 6 1 1
+refdes=reset
+}
+C 1300 2300 1 0 0 in_port.sym
+{
+T 1300 2300 5 10 1 1 0 6 1 1
+refdes=rd
+}
+C 1300 2700 1 0 0 in_port.sym
+{
+T 1300 2700 5 10 1 1 0 6 1 1
+refdes=ps2_data_in
+}
+C 1300 3100 1 0 0 in_port.sym
+{
+T 1300 3100 5 10 1 1 0 6 1 1
+refdes=ps2_clk_in
+}
+C 1300 3500 1 0 0 in_port.sym
+{
+T 1300 3500 5 10 1 1 0 6 1 1
+refdes=cs
+}
+C 1300 3900 1 0 0 in_port.sym
+{
+T 1300 3900 5 10 1 1 0 6 1 1
+refdes=clk
+}
+C 4000 300 1 0 0 out_port_v.sym
+{
+T 5000 300 5 10 1 1 0 0 1 1
+refdes=y_pos[9:0]
+}
+C 4000 700 1 0 0 out_port_v.sym
+{
+T 5000 700 5 10 1 1 0 0 1 1
+refdes=x_pos[9:0]
+}
+C 4000 1100 1 0 0 out_port_v.sym
+{
+T 5000 1100 5 10 1 1 0 0 1 1
+refdes=rdata[7:0]
+}
+C 4000 1500 1 0 0 out_port.sym
+{
+T 5000 1500 5 10 1 1 0 0 1 1
+refdes=rcv_data_avail
+}
+C 4000 1900 1 0 0 out_port.sym
+{
+T 5000 1900 5 10 1 1 0 0 1 1
+refdes=ps2_data_oe
+}
+C 4000 2300 1 0 0 out_port.sym
+{
+T 5000 2300 5 10 1 1 0 0 1 1
+refdes=ps2_clk_oe
+}
+C 4000 2700 1 0 0 out_port.sym
+{
+T 5000 2700 5 10 1 1 0 0 1 1
+refdes=new_packet
+}
+C 4000 3100 1 0 0 out_port.sym
+{
+T 5000 3100 5 10 1 1 0 0 1 1
+refdes=ms_right
+}
+C 4000 3500 1 0 0 out_port.sym
+{
+T 5000 3500 5 10 1 1 0 0 1 1
+refdes=ms_mid
+}
+C 4000 3900 1 0 0 out_port.sym
+{
+T 5000 3900 5 10 1 1 0 0 1 1
+refdes=ms_left
+}
Index: socgen/trunk/projects/logic/ip/io_module/doc/geda/drawing/sch/io_module_utimer.sch
===================================================================
--- socgen/trunk/projects/logic/ip/io_module/doc/geda/drawing/sch/io_module_utimer.sch (nonexistent)
+++ socgen/trunk/projects/logic/ip/io_module/doc/geda/drawing/sch/io_module_utimer.sch (revision 18)
@@ -0,0 +1,46 @@
+v 20100214 1
+C 2300 300 1 0 0 in_port_v.sym
+{
+T 2300 300 5 10 1 1 0 6 1 1
+refdes=wdata[7:0]
+}
+C 2300 700 1 0 0 in_port_v.sym
+{
+T 2300 700 5 10 1 1 0 6 1 1
+refdes=waddr[ADDR_WIDTH-1:0]
+}
+C 2300 1100 1 0 0 in_port_v.sym
+{
+T 2300 1100 5 10 1 1 0 6 1 1
+refdes=raddr[ADDR_WIDTH-1:0]
+}
+C 2300 1500 1 0 0 in_port.sym
+{
+T 2300 1500 5 10 1 1 0 6 1 1
+refdes=wr
+}
+C 2300 1900 1 0 0 in_port.sym
+{
+T 2300 1900 5 10 1 1 0 6 1 1
+refdes=reset
+}
+C 2300 2300 1 0 0 in_port.sym
+{
+T 2300 2300 5 10 1 1 0 6 1 1
+refdes=rd
+}
+C 2300 2700 1 0 0 in_port.sym
+{
+T 2300 2700 5 10 1 1 0 6 1 1
+refdes=cs
+}
+C 2300 3100 1 0 0 in_port.sym
+{
+T 2300 3100 5 10 1 1 0 6 1 1
+refdes=clk
+}
+C 4600 300 1 0 0 out_port_v.sym
+{
+T 5600 300 5 10 1 1 0 0 1 1
+refdes=rdata[7:0]
+}
Index: socgen/trunk/projects/logic/ip/io_module/doc/png/io_module.png
===================================================================
Cannot display: file marked as a binary type.
svn:mime-type = application/octet-stream
Index: socgen/trunk/projects/logic/ip/io_module/doc/png/io_module.png
===================================================================
--- socgen/trunk/projects/logic/ip/io_module/doc/png/io_module.png (nonexistent)
+++ socgen/trunk/projects/logic/ip/io_module/doc/png/io_module.png (revision 18)
socgen/trunk/projects/logic/ip/io_module/doc/png/io_module.png
Property changes :
Added: svn:mime-type
## -0,0 +1 ##
+application/octet-stream
\ No newline at end of property
Index: socgen/trunk/projects/logic/ip/io_module/doc/png/io_module_timer.png
===================================================================
Cannot display: file marked as a binary type.
svn:mime-type = application/octet-stream
Index: socgen/trunk/projects/logic/ip/io_module/doc/png/io_module_timer.png
===================================================================
--- socgen/trunk/projects/logic/ip/io_module/doc/png/io_module_timer.png (nonexistent)
+++ socgen/trunk/projects/logic/ip/io_module/doc/png/io_module_timer.png (revision 18)
socgen/trunk/projects/logic/ip/io_module/doc/png/io_module_timer.png
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Index: socgen/trunk/projects/logic/ip/io_module/doc/png/io_module_ps2.png
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svn:mime-type = application/octet-stream
Index: socgen/trunk/projects/logic/ip/io_module/doc/png/io_module_ps2.png
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--- socgen/trunk/projects/logic/ip/io_module/doc/png/io_module_ps2.png (nonexistent)
+++ socgen/trunk/projects/logic/ip/io_module/doc/png/io_module_ps2.png (revision 18)
socgen/trunk/projects/logic/ip/io_module/doc/png/io_module_ps2.png
Property changes :
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## -0,0 +1 ##
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Index: socgen/trunk/projects/logic/ip/io_module/doc/png/io_module_utimer.png
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svn:mime-type = application/octet-stream
Index: socgen/trunk/projects/logic/ip/io_module/doc/png/io_module_utimer.png
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--- socgen/trunk/projects/logic/ip/io_module/doc/png/io_module_utimer.png (nonexistent)
+++ socgen/trunk/projects/logic/ip/io_module/doc/png/io_module_utimer.png (revision 18)
socgen/trunk/projects/logic/ip/io_module/doc/png/io_module_utimer.png
Property changes :
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+application/octet-stream
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Index: socgen/trunk/projects/logic/ip/io_module/doc/png/io_module_uart.png
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Index: socgen/trunk/projects/logic/ip/io_module/doc/png/io_module_uart.png
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--- socgen/trunk/projects/logic/ip/io_module/doc/png/io_module_uart.png (nonexistent)
+++ socgen/trunk/projects/logic/ip/io_module/doc/png/io_module_uart.png (revision 18)
socgen/trunk/projects/logic/ip/io_module/doc/png/io_module_uart.png
Property changes :
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+application/octet-stream
\ No newline at end of property
Index: socgen/trunk/projects/logic/ip/io_module/doc/png/io_module_pic.png
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Index: socgen/trunk/projects/logic/ip/io_module/doc/png/io_module_pic.png
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--- socgen/trunk/projects/logic/ip/io_module/doc/png/io_module_pic.png (nonexistent)
+++ socgen/trunk/projects/logic/ip/io_module/doc/png/io_module_pic.png (revision 18)
socgen/trunk/projects/logic/ip/io_module/doc/png/io_module_pic.png
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\ No newline at end of property
Index: socgen/trunk/projects/logic/ip/io_module/doc/png/io_module_gpio.png
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svn:mime-type = application/octet-stream
Index: socgen/trunk/projects/logic/ip/io_module/doc/png/io_module_gpio.png
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--- socgen/trunk/projects/logic/ip/io_module/doc/png/io_module_gpio.png (nonexistent)
+++ socgen/trunk/projects/logic/ip/io_module/doc/png/io_module_gpio.png (revision 18)
socgen/trunk/projects/logic/ip/io_module/doc/png/io_module_gpio.png
Property changes :
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## -0,0 +1 ##
+application/octet-stream
\ No newline at end of property