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  • This comparison shows the changes necessary to convert path 
    /
    from Rev 1719 to Rev 1720
    ↔ Reverse comparison
  •

Rev 1719 → Rev 1720

/trunk/or1ksim/cpu/or32/op.c
910,11 → 910,6
env->sprs[SPR_SR] &= ~(SPR_SR_IEE | SPR_SR_TEE); /* Disable interrupts. */
}
 
__or_dynop void op_set_except_pc(void)
{
env->pc = OP_PARAM1;
}
 
/* Before the code in op_{sys,trap}{,_delay} gets run, the scheduler runs.
* Therefore the pc will point to the instruction after the l.sys or l.trap
* instruction */
/trunk/or1ksim/cpu/or32/dyn_rec.c
456,7 → 456,7
void init_dyn_recomp(void)
{
struct sigaction sigact;
struct op_queue *opq;
struct op_queue *opq = NULL;
unsigned int i;
 
cpu_state.opqs = NULL;
732,9 → 732,10
/* Ship out the current set of registers from the temporaries */
if(opq->prev) {
ship_gprs_out_t(opq->prev);
for(j = 0; j < NUM_T_REGS; j++)
for(j = 0; j < NUM_T_REGS; j++) {
opq->reg_t[j] = 32;
opq->prev->reg_t[j] = 32;
}
}
}
 
896,8 → 897,6
static void gen_j_imm(struct op_queue *opq, oraddr_t off)
{
int jump_local;
int i;
int reg_t[NUM_T_REGS];
 
off <<= 2;
 
963,7 → 962,6
static void gen_j_reg(struct op_queue *opq, unsigned int gpr)
{
int i;
int reg_t[NUM_T_REGS];
 
/* Ship the jump-to register out (if it exists). It requires special
* handleing */
/trunk/or1ksim/cpu/or32/dyngen_elf.c
85,7 → 85,7
 
if((obj->e_hdr.e_ident[EI_VERSION] != 1) ||
(obj->e_hdr.e_version != 1)) {
fprintf(stderr, "Unexpected elf version found: %i (%i)\n",
fprintf(stderr, "Unexpected elf version found: %i (%li)\n",
obj->e_hdr.e_ident[EI_VERSION], obj->e_hdr.e_version);
goto error_load;
}
/trunk/or1ksim/cpu/common/abstract.c
464,7 → 464,7
mem->direct_ops.read_dat32);
else
PRINTF("ERR: 32-bit read out of memory area: %"PRIxADDR" (physical: %"
PRIxADDR"\n", memaddr, phys_memaddr);
PRIxADDR")\n", memaddr, phys_memaddr);
}
return 0;
482,7 → 482,6
 
if (config.sim.mprofile)
mprofile (memaddr, MPROF_32 | MPROF_FETCH);
// memaddr = simulate_ic_mmu_fetch(memaddr);
 
phys_memaddr = memaddr;
#if !(DYNAMIC_EXECUTION)
/trunk/or1ksim/cpu/common/parse.c
223,13 → 223,11
}
#endif
 
/* Replaced several calls to translate(freemem) with vaddr */
/* Added new mode execution code */
/* Changed parameters so address can be passed as argument */
/* Note: insn must be in big endian format */
void addprogram(oraddr_t address, uint32_t insn, int* breakpoint)
{
int vaddr = (!runtime.sim.filename) ? translate(address,breakpoint) : translate(freemem,breakpoint);
 
/* We can't have set_program32 functions since it is not gauranteed that the
* section we're loading is aligned on a 4-byte boundry */
set_program8 (vaddr, (insn >> 24) & 0xff);
/trunk/or1ksim/cpu/or1k/spr_defs.h
382,7 → 382,7
#define SPR_DSR_BUSEE 0x00000002 /* Bus error exception */
#define SPR_DSR_DPFE 0x00000004 /* Data Page Fault exception */
#define SPR_DSR_IPFE 0x00000008 /* Insn Page Fault exception */
#define SPR_DSR_TTE 0x00000010 /* Tick Timer exception */
#define SPR_DSR_TTE 0x00000010 /* iTick Timer exception */
#define SPR_DSR_AE 0x00000020 /* Alignment exception */
#define SPR_DSR_IIE 0x00000040 /* Illegal Instruction exception */
#define SPR_DSR_IE 0x00000080 /* Interrupt exception */
/trunk/or1ksim/peripheral/atadevice.c
215,7 → 215,7
void ata_devices_hw_reset(ata_devices *devices, int reset_signal)
{
/* display debug information */
TRACE("ata_devices_hw_reset.\n");
TRACE(reset_signal ? "Starting reset\n" : "Finishing reset\n");
 
/* find device 0 */
if((devices->device[0].conf.stream) && (devices->device[1].conf.stream)) {
257,7 → 257,7
Handles - software reset
- Interrupt enable bit
*/
void ata_device_do_control_register(ata_device *device)
static void ata_device_do_control_register(ata_device *device)
{
/* TODO respond to new values of nIEN */
/* if device not selected, respond to new values of nIEN & SRST */
313,12 → 313,12
/*
D E V I C E S _ D O _ C O M M A N D _ R E G I S T E R
*/
void ata_device_do_command_register(ata_device *device)
static void ata_device_do_command_register(ata_device *device)
{
/* check BSY & DRQ */
if ( (device->regs.status & ATA_SR_BSY) || (device->regs.status & ATA_SR_DRQ) )
if (device->regs.command != DEVICE_RESET)
WARN("ata_device_write, writing a command while BSY or DRQ asserted.");
WARN("ata_device_write, writing a command while BSY or DRQ asserted.\n");
 
/* check if device selected */
if ( (device->regs.device_head & ATA_DHR_DEV) == device->internals.dev )
/trunk/or1ksim/peripheral/atadevice.h
1,5 → 1,5
/*
atahost.h -- ATA Host code simulation
atadevice.h -- ATA Device code simulation
Copyright (C) 2002 Richard Herveille, rherveille@opencores.org
 
This file is part of OpenRISC 1000 Architectural Simulator
/trunk/or1ksim/peripheral/atadevice_cmdi.c
1091,8 → 1091,7
int ata_device_execute_cmd(ata_device *device)
{
/*display debug information */
TRACE("ata_device_execute_command called with command = 0x%02X\n",
device->regs.command);
TRACE("command: 0x%02X\n", device->regs.command);
 
/* execute the commands */
switch (device->regs.command) {

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