URL
https://opencores.org/ocsvn/open8_urisc/open8_urisc/trunk
Subversion Repositories open8_urisc
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- This comparison shows the changes necessary to convert path
/
- from Rev 175 to Rev 176
- ↔ Reverse comparison
Rev 175 → Rev 176
/open8_urisc/trunk/VHDL/o8_rtc.vhd
9,15 → 9,18
-- Register Map: |
-- Offset Bitfield Description Read/Write |
-- 0x0 AAAAAAAA Periodic Interval Timer in uS (RW) |
-- 0x1 -AAAAAAA Tenths (0x00 - 0x63) (RW) |
-- 0x2 --AAAAAA Seconds (0x00 - 0x3B) (RW) |
-- 0x3 --AAAAAA Minutes (0x00 - 0x3B) (RW) |
-- 0x4 ---AAAAA Hours (0x00 - 0x17) (RW) |
-- 0x1 -AAAAAAA Tenths (0x00 - 0x99) (RW) |
-- 0x2 --AAAAAA Seconds (0x00 - 0x59) (RW) |
-- 0x3 --AAAAAA Minutes (0x00 - 0x59) (RW) |
-- 0x4 ---AAAAA Hours (0x00 - 0x23) (RW) |
-- 0x5 -----AAA Day of Week (0x00 - 0x06) (RW) |
-- 0x6 -------- Update RTC regs from Shadow Regs (WO) |
-- 0x7 A------- Update Shadow Regs from RTC regs (RW) |
-- A = Update is Busy |
-- |
-- Note that values are stored in packed BCD, not hex |
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library ieee; |
use ieee.std_logic_1164.all; |
use ieee.std_logic_unsigned.all; |
209,7 → 212,7
uSec_Tick_i <= '0'; |
if( uSec_Cntr = 0 )then |
uSec_Cntr <= DLY_1USEC; |
uSec_Tick_i <= or_reduce(Interval); |
uSec_Tick_i <= '1'; |
end if; |
|
pit.timer_ro <= '0'; |