Subversion Repositories cic_core_2

/cic_core_2/trunk/rtl/verilog/comb.sv File deleted

/cic_core_2/trunk/rtl/verilog/cic_d.sv File deleted

/cic_core_2/trunk/rtl/verilog/cic_i.sv File deleted

/cic_core_2/trunk/rtl/verilog/cic_package.sv File deleted

/cic_core_2/trunk/rtl/verilog/downsampler.sv File deleted

/cic_core_2/trunk/rtl/verilog/cic_functions.vh File deleted

/cic_core_2/trunk/rtl/verilog/integrator.sv File deleted

/cic_core_2/trunk/sim/rtl_sim/src/cic_core_tb.gtkw File deleted

/cic_core_2/trunk/sim/rtl_sim/src/cic_d_tb.sv File deleted

/cic_core_2/trunk/sim/rtl_sim/run/cic_d_run_sim.sh File deleted

cic_core_2/trunk/sim/rtl_sim/run/cic_d_run_sim.sh Property changes : Deleted: svn:executable ## -1 +0,0 ## -* \ No newline at end of property Index: cic_core_2/trunk/sim/rtl_sim/run/cic_d_tb.gtkw =================================================================== --- cic_core_2/trunk/sim/rtl_sim/run/cic_d_tb.gtkw (revision 2) +++ cic_core_2/trunk/sim/rtl_sim/run/cic_d_tb.gtkw (nonexistent) @@ -1,63 +0,0 @@ -[*] -[*] GTKWave Analyzer v3.3.101 (w)1999-2019 BSI -[*] Thu Aug 22 13:11:17 2019 -[*] -[dumpfile] "C:\Users\ibragimov\Documents\My_Designs\Hydra_SoC\Hydra_SoC_AFE5808_to_MSGDMA_8_as_1\CIC_core\trunk\sim\cic_d_tb.vcd" -[dumpfile_mtime] "Thu Aug 22 10:21:20 2019" -[dumpfile_size] 11075627 -[savefile] "C:\Users\ibragimov\Documents\My_Designs\Hydra_SoC\Hydra_SoC_AFE5808_to_MSGDMA_8_as_1\CIC_core\trunk\sim\cic_d_tb.gtkw" -[timestart] 0 -[size] 1085 613 -[pos] -1 -1 -*-16.873268 144600 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -[treeopen] cic_d_tb. -[sst_width] 197 -[signals_width] 296 -[sst_expanded] 1 -[sst_vpaned_height] 158 -@28 -cic_d_tb.clk -cic_d_tb.reset_n -cic_d_tb.phase_step -cic_d_tb.phase_curr -@8420 -cic_d_tb.filter_inp_data[17:0] -cic_d_tb.filter_out[17:0] -@20000 -- -- -- -@420 -cic_d_tb.cic_push_ptr -cic_d_tb.samp_counter -@c08421 -cic_d_tb.filter_out_ref[17:0] -@28 -(0)cic_d_tb.filter_out_ref[17:0] -(1)cic_d_tb.filter_out_ref[17:0] -(2)cic_d_tb.filter_out_ref[17:0] -(3)cic_d_tb.filter_out_ref[17:0] -(4)cic_d_tb.filter_out_ref[17:0] -(5)cic_d_tb.filter_out_ref[17:0] -(6)cic_d_tb.filter_out_ref[17:0] -(7)cic_d_tb.filter_out_ref[17:0] -(8)cic_d_tb.filter_out_ref[17:0] -(9)cic_d_tb.filter_out_ref[17:0] -(10)cic_d_tb.filter_out_ref[17:0] -(11)cic_d_tb.filter_out_ref[17:0] -(12)cic_d_tb.filter_out_ref[17:0] -(13)cic_d_tb.filter_out_ref[17:0] -(14)cic_d_tb.filter_out_ref[17:0] -(15)cic_d_tb.filter_out_ref[17:0] -(16)cic_d_tb.filter_out_ref[17:0] -(17)cic_d_tb.filter_out_ref[17:0] -@1401201 --group_end -@20000 -- -- -- -@8420 -cic_d_tb.filter_out_diff[17:0] -[pattern_trace] 1 -[pattern_trace] 0