OpenCores
URL https://opencores.org/ocsvn/atlas_core/atlas_core/trunk

Subversion Repositories atlas_core

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Rev 2 → Rev 3

/atlas_core/trunk/core/asm/atlas_asm.exe Cannot display: file marked as a binary type. svn:mime-type = application/octet-stream
/atlas_core/trunk/core/asm/src/atlas_asm.layout
1,10 → 1,10
[Editors]
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[Editors]
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/atlas_core/trunk/core/asm/src/atlas_asm.exe Cannot display: file marked as a binary type. svn:mime-type = application/octet-stream
/atlas_core/trunk/core/asm/src/main.cpp
22,7 → 22,8
int warning_cnt = 0;
 
// function prototypes
void pre_processor(char *input_file, const char *output_file);
void convert_strings(char *input_file, const char *output_file);
void pre_processor(const char *input_file, const char *output_file);
int conv_shift(char *input_string, int line);
int conv_cpreg(char *input_string, int line);
int conv_reg(char *input_string, int line);
35,13 → 36,11
void assemble(const char *input_file, const char *output_file, const char *bin_output_file);
int main(int argc, char *argv[]);
 
 
// *****************************************************************************************************************
// Formating pre-processor
// Erase comments and empty lines, convert to higher case, get definitions and insert data initializations
// Convert strings into data intialization
// *****************************************************************************************************************
void pre_processor(char *input_file, const char *output_file){
void convert_strings(char *input_file, const char *output_file){
 
FILE *input, *output;
char line_input[1024];
49,100 → 48,184
char *cut_out;
char txt_string[256];
char tmp_string[256];
char buf_string[512];
bool empty_line = false;
char buf_string[256];
bool found = false;
int fill_data_cnt = 0;
int line = 1;
int high = 0, low = 0;
int word = 0;
bool insert_label = false;
bool empty_label_line = false;
bool found = false;
 
// open pre_processor input file
// open string converter input file
input = fopen(input_file, "r");
if(input == NULL){
printf("PRE_PROCESSOR: Input file error!\n");
printf("STRING_CONVERTER: Input file error!\n");
exit(1);
}
 
// open pre_processor output file
// open string converter output file
output = fopen(output_file, "w");
if(output == NULL){
printf("PRE_PROCESSOR: Output file error!");
printf("STRING_CONVERTER: Output file error!");
exit(1);
}
 
// clear dw table
for(i=0; i<65536; i++)
is_dw[i] = false;
/*
// find strings
while(fgets(line_input, 512, input) != NULL){
// get line
rewind(input);
rewind(output);
while(fgets(line_input, 512, input) != NULL){
 
// clear working string
for(i=0; i<strlen(txt_string); i++)
txt_string[i] = '\0';
// clear working string
for(i=0; i<strlen(tmp_string); i++)
tmp_string[i] = '\0';
 
// get line entry
cut_out = strtok(line_input, "\n");
if (cut_out != NULL)
sprintf(txt_string, "%s", cut_out);
 
// erase comments
for(i=0; i<strlen(txt_string); i++){
if (txt_string[i] == ';'){
for(j=i; j<strlen(txt_string); i++)
txt_string[j] = '\0';
break;
}
}
 
// insert line breaks after labels
for(i=0; i<strlen(txt_string); i++){
if(txt_string[i] == ':'){
for(j=0; j<(strlen(txt_string)-i); j++){
tmp_string[j] = txt_string[i+j+1];
}
txt_string[i+1] = '\n';
txt_string[i+2] = '\0';
strcat(txt_string, tmp_string);
strcat(txt_string, "\n\0");
break;
}
}
 
// convert to higher case
for(i=0; i<strlen(txt_string); i++){
if(txt_string[i] == '"')
if((txt_string[i] == 39) or (txt_string[i] == 34)) // stop converting when ' or " has been found
break;
if((txt_string[i] > 96) and (txt_string[i] < 123)){
if((txt_string[i] > 96) and (txt_string[i] < 123))
txt_string[i] = txt_string[i] - 32;
}
}
strcpy(tmp_string, txt_string); // make a copy
strcpy(buf_string, txt_string); // make a copy
 
// find ".string" definiton
found = false;
for(i=0; i<strlen(txt_string); i++){
// string-command?
if ((txt_string[i+0] == '.') and (txt_string[i+1] == 'S') and (txt_string[i+2] == 'T') and (txt_string[i+3] == 'R') and (txt_string[i+4] == 'I') and (txt_string[i+5] == 'N') and (txt_string[i+6] == 'G') and (txt_string[i+7] == ' ')) {
// delete command from working-string
for(j=i+8; txt_string[j] != '\0'; j++)
tmp_string[j-(i+8)] = txt_string[j];
tmp_string[j] = '\0';
printf("string found: %s\n", tmp_string);
found = true;
break;
for(i=0; i<strlen(tmp_string); i++){
if ((tmp_string[i+0] == '.') and (tmp_string[i+1] == 'S') and (tmp_string[i+2] == 'T') and (tmp_string[i+3] == 'R') and
(tmp_string[i+4] == 'I') and (tmp_string[i+5] == 'N') and (tmp_string[i+6] == 'G') and (tmp_string[i+7] == ' ')){
for(j=0; j<strlen(tmp_string); j++)
tmp_string[j] = tmp_string[j+i+7];
// isolate text part
for(k=0; k<strlen(tmp_string); k++){
if (tmp_string[k] == 34){ // beginning of string text field
for(j=0; j<strlen(tmp_string); j++){
if(tmp_string[j+k+1] == 34) // end of string text field
break;
else
tmp_string[j] = tmp_string[j+k+1];
}
tmp_string[j] = '\0'; // terminate string
break;
}
}
found = true;
break;
}
}
 
// convert string characters
if (found == true){
for(i=0; i<strlen(tmp_string); i=i){
high = 0;
low = 1;
i++;
if ((tmp_string[i] != '"') and (tmp_string[i] != '\0'))
high = int(tmp_string[i]);
else
break;
i++;
if ((tmp_string[i] != '"') and (tmp_string[i] != '\0'))
low = int(tmp_string[i]);
else
break;
//sprintf(txt_string, ".DW #%04x\n", ((high<<8)|low));
//fputs(txt_string, output);
}
if(low != 0){
//sprintf(txt_string, ".DW #%04x\n", (high<<8));
//fputs(txt_string, output);
}
// save label
for (k=0; k<strlen(txt_string); k++){
if (txt_string[k] == '\n'){
txt_string[k+1] = '\0';
fputs(txt_string, output);
break;
}
}
// save integer conversion
word = 0;
for(k=0; k<strlen(tmp_string); k++){
if (k%2==0){
word = (int)tmp_string[k] << 8;
}
else{
word = word | (int)tmp_string[k];
sprintf(txt_string, ".dw #%d\n", word);
fputs(txt_string, output);
}
}
if((word&255) != 0) // last byte is zero?
sprintf(txt_string, ".dw #0\n");
else
sprintf(txt_string, ".dw #%d\n", word);
fputs(txt_string, output);
}
else{
//strcat(txt_string, "\n");
//fputs(txt_string, output);
// write default to file
strcat(buf_string, "\n");
fputs(buf_string, output);
}
strcat(txt_string, "\n");
fputs(txt_string, output);
}
 
}
 
fclose(output);
fclose(input);
exit(1);
*/
}
 
 
// *****************************************************************************************************************
// Formating pre-processor
// Erase comments and empty lines, convert to higher case, get definitions and insert data initializations
// *****************************************************************************************************************
void pre_processor(const char *input_file, const char *output_file){
 
FILE *input, *output;
char line_input[1024];
int i = 0, j = 0, k = 0;
char *cut_out;
char txt_string[256];
char tmp_string[256];
char buf_string[512];
bool empty_line = false;
int fill_data_cnt = 0;
int line = 1;
int high = 0, low = 0;
int word = 0;
bool insert_label = false;
bool empty_label_line = false;
bool found = false;
 
// open pre_processor input file
input = fopen(input_file, "r");
if(input == NULL){
printf("PRE_PROCESSOR: Input file error!\n");
exit(1);
}
 
// open pre_processor output file
output = fopen(output_file, "w");
if(output == NULL){
printf("PRE_PROCESSOR: Output file error!");
exit(1);
}
 
// clear dw table
for(i=0; i<65536; i++)
is_dw[i] = false;
 
// get line
rewind(input);
rewind(output);
173,16 → 256,11
 
// convert to higher case
for(i=0; i<strlen(txt_string); i++){
if((txt_string[i] > 96) and (txt_string[i] < 123)){
if((txt_string[i] == 39) or (txt_string[i] == 34)) // stop converting when ' or " has been found
break;
if((txt_string[i] > 96) and (txt_string[i] < 123))
txt_string[i] = txt_string[i] - 32;
}
}
 
// erase comments
for(i=0; i<strlen(txt_string); i++){
if (txt_string[i] == ';')
txt_string[i] = '\0';
}
// insert label?
if (insert_label == true){
273,9 → 351,9
def_cnt++;
}
 
mem_reserve_loop:
 
// find memory reserve definitions
mem_reserve_loop:
found = false;
for(i=0; i<strlen(txt_string); i++){
if(txt_string[i] == '.') {
323,43 → 401,6
fill_data_cnt--;
}
 
found = false;
for(i=0; i<strlen(txt_string); i++){
// string-command?
if ((txt_string[i+0] == '.') and (txt_string[i+1] == 'S') and (txt_string[i+2] == 'T') and (txt_string[i+3] == 'R') and (txt_string[i+4] == 'I') and (txt_string[i+5] == 'N') and (txt_string[i+6] == 'G') and (txt_string[i+7] == ' ') and (txt_string[i+8] == '"')) {
// delete command from working-string
for(j=i+9; txt_string[j] != '\0'; j++)
tmp_string[j-(i+9)] = txt_string[j];
tmp_string[j-9] = '\0';
printf("string found: %s\n", tmp_string);
found = true;
break;
}
}
 
// convert string characters
if (found == true){
printf("converting string...\n");
for(i=0; i<strlen(tmp_string); i=i){
high = 0;
low = 1;
i++;
if ((tmp_string[i] != '"') and (tmp_string[i] != '\0'))
high = int(tmp_string[i]);
else
break;
i++;
if ((tmp_string[i] != '"') and (tmp_string[i] != '\0'))
low = int(tmp_string[i]);
else
break;
sprintf(txt_string, ".DW #%d\n", ((high>>8)|low));
}
if(low != 0){
sprintf(txt_string, ".DW #%d\n", (high>>8));
}
}
 
if (empty_line == false){
strcat(txt_string, "\n");
fputs(txt_string, output);
388,21 → 429,21
 
int sft = 0;
 
if (strcmp(input_string, "SWP") == 0)
if (strcmp(input_string, "#SWP") == 0)
sft = 0;
else if (strcmp(input_string, "ASR") == 0)
else if (strcmp(input_string, "#ASR") == 0)
sft = 1;
else if (strcmp(input_string, "ROL") == 0)
else if (strcmp(input_string, "#ROL") == 0)
sft = 2;
else if (strcmp(input_string, "ROR") == 0)
else if (strcmp(input_string, "#ROR") == 0)
sft = 3;
else if (strcmp(input_string, "LSL") == 0)
else if (strcmp(input_string, "#LSL") == 0)
sft = 4;
else if (strcmp(input_string, "LSR") == 0)
else if (strcmp(input_string, "#LSR") == 0)
sft = 5;
else if (strcmp(input_string, "RLC") == 0)
else if (strcmp(input_string, "#RLC") == 0)
sft = 6;
else if (strcmp(input_string, "RRC") == 0)
else if (strcmp(input_string, "#RRC") == 0)
sft = 7;
else {
printf("ERROR: Invalid shift <%s>! (line %d)\n", input_string, line);
634,6 → 675,14
input_string[i] = input_string[i+1];
}
 
// character?
if ((input_string[0] == 39)){ // -> '
temp[0] = input_string[1];
temp[1] = '\0';
imm = (int)temp[0];
goto skip_analysis;
}
 
// any label reference definition?
if ((input_string[0] == '[')){
for(i=1; i<strlen(input_string); i++){
645,8 → 694,7
}
}
imm = ((find_offset(temp, 0)-1)*2);
printf("valid mem ref %d\n", imm);
goto skip_analysis; // valid definition found
goto skip_analysis;
}
 
// any low immediate definition?
754,10 → 802,10
skip_analysis:
 
// message
if (extended == true){
printf("WARNING: Loading extended 32-bit immediate. (line %d)\n", line);
warning_cnt++;
}
//if (extended == true){
// printf("WARNING: Loading extended 32-bit immediate. (line %d)\n", line);
// warning_cnt++;
//}
 
// out of range?
if ((imm > max_val) or (imm < 0)){
931,9 → 979,9
else if (strcmp(arg[0], "SBC") == 0)
opcode = (5<<10) | (conv_reg(arg[1], line)<<7) | (conv_reg(arg[2], line)<<4) | conv_reg(arg[3], line);
else if ((strcmp(arg[0], "CMP") == 0) or (strcmp(arg[0], "CMPS") == 0))
opcode = (6<<10) | (1<<3) | (conv_reg(arg[1], line)<<7) | (conv_reg(arg[2], line)<<4) | conv_reg(arg[3], line);
opcode = (6<<10) | (1<<3) | (conv_reg(arg[1], line)<<4) | conv_reg(arg[2], line);
else if ((strcmp(arg[0], "CPX") == 0) or (strcmp(arg[0], "CPXS") == 0))
opcode = (7<<10) | (1<<3) | (conv_reg(arg[1], line)<<7) | (conv_reg(arg[2], line)<<4) | conv_reg(arg[3], line);
opcode = (7<<10) | (1<<3) | (conv_reg(arg[1], line)<<4) | conv_reg(arg[2], line);
else if (strcmp(arg[0], "AND") == 0){
if (conv_reg(arg[2], line) == conv_reg(arg[3], line)) printf("WARNING: Redundant AND will result in STUB instruction! (line &d)\n", line);
opcode = (8<<10) | (conv_reg(arg[1], line)<<7) | (conv_reg(arg[2], line)<<4) | conv_reg(arg[3], line);
953,9 → 1001,9
else if (strcmp(arg[0], "BIC") == 0)
opcode = (12<<10) | (conv_reg(arg[1], line)<<7) | (conv_reg(arg[2], line)<<4) | conv_reg(arg[3], line);
else if ((strcmp(arg[0], "TEQ") == 0) or (strcmp(arg[0], "TEQS") == 0))
opcode = (13<<10) | (1<<3) | (conv_reg(arg[1], line)<<7) | (conv_reg(arg[2], line)<<4) | conv_reg(arg[3], line);
opcode = (13<<10) | (1<<3) | (conv_reg(arg[1], line)<<4) | conv_reg(arg[2], line);
else if ((strcmp(arg[0], "TST") == 0) or (strcmp(arg[0], "TSTS") == 0))
opcode = (14<<10) | (1<<3) | (conv_reg(arg[1], line)<<7) | (conv_reg(arg[2], line)<<4) | conv_reg(arg[3], line);
opcode = (14<<10) | (1<<3) | (conv_reg(arg[1], line)<<4) | conv_reg(arg[2], line);
else if (strcmp(arg[0], "SFT") == 0)
opcode = (15<<10) | (conv_reg(arg[1], line)<<7) | (conv_reg(arg[2], line)<<4) | conv_shift(arg[3], line);
1191,10 → 1239,10
else if (strcmp(arg[0], "COMS") == 0) // 1's complement and set flags
opcode = (11<<10) | (1<<3) | (conv_reg(arg[1], line)<<7) | (conv_reg(arg[1], line)<<4) | conv_reg(arg[1], line);
 
// Direct memory initialization
// Direct memory initialization - WORD
// ---------------------------------------------------------------------------------------------------------
else if (strcmp(arg[0], ".DW") == 0) // dummy operation (no actual system state change)
opcode = conv_imm(arg[1], pow(2,16)-1, line);
opcode = conv_imm(arg[1], (int)(pow(2,16)-1), line);
 
// Unknown Command
// ---------------------------------------------------------------------------------------------------------
1232,7 → 1280,7
// *****************************************************************************************************************
int main(int argc, char *argv[]){
 
printf("\nAtlas Processor - Evaluation Assembler, Version 2013.03.13\n");
printf("\nAtlas Project - Evaluation Assembler, Version 2013.03.14\n");
printf("by Stephan Nolting (stnolting@gmail.com), Hanover, Germany\n\n");
 
// pre_processor.asm - intermediate processing file
1239,7 → 1287,8
// init.vhd - vhdl memory initialization data block
// out.bin - binary program output for bootloader downloading
 
pre_processor(argv[1], "pre_processor.asm"); // erase comments & empty lines & get definitions
convert_strings(argv[1], "job.xasm"); // convert strings into direct memory inits
pre_processor("job.xasm", "pre_processor.asm"); // erase comments & empty lines & get definitions
get_labels("pre_processor.asm"); // find and list labels
assemble("pre_processor.asm", "init.vhd", "out.bin"); // do the magic conversion
 
/atlas_core/trunk/core/rtl/ALU.vhd
2,9 → 2,9
-- # << ATLAS Project - Arithmetical/Logical Unit >> #
-- # **************************************************** #
-- # The main data processing is done here. Also the CP #
-- # interface emergea from this unit. #
-- # interface emerges from this unit. #
-- # **************************************************** #
-- # Last modified: 12.03.2013 #
-- # Last modified: 14.03.2013 #
-- # **************************************************** #
-- # by Stephan Nolting 4788, Hanover, Germany #
-- ########################################################
331,7 → 331,7
TRANSF_INT <= INV_BIT when (EX_CTRL_BUS_I(ctrl_tf_store_c) = '1') else FLAG_BUS_I(flag_t_c); -- transfer flag
FLAG_BUS_O(flag_t_c) <= TRANSF_INT;
 
-- T-Flag for mask generation --
-- T-Flag for mask generation (yeah, this is some kind of forwarding) --
MASK_T_FLAG_O <= TRANSF_INT when (EX_CTRL_BUS_I(ctrl_en_c) = '1') and (EX_CTRL_BUS_I(ctrl_tf_store_c) = '1') else FLAG_BUS_I(flag_t_c);
 
 
/atlas_core/trunk/core/rtl/ATLAS_PROCESSOR.vhd
57,7 → 57,7
WB_ADR_O : out std_logic_vector(bus_adr_width_c-1 downto 0); -- address
WB_CTI_O : out std_logic_vector(02 downto 0); -- cycle type
WB_SEL_O : out std_logic_vector(01 downto 0); -- byte select
WB_TGC_O : out std_logic_vector(wb_tag_size_c-1 downto 0); -- cycle tag
WB_TGC_O : out std_logic; -- cycle tag
WB_DATA_O : out std_logic_vector(data_width_c-1 downto 0); -- data out
WB_DATA_I : in std_logic_vector(data_width_c-1 downto 0); -- data in
WB_WE_O : out std_logic; -- read/write
/atlas_core/trunk/core/rtl/CTRL.vhd
4,7 → 4,7
-- # Main control system, generating control signals #
-- # for each pipeline stage. #
-- # **************************************************** #
-- # Last modified: 12.03.2013 #
-- # Last modified: 14.03.2013 #
-- # **************************************************** #
-- # by Stephan Nolting 4788, Hanover, Germany #
-- ########################################################
148,7 → 148,7
-- Branch / Exception: Disable next 2 cycles
-- Mem-load dependency: Insert 1 dummy cycle
DIS_IF <= '1' when (MULTI_CYC_REQ_I = '1') else '0';
branch_slots:
branch_slots: -- highly experimental!!!
if (branch_slots_en_c = true) generate
DIS_CYCLE <= '1' when (MEM_DEPENDECY = '1') or (START_FF = '0') else '0';
end generate branch_slots;
/atlas_core/trunk/core/rtl/MEM_ACC.vhd
5,7 → 5,7
-- # data memory interface. Furthermore, internal data #
-- # switching networks are located here. #
-- # **************************************************** #
-- # Last modified: 09.03.2013 #
-- # Last modified: 14.03.2013 #
-- # **************************************************** #
-- # by Stephan Nolting 4788, Hanover, Germany #
-- ########################################################
113,7 → 113,6
begin
-- Memory write data (OP_B) forwarding --
if (WB_FWD_I(fwd_en_c) = '1') and (MA_CTRL_BUS_I(ctrl_mcyc_c) = '0') and (MA_CTRL_BUS_I(ctrl_rb_3_c downto ctrl_rb_0_c) = WB_FWD_I(fwd_adr_3_c downto fwd_adr_0_c)) then
-- if (WB_FWD_I(fwd_en_c) = '1') and (MA_CTRL_BUS_I(ctrl_rb_3_c downto ctrl_rb_0_c) = WB_FWD_I(fwd_adr_3_c downto fwd_adr_0_c)) then
DATA_BP_INT <= WB_FWD_I(fwd_dat_msb_c downto fwd_dat_lsb_c); -- WB stage
else
DATA_BP_INT <= DATA_BP_FF;
159,18 → 158,31
end process W_MEM_ACC;
 
-- R/W Control --
MEM_RW_O <= MA_CTRL_BUS_I(ctrl_mem_wr_c);
MEM_RW_O <= MA_CTRL_BUS_I(ctrl_mem_wr_c) and MA_CTRL_BUS_I(ctrl_en_c);
 
 
 
-- Stage Data Multiplexer ------------------------------------------------------------------------------
-- --------------------------------------------------------------------------------------------------------
-- SYS_CP_R_DAT <= CP_DATA_I when (MA_CTRL_BUS_I(ctrl_rd_cp_acc_c) = '1') else RD_MSR_I;
-- SYS_CP_ALU_R_DAT <= SYS_CP_R_DAT when (MA_CTRL_BUS_I(ctrl_cp_msr_rd_c) = '1') else ALU_RES_FF;
-- DATA_O <= DATA_BP_FF when (MA_CTRL_BUS_I(ctrl_link_c) = '1') else SYS_CP_ALU_R_DAT;
no_mac_mul_units: -- syntheszie no MAC and no MUL unit
if (build_mul_c = false) and (build_mac_c = false) generate
ALU_MAC_DAT <= ALU_RES_FF;
end generate no_mac_mul_units;
synhesize_mac_mul_units: -- syntheszie MAC and/or MUL unit
if (build_mul_c = true) or (build_mac_c = true) generate
ALU_MAC_DAT <= MAC_RES_FF when (MA_CTRL_BUS_I(ctrl_use_mac_c) = '1') else ALU_RES_FF;
end generate synhesize_mac_mul_units;
 
SYS_CP_R_DAT <= CP_DATA_I when (MA_CTRL_BUS_I(ctrl_rd_cp_acc_c) = '1') else RD_MSR_I;
ALU_MAC_DAT <= MAC_RES_FF when (MA_CTRL_BUS_I(ctrl_use_mac_c) = '1') else ALU_RES_FF;
no_cp_present: -- no coprocessors present
if (cp0_present_c = false) and (cp1_present_c = false) generate
SYS_CP_R_DAT <= RD_MSR_I;
end generate no_cp_present;
cp_present: -- at least one coprocessor is present
if (cp0_present_c = true) or (cp1_present_c = true) generate
SYS_CP_R_DAT <= CP_DATA_I when (MA_CTRL_BUS_I(ctrl_rd_cp_acc_c) = '1') else RD_MSR_I;
end generate cp_present;
 
-- Multiplexers --
SYS_CP_ALU_R_DAT <= SYS_CP_R_DAT when (MA_CTRL_BUS_I(ctrl_cp_msr_rd_c) = '1') else ALU_MAC_DAT;
DATA_O <= DATA_BP_FF when (MA_CTRL_BUS_I(ctrl_link_c) = '1') else SYS_CP_ALU_R_DAT;
 
/atlas_core/trunk/core/rtl/ATLAS_pkg.vhd
4,7 → 4,7
-- # All architecture configurations, options, signal #
-- # definitions and components are listed here. #
-- # **************************************************** #
-- # Last modified: 11.03.2013 #
-- # Last modified: 14.03.2013 #
-- # **************************************************** #
-- # by Stephan Nolting 4788, Hanover, Germany #
-- ########################################################
49,7 → 49,6
constant wb_con_bst_cyc_c : std_logic_vector(2 downto 0) := "001"; -- constant address burst
constant wb_inc_bst_cyc_c : std_logic_vector(2 downto 0) := "010"; -- incrementing address burst
constant wb_end_cyc_cyc_c : std_logic_vector(2 downto 0) := "111"; -- burst end
constant wb_tag_size_c : natural := 3; -- tag signal size
 
 
-- Machine Status Register ----------------------------------------------------------------
585,7 → 584,7
WB_ADR_O : out std_logic_vector(bus_adr_width_c-1 downto 0); -- address
WB_CTI_O : out std_logic_vector(02 downto 0); -- cycle type
WB_SEL_O : out std_logic_vector(01 downto 0); -- byte select
WB_TGC_O : out std_logic_vector(wb_tag_size_c-1 downto 0); -- cycle tag
WB_TGC_O : out std_logic; -- cycle tag
WB_DATA_O : out std_logic_vector(data_width_c-1 downto 0); -- data out
WB_DATA_I : in std_logic_vector(data_width_c-1 downto 0); -- data in
WB_WE_O : out std_logic; -- read/write
/atlas_core/trunk/core/rtl/BUS_INTERFACE.vhd
6,7 → 6,7
-- # instruction cache. The system is capable of #
-- # generating a true 32-bit wide address for the NoC. #
-- # **************************************************** #
-- # Last modified: 12.03.2013 #
-- # Last modified: 14.03.2013 #
-- # **************************************************** #
-- # by Stephan Nolting 4788, Hanover, Germany #
-- ########################################################
65,7 → 65,7
WB_ADR_O : out std_logic_vector(bus_adr_width_c-1 downto 0); -- address
WB_CTI_O : out std_logic_vector(02 downto 0); -- cycle type
WB_SEL_O : out std_logic_vector(01 downto 0); -- byte select
WB_TGC_O : out std_logic_vector(wb_tag_size_c-1 downto 0); -- cycle tag
WB_TGC_O : out std_logic; -- cycle tag
WB_DATA_O : out std_logic_vector(data_width_c-1 downto 0); -- data out
WB_DATA_I : in std_logic_vector(data_width_c-1 downto 0); -- data in
WB_WE_O : out std_logic; -- read/write
279,7 → 279,7
 
-- Wishbone Bus Static Defaults --
WB_CTI_O <= wb_classic_cyc_c;
WB_TGC_O <= "00" & SYS_MODE_I; -- cycle tag
WB_TGC_O <= SYS_MODE_I; -- cycle tag
if (BUS_DIR = UP) and (ARB_STATE /= IDLE) then -- download/upload
WB_WE_O <= '1'; -- bus write
else

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