URL
https://opencores.org/ocsvn/cpu16/cpu16/trunk
Subversion Repositories cpu16
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Rev 2 → Rev 3
/cpu16/trunk/cpu16.v
17,6 → 17,11
* along with this program; if not, write to the Free Software |
* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA. |
*/ |
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// comment this line out to use LE's (warning: size goes up dramatically to around 800LE's) |
`define USE_RAM_FOR_REGFILE |
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module cpu16 ( |
clk, |
reset_n, |
415,19 → 420,28
ra_dst = 3'd6; // hard linked register |
else |
ra_dst = ir_dst; |
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// register file |
wire [15:0] qa, qb; |
regfile8x16 i_regfile ( |
.clock(clk), |
.data(reg_data), |
.rdaddress_a(ir_dst), |
.rdaddress_b(ir_src), |
.wraddress(ra_dst), |
.wren(reg_write&clk_en), |
.qa(qa), |
.qb(qb) |
); |
`ifdef USE_RAM_FOR_REGFILE |
wire [15:0] qa, qb; |
regfile8x16 i_regfile ( |
.clock(clk), |
.data(reg_data), |
.rdaddress_a(ir_dst), |
.rdaddress_b(ir_src), |
.wraddress(ra_dst), |
.wren(reg_write&clk_en), |
.qa(qa), |
.qb(qb) |
); |
`else |
reg [15:0] regs[7:0]; |
always @(posedge clk) |
if (reg_write&clk_en) |
regs[ir_dst] <= reg_data; |
wire [15:0] qa = regs[ir_dst]; |
wire [15:0] qb = regs[ir_src]; |
`endif |
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// flags |
reg i, next_i; |