URL
https://opencores.org/ocsvn/rise/rise/trunk
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- This comparison shows the changes necessary to convert path
/
- from Rev 20 to Rev 21
- ↔ Reverse comparison
Rev 20 → Rev 21
/trunk/vhdl/register_file.vhd
25,17 → 25,23
rx_addr : in REGISTER_ADDR_T; |
ry_addr : in REGISTER_ADDR_T; |
rz_addr : in REGISTER_ADDR_T; |
dreg_addr : in REGISTER_ADDR_T; |
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dreg_write : in REGISTER_T; |
rx_read : out REGISTER_T; |
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rx_read : out REGISTER_T; |
ry_read : out REGISTER_T; |
rz_read : out REGISTER_T; |
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dreg_addr : in REGISTER_ADDR_T; |
dreg_write : in REGISTER_T; |
dreg_enable : in std_logic; |
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sr_read : out SR_REGISTER_T; |
sr_write : in SR_REGISTER_T; |
lr_write : in PC_REGISTER_T; |
sr_enable : in std_logic; |
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lr_write : in PC_REGISTER_T; |
lr_enable : in std_logic; |
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pc_write : in PC_REGISTER_T; |
sr_read : out SR_REGISTER_T; |
pc_read : out PC_REGISTER_T); |
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end register_file; |
42,14 → 48,7
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architecture register_file_rtl of register_file is |
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signal rx_read_next : REGISTER_T; |
signal ry_read_next : REGISTER_T; |
signal rz_read_next : REGISTER_T; |
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signal sr_read_next : SR_REGISTER_T; |
signal pc_read_next : PC_REGISTER_T; |
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signal dreg_addr_tmp : REGISTER_ADDR_T; |
signal dreg_write_tmp : REGISTER_T; |
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58,7 → 57,6
signal pc_write_tmp : PC_REGISTER_T; |
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signal regx_0, regx_1, regx_2, regx_3, regx_4 : REGISTER_T; |
signal regx_5, regx_6, regx_7, regx_8, regx_9 : REGISTER_T; |
signal regx_10, regx_11, regx_12, regx_13, regx_14, regx_15 : REGISTER_T; |
73,52 → 71,53
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begin -- register_file_rtl |
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SYNC: process(clk, reset) |
SYNC: process(clk, reset, dreg_enable) |
begin |
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if reset = '0' then |
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rx_read <= (others => '0'); |
ry_read <= (others => '0'); |
rz_read <= (others => '0'); |
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sr_read <= (others => '0'); |
pc_read <=( others => '0'); |
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sr_write_tmp <= (others => '0'); |
lr_write_tmp <= (others => '0'); |
pc_write_tmp <= (others => '0'); |
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dreg_addr_tmp <= (others => '0'); |
dreg_write_tmp <= (others => '0'); |
dreg_addr_tmp <= (others => '0'); |
dreg_write_tmp <= (others => '0'); |
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elsif clk'event and clk = '1' then |
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rx_read <= rx_read_next; |
ry_read <= ry_read_next; |
rz_read <= rz_read_next; |
if dreg_addr = "1110" and dreg_enable = '1' then |
pc_write_tmp <= dreg_write; |
else |
pc_write_tmp <= pc_write; |
end if; |
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sr_read <= sr_read_next; |
pc_read <= pc_read_next; |
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sr_write_tmp <= sr_write; |
lr_write_tmp <= lr_write; |
pc_write_tmp <= pc_write; |
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dreg_addr_tmp <= dreg_addr; |
dreg_write_tmp <= dreg_write; |
if dreg_addr = "1111" and dreg_enable = '1' then |
sr_write_tmp <= dreg_write; |
elsif sr_enable = '1' then |
sr_write_tmp <= sr_write; |
end if; |
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if dreg_addr = "1101" and dreg_enable = '1' then |
lr_write_tmp <= dreg_write; |
elsif lr_enable = '1' then |
lr_write_tmp <= lr_write; |
end if; |
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if dreg_enable = '1' then |
dreg_write_tmp <= dreg_write; |
dreg_addr_tmp <= dreg_addr; |
end if; |
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end if; |
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end process SYNC; |
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WRITE: process(clk, reset) |
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WRITE_PROC: process(clk, reset) |
begin |
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if reset = '0' then |
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sr_read_next <= (others => '0'); |
pc_read_next <= (others => '0'); |
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regx_0 <= (others => '0'); |
regx_1 <= (others => '0'); |
173,11 → 172,6
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elsif clk'event and clk = '0' then |
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sr_read_next <= sr_write_tmp; |
--lr_write_next <= lr_write_tmp; |
pc_read_next <= pc_write_tmp; |
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if dreg_addr_tmp = "0000" then |
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regx_0 <= dreg_write_tmp; |
254,32 → 248,36
regx_12 <= dreg_write_tmp; |
regy_12 <= dreg_write_tmp; |
regz_12 <= dreg_write_tmp; |
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elsif dreg_addr_tmp = "1101" then |
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end if; |
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regx_13 <= dreg_write_tmp; |
regy_13 <= dreg_write_tmp; |
regz_13 <= dreg_write_tmp; |
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elsif dreg_addr_tmp = "1110" then |
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regx_13 <= lr_write_tmp; |
regy_13 <= lr_write_tmp; |
regz_13 <= lr_write_tmp; |
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regx_14 <= pc_write_tmp; |
regy_14 <= pc_write_tmp; |
regz_14 <= pc_write_tmp; |
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regx_14 <= dreg_write_tmp; |
regy_14 <= dreg_write_tmp; |
regz_14 <= dreg_write_tmp; |
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elsif dreg_addr_tmp = "1111" then |
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regx_15 <= dreg_write_tmp; |
regy_15 <= dreg_write_tmp; |
regz_15 <= dreg_write_tmp; |
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end if; |
regx_15 <= sr_write_tmp; |
regy_15 <= sr_write_tmp; |
regz_15 <= sr_write_tmp; |
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end if; |
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end process WRITE; |
end process WRITE_PROC; |
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SPECIAL_READ_PROC: process (reset, regx_14, regx_15) |
begin |
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sr_read <= regx_15; |
pc_read <= regx_14; |
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end process SPECIAL_READ_PROC; |
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RX_READ_PROC: process(reset, rx_addr, |
regx_0, regx_1, regx_2, regx_3, regx_4, regx_5, regx_6, regx_7, |
regx_8, regx_9, regx_10, regx_11, regx_12, regx_13, regx_14, regx_15) |
287,27 → 285,27
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if reset = '0' then |
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rx_read_next <= (others => '0'); |
rx_read <= (others => '0'); |
else |
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CASE rx_addr IS |
WHEN "0000" => rx_read_next <= regx_0; |
WHEN "0001" => rx_read_next <= regx_1; |
WHEN "0010" => rx_read_next <= regx_2; |
WHEN "0011" => rx_read_next <= regx_3; |
WHEN "0100" => rx_read_next <= regx_4; |
WHEN "0101" => rx_read_next <= regx_5; |
WHEN "0110" => rx_read_next <= regx_6; |
WHEN "0111" => rx_read_next <= regx_7; |
WHEN "1000" => rx_read_next <= regx_8; |
WHEN "1001" => rx_read_next <= regx_9; |
WHEN "1010" => rx_read_next <= regx_10; |
WHEN "1011" => rx_read_next <= regx_11; |
WHEN "1100" => rx_read_next <= regx_12; |
WHEN "1101" => rx_read_next <= regx_13; |
WHEN "1110" => rx_read_next <= regx_14; |
WHEN "1111" => rx_read_next <= regx_15; |
WHEN OTHERS => rx_read_next <= "XXXXXXXXXXXXXXXX"; |
WHEN "0000" => rx_read <= regx_0; |
WHEN "0001" => rx_read <= regx_1; |
WHEN "0010" => rx_read <= regx_2; |
WHEN "0011" => rx_read <= regx_3; |
WHEN "0100" => rx_read <= regx_4; |
WHEN "0101" => rx_read <= regx_5; |
WHEN "0110" => rx_read <= regx_6; |
WHEN "0111" => rx_read <= regx_7; |
WHEN "1000" => rx_read <= regx_8; |
WHEN "1001" => rx_read <= regx_9; |
WHEN "1010" => rx_read <= regx_10; |
WHEN "1011" => rx_read <= regx_11; |
WHEN "1100" => rx_read <= regx_12; |
WHEN "1101" => rx_read <= regx_13; |
WHEN "1110" => rx_read <= regx_14; |
WHEN "1111" => rx_read <= regx_15; |
WHEN OTHERS => rx_read <= "XXXXXXXXXXXXXXXX"; |
END CASE; |
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end if; |
323,27 → 321,27
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if reset = '0' then |
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ry_read_next <= (others => '0'); |
ry_read <= (others => '0'); |
else |
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CASE ry_addr IS |
WHEN "0000" => ry_read_next <= regy_0; |
WHEN "0001" => ry_read_next <= regy_1; |
WHEN "0010" => ry_read_next <= regy_2; |
WHEN "0011" => ry_read_next <= regy_3; |
WHEN "0100" => ry_read_next <= regy_4; |
WHEN "0101" => ry_read_next <= regy_5; |
WHEN "0110" => ry_read_next <= regy_6; |
WHEN "0111" => ry_read_next <= regy_7; |
WHEN "1000" => ry_read_next <= regy_8; |
WHEN "1001" => ry_read_next <= regy_9; |
WHEN "1010" => ry_read_next <= regy_10; |
WHEN "1011" => ry_read_next <= regy_11; |
WHEN "1100" => ry_read_next <= regy_12; |
WHEN "1101" => ry_read_next <= regy_13; |
WHEN "1110" => ry_read_next <= regy_14; |
WHEN "1111" => ry_read_next <= regy_15; |
WHEN OTHERS => ry_read_next <= "XXXXXXXXXXXXXXXX"; |
WHEN "0000" => ry_read <= regy_0; |
WHEN "0001" => ry_read <= regy_1; |
WHEN "0010" => ry_read <= regy_2; |
WHEN "0011" => ry_read <= regy_3; |
WHEN "0100" => ry_read <= regy_4; |
WHEN "0101" => ry_read <= regy_5; |
WHEN "0110" => ry_read <= regy_6; |
WHEN "0111" => ry_read <= regy_7; |
WHEN "1000" => ry_read <= regy_8; |
WHEN "1001" => ry_read <= regy_9; |
WHEN "1010" => ry_read <= regy_10; |
WHEN "1011" => ry_read <= regy_11; |
WHEN "1100" => ry_read <= regy_12; |
WHEN "1101" => ry_read <= regy_13; |
WHEN "1110" => ry_read <= regy_14; |
WHEN "1111" => ry_read <= regy_15; |
WHEN OTHERS => ry_read <= "XXXXXXXXXXXXXXXX"; |
END CASE; |
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end if; |
359,27 → 357,27
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if reset = '0' then |
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rz_read_next <= (others => '0'); |
rz_read <= (others => '0'); |
else |
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CASE rz_addr IS |
WHEN "0000" => rz_read_next <= regz_0; |
WHEN "0001" => rz_read_next <= regz_1; |
WHEN "0010" => rz_read_next <= regz_2; |
WHEN "0011" => rz_read_next <= regz_3; |
WHEN "0100" => rz_read_next <= regz_4; |
WHEN "0101" => rz_read_next <= regz_5; |
WHEN "0110" => rz_read_next <= regz_6; |
WHEN "0111" => rz_read_next <= regz_7; |
WHEN "1000" => rz_read_next <= regz_8; |
WHEN "1001" => rz_read_next <= regz_9; |
WHEN "1010" => rz_read_next <= regz_10; |
WHEN "1011" => rz_read_next <= regz_11; |
WHEN "1100" => rz_read_next <= regz_12; |
WHEN "1101" => rz_read_next <= regz_13; |
WHEN "1110" => rz_read_next <= regz_14; |
WHEN "1111" => rz_read_next <= regz_15; |
WHEN OTHERS => rz_read_next <= "XXXXXXXXXXXXXXXX"; |
WHEN "0000" => rz_read <= regz_0; |
WHEN "0001" => rz_read <= regz_1; |
WHEN "0010" => rz_read <= regz_2; |
WHEN "0011" => rz_read <= regz_3; |
WHEN "0100" => rz_read <= regz_4; |
WHEN "0101" => rz_read <= regz_5; |
WHEN "0110" => rz_read <= regz_6; |
WHEN "0111" => rz_read <= regz_7; |
WHEN "1000" => rz_read <= regz_8; |
WHEN "1001" => rz_read <= regz_9; |
WHEN "1010" => rz_read <= regz_10; |
WHEN "1011" => rz_read <= regz_11; |
WHEN "1100" => rz_read <= regz_12; |
WHEN "1101" => rz_read <= regz_13; |
WHEN "1110" => rz_read <= regz_14; |
WHEN "1111" => rz_read <= regz_15; |
WHEN OTHERS => rz_read <= "XXXXXXXXXXXXXXXX"; |
END CASE; |
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end if; |