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URL https://opencores.org/ocsvn/theia_gpu/theia_gpu/trunk

Subversion Repositories theia_gpu

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  • This comparison shows the changes necessary to convert path
    /
    from Rev 214 to Rev 215
    Reverse comparison

Rev 214 → Rev 215

/theia_gpu/branches/beta_2.0/simulation/signals/II_CurrentState.txt
0,0 → 1,7
0 STATE_AFTER_RESET
1 FETCH_INSTRUCTION
2 ISSUE_REQUEST_WITH_DATA_FWD
3 ISSUE_REQUEST
4 FIFO_UPDATE
5 ISSUE_BRANCH_OPERATION
6 UPDATE_PC_BRANCH_OPERATION
/theia_gpu/branches/beta_2.0/simulation/signals/Rstations.txt
0,0 → 1,7
1 RS_ADD0
2 RS_ADD1
3 RS_DIV
4 RS_MUL
5 RS_SQRT
6 RS_LOGIC
7 RS_IO
/theia_gpu/branches/beta_2.0/simulation/Makefile
0,0 → 1,62
 
VERILOGEX = .v # Verilog file extension
# testbench path TESTBENCH is passed from the command line
SCENEPATH =
TESTBENCH = testbench_theia_icarus
TESTBENCHPATH = ../testbench/${TESTBENCH}$(VERILOGEX)
SOURCEPATH = ../rtl
 
#iverilog CONFIG
VERILOG_CMD = iverilog
#VERILOG_FLAGS =
# VVP (iverilog runtime engine)
VVP_CMD = vvp
#VVP_FLAGS =
#Simulation Vars
SIMDIR = .
DUMPTYPE = none
 
#Viewer
WAVEFORM_VIEWER = gtkwave # Waveform viewer executable
all: compile run view
file_check:
ifeq ($(strip $(FILES)),)
@echo "FILES not set. Use FILES=value to set it. Put mutltiple files in quotes"
@exit 2
endif
testbench_check:
ifeq ($(strip $(TESTBENCH)),)
@echo "TESTBENCH not set. Use TESTBENCH=value to set it."
@exit 2
endif
check:
$(VERILOG_CMD) -t null $(FILES)
compile : testbench_check
 
cp $(SOURCEPATH)/aDefinitions.v .
 
$(VERILOG_CMD) -o $(SIMDIR)/$(TESTBENCH) $(TESTBENCHPATH) $(SOURCEPATH)/*
 
rm -f aDefinitions.v
run : testbench_check
$(VVP_CMD) -n ./$(TESTBENCH) -$(DUMPTYPE) $(VVP_FLAGS)
clean :
rm *.{mem,ppm,log}

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