URL
https://opencores.org/ocsvn/memory_cores/memory_cores/trunk
Subversion Repositories memory_cores
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- from Rev 22 to Rev 23
- ↔ Reverse comparison
Rev 22 → Rev 23
/trunk/dpmem/VECTORS.DO
0,0 → 1,118
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echo Copyright Jamil Khatib 1999 |
echo |
echo This test vector file is an open design, you can redistribute it and/or |
echo modify it under the terms of the Openip Hardware General Public |
echo License as as published by the OpenIP organization and any |
echo coming versions of this license. |
echo You can check the draft license at |
echo http://www.openip.org/oc/license.html |
echo |
echo |
echo Creator : Jamil Khatib |
echo Date 14/5/99 |
echo |
echo version 0.19990704 |
echo contact me at khatib@ieee.org |
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view source |
view signals |
view wave |
add wave * |
|
#init clk |
force clk 1 10, 0 20 -r 20 |
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# init reset |
force reset 1 0 |
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#No read nor write |
force data_in 00000000 0 |
force wr 0 0 |
force re 0 0 |
force R_add 00000000 0 |
force W_add 00000000 0 |
run 40 |
|
# write only cycles |
force data_in 00000000 0 |
force wr 1 0 |
force W_add 00000000 0 |
run 20 |
|
force data_in 00000001 0 |
force wr 1 0 |
force W_add 00000001 0 |
run 20 |
|
force data_in 00000011 0 |
force wr 1 0 |
force W_add 00000010 0 |
run 20 |
|
# Read only cycles |
force data_in 00000000 0 |
force wr 0 0 |
force re 1 0 |
force R_add 00000000 0 |
run 20 |
|
force re 1 0 |
force R_add 00000001 0 |
run 20 |
|
force re 1 0 |
force R_add 00000010 0 |
run 20 |
|
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# Read and write from different addresses |
force data_in 00000111 0 |
force W_add 00000011 0 |
force R_add 00000001 0 |
force wr 1 0 |
force re 1 0 |
run 20 |
|
# Read and write from different addresses |
force data_in 00001111 0 |
force W_add 00000100 0 |
force R_add 00000011 0 |
force wr 1 0 |
force re 1 0 |
run 20 |
|
|
# Read and Write from the same address |
force data_in 00000000 0 |
force W_add 00000010 0 |
force R_add 00000010 0 |
force wr 1 0 |
force re 1 0 |
run 20 |
|
force data_in 00000000 0 |
force W_add 00000100 0 |
force R_add 00000100 0 |
force wr 1 0 |
force re 1 0 |
run 20 |
|
# reset system during Operation |
run 10 |
force reset 0 0 |
force data_in 00000000 0 |
force W_add 00000100 0 |
force R_add 00000100 0 |
force wr 1 0 |
force re 1 0 |
run 20 |
|
force reset 1 0 |
force data_in 11111111 0 |
force W_add 00000100 0 |
force R_add 00000100 0 |
force wr 1 0 |
force re 1 0 |
run 20 |
run 20 |