OpenCores
URL https://opencores.org/ocsvn/diogenes/diogenes/trunk

Subversion Repositories diogenes

Compare Revisions

  • This comparison shows the changes necessary to convert path
    /
    from Rev 225 to Rev 226
    Reverse comparison

Rev 225 → Rev 226

/trunk/vhdl/mysio_summary.html
0,0 → 1,196
<HTML><HEAD><TITLE>Xilinx Design Summary</TITLE></HEAD>
<BODY TEXT='#000000' BGCOLOR='#FFFFFF' LINK='#0000EE' VLINK='#551A8B' ALINK='#FF0000'>
<TABLE BORDER CELLSPACING=0 WIDTH='100%'>
<TR ALIGN=CENTER BGCOLOR='#99CCFF'>
<TD COLSPAN='4'><B>RS232 Project Status</B></TD></TR>
<TR ALIGN=LEFT>
<TD BGCOLOR='#FFFF99'><B>Project File:</B></TD>
<TD>rs232.ise</TD>
<TD BGCOLOR='#FFFF99'><B>Current State:</B></TD>
<TD>Programming File Generated</TD>
</TR>
<TR ALIGN=LEFT>
<TD BGCOLOR='#FFFF99'><B>Module Name:</B></TD>
<TD>mysio</TD>
<TD BGCOLOR='#FFFF99'><UL><LI><B>Errors:</B></LI></UL></TD>
<TD ALIGN=LEFT>No Errors</TD>
</TR>
<TR ALIGN=LEFT>
<TD BGCOLOR='#FFFF99'><B>Target Device:</B></TD>
<TD>xc3s500e-4fg320</TD>
<TD BGCOLOR='#FFFF99'><UL><LI><B>Warnings:</B></LI></UL></TD>
<TD ALIGN=LEFT><A HREF_DISABLED='_xmsgs/*.xmsgs'>70 Warnings</A></TD>
</TR>
<TR ALIGN=LEFT>
<TD BGCOLOR='#FFFF99'><B>Product Version:</B></TD>
<TD>ISE 9.2i</TD>
<TD BGCOLOR='#FFFF99'><UL><LI><B>Updated:</B></LI></UL></TD>
<TD>Tue Jan 29 14:09:46 2008</TD>
</TR>
</TABLE>
 
 
 
&nbsp;<BR><TABLE BORDER CELLSPACING=0 WIDTH='100%'>
<TR ALIGN=CENTER BGCOLOR='#99CCFF'><TD COLSPAN='4'><B>RS232 Partition Summary</B></TD></TR>
<TR><TD COLSPAN='4'>No partition information was found.</TD></TR>
</TABLE>
 
 
 
&nbsp;<BR><TABLE BORDER CELLSPACING=0 WIDTH='100%'>
<TR ALIGN=CENTER BGCOLOR='#99CCFF'><TD COLSPAN='5'><B>Device Utilization Summary</B></TD></TR>
<TR ALIGN=CENTER BGCOLOR='#FFFF99'>
<TD ALIGN=LEFT><B>Logic Utilization</B></TD><TD><B>Used</B></TD><TD><B>Available</B></TD><TD><B>Utilization</B></TD><TD><B>Note(s)</B></TD>
</TR>
<TR ALIGN=RIGHT BGCOLOR='#FFFF99'><TD ALIGN=LEFT><B>Total Number Slice Registers</B></TD>
<TD ALIGN=RIGHT>413</TD>
<TD ALIGN=RIGHT>9,312</TD>
<TD ALIGN=RIGHT>4%</TD>
<TD>&nbsp;</TD>
</TR>
<TR ALIGN=RIGHT><TD ALIGN=LEFT>&nbsp;&nbsp;&nbsp;&nbsp;Number used as Flip Flops</TD>
<TD ALIGN=RIGHT>397</TD>
<TD>&nbsp;</TD>
<TD>&nbsp;</TD>
<TD>&nbsp;</TD>
</TR>
<TR ALIGN=RIGHT><TD ALIGN=LEFT>&nbsp;&nbsp;&nbsp;&nbsp;Number used as Latches</TD>
<TD ALIGN=RIGHT>16</TD>
<TD>&nbsp;</TD>
<TD>&nbsp;</TD>
<TD>&nbsp;</TD>
</TR>
<TR ALIGN=RIGHT><TD ALIGN=LEFT>Number of 4 input LUTs</TD>
<TD ALIGN=RIGHT>1,263</TD>
<TD ALIGN=RIGHT>9,312</TD>
<TD ALIGN=RIGHT>13%</TD>
<TD>&nbsp;</TD>
</TR>
<TR ALIGN=CENTER BGCOLOR='#FFFF99'>
<TD ALIGN=LEFT><B>Logic Distribution </B></TD><TD>&nbsp;</TD><TD>&nbsp;</TD><TD>&nbsp;</TD><TD>&nbsp;</TD>
</TR>
<TR ALIGN=RIGHT><TD ALIGN=LEFT>Number of occupied Slices</TD>
<TD ALIGN=RIGHT>784</TD>
<TD ALIGN=RIGHT>4,656</TD>
<TD ALIGN=RIGHT>16%</TD>
<TD>&nbsp;</TD>
</TR>
<TR ALIGN=RIGHT><TD ALIGN=LEFT>&nbsp;&nbsp;&nbsp;&nbsp;Number of Slices containing only related logic</TD>
<TD ALIGN=RIGHT>784</TD>
<TD ALIGN=RIGHT>784</TD>
<TD ALIGN=RIGHT>100%</TD>
<TD>&nbsp;</TD>
</TR>
<TR ALIGN=RIGHT><TD ALIGN=LEFT>&nbsp;&nbsp;&nbsp;&nbsp;Number of Slices containing unrelated logic</TD>
<TD ALIGN=RIGHT>0</TD>
<TD ALIGN=RIGHT>784</TD>
<TD ALIGN=RIGHT>0%</TD>
<TD>&nbsp;</TD>
</TR>
<TR ALIGN=RIGHT BGCOLOR='#FFFF99'><TD ALIGN=LEFT><B>Total Number of 4 input LUTs</B></TD>
<TD ALIGN=RIGHT>1,449</TD>
<TD ALIGN=RIGHT>9,312</TD>
<TD ALIGN=RIGHT>15%</TD>
<TD>&nbsp;</TD>
</TR>
<TR ALIGN=RIGHT><TD ALIGN=LEFT>Number used as logic</TD>
<TD ALIGN=RIGHT>1,263</TD>
<TD>&nbsp;</TD>
<TD>&nbsp;</TD>
<TD>&nbsp;</TD>
</TR>
<TR ALIGN=RIGHT><TD ALIGN=LEFT>Number used as a route-thru</TD>
<TD ALIGN=RIGHT>57</TD>
<TD>&nbsp;</TD>
<TD>&nbsp;</TD>
<TD>&nbsp;</TD>
</TR>
<TR ALIGN=RIGHT><TD ALIGN=LEFT>Number used for Dual Port RAMs</TD>
<TD ALIGN=RIGHT>128</TD>
<TD>&nbsp;</TD>
<TD>&nbsp;</TD>
<TD>&nbsp;</TD>
</TR>
<TR ALIGN=RIGHT><TD ALIGN=LEFT>Number used as Shift registers</TD>
<TD ALIGN=RIGHT>1</TD>
<TD>&nbsp;</TD>
<TD>&nbsp;</TD>
<TD>&nbsp;</TD>
</TR>
<TR ALIGN=RIGHT><TD ALIGN=LEFT>Number of bonded <A HREF_DISABLED='mysio_map.mrp?&DataKey=IOBProperties'>IOBs</A></TD>
<TD ALIGN=RIGHT>35</TD>
<TD ALIGN=RIGHT>232</TD>
<TD ALIGN=RIGHT>15%</TD>
<TD>&nbsp;</TD>
</TR>
<TR ALIGN=RIGHT><TD ALIGN=LEFT>&nbsp;&nbsp;&nbsp;&nbsp;IOB Flip Flops</TD>
<TD ALIGN=RIGHT>21</TD>
<TD>&nbsp;</TD>
<TD>&nbsp;</TD>
<TD>&nbsp;</TD>
</TR>
<TR ALIGN=RIGHT><TD ALIGN=LEFT>Number of Block RAMs</TD>
<TD ALIGN=RIGHT>7</TD>
<TD ALIGN=RIGHT>20</TD>
<TD ALIGN=RIGHT>35%</TD>
<TD>&nbsp;</TD>
</TR>
<TR ALIGN=RIGHT><TD ALIGN=LEFT>Number of GCLKs</TD>
<TD ALIGN=RIGHT>1</TD>
<TD ALIGN=RIGHT>24</TD>
<TD ALIGN=RIGHT>4%</TD>
<TD>&nbsp;</TD>
</TR>
<TR ALIGN=RIGHT BGCOLOR='#FFFF99'><TD ALIGN=LEFT><B>Total equivalent gate count for design</B></TD>
<TD ALIGN=RIGHT>479,243</TD>
<TD>&nbsp;</TD>
<TD>&nbsp;</TD>
<TD>&nbsp;</TD>
</TR>
<TR ALIGN=RIGHT><TD ALIGN=LEFT>Additional JTAG gate count for IOBs</TD>
<TD ALIGN=RIGHT>1,680</TD>
<TD>&nbsp;</TD>
<TD>&nbsp;</TD>
<TD>&nbsp;</TD>
</TR>
</TABLE>
 
 
 
&nbsp;<BR><TABLE BORDER CELLSPACING=0 WIDTH='100%'>
<TR ALIGN=CENTER BGCOLOR='#99CCFF'><TD COLSPAN='4'><B>Performance Summary</B></TD></TR>
<TR ALIGN=LEFT>
<TD BGCOLOR='#FFFF99'><B>Final Timing Score:</B></TD>
<TD>0</TD>
<TD BGCOLOR='#FFFF99'><B>Pinout Data:</B></TD>
<TD><A HREF_DISABLED='mysio.pad?&DataKey=PinoutData'>Pinout Report</A></TD>
</TR>
<TR ALIGN=LEFT>
<TD BGCOLOR='#FFFF99'><B>Routing Results:</B></TD>
<TD><A HREF_DISABLED='mysio.unroutes'>All Signals Completely Routed</A></TD>
<TD BGCOLOR='#FFFF99'><B>Clock Data:</B></TD>
<TD><A HREF_DISABLED='mysio.par?&DataKey=ClocksData'>Clock Report</A></TD>
</TR>
<TR ALIGN=LEFT>
<TD BGCOLOR='#FFFF99'><B>Timing Constraints:</B></TD>
<TD><A HREF_DISABLED='mysio.par?&DataKey=ConstraintsData'>All Constraints Met</A></TD>
<TD BGCOLOR='#FFFF99'><B>&nbsp;</B></TD>
<TD>&nbsp;</TD>
</TR>
</TABLE>
 
 
 
&nbsp;<BR><TABLE BORDER CELLSPACING=0 WIDTH='100%'>
<TR ALIGN=CENTER BGCOLOR='#99CCFF'><TD COLSPAN='6'><B>Detailed Reports</B></TD></TR>
<TR BGCOLOR='#FFFF99'><TD><B>Report Name</B></TD><TD><B>Status</B></TD><TD><B>Generated</B></TD>
<TD ALIGN=LEFT><B>Errors</B></TD><TD ALIGN=LEFT><B>Warnings</B></TD><TD ALIGN=LEFT><B>Infos</B></TD></TR>
<TR ALIGN=LEFT><TD><A HREF_DISABLED='mysio.syr'>Synthesis Report</A></TD><TD>Current</TD><TD>Mon Jan 28 21:05:02 2008</TD><TD ALIGN=LEFT>0</TD><TD ALIGN=LEFT><A HREF_DISABLED='_xmsgs/xst.xmsgs'>63 Warnings</A></TD><TD ALIGN=LEFT><A HREF_DISABLED='_xmsgs/xst.xmsgs'>25 Infos</A></TD></TR>
<TR ALIGN=LEFT><TD><A HREF_DISABLED='mysio.bld'>Translation Report</A></TD><TD>Current</TD><TD>Mon Jan 28 21:05:10 2008</TD><TD ALIGN=LEFT>0</TD><TD ALIGN=LEFT>0</TD><TD ALIGN=LEFT>0</TD></TR>
<TR ALIGN=LEFT><TD><A HREF_DISABLED='mysio_map.mrp'>Map Report</A></TD><TD>Current</TD><TD>Mon Jan 28 21:05:22 2008</TD><TD ALIGN=LEFT>0</TD><TD ALIGN=LEFT><A HREF_DISABLED='_xmsgs/map.xmsgs'>4 Warnings</A></TD><TD ALIGN=LEFT><A HREF_DISABLED='_xmsgs/map.xmsgs'>3 Infos</A></TD></TR>
<TR ALIGN=LEFT><TD><A HREF_DISABLED='mysio.par'>Place and Route Report</A></TD><TD>Current</TD><TD>Mon Jan 28 21:06:10 2008</TD><TD ALIGN=LEFT>0</TD><TD ALIGN=LEFT><A HREF_DISABLED='_xmsgs/par.xmsgs'>1 Warning</A></TD><TD ALIGN=LEFT>0</TD></TR>
<TR ALIGN=LEFT><TD><A HREF_DISABLED='mysio.twr'>Static Timing Report</A></TD><TD>Current</TD><TD>Mon Jan 28 21:06:16 2008</TD><TD ALIGN=LEFT>0</TD><TD ALIGN=LEFT>0</TD><TD ALIGN=LEFT><A HREF_DISABLED='_xmsgs/trce.xmsgs'>2 Infos</A></TD></TR>
<TR ALIGN=LEFT><TD><A HREF_DISABLED='mysio.bgn'>Bitgen Report</A></TD><TD>Current</TD><TD>Mon Jan 28 21:06:28 2008</TD><TD ALIGN=LEFT>0</TD><TD ALIGN=LEFT><A HREF_DISABLED='_xmsgs/bitgen.xmsgs'>2 Warnings</A></TD><TD ALIGN=LEFT>0</TD></TR>
</TABLE>
</BODY></HTML>
trunk/vhdl/mysio_summary.html Property changes : Added: svn:executable ## -0,0 +1 ## +* \ No newline at end of property

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.