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URL https://opencores.org/ocsvn/open8_urisc/open8_urisc/trunk

Subversion Repositories open8_urisc

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    from Rev 227 to Rev 228
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Rev 227 → Rev 228

/open8_urisc/trunk/VHDL/Open8_pkg.vhd
78,6 → 78,8
 
constant OPEN8_NULLBUS : DATA_TYPE := x"00";
 
constant Reset_Level : std_logic := '1';
 
type OPEN8_BUS_TYPE is record
Clock : std_logic;
Reset : std_logic;
89,7 → 91,16
GP_Flags : EXT_GP_FLAGS;
end record;
 
constant Reset_Level : std_logic := '1';
constant INIT_OPEN8_BUS : OPEN8_BUS_TYPE := (
'0', -- Clock
Reset_Level, -- Reset
'0', -- uSec_Tick
x"0000", -- Address
'0', -- Wr_En
OPEN8_NULLBUS, -- Wr_Data
'0', -- Rd_En
"00000" -- GP_Flags
);
 
-- Component declaration
-- (assumes a 1K RAM at 0x0000 and ROM at the top of the memory map)

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