Subversion Repositories csa

trunk/sw_sim/csa.c Property changes : Deleted: svn:executable ## -1 +0,0 ## -* \ No newline at end of property Index: trunk/modelsim6.2b/csa.cr.mti =================================================================== --- trunk/modelsim6.2b/csa.cr.mti (revision 23) +++ trunk/modelsim6.2b/csa.cr.mti (nonexistent) @@ -1 +0,0 @@ - Index: trunk/modelsim6.2b/stream_cypher.do =================================================================== --- trunk/modelsim6.2b/stream_cypher.do (revision 23) +++ trunk/modelsim6.2b/stream_cypher.do (nonexistent) @@ -1,91 +0,0 @@ - -quit -sim - - vlib work - -puts { - ModelSimSE general compile script version 1.1 - Copyright (c) Doulos June 2004, SD -} - -# Simply change the project settings in this section -# for each new project. There should be no need to -# modify the rest of the script. - -set library_file_list { - design_library { - ../rtl/stream_cypher.v - ../rtl/stream_iteration.v - ../rtl/stream_8bytes.v - ../rtl/sboxes.v - ../rtl/sbox1.v - ../rtl/sbox2.v - ../rtl/sbox3.v - ../rtl/stream_byte.v - ../rtl/sbox4.v - ../rtl/sbox5.v - ../rtl/sbox6.v - ../rtl/sbox7.v - } - - test_library { - ../bench/stream_cypher_tb.v - ../bench/decrypt_tb.v - } -} -set top_level work.stream_cypher_tb - -set wave_radices { - hexadecimal {data q} -} - - -# After sourcing the script from ModelSim for the -# first time use these commands to recompile. - -proc r {} {uplevel #0 source compile.tcl} -proc rr {} {global last_compile_time - set last_compile_time 0 - r } - proc q {} {quit -force } - -#Does this installation support Tk? -set tk_ok 1 -if [catch {package require Tk}] {set tk_ok 0} - -# Prefer a fixed point font for the transcript -set PrefMain(font) {Courier 10 roman normal} - -# Compile out of date files -set time_now [clock seconds] -if [catch {set last_compile_time}] { - set last_compile_time 0 -} -foreach {library file_list} $library_file_list { - vmap work work - foreach file $file_list { - if { $last_compile_time < [file mtime $file] } { - if [regexp {.vhdl?$} $file] { - vcom -93 $file - } else { - vlog $file - } - set last_compile_time 0 - } - } -} -set last_compile_time $time_now - -# Load the simulation -vsim $top_level -pli ../bench/csa_pli.sl - - -add wave -r /* - -radix -hexadecimal - -# Run the simulation -run -all - - - Index: trunk/modelsim6.2b/csa.mpf =================================================================== --- trunk/modelsim6.2b/csa.mpf (revision 23) +++ trunk/modelsim6.2b/csa.mpf (nonexistent) @@ -1,792 +0,0 @@ -; Copyright 2006 Mentor Graphics Corporation -; -; All Rights Reserved. -; -; THIS WORK CONTAINS TRADE SECRET AND PROPRIETARY INFORMATION WHICH IS THE PROPERTY OF -; MENTOR GRAPHICS CORPORATION OR ITS LICENSORS AND IS SUBJECT TO LICENSE TERMS. -; - -[Library] -std = $MODEL_TECH/../std -ieee = $MODEL_TECH/../ieee -verilog = $MODEL_TECH/../verilog -vital2000 = $MODEL_TECH/../vital2000 -std_developerskit = $MODEL_TECH/../std_developerskit -synopsys = $MODEL_TECH/../synopsys -modelsim_lib = $MODEL_TECH/../modelsim_lib -sv_std = $MODEL_TECH/../sv_std -;vhdl_psl_checkers = $MODEL_TECH/../vhdl_psl_checkers // Source files only for this release -;verilog_psl_checkers = $MODEL_TECH/../verilog_psl_checkers // Source files only for this release - -work = work -[vcom] -; VHDL93 variable selects language version as the default. -; Default is VHDL-2002. -; Value of 0 or 1987 for VHDL-1987. -; Value of 1 or 1993 for VHDL-1993. -; Default or value of 2 or 2002 for VHDL-2002. -VHDL93 = 2002 - -; Show source line containing error. Default is off. -; Show_source = 1 - -; Turn off unbound-component warnings. Default is on. -; Show_Warning1 = 0 - -; Turn off process-without-a-wait-statement warnings. Default is on. -; Show_Warning2 = 0 - -; Turn off null-range warnings. Default is on. -; Show_Warning3 = 0 - -; Turn off no-space-in-time-literal warnings. Default is on. -; Show_Warning4 = 0 - -; Turn off multiple-drivers-on-unresolved-signal warnings. Default is on. -; Show_Warning5 = 0 - -; Turn off optimization for IEEE std_logic_1164 package. Default is on. -; Optimize_1164 = 0 - -; Turn on resolving of ambiguous function overloading in favor of the -; "explicit" function declaration (not the one automatically created by -; the compiler for each type declaration). Default is off. -; The .ini file has Explicit enabled so that std_logic_signed/unsigned -; will match the behavior of synthesis tools. -Explicit = 1 - -; Turn off acceleration of the VITAL packages. Default is to accelerate. -; NoVital = 1 - -; Turn off VITAL compliance checking. Default is checking on. -; NoVitalCheck = 1 - -; Ignore VITAL compliance checking errors. Default is to not ignore. -; IgnoreVitalErrors = 1 - -; Turn off VITAL compliance checking warnings. Default is to show warnings. -; Show_VitalChecksWarnings = 0 - -; Turn off PSL assertion warning messages. Default is to show warnings. -; Show_PslChecksWarnings = 0 - -; Enable parsing of embedded PSL assertions. Default is enabled. -; EmbeddedPsl = 0 - -; Keep silent about case statement static warnings. -; Default is to give a warning. -; NoCaseStaticError = 1 - -; Keep silent about warnings caused by aggregates that are not locally static. -; Default is to give a warning. -; NoOthersStaticError = 1 - -; Treat as errors: -; case statement static warnings -; warnings caused by aggregates that are not locally static -; Overrides NoCaseStaticError, NoOthersStaticError settings. -; PedanticErrors = 1 - -; Turn off inclusion of debugging info within design units. -; Default is to include debugging info. -; NoDebug = 1 - -; Turn off "Loading..." messages. Default is messages on. -; Quiet = 1 - -; Turn on some limited synthesis rule compliance checking. Checks only: -; -- signals used (read) by a process must be in the sensitivity list -; CheckSynthesis = 1 - -; Activate optimizations on expressions that do not involve signals, -; waits, or function/procedure/task invocations. Default is off. -; ScalarOpts = 1 - -; Turns on lint-style checking. -; Show_Lint = 1 - -; Require the user to specify a configuration for all bindings, -; and do not generate a compile time default binding for the -; component. This will result in an elaboration error of -; 'component not bound' if the user fails to do so. Avoids the rare -; issue of a false dependency upon the unused default binding. -; RequireConfigForAllDefaultBinding = 1 - -; Perform default binding at compile time. -; Default is to do default binding at load time. -; BindAtCompile=1; - -; Inhibit range checking on subscripts of arrays. Range checking on -; scalars defined with subtypes is inhibited by default. -; NoIndexCheck = 1 - -; Inhibit range checks on all (implicit and explicit) assignments to -; scalar objects defined with subtypes. -; NoRangeCheck = 1 - -; Run the 0in tools from within the simulator. -; Default value set to 0. Please set it to 1 to invoke 0in. -; VcomZeroIn = 1 - -; Set the options to be passed to the 0in tools. -; Default value set to "". Please set it to appropriate options needed. -; VcomZeroInOptions = "" - -; Turn off code coverage in VHDL subprograms. Default is on. -; CoverageNoSub = 0 - -; Automatically exclude VHDL case statement default branches. -; Default is to not exclude. -; CoverExcludeDefault = 1 - -; Turn on code coverage in VHDL generate blocks. Default is off. -; CoverGenerate = 1 - -; Use this directory for compiler temporary files instead of "work/_temp" -; CompilerTempDir = /tmp - -[vlog] - -; Turn off inclusion of debugging info within design units. -; Default is to include debugging info. -; NoDebug = 1 - -; Turn on `protect compiler directive processing. -; Default is to ignore `protect directives. -; Protect = 1 - -; Turn off "Loading..." messages. Default is messages on. -; Quiet = 1 - -; Turn on Verilog hazard checking (order-dependent accessing of global vars). -; Default is off. -; Hazard = 1 - -; Turn on converting regular Verilog identifiers to uppercase. Allows case -; insensitivity for module names. Default is no conversion. -; UpCase = 1 - -; Activate optimizations on expressions that do not involve signals, -; waits, or function/procedure/task invocations. Default is off. -; ScalarOpts = 1 - -; Turns on lint-style checking. -; Show_Lint = 1 - -; Show source line containing error. Default is off. -; Show_source = 1 - -; Turn on bad option warning. Default is off. -; Show_BadOptionWarning = 1 - -; Revert back to IEEE 1364-1995 syntax, default is 0 (off). -vlog95compat = 0 - -; Turn off PSL warning messages. Default is to show warnings. -; Show_PslChecksWarnings = 0 - -; Enable parsing of embedded PSL assertions. Default is enabled. -; EmbeddedPsl = 0 - -; Set the threshold for automatically identifying sparse Verilog memories. -; A memory with depth equal to or more than the sparse memory threshold gets -; marked as sparse automatically, unless specified otherwise in source code. -; The default is 0 (i.e. no memory is automatically given sparse status) -; SparseMemThreshold = 1048576 - -; Set the maximum number of iterations permitted for a generate loop. -; Restricting this permits the implementation to recognize infinite -; generate loops. -; GenerateLoopIterationMax = 100000 - -; Set the maximum depth permitted for a recursive generate instantiation. -; Restricting this permits the implementation to recognize infinite -; recursions. -; GenerateRecursionDepthMax = 200 - -; Run the 0in tools from within the simulator. -; Default value set to 0. Please set it to 1 to invoke 0in. -; VlogZeroIn = 1 - -; Set the options to be passed to the 0in tools. -; Default value set to "". Please set it to appropriate options needed. -; VlogZeroInOptions = "" - -; Run the 0in tools from within the simulator. -; Default value set to 0. Please set it to 1 to invoke 0in. -; VoptZeroIn = 1 - -; Set the options to be passed to the 0in tools. -; Default value set to "". Please set it to appropriate options needed. -; VoptZeroInOptions = "" - -; Set the option to treat all files specified in a vlog invocation as a -; single compilation unit. The default value is set to 0 which will treat -; each file as a separate compilation unit as specified in the P1800 draft standard. -; MultiFileCompilationUnit = 1 - -; Automatically exclude Verilog case statement default branches. -; Default is to not exclude. -; CoverExcludeDefault = 1 - -; Turn on code coverage in VLOG generate blocks. Default is off. -; CoverGenerate = 1 - -[sccom] -; Enable use of SCV include files and library. Default is off. -; UseScv = 1 - -; Add C++ compiler options to the sccom command line by using this variable. -; CppOptions = -g - -; Use custom C++ compiler located at this path rather than the default path. -; The path should point directly at a compiler executable. -; CppPath = /usr/bin/g++ - -; Enable verbose messages from sccom. Default is off. -; SccomVerbose = 1 - -; sccom logfile. Default is no logfile. -; SccomLogfile = sccom.log - -; Enable use of SC_MS include files and library. Default is off. -; UseScMs = 1 - -[vsim] - -; vopt flow -; Set to turn on automatic optimization of a design. -; Default is on -VoptFlow = 1 - -; vopt automatic SDF -; If automatic design optimization is on, enables automatic compilation -; of SDF files. -; Default is on, uncomment to turn off. -; VoptAutoSDFCompile = 0 - -; Simulator resolution -; Set to fs, ps, ns, us, ms, or sec with optional prefix of 1, 10, or 100. -resolution = 1ns - -; User time unit for run commands -; Set to default, fs, ps, ns, us, ms, or sec. The default is to use the -; unit specified for Resolution. For example, if Resolution is 100ps, -; then UserTimeUnit defaults to ps. -; Should generally be set to default. -UserTimeUnit = default - -; Default run length -RunLength = 5 ns - -; Maximum iterations that can be run without advancing simulation time -IterationLimit = 5000 - -; Control PSL and Verilog Assume directives during simulation -; Set SimulateAssumeDirectives = 0 to disable assume being simulated as asserts -; Set SimulateAssumeDirectives = 1 to enable assume simulation as asserts -; SimulateAssumeDirectives = 1 - -; Control the simulation of PSL and SVA -; These switches can be overridden by the vsim command line switches: -; -psl, -nopsl, -sva, -nosva. -; Set SimulatePSL = 0 to disable PSL simulation -; Set SimulatePSL = 1 to enable PSL simulation (default) -; SimulatePSL = 1 -; Set SimulateSVA = 0 to disable SVA simulation -; Set SimulateSVA = 1 to enable concurrent SVA simulation (default) -; SimulateSVA = 1 - -; Directives to license manager can be set either as single value or as -; space separated multi-values: -; vhdl Immediately reserve a VHDL license -; vlog Immediately reserve a Verilog license -; plus Immediately reserve a VHDL and Verilog license -; nomgc Do not look for Mentor Graphics Licenses -; nomti Do not look for Model Technology Licenses -; noqueue Do not wait in the license queue when a license is not available -; viewsim Try for viewer license but accept simulator license(s) instead -; of queuing for viewer license (PE ONLY) -; noviewer Disable checkout of msimviewer and vsim-viewer license -; features (PE ONLY) -; noslvhdl Disable checkout of qhsimvh and vsim license features -; noslvlog Disable checkout of qhsimvl and vsimvlog license features -; nomix Disable checkout of msimhdlmix and hdlmix license features -; nolnl Disable checkout of msimhdlsim and hdlsim license features -; mixedonly Disable checkout of qhsimvh,qhsimvl,vsim,vsimvlog license -; features -; lnlonly Disable checkout of qhsimvh,qhsimvl,vsim,vsimvlog,msimhdlmix, -; hdlmix license features -; Single value: -; License = plus -; Multi-value: -; License = noqueue plus - -; Stop the simulator after a VHDL/Verilog immediate assertion message -; 0 = Note 1 = Warning 2 = Error 3 = Failure 4 = Fatal -BreakOnAssertion = 4 - -; VHDL assertion Message Format -; %S - Severity Level -; %R - Report Message -; %T - Time of assertion -; %D - Delta -; %I - Instance or Region pathname (if available) -; %i - Instance pathname with process -; %O - Process name -; %K - Kind of object path is to return: Instance, Signal, Process or Unknown -; %P - Instance or Region path without leaf process -; %F - File -; %L - Line number of assertion or, if assertion is in a subprogram, line -; from which the call is made -; %% - Print '%' character -; If specific format for assertion level is defined, use its format. -; If specific format is not defined for assertion level: -; - and if failure occurs during elaboration, use AssertionFormatBreakLine; -; - and if assertion triggers a breakpoint (controlled by BreakOnAssertion -; level), use AssertionFormatBreak; -; - otherwise, use AssertionFormat. -; AssertionFormatBreakLine = "** %S: %R\n Time: %T Iteration: %D %K: %i File: %F Line: %L\n" -; AssertionFormatBreak = "** %S: %R\n Time: %T Iteration: %D %K: %i File: %F\n" -; AssertionFormat = "** %S: %R\n Time: %T Iteration: %D%I\n" -; AssertionFormatNote = "** %S: %R\n Time: %T Iteration: %D%I\n" -; AssertionFormatWarning = "** %S: %R\n Time: %T Iteration: %D%I\n" -; AssertionFormatError = "** %S: %R\n Time: %T Iteration: %D %K: %i File: %F\n" -; AssertionFormatFail = "** %S: %R\n Time: %T Iteration: %D %K: %i File: %F\n" -; AssertionFormatFatal = "** %S: %R\n Time: %T Iteration: %D %K: %i File: %F\n" - -; Assertion File - alternate file for storing VHDL/PSL/Verilog assertion messages -; AssertFile = assert.log - - -; Simulation Breakpoint messages -; This flag controls the display of function names when reporting the location -; where the simulator stops do to a breakpoint or fatal error. -; Example w/function name: # Break in Process ctr at counter.vhd line 44 -; Example wo/function name: # Break at counter.vhd line 44 -ShowFunctions = 1 - - -; Default radix for all windows and commands. -; Set to symbolic, ascii, binary, octal, decimal, hex, unsigned -DefaultRadix = hexadecimal - -; VSIM Startup command -; Startup = do startup.do - -; File for saving command transcript -TranscriptFile = transcript - -; File for saving command history -; CommandHistory = cmdhist.log - -; Specify whether paths in simulator commands should be described -; in VHDL or Verilog format. -; For VHDL, PathSeparator = / -; For Verilog, PathSeparator = . -; Must not be the same character as DatasetSeparator. -PathSeparator = / - -; Specify the dataset separator for fully rooted contexts. -; The default is ':'. For example: sim:/top -; Must not be the same character as PathSeparator. -DatasetSeparator = : - -; Specify a unique path separator for the Signal Spy set of functions. -; The default will be to use the PathSeparator variable. -; Must not be the same character as DatasetSeparator. -; SignalSpyPathSeparator = / - -; Disable VHDL assertion messages -; IgnoreNote = 1 -; IgnoreWarning = 1 -; IgnoreError = 1 -; IgnoreFailure = 1 - -; Disable System Verilog assertion messages -; Info and Warning are disabled by default -; IgnoreSVAInfo = 0 -; IgnoreSVAWarning = 0 -; IgnoreSVAError = 1 -; IgnoreSVAFatal = 1 - -; Default force kind. May be freeze, drive, deposit, or default -; or in other terms, fixed, wired, or charged. -; A value of "default" will use the signal kind to determine the -; force kind, drive for resolved signals, freeze for unresolved signals -; DefaultForceKind = freeze - -; If zero, open files when elaborated; otherwise, open files on -; first read or write. Default is 0. -; DelayFileOpen = 1 - -; Control VHDL files opened for write. -; 0 = Buffered, 1 = Unbuffered -UnbufferedOutput = 0 - -; Control the number of VHDL files open concurrently. -; This number should always be less than the current ulimit -; setting for max file descriptors. -; 0 = unlimited -ConcurrentFileLimit = 40 - -; Control the number of hierarchical regions displayed as -; part of a signal name shown in the Wave window. -; A value of zero tells VSIM to display the full name. -; The default is 0. -; WaveSignalNameWidth = 0 - -; Turn off warnings when changing VHDL constants and generics -; Default is 1 to generate warning messages -; WarnConstantChange = 0 - -; Turn off warnings from the std_logic_arith, std_logic_unsigned -; and std_logic_signed packages. -; StdArithNoWarnings = 1 - -; Turn off warnings from the IEEE numeric_std and numeric_bit packages. -; NumericStdNoWarnings = 1 - -; Control the format of the (VHDL) FOR generate statement label -; for each iteration. Do not quote it. -; The format string here must contain the conversion codes %s and %d, -; in that order, and no other conversion codes. The %s represents -; the generate_label; the %d represents the generate parameter value -; at a particular generate iteration (this is the position number if -; the generate parameter is of an enumeration type). Embedded whitespace -; is allowed (but discouraged); leading and trailing whitespace is ignored. -; Application of the format must result in a unique scope name over all -; such names in the design so that name lookup can function properly. -; GenerateFormat = %s__%d - -; Specify whether checkpoint files should be compressed. -; The default is 1 (compressed). -; CheckpointCompressMode = 0 - -; Specify whether to enable SystemVerilog DPI out-of-the-blue call. -; Out-of-the-blue call refers to a SystemVerilog export function call -; directly from a C function that don't have the proper context setup -; as done in DPI-C import C functions. When this is enabled, one can -; call a DPI export function (but not task) from any C code. -; The default is 0 (disabled). -; DpiOutOfTheBlue = 1 - -; List of dynamically loaded objects for Verilog PLI applications -; Veriuser = veriuser.sl - -; Specify default options for the restart command. Options can be one -; or more of: -force -nobreakpoint -nolist -nolog -nowave -noassertions -; DefaultRestartOptions = -force - -; HP-UX 10.20 ONLY - Enable memory locking to speed up large designs -; (> 500 megabyte memory footprint). Default is disabled. -; Specify number of megabytes to lock. -; LockedMemory = 1000 - -; HP-UX 11.00 ONLY - Use /usr/lib/libCsup_v2.sl for shared object loading. -; This is necessary when C++ files have been compiled with aCC's -AA option. -; The default behavior is to use /usr/lib/libCsup.sl. -; UseCsupV2 = 1 - -; Turn on (1) or off (0) WLF file compression. -; The default is 1 (compress WLF file). -; WLFCompress = 0 - -; Specify whether to save all design hierarchy (1) in the WLF file -; or only regions containing logged signals (0). -; The default is 0 (save only regions with logged signals). -; WLFSaveAllRegions = 1 - -; WLF file time limit. Limit WLF file by time, as closely as possible, -; to the specified amount of simulation time. When the limit is exceeded -; the earliest times get truncated from the file. -; If both time and size limits are specified the most restrictive is used. -; UserTimeUnits are used if time units are not specified. -; The default is 0 (no limit). Example: WLFTimeLimit = {100 ms} -; WLFTimeLimit = 0 - -; WLF file size limit. Limit WLF file size, as closely as possible, -; to the specified number of megabytes. If both time and size limits -; are specified then the most restrictive is used. -; The default is 0 (no limit). -; WLFSizeLimit = 1000 - -; Specify whether or not a WLF file should be deleted when the -; simulation ends. A value of 1 will cause the WLF file to be deleted. -; The default is 0 (do not delete WLF file when simulation ends). -; WLFDeleteOnQuit = 1 - -; Specify whether or not a WLF file should be optimized during -; simulation. If set to 0, the WLF file will not be optimized. -; The default is 1, optimize the WLF file. -; WLFOptimize = 0 - -; Specify the name of the WLF file. -; The default is vsim.wlf -; WLFFilename = vsim.wlf - -; WLF reader cache size limit. Specifies the internal WLF file cache size, -; in megabytes, for EACH open WLF file. A value of 0 turns off the -; WLF cache. -; The default setting is enabled to 256M per open WLF file. -; WLFCacheSize = 1000 - -; Specify the WLF file event collapse mode. -; 0 = Preserve all events and event order. (same as -wlfnocollapse) -; 1 = Only record values of logged objects at the end of a simulator iteration. -; (same as -wlfcollapsedelta) -; 2 = Only record values of logged objects at the end of a simulator time step. -; (same as -wlfcollapsetime) -; The default is 1. -; WLFCollapseMode = 0 - -; Turn on/off undebuggable SystemC type warnings. Default is on. -; ShowUndebuggableScTypeWarning = 0 - -; Turn on/off unassociated SystemC name warnings. Default is off. -; ShowUnassociatedScNameWarning = 1 - -; Set SystemC default time unit. -; Set to fs, ps, ns, us, ms, or sec with optional -; prefix of 1, 10, or 100. The default is 1 ns. -; The ScTimeUnit value is honored if it is coarser than Resolution. -; If ScTimeUnit is finer than Resolution, it is set to the value -; of Resolution. For example, if Resolution is 100ps and ScTimeUnit is ns, -; then the default time unit will be 1 ns. However if Resolution -; is 10 ns and ScTimeUnit is ns, then the default time unit will be 10 ns. -ScTimeUnit = ns - -; Set the SCV relationship name that will be used to identify phase -; relations. If the name given to a transactor relation matches this -; name, the transactions involved will be treated as phase transactions -ScvPhaseRelationName = mti_phase - - -; Do not exit when executing sc_stop(). -; If this is enabled, the control will be returned to the user before exiting -; the simulation. This can make some cleanup tasks easier before kernel exits. -; The default is off. -; NoExitOnScStop = 1 - -; Run simulator in assertion debug mode. Default is off. -; AssertionDebug = 1 - -; Turn on/off PSL/SVA concurrent assertion pass enable. Default is on. -; AssertionPassEnable = 0 - -; Turn on/off PSL/SVA concurrent assertion fail enable. Default is on. -; AssertionFailEnable = 0 - -; Set PSL/SVA concurrent assertion pass limit. Default is -1. -; Any positive integer, -1 for infinity. -; AssertionPassLimit = 1 - -; Set PSL/SVA concurrent assertion fail limit. Default is -1. -; Any positive integer, -1 for infinity. -; AssertionFailLimit = 1 - -; Turn on/off PSL concurrent assertion pass log. Default is off. -; The flag does not affect SVA -; AssertionPassLog = 1 - -; Turn on/off PSL concurrent assertion fail log. Default is on. -; The flag does not affect SVA -; AssertionFailLog = 0 - -; Set action type for PSL/SVA concurrent assertion fail action. Default is continue. -; 0 = Continue 1 = Break 2 = Exit -; AssertionFailAction = 1 - -; Turn on/off code coverage -; CodeCoverage = 0 - -; Count all code coverage condition and expression truth table rows that match. -; CoverCountAll = 1 - -; Turn on/off all PSL/SVA cover directive enables. Default is on. -; CoverEnable = 0 - -; Turn on/off PSL/SVA cover log. Default is off. -; CoverLog = 1 - -; Set "at_least" value for all PSL/SVA cover directives. Default is 1. -; CoverAtLeast = 2 - -; Set "limit" value for all PSL/SVA cover directives. Default is -1. -; Any positive integer, -1 for infinity. -; CoverLimit = 1 - -; Specify the coverage database filename. Default is "" (i.e. database is NOT automatically saved on close). -; UCDBFilename = vsim.ucdb - -; Set weight for all PSL/SVA cover directives. Default is 1. -; CoverWeight = 2 - -; Check vsim plusargs. Default is 0 (off). -; 0 = Don't check plusargs -; 1 = Warning on unrecognized plusarg -; 2 = Error and exit on unrecognized plusarg -; CheckPlusargs = 1 - -; Load the specified shared objects with the RTLD_GLOBAL flag. -; This gives global visibility to all symbols in the shared objects, -; meaning that subsequently loaded shared objects can bind to symbols -; in the global shared objects. The list of shared objects should -; be whitespace delimited. This option is not supported on the -; Windows or AIX platforms. -; GlobalSharedObjectList = example1.so example2.so example3.so - -; Run the 0in tools from within the simulator. -; Default value set to 0. Please set it to 1 to invoke 0in. -; VsimZeroIn = 1 - -; Set the options to be passed to the 0in tools. -; Default value set to "". Please set it to appropriate options needed. -; VsimZeroInOptions = "" - -; Initial seed for the Random Number Generator (RNG) of the root thread (SystemVerilog). -; Sv_Seed = 0 - -; Maximum size of dynamic arrays that are resized during randomize(). -; The default is 1000. A value of 0 indicates no limit. -; SolveArrayResizeMax = 1000 - -; Error message severity when randomize() failure is detected (SystemVerilog). -; The default is 0 (no error). -; 0 = No error 1 = Warning 2 = Error 3 = Failure 4 = Fatal -; SolveFailSeverity = 0 - -; Enable/disable debug information for randomize() failures (SystemVerilog). -; The default is 0 (disabled). Set to 1 to enable. -; SolveFailDebug = 0 - -; When SolveFailDebug is enabled, this value specifies the maximum number of -; constraint subsets that will be tested for conflicts. -; The default is 0 (no limit). -; SolveFailDebugLimit = 0 - -; When SolveFailDebug is eanbled, this value specifies the maximum size of -; constraint subsets that will be tested for conflicts. -; The default value is 0 (no limit). -; SolveFailDebugMaxSet = 0 - -; Specify random sequence compatiblity with a prior letter release. This -; option is used to get the same random sequences during simulation as -; as a prior letter release. Only prior letter releases (of the current -; number release) are allowed. -; Note: To achieve the same random sequences, solver optimizations and/or -; bug fixes introduced since the specified release may be disabled - -; yielding the performance / behavior of the prior release. -; Default value set to "" (random compatibility not required). -; SolveRev = "" - -; Environment variable expansion of command line arguments has been depricated -; in favor shell level expansion. Universal environment variable expansion -; inside -f files is support and continued support for MGC Location Maps provide -; alternative methods for handling flexible pathnames. -; The following line may be uncommented and the value set to 1 to re-enable this -; deprecated behavior. The default value is 0. -; DeprecatedEnvironmentVariableExpansion = 0 - -; Retroactive Recording uses a limited number of private data channels in the WLF -; file. Too many channels degrade WLF performance. If the limit is reached, -; simulation ends with a fatal error. You may change this limit as needed, but be -; aware of the implications of too many channels. The value must be an integer -; greater than or equal to zero, where zero disables all retroactive recording. -; RetroChannelLimit = 20 - -; Options to give vopt when code coverage is turned on. -; Default is "+acc=lprnb -opt=-merge -opt=-suppressAlways" -; VoptCoverageOptions = +acc=lprnb -opt=-merge -opt=-suppressAlways - -DelayFileOpen = 1 -[lmc] -; The simulator's interface to Logic Modeling's SmartModel SWIFT software -libsm = $MODEL_TECH/libsm.sl -; The simulator's interface to Logic Modeling's SmartModel SWIFT software (Windows NT) -; libsm = $MODEL_TECH/libsm.dll -; Logic Modeling's SmartModel SWIFT software (HP 9000 Series 700) -; libswift = $LMC_HOME/lib/hp700.lib/libswift.sl -; Logic Modeling's SmartModel SWIFT software (IBM RISC System/6000) -; libswift = $LMC_HOME/lib/ibmrs.lib/swift.o -; Logic Modeling's SmartModel SWIFT software (Sun4 Solaris) -; libswift = $LMC_HOME/lib/sun4Solaris.lib/libswift.so -; Logic Modeling's SmartModel SWIFT software (Windows NT) -; libswift = $LMC_HOME/lib/pcnt.lib/libswift.dll -; Logic Modeling's SmartModel SWIFT software (Linux) -; libswift = $LMC_HOME/lib/x86_linux.lib/libswift.so - -; The simulator's interface to Logic Modeling's hardware modeler SFI software -libhm = $MODEL_TECH/libhm.sl -; The simulator's interface to Logic Modeling's hardware modeler SFI software (Windows NT) -; libhm = $MODEL_TECH/libhm.dll -; Logic Modeling's hardware modeler SFI software (HP 9000 Series 700) -; libsfi = /lib/hp700/libsfi.sl -; Logic Modeling's hardware modeler SFI software (IBM RISC System/6000) -; libsfi = /lib/rs6000/libsfi.a -; Logic Modeling's hardware modeler SFI software (Sun4 Solaris) -; libsfi = /lib/sun4.solaris/libsfi.so -; Logic Modeling's hardware modeler SFI software (Windows NT) -; libsfi = /lib/pcnt/lm_sfi.dll -; Logic Modeling's hardware modeler SFI software (Linux) -; libsfi = /lib/linux/libsfi.so - -[msg_system] -; Change a message severity or suppress a message. -; The format is: = [,...] -; Examples: -; note = 3009 -; warning = 3033 -; error = 3010,3016 -; fatal = 3016,3033 -; suppress = 3009,3016,3043 -; The command verror can be used to get the complete -; description of a message. - -; Control transcripting of elaboration/runtime messages. -; The default is to have messages appear in the transcript and -; recorded in the wlf file (messages that are recorded in the -; wlf file can be viewed in the MsgViewer). The other settings -; are to send messages only to the transcript or only to the -; wlf file. The valid values are -; both {default} -; tran {transcript only} -; wlf {wlf file only} -; msgmode = both -[Project] -Project_Version = 6 -Project_DefaultLib = work -Project_SortMethod = unused -Project_Files_Count = 0 -Project_Sim_Count = 0 -Project_Folder_Count = 0 -Echo_Compile_Output = 0 -Save_Compile_Report = 1 -Project_Opt_Count = 0 -ForceSoftPaths = 0 -ReOpenSourceFiles = 1 -VERILOG_DoubleClick = Edit -VERILOG_CustomDoubleClick = -VHDL_DoubleClick = Edit -VHDL_CustomDoubleClick = -PSL_DoubleClick = Edit -PSL_CustomDoubleClick = -TEXT_DoubleClick = Edit -TEXT_CustomDoubleClick = -SYSTEMC_DoubleClick = Edit -SYSTEMC_CustomDoubleClick = -TCL_DoubleClick = Edit -TCL_CustomDoubleClick = -MACRO_DoubleClick = Edit -MACRO_CustomDoubleClick = -VCD_DoubleClick = Edit -VCD_CustomDoubleClick = -SDF_DoubleClick = Edit -SDF_CustomDoubleClick = -XML_DoubleClick = Edit -XML_CustomDoubleClick = -LOGFILE_DoubleClick = Edit -LOGFILE_CustomDoubleClick = -EditorState = {tabbed horizontal 1} {/mnt/win_f/work/csa/csa/bench/decrypt_tb.v 0 1} -Project_Major_Version = 6 -Project_Minor_Version = 2 Index: trunk/decrypted =================================================================== --- trunk/decrypted (revision 23) +++ trunk/decrypted (nonexistent) @@ -1,204 +0,0 @@ -ff -ff -ff -ff -ff -ff -ff -ff -ff -ff -ff -ff -ff -ff -ff -ff -ff -ff -ff -ff -ff -ff -ff -ff -ff -ff -ff -ff -ff -ff -ff -ff -ff -ff -ff -ff -ff -ff -ff -ff -ff -ff -ff -ff -ff -ff -ff -ff -ff -ff -ff -ff -ff -ff -ff -ff -ff -ff -ff -ff -ff -ff -ff -ff -ff -ff -ff -ff -ff -ff -ff -ff -ff -ff -ff -ff -ff -ff -ff -ff -ff -ff -ff -ff -ff -ff -ff -ff -ff -ff -ff -ff -ff -ff -ff -ff -ff -ff -ff -ff -ff -ff -ff -ff -ff -ff -ff -ff -ff -ff -ff -ff -ff -ff -ff -ff -ff -ff -ff -ff -ff -ff -ff -ff -ff -ff -ff -ff -ff -ff -ff -ff -ff -ff -ff -ff -ff -ff -ff -ff -ff -ff -ff -ff -ff -ff -ff -ff -ff -ff -ff -ff -ff -ff -ff -ff -ff -ff -ff -ff -ff -ff -ff -ff -ff -ff -ff -ff -ff -ff -ff -ff -ff -ff -ff -ff -ff -ff -ff -ff -ff -ff -ff -ff -ff -ff -ff -ff -ff -ff -ff -ff -ff -ff -ff -ff -ff -ff -ff -ff -90 -00 -00 -47 Index: csa/trunk/bench/key_computer_tb.v =================================================================== --- csa/trunk/bench/key_computer_tb.v (nonexistent) +++ csa/trunk/bench/key_computer_tb.v (revision 24) @@ -0,0 +1,248 @@ + +`timescale 1ns/100ps + +// this is a testbench for key_computer module +// author: Simon panti +// mengxipeng@gmail.com +// refer: +// cas.cpp in vlc opensource project + +module key_computer_tb; + + // test 100 times + reg [63:0 ] cw [0:99]; // input cws + reg [447:0] key_except [0:99]; // output keys + + // test variables + reg [63:0 ] cwt; + wire [447:0] key; + + + // loop var + integer i; + + initial + begin + // test data, + cw [ 0] = 64'h1b_81_ec_85_1f_54_1a_45; + key_except[ 0] = 448'h1d_87_ea_83_19_52_1c_43_f5_ef_9e_16_47_3f_02_24_7f_05_08_8e_e1_8e_f6_5c_25_65_d5_52_37_04_08_71_6b_0b_0c_37_a8_22_df_8c_ca_d7_56_c9_59_63_39_21_9e_62_22_28_a3_b4_c5_3c; + cw [ 1] = 64'h40_0c_e3_5a_f3_58_08_0f; + key_except[ 1] = 448'h46_0a_e5_5c_f5_5e_0e_09_0f_85_cd_67_4b_b9_39_50_90_dc_0c_bf_42_2f_05_76_52_33_23_1e_6e_05_b1_d9_e4_49_e3_13_3a_46_18_11_e3_49_1d_05_0a_b9_7c_0a_87_44_c7_8a_c9_2b_21_48; + cw [ 2] = 64'ha9_fc_0e_65_ac_24_42_07; + key_except[ 2] = 448'haf_fa_08_63_aa_22_44_01_fd_9a_22_6c_0c_0f_2d_29_da_94_f2_24_25_a0_e6_61_3d_9f_a9_1f_90_0a_88_22_3b_02_af_46_52_2c_b5_e7_24_cb_0e_b9_31_cb_87_70_38_32_06_94_30_9f_fc_4a; + cw [ 3] = 64'h4a_f8_fb_80_36_70_1f_ac; + key_except[ 3] = 448'h4c_fe_fd_86_30_76_19_aa_3e_e4_6d_8e_c7_f7_a8_2c_51_27_50_ce_72_3b_87_3d_20_28_51_2c_f5_0f_cd_d1_6a_1d_17_d3_dc_66_6f_50_c6_2d_37_f8_c9_b1_75_37_ce_f7_02_ee_89_05_b1_17; + cw [ 4] = 64'h2b_6a_e8_6c_d2_fa_e8_9e; + key_except[ 4] = 448'h2d_6c_ee_6a_d4_fc_ee_98_01_92_48_6f_7f_72_60_7e_91_18_76_ba_6a_9a_c8_92_8b_bd_22_84_fc_66_39_54_f6_eb_a3_5b_4f_ba_6e_b5_d7_84_9d_ae_08_ec_b3_5a_f6_78_db_1c_9d_1f_03_c6; + cw [ 5] = 64'he6_01_4b_4d_96_01_5d_24; + key_except[ 5] = 448'he0_07_4d_4b_90_07_5b_22_4e_c1_10_e0_46_a3_80_85_57_3e_87_ac_f4_c5_05_38_08_b0_6b_43_03_96_ec_91_37_0d_32_a0_18_61_43_a1_80_37_15_0d_ed_59_e7_84_a4_87_23_c3_91_5c_48_54; + cw [ 6] = 64'h2b_2f_4c_29_ea_ca_2e_a8; + key_except[ 6] = 448'h2d_29_4a_2f_ec_cc_28_ae_e1_16_53_c5_67_72_ec_71_0b_a8_32_3a_f7_34_cc_96_1b_14_80_4d_df_67_3e_34_8f_ca_3b_eb_0e_be_c4_34_f1_bf_01_ae_98_86_a1_6a_d6_39_e5_50_3d_0d_e6_84; + cw [ 7] = 64'h3c_ac_45_6c_0c_1f_82_35; + key_except[ 7] = 448'h3a_aa_43_6a_0a_19_84_33_b5_9c_02_22_37_89_a7_e3_78_9c_33_14_59_c5_aa_44_bd_03_a5_96_93_b2_35_b2_6e_62_0d_cc_03_4b_95_a1_2a_60_86_a5_1d_df_81_e9_88_3b_5f_13_30_d1_85_68; + cw [ 8] = 64'h71_f1_49_67_8d_cb_74_00; + key_except[ 8] = 448'h77_f7_4f_61_8b_cd_72_06_d3_52_b0_e4_23_96_07_cd_66_34_7e_33_e5_c5_4f_89_68_96_e6_43_85_78_1a_92_11_40_3c_69_60_fa_03_e5_48_93_03_3b_cd_5e_ca_58_bb_1e_60_53_34_3c_50_f2; + cw [ 9] = 64'hb5_be_9a_cc_d1_1f_91_dc; + key_except[ 9] = 448'hb3_b8_9c_ca_d7_19_97_da_1c_ee_e8_73_b4_43_63_d3_30_9b_9f_f4_2a_d6_7a_2f_bf_77_7f_a4_eb_b8_f9_07_e6_f7_25_4c_b5_21_08_ff_3b_80_f6_7c_64_ed_8d_8e_58_98_df_a9_9a_fd_1b_71; + cw [ 10] = 64'h06_95_31_34_93_70_5b_c4; + key_except[ 10] = 448'h00_93_37_32_95_76_5d_c2_34_d1_b4_5b_c5_f5_10_00_15_c6_29_ee_80_99_16_19_33_f9_41_60_07_8c_41_c8_7a_1f_66_33_2c_4b_60_ca_e7_15_77_10_43_51_3b_e4_6e_c0_26_16_c3_78_91_15; + cw [ 11] = 64'hf9_3c_3a_9a_5f_96_c9_55; + key_except[ 11] = 448'hff_3a_3c_9c_59_90_cf_53_8e_aa_a1_16_f0_2a_33_32_70_cf_9e_cd_29_0c_f9_f3_dc_e7_9f_b6_9b_6d_e9_49_f4_3d_49_5e_bb_30_15_6e_aa_c0_f4_ff_22_87_fe_05_35_fe_9f_a0_f7_a5_19_29; + cw [ 12] = 64'h34_3f_96_dd_16_6f_c5_51; + key_except[ 12] = 448'h32_39_90_db_10_69_c3_57_4c_28_3a_b8_f5_19_73_c3_6a_fb_17_d6_8c_c2_38_71_9d_ea_37_f7_a7_ba_f2_2d_17_f7_51_6d_9b_03_b9_eb_fc_52_f0_75_97_ed_87_8d_22_9a_7d_ed_d3_d1_56_69; + cw [ 13] = 64'hf3_6c_57_41_6e_5a_ad_1e; + key_except[ 13] = 448'hf5_6a_51_47_68_5c_ab_18_ca_86_43_a6_fe_b5_2e_5b_fb_b6_d6_5a_4b_25_49_36_98_04_ae_ae_cc_27_d0_b1_e3_7c_99_4b_5b_c4_c1_35_ea_8e_ad_21_b8_9e_e5_1f_96_9e_de_c2_39_03_6d_e7; + cw [ 14] = 64'h84_55_47_ee_6f_bd_d2_44; + key_except[ 14] = 448'h82_53_41_e8_69_bb_d4_42_ad_f9_b6_3a_52_80_0d_d9_5c_9d_e9_15_c1_e1_30_bb_55_cb_f9_ca_09_d8_b1_b0_fc_62_0a_24_f8_5d_a1_c9_a6_18_44_57_7c_5b_0e_f9_a1_02_f7_b7_27_f0_bd_52; + cw [ 15] = 64'hca_d1_62_70_f7_80_fc_f3; + key_except[ 15] = 448'hcc_d7_64_76_f1_86_fa_f5_1b_51_b5_f4_5e_6c_98_3e_c5_74_ec_a8_dc_3c_93_fb_a0_f0_6a_d9_18_4d_87_58_92_29_f6_b2_7d_9c_57_49_80_7c_db_92_ea_08_7f_50_ec_67_b8_d0_c7_2a_38_de; + cw [ 16] = 64'hbe_7b_57_36_36_8f_e3_7b; + key_except[ 16] = 448'hb8_7d_51_30_30_89_e5_7d_28_18_72_10_fa_8c_fa_ef_e9_42_f3_d1_de_e5_b8_f1_cd_e1_0c_ff_d0_fa_d7_bc_18_f7_c1_ec_5b_dd_d7_f8_98_7c_f8_b3_3f_d4_86_ff_a1_bb_78_93_df_d3_be_af; + cw [ 17] = 64'he9_32_0b_13_33_5c_b7_d1; + key_except[ 17] = 448'hef_34_0d_15_35_5a_b1_d7_6a_4e_a1_97_50_df_59_67_06_62_9a_93_28_35_f1_7d_ce_66_48_98_97_09_da_8d_49_e5_52_47_3d_e4_16_6e_d3_ca_d0_b8_e3_10_cc_2d_53_b4_58_c2_d3_a4_fb_98; + cw [ 18] = 64'heb_98_16_c0_45_5a_9a_11; + key_except[ 18] = 448'hed_9e_10_c6_43_5c_9c_17_3f_67_a3_26_b4_3d_24_77_49_15_8a_5e_08_04_cb_6f_a8_05_79_b6_1f_2d_93_23_ca_78_07_0b_b1_00_d7_67_42_c4_a3_d1_70_8d_ed_29_1e_2e_d8_a0_10_21_9d_5d; + cw [ 19] = 64'hf7_93_44_57_9b_83_21_f7; + key_except[ 19] = 448'hf1_95_42_51_9d_85_27_f1_d2_87_b2_71_6a_4c_d2_87_bf_52_8f_a1_dd_d4_5f_d5_ea_75_ae_51_02_f8_44_3d_21_85_ec_a8_2f_91_d2_ed_99_f7_df_12_3f_4e_c8_84_d9_8d_2a_01_f7_7a_5e_ec; + cw [ 20] = 64'h55_ce_15_d9_b5_d3_d7_64; + key_except[ 20] = 448'h53_c8_13_df_b3_d5_d1_62_76_e3_87_f2_b5_90_fb_89_7a_fb_49_e6_10_65_5b_88_30_f6_75_ae_05_f1_64_af_7f_b5_75_89_e0_57_81_0f_7a_aa_77_47_d7_9d_4b_b4_3a_8f_17_63_c6_69_e7_73; + cw [ 21] = 64'hdf_39_3d_aa_e9_ca_ba_df; + key_except[ 21] = 448'hd9_3f_3b_ac_ef_cc_bc_d9_a3_f6_f7_51_b8_fa_2e_76_b9_0d_b9_7b_af_3d_d9_cf_c2_55_dc_fd_de_ed_39_e2_ac_78_a9_7b_a5_fd_d6_5e_49_dc_ed_fe_70_96_78_ea_57_7c_fb_32_2e_6f_bc_bd; + cw [ 22] = 64'h84_85_25_10_df_ee_bb_11; + key_except[ 22] = 448'h82_83_23_16_d9_e8_bd_17_b0_4d_97_48_74_bc_11_52_4c_c6_89_ba_8d_09_2a_de_b5_3b_c8_d3_0f_e5_53_e9_8a_6f_6e_3f_29_d1_b1_02_e4_50_92_03_72_16_39_ac_0e_ca_fc_06_e5_e8_8c_98; + cw [ 23] = 64'hc8_a9_68_b8_15_47_42_48; + key_except[ 23] = 448'hce_af_6e_be_13_41_44_4e_37_38_d5_14_26_13_31_a4_40_4d_b8_86_e6_4c_bf_00_24_e3_19_47_d7_31_2b_5a_1e_01_47_7d_a2_28_07_18_40_11_52_ed_2f_85_5b_63_aa_7e_21_31_ca_a5_88_00; + cw [ 24] = 64'h42_60_56_30_5b_e2_a8_f6; + key_except[ 24] = 448'h44_66_50_36_5d_e4_ae_f0_8b_94_87_1d_ff_74_90_1f_9d_44_7c_ca_5d_10_19_b6_82_69_82_a1_8c_65_85_38_a2_39_ca_cb_7f_9a_e2_08_c5_24_fd_22_1a_06_6d_51_c6_1d_9a_94_e7_22_04_87; + cw [ 25] = 64'h1c_a8_75_6e_58_4f_bb_2f; + key_except[ 25] = 448'h1a_ae_73_68_5e_49_bd_29_b0_dc_46_21_bb_b9_a3_f4_b8_1e_31_db_57_cd_aa_4e_67_23_e4_b7_de_b6_75_f2_ac_7f_8d_dd_00_cb_96_91_49_60_3e_a5_5c_de_30_ef_8f_f9_d3_13_a8_d3_84_f9; + cw [ 26] = 64'h97_45_fc_47_03_22_3e_2e; + key_except[ 26] = 448'h91_43_fa_41_05_24_38_28_61_c7_de_a9_ea_27_86_08_bf_b4_c9_49_f6_8a_4c_1c_53_0c_6c_63_60_a4_0c_71_29_1a_90_ba_68_a1_e8_95_ad_b7_2d_09_f9_6c_38_b3_95_49_26_4c_09_76_cc_f7; + cw [ 27] = 64'h85_3c_56_f9_2b_75_66_d0; + key_except[ 27] = 448'h83_3a_50_ff_2d_73_60_d6_e9_3a_a7_bb_c6_51_3d_83_0a_fd_b9_42_49_70_74_31_97_ce_b8_2c_87_99_a2_38_5f_12_5b_45_bf_8d_a0_4d_e7_8b_e0_74_bf_8a_0f_e1_f2_10_0d_f5_63_e1_fd_c1; + cw [ 28] = 64'hcd_58_a5_a2_f0_65_5e_17; + key_except[ 28] = 448'hcb_5e_a3_a4_f6_63_58_11_27_fb_2f_c9_08_bd_29_be_98_25_e1_af_0c_6b_e5_4b_c6_be_59_1f_3c_9f_01_e2_b8_09_b3_15_c1_4d_be_46_45_c9_9c_d1_f4_b1_72_f0_37_64_8a_7f_80_cb_bc_1a; + cw [ 29] = 64'hea_a8_3c_c7_47_91_c4_a9; + key_except[ 29] = 448'hec_ae_3a_c1_41_97_c2_af_57_20_c2_a6_d0_4e_a4_b4_4b_35_9e_45_32_dc_83_d2_68_80_3b_b4_db_50_0e_61_d1_30_17_d0_ae_30_d7_b3_82_66_23_ea_b4_c9_da_03_69_77_90_61_1d_35_4d_4d; + cw [ 30] = 64'h6c_ff_23_ce_7a_9e_2a_4f; + key_except[ 30] = 448'h6a_f9_25_c8_7c_98_2c_49_bb_ac_70_33_69_a8_69_78_90_99_53_99_83_ad_bf_f7_7e_63_b0_5e_d8_ee_b1_c5_ec_c9_8f_7e_da_d7_14_fb_b3_59_5e_f7_00_de_f4_bb_0d_7c_e7_a2_bf_d3_b3_ca; + cw [ 31] = 64'h75_73_97_84_a6_b5_96_76; + key_except[ 31] = 448'h73_75_91_82_a0_b3_90_70_2f_ee_3a_da_dd_84_cf_8f_fc_21_53_64_98_e3_71_bd_8c_5e_55_ea_a0_da_85_a5_6a_b0_b0_e4_d9_57_ab_ee_9e_b8_ec_73_d5_71_c5_b0_10_17_3a_ef_17_da_b7_33; + cw [ 32] = 64'h3d_df_87_97_3b_03_02_b1; + key_except[ 32] = 448'h3b_d9_81_91_3d_05_04_b7_fd_27_ba_01_61_cd_fb_ab_2a_c1_4b_85_9d_f7_ce_75_fb_27_95_5d_31_b8_86_ad_09_83_4d_a8_ff_47_9c_e6_b9_fb_93_d0_17_f7_8c_b1_59_29_2c_ab_f1_71_f6_2a; + cw [ 33] = 64'h8f_61_18_1d_7f_38_dc_35; + key_except[ 33] = 448'h89_67_1e_1b_79_3e_da_33_c5_c2_94_8a_d4_2b_98_7f_57_6c_dd_dc_b9_a0_c0_5a_81_ac_cb_fa_99_84_3c_09_f7_7b_5a_e2_69_25_77_86_86_fe_b5_ad_e2_43_2b_99_34_33_fb_44_e1_74_69_1f; + cw [ 34] = 64'h4a_dc_23_0b_0c_09_87_5c; + key_except[ 34] = 448'h4c_da_25_0d_0a_0f_81_5a_fe_85_65_94_11_81_24_ea_53_ae_40_15_0f_4d_93_25_f0_40_81_87_51_1b_f0_c3_2d_64_1f_10_53_42_45_5a_20_06_c7_95_85_93_54_3f_09_e6_5f_c3_2a_01_d0_06; + cw [ 35] = 64'he1_77_b2_bf_4d_ae_d9_22; + key_except[ 35] = 448'he7_71_b4_b9_4b_a8_df_24_ce_7a_b8_0c_b8_20_d5_58_c6_cb_fe_5d_95_8a_69_ab_5c_8f_db_e3_a8_6c_f6_4e_95_fc_ca_fe_f0_18_29_e6_34_b2_28_77_62_67_fe_5d_35_df_f5_bc_74_b2_5a_13; + cw [ 36] = 64'hdc_1c_86_77_05_65_9b_ab; + key_except[ 36] = 448'hda_1a_80_71_03_63_9d_ad_6e_5d_ee_28_18_7d_b7_a1_ea_d6_a9_0f_16_d2_a1_6d_54_0b_6d_95_76_9c_c6_2a_09_2c_c1_85_34_09_bd_d3_6c_62_08_90_77_e9_6c_e7_47_a7_14_9d_48_f3_dc_78; + cw [ 37] = 64'h54_fa_94_d8_c9_ed_0c_bb; + key_except[ 37] = 448'h52_fc_92_de_cf_eb_0a_bd_97_2c_ef_e9_8d_78_f7_df_a8_79_5d_7e_1f_52_27_c7_a6_1a_b7_35_ec_dd_37_2f_86_d8_fd_c5_e7_13_ba_53_5d_61_aa_76_96_ab_69_9a_4e_15_c9_6d_6c_eb_16_6b; + cw [ 38] = 64'h7b_04_82_68_80_0c_5e_3c; + key_except[ 38] = 448'h7d_02_84_6e_86_0a_58_3a_2f_db_49_e5_05_21_86_63_35_bc_22_3c_1e_06_e5_28_9e_94_65_03_73_07_b5_02_3e_48_30_86_11_0a_4c_37_29_a5_84_85_c1_29_e7_6a_34_25_4f_d8_18_88_80_74; + cw [ 39] = 64'h11_6f_2f_14_ea_09_37_bc; + key_except[ 39] = 448'h17_69_29_12_ec_0f_31_ba_a8_c6_56_c5_45_c7_ff_da_38_e2_50_30_bf_fd_44_3e_93_16_c4_4d_c9_12_dd_ed_aa_c6_79_f0_5d_e6_80_96_b9_b9_85_28_d6_d2_15_3e_50_d1_ee_c3_69_1d_a6_b2; + cw [ 40] = 64'hf0_38_29_ab_16_32_31_ed; + key_except[ 40] = 448'hf6_3e_2f_ad_10_34_37_eb_42_f4_61_1e_60_cb_a3_04_72_0f_b6_81_32_19_1d_5d_48_6b_5e_14_c3_2b_6c_c0_65_05_01_da_8c_e8_33_7a_8e_63_55_7c_61_94_d0_47_41_df_03_36_9b_05_59_b8; + cw [ 41] = 64'h81_9c_35_60_eb_58_5b_23; + key_except[ 41] = 448'h87_9a_33_66_ed_5e_5d_25_b4_53_a7_67_cc_bd_ad_50_88_96_a8_7e_11_2d_46_5b_33_97_e9_3e_0e_0d_57_e0_da_5e_af_93_28_4c_90_47_e3_e9_2b_11_70_9b_3b_6c_3e_c1_c4_12_21_2b_bd_59; + cw [ 42] = 64'h45_9e_cb_4c_a0_4e_b6_d9; + key_except[ 42] = 448'h43_98_cd_4a_a6_48_b0_df_3b_4f_6c_f1_37_db_6d_43_00_b8_01_32_6e_b7_7b_6d_b6_56_60_9d_67_aa_bb_97_0e_e0_37_0f_15_e7_18_dd_71_c8_c2_1c_c9_fc_45_aa_da_0c_5d_ca_0a_dd_b2_d8; + cw [ 43] = 64'h4d_84_97_ea_43_6d_b8_2d; + key_except[ 43] = 448'h4b_82_91_ec_45_6b_be_2b_1b_ff_cf_29_d1_b9_85_f1_1c_9d_2d_5b_16_43_e3_7e_76_0f_72_b3_7f_95_b5_a0_a4_78_06_85_b8_cb_bc_17_e5_e0_26_c5_54_38_6c_cb_1f_25_d7_bf_09_e0_04_d9; + cw [ 44] = 64'hc2_5a_f8_99_36_13_cd_5f; + key_except[ 44] = 448'hc4_5c_fe_9f_30_15_cb_59_46_a1_6d_96_fe_2b_78_8e_d3_6b_c4_cc_6a_6e_19_51_80_e0_1b_be_60_3f_68_5d_77_bd_d3_18_cb_24_5b_58_92_4e_fd_5d_af_a5_73_17_a4_ce_1b_69_cb_07_7b_0f; + cw [ 45] = 64'h5e_6e_85_1d_ad_20_d1_55; + key_except[ 45] = 448'h58_68_83_1b_ab_26_d7_53_c6_c0_8e_58_15_89_7e_2b_7b_ca_5d_24_0d_a3_91_48_90_d9_c7_9f_b1_80_60_af_37_a4_69_42_61_47_fd_8a_3c_4e_c5_a5_53_f3_4b_94_20_b6_1f_0e_62_79_66_3e; + cw [ 46] = 64'hf1_d2_83_1f_32_78_97_1a; + key_except[ 46] = 448'hf7_d4_85_19_34_7e_91_1c_7e_47_68_8f_58_91_5b_4f_a6_6a_c2_97_0a_a3_43_3d_ea_2e_4d_8a_64_0a_f2_8d_4d_e5_d4_03_59_44_2a_f6_df_8a_9b_15_e3_71_c4_3f_1b_84_59_ce_d9_12_fb_32; + cw [ 47] = 64'hdd_de_70_a8_22_83_65_5b; + key_except[ 47] = 448'hdb_d8_76_ae_24_85_63_5d_12_33_65_91_ee_08_6f_aa_a0_ab_e5_40_4e_6c_df_d1_b2_c6_1e_3f_50_fb_63_54_16_94_95_18_cb_9d_14_5c_b9_c9_eb_d7_ad_84_53_d7_b8_ec_0d_71_0f_43_3a_ab; + cw [ 48] = 64'h9a_ab_7c_aa_2d_b0_75_e9; + key_except[ 48] = 448'h9c_ad_7a_ac_2b_b6_73_ef_90_70_d7_9e_82_4a_ee_24_69_2b_bc_41_f3_38_96_c8_61_c8_de_7c_d3_41_6f_76_54_96_1d_f2_a4_bc_f7_18_1e_7d_63_ee_f9_82_1a_47_e9_f3_21_74_2e_25_2f_bd; + cw [ 49] = 64'h33_99_0b_78_d9_ed_76_3a; + key_except[ 49] = 448'h35_9f_0d_7e_df_eb_70_3c_b9_5b_f1_ed_0d_92_b2_d7_a1_7c_2a_b2_bf_41_66_ab_af_bc_e4_47_4e_59_bf_8a_9e_43_fd_a5_31_fa_62_77_4d_b5_9a_1f_c6_9a_8f_6a_3a_01_e9_d7_fc_af_90_f4; + cw [ 50] = 64'hc6_ca_34_48_ff_31_09_e7; + key_except[ 50] = 448'hc0_cc_32_4e_f9_37_0f_e1_96_85_87_7a_cc_69_e8_9c_d9_1a_cd_ec_11_78_17_56_20_79_ab_3c_08_95_65_65_e6_9d_af_90_6e_05_f3_0b_96_6d_7f_04_34_8b_79_94_4c_c7_83_05_a3_6b_2f_4f; + cw [ 51] = 64'h08_a4_45_b8_4d_f3_45_2f; + key_except[ 51] = 448'h0e_a2_43_be_4b_f5_43_29_94_b0_c7_8e_2f_98_95_b1_dc_ef_3c_06_53_41_8e_c2_31_8a_93_12_de_71_65_ba_f6_06_de_c9_a2_5a_b5_10_66_61_0f_e7_9e_17_0b_47_aa_bb_87_77_6c_22_05_08; + cw [ 52] = 64'hc0_53_3c_46_c2_b0_34_73; + key_except[ 52] = 448'hc6_55_3a_40_c4_b6_32_75_03_45_36_ff_c8_0e_c5_1e_8c_30_c4_61_b8_88_15_df_c2_5a_6a_72_08_4a_0f_65_c0_90_b2_b2_49_b0_b2_cb_97_71_e9_1b_f0_48_50_10_01_45_a8_44_07_1e_1f_db; + cw [ 53] = 64'h47_44_4f_d7_35_69_53_b8; + key_except[ 53] = 448'h41_42_49_d1_33_6f_55_be_6e_63_c6_28_03_d7_98_cb_4f_d7_49_97_7e_f1_45_28_d0_ad_71_09_45_90_de_bb_19_45_42_81_f5_67_e1_95_64_af_91_48_5f_59_4e_bf_f3_87_4c_a7_c8_74_e4_56; + cw [ 54] = 64'h0e_ab_65_31_cf_22_15_28; + key_except[ 54] = 448'h08_ad_63_37_c9_24_13_2e_d4_54_d7_c8_67_85_f4_34_4b_62_3d_24_d7_09_8e_1e_21_18_c3_47_db_a1_46_fc_83_86_7f_fa_28_4b_e7_10_94_37_03_a1_da_97_19_c6_88_fb_a0_56_69_69_46_14; + cw [ 55] = 64'h18_ff_9b_81_8c_64_60_91; + key_except[ 55] = 448'h1e_f9_9d_87_8a_62_66_97_d9_28_3d_4c_85_df_67_2b_62_81_54_62_ad_13_a6_61_b5_9b_96_75_b5_0b_8a_87_13_92_2d_67_d7_e2_3d_42_7c_53_a2_f8_01_b2_07_10_6a_32_2c_ae_20_8d_52_ab; + cw [ 56] = 64'h7b_79_c1_d6_bf_bc_0f_e5; + key_except[ 56] = 448'h7d_7f_c7_d0_b9_ba_09_e3_a6_ae_b8_fe_43_ec_ba_6d_71_77_5a_bd_d1_b3_f5_d5_4c_7c_b5_5c_b1_4c_55_99_68_4d_79_e6_ee_56_7f_ed_8e_fd_54_f2_8b_fb_e8_3c_d5_b7_62_6e_f7_b9_b1_6e; + cw [ 57] = 64'he3_98_da_a3_8b_3a_6f_b8; + key_except[ 57] = 448'he5_9e_dc_a5_8d_3c_69_be_fa_33_e9_cf_e2_67_a4_47_03_27_aa_79_7b_12_4f_31_ea_9c_98_24_63_2d_de_10_59_5c_3f_8a_bf_a8_6a_74_87_a7_a3_58_a9_a6_ee_6e_fd_8d_48_fc_39_2d_d9_85; + cw [ 58] = 64'h0f_a0_9f_41_6a_f2_c2_c5; + key_except[ 58] = 448'h09_a6_99_47_6c_f4_c4_c3_fd_82_0f_3b_f5_de_0c_35_1f_14_11_46_21_33_da_f2_23_cd_a1_b8_bf_e3_88_a1_fb_32_0e_4b_1e_77_fe_0f_c7_ce_67_aa_10_3f_07_a1_7a_38_92_8e_27_44_e5_4d; + cw [ 59] = 64'h53_16_fc_6b_a9_7f_bf_6a; + key_except[ 59] = 448'h55_10_fa_6d_af_79_b9_6c_e2_5f_ef_ff_bb_33_ce_c0_af_ba_28_7b_73_6a_79_0d_56_5c_e4_aa_66_3d_7e_76_4d_fc_b8_9d_20_ae_e8_5d_7f_ae_68_1d_dd_2e_78_6e_97_cd_55_5d_2a_ae_f7_f5; + cw [ 60] = 64'h14_45_91_c0_ea_7b_10_27; + key_except[ 60] = 448'h12_43_97_c6_ec_7d_16_21_85_e5_1d_6b_ed_9d_8f_d9_b4_95_45_76_91_63_0c_5e_13_1b_f7_7a_2c_b3_15_81_e2_52_a8_a9_c8_47_38_03_ef_79_2d_41_44_3f_01_98_02_09_e6_2f_21_4a_21_7b; + cw [ 61] = 64'h4f_bd_33_45_a1_08_d2_23; + key_except[ 61] = 448'h49_bb_35_43_a7_0e_d4_25_7f_42_b4_61_9d_8d_ac_60_83_94_19_74_94_ad_c3_69_32_95_61_ff_92_88_96_c3_1b_70_a7_f2_30_47_54_c7_21_fe_2b_b1_41_d9_5f_a8_38_75_74_82_00_7b_f0_5d; + cw [ 62] = 64'h13_ce_69_e0_97_4a_19_a7; + key_except[ 62] = 448'h15_c8_6f_e6_91_4c_1f_a1_14_f7_85_64_6f_ff_e2_48_f1_93_6c_be_74_1d_4e_5c_31_35_77_15_04_25_5d_d4_22_cf_a5_9b_ec_6a_51_05_f8_e5_1f_48_49_9d_39_5c_de_cb_46_32_81_2f_02_7e; + cw [ 63] = 64'h02_12_ef_de_6a_eb_69_a0; + key_except[ 63] = 448'h04_14_e9_d8_6c_ed_6f_a6_88_21_2e_2d_63_f2_dc_d4_0d_5b_04_1b_75_fb_0c_b3_43_89_b2_09_2f_7e_ff_fd_94_ce_4a_99_9e_f6_ea_c1_d5_2d_01_5e_1e_7e_36_0d_e7_c9_c1_af_65_14_36_c4; + cw [ 64] = 64'hd3_e0_36_6e_0b_96_3e_21; + key_except[ 64] = 448'hd5_e6_30_68_0d_90_38_27_bb_5e_86_a7_e0_28_86_0c_2d_3c_f8_49_11_8c_6f_fc_66_04_ec_32_81_64_a7_60_4c_18_1c_de_78_98_d2_87_8b_e5_22_27_f1_4e_7c_71_1d_5d_01_d0_25_b0_8d_ff; + cw [ 65] = 64'hd3_da_e2_23_3f_7c_85_df; + key_except[ 65] = 448'hd5_dc_e4_25_39_7a_83_d9_de_9f_ed_9e_5a_5d_6a_4e_f3_22_ec_97_4b_3a_73_75_e4_6c_8f_9c_64_09_d0_54_61_e5_9d_17_7f_0c_7b_5c_de_ce_de_10_a9_a3_5c_5f_db_c6_5a_dc_ab_a3_7b_2e; + cw [ 66] = 64'h60_60_4b_76_20_d2_20_b4; + key_except[ 66] = 448'h66_66_4d_70_26_d4_26_b2_0b_94_00_27_23_d6_9d_0f_14_54_76_03_78_b5_0d_a4_ca_03_22_08_85_62_8d_9a_60_00_42_cb_57_fe_02_a1_43_29_85_2a_0b_5c_c4_51_c3_1d_0a_92_54_14_21_c2; + cw [ 67] = 64'h6c_1a_fd_42_99_50_66_1d; + key_except[ 67] = 448'h6a_1c_fb_44_9f_56_60_1b_a3_81_eb_e3_83_9f_61_26_18_30_0b_e3_6b_0f_85_41_ca_b2_a0_36_77_89_09_f7_78_91_3b_13_23_e3_9e_71_53_41_b5_99_99_ba_da_a2_a3_64_0a_4a_b8_6d_97_c9; + cw [ 68] = 64'h00_72_38_46_ec_b4_a1_bc; + key_except[ 68] = 448'h06_74_3e_40_ea_b2_a7_ba_80_8c_64_6e_91_46_cd_1e_54_12_54_61_3b_b8_20_87_c5_1b_a2_a8_c9_4a_4d_47_e0_b6_2a_d6_47_b6_23_d3_16_28_a4_3a_00_4a_10_16_41_d3_9a_04_2c_9c_33_c3; + cw [ 69] = 64'hb7_17_70_a7_2f_3d_8f_d6; + key_except[ 69] = 448'hb1_11_76_a1_29_3b_89_d0_e4_bf_b0_9a_da_65_4e_c2_f7_a3_ab_5d_c9_f8_70_15_dd_4c_9d_e8_02_9c_50_54_69_fe_98_34_af_0d_61_ec_be_9e_ec_50_ad_43_b8_ed_d5_c2_7e_75_33_f2_fb_25; + cw [ 70] = 64'h3e_7c_cd_6b_cb_31_e1_d5; + key_except[ 70] = 448'h38_7a_cb_6d_cd_37_e7_d3_c0_90_ab_7b_53_cb_26_bb_3b_9e_7f_21_69_53_90_53_db_d9_a6_94_b9_99_68_b0_f5_26_29_40_6f_eb_fc_69_af_46_c5_bc_1c_ba_8a_d4_e1_b0_9f_1f_33_6d_55_ee; + cw [ 71] = 64'hdb_57_ac_ff_fc_58_bf_c7; + key_except[ 71] = 448'hdd_51_aa_f9_fa_5e_b9_c1_e2_f7_3e_f6_18_7b_5a_78_ff_fb_e0_bb_a1_be_d1_4f_50_74_fc_d8_3c_0e_78_6e_ed_ed_f8_33_c4_ac_dd_cf_7a_de_5d_dc_f2_6a_70_7c_57_e6_f7_78_e2_1e_ff_fe; + cw [ 72] = 64'he3_22_1d_b2_54_7e_42_de; + key_except[ 72] = 448'he5_24_1b_b4_52_78_44_d8_27_ba_43_1e_a8_d7_50_57_dd_41_b2_d7_2a_11_7d_02_cc_ed_19_20_ce_23_19_ae_f8_d1_c2_4f_87_68_e3_3e_56_85_fc_68_32_15_c2_6b_73_1e_ca_36_da_86_8f_05; + cw [ 73] = 64'h42_9d_64_38_38_f4_f8_ee; + key_except[ 73] = 448'h44_9b_62_3e_3e_f2_fe_e8_93_d9_77_1f_1f_70_b8_00_99_cc_24_8a_d3_38_33_89_36_e9_c2_cc_46_4f_25_7a_76_29_cf_b7_04_9e_e0_58_67_3c_5e_16_5b_82_73_43_ee_45_37_14_ee_83_35_94; + cw [ 74] = 64'hf7_4b_78_28_61_10_64_f3; + key_except[ 74] = 448'hf1_4d_7e_2e_67_16_62_f5_03_13_91_93_8e_4b_ee_1e_a1_28_ef_40_f8_3c_55_42_8a_c4_0e_7c_08_81_2f_56_d6_90_91_b2_67_ad_52_2c_1b_fd_e9_0c_a8_80_db_d1_f0_45_a9_50_12_67_2b_af; + cw [ 75] = 64'h95_f0_87_7d_5c_a9_7b_88; + key_except[ 75] = 448'h93_f6_81_7b_5a_af_7d_8e_f8_52_6e_28_04_e0_13_dd_6e_5e_f1_98_07_d3_46_ab_21_af_ec_01_e9_de_f2_aa_9f_4f_4c_40_54_d9_ab_d7_0c_83_13_36_76_7a_27_ff_7c_92_c1_9f_ec_50_dc_f2; + cw [ 76] = 64'hc4_19_6f_19_0a_9b_28_70; + key_except[ 76] = 448'hc2_1f_69_1f_0c_9d_2e_76_cb_05_37_13_66_a2_b5_c6_0a_4c_85_18_f9_4d_1d_b5_82_43_8a_46_03_ff_be_f9_47_48_4b_b8_1b_f1_82_48_83_33_c1_1f_3f_96_75_89_84_4d_69_83_67_45_5d_80; + cw [ 77] = 64'hbd_94_46_3d_21_49_c9_11; + key_except[ 77] = 448'hbb_92_40_3b_27_4f_cf_17_5c_13_a2_01_16_39_1f_e3_2e_ce_af_1e_4c_e4_c2_61_bb_87_0f_9b_17_9c_f2_3a_17_6e_44_01_33_0d_94_e4_69_ca_83_95_3f_41_af_cd_be_a0_5d_91_50_70_7c_28; + cw [ 78] = 64'hd2_f4_d3_13_a9_16_af_f4; + key_except[ 78] = 448'hd4_f2_d5_15_af_10_a9_f2_fa_8c_ad_d7_b2_e5_9e_0b_37_e6_d8_69_59_37_3b_25_f6_50_8c_a8_a1_2d_c4_9b_69_3c_7c_ce_77_c4_48_48_2b_2e_e6_30_ab_36_6c_34_cd_9d_1e_ca_62_a8_f9_a7; + cw [ 79] = 64'he3_0e_13_25_80_eb_a2_47; + key_except[ 79] = 448'he5_08_15_23_86_ed_a4_41_6b_97_00_5d_bc_9c_64_c1_93_80_a2_72_04_c1_59_e4_1a_5d_08_b7_06_72_90_86_2b_f0_a3_09_12_d8_70_ae_75_c6_6d_03_25_d4_c5_68_12_0c_56_97_16_1b_ca_8d; + cw [ 80] = 64'hea_7f_b5_e3_d7_b4_5b_5b; + key_except[ 80] = 448'hec_79_b3_e5_d1_b2_5d_5d_66_78_fb_7e_c8_ac_60_3a_cb_93_fa_ed_8a_0b_b5_db_dc_f9_79_76_f8_4d_42_e4_d9_9d_a3_76_e9_58_fd_7b_b6_57_f8_f3_70_b9_fa_76_25_f6_ac_3e_9f_ab_df_5f; + cw [ 81] = 64'h70_24_9f_20_b3_e3_09_26; + key_except[ 81] = 448'h76_22_99_26_b5_e5_0f_20_0e_94_8b_4d_ed_b6_8b_81_bc_86_3e_ee_34_63_0d_b4_1a_3b_07_2b_a6_75_cd_a0_22_1d_a0_c9_3a_7e_a8_22_ed_29_3d_2b_15_35_ed_44_06_9d_06_9f_95_2e_24_21; + cw [ 82] = 64'h16_9f_67_95_6d_ec_cc_c2; + key_except[ 82] = 448'h10_99_61_93_6b_ea_ca_c4_dd_29_b6_98_1f_f4_7e_50_eb_e1_0d_1e_c5_b9_32_a3_35_c8_97_cd_0e_cc_92_ff_93_ea_dd_37_b6_57_e1_c8_7c_1e_4a_52_9a_d3_3f_89_ee_42_f4_e6_66_f3_76_24; + cw [ 83] = 64'h0d_d9_da_5d_32_c7_3d_ec; + key_except[ 83] = 448'h0b_df_dc_5b_34_c1_3b_ea_58_cf_7c_b1_e7_72_b9_ad_12_7e_45_ca_f6_f6_fe_bd_27_66_62_6d_75_fe_ec_19_27_1f_57_ad_5c_b7_0e_dd_c1_bb_76_9e_cf_ec_25_97_de_a9_23_c9_cf_d5_70_d3; + cw [ 84] = 64'h9e_7b_78_77_83_71_e4_85; + key_except[ 84] = 448'h98_7d_7e_71_85_77_e2_83_41_90_b4_eb_d2_5f_76_ac_33_70_fd_63_e0_d8_80_51_43_98_2e_f4_95_98_08_5c_71_b2_71_71_6e_a9_76_c1_df_56_25_b8_af_c8_1a_d0_e3_70_32_55_41_7d_5b_ef; + cw [ 85] = 64'ha3_73_f5_48_b6_6b_c0_15; + key_except[ 85] = 448'ha5_75_f3_4e_b0_6d_c6_13_05_82_3b_6c_f6_99_48_ce_5d_18_d6_f6_cc_6b_48_51_89_bd_2b_fb_a5_3b_31_f5_36_f3_22_79_4b_44_fb_65_d4_dc_b5_35_3d_3d_93_18_b2_5a_7b_0f_91_08_3e_4f; + cw [ 86] = 64'h0c_76_ba_17_73_39_c3_43; + key_except[ 86] = 448'h0a_70_bc_11_75_3f_c5_45_6c_00_ac_1b_d9_0f_59_f8_86_c2_59_d5_20_ea_90_73_53_eb_01_ba_b8_98_da_4d_d9_f7_c2_50_7a_27_3c_ca_b7_4a_79_b9_06_61_1e_bd_21_f0_d4_8d_c3_76_f3_0b; + cw [ 87] = 64'h5b_78_63_8e_38_e4_53_5e; + key_except[ 87] = 448'h5d_7e_65_88_3e_e2_55_58_ae_ea_64_1d_0b_90_2a_2e_b1_0f_50_87_4f_a9_f5_a9_c6_ed_d5_0f_d4_4a_e1_d3_3c_05_89_57_d1_56_66_dc_4d_8d_dc_f7_49_d3_56_37_b3_f4_0b_a6_ae_93_b0_36; + cw [ 88] = 64'h28_35_3f_3f_d6_79_ca_d8; + key_except[ 88] = 448'h2e_33_39_39_d0_7f_cc_de_6d_10_72_5e_d1_f3_11_f2_4e_cc_32_ff_aa_d9_90_33_d9_fb_01_e0_df_1e_ba_e8_dd_7b_62_71_1f_6a_a5_fa_e6_12_f1_bc_16_51_b6_6a_67_72_fd_97_db_1c_d5_01; + cw [ 89] = 64'h9e_ac_d3_1d_f2_88_f6_c6; + key_except[ 89] = 448'h98_aa_d5_1b_f4_8e_f0_c0_79_c0_0c_d1_de_c0_3a_71_b3_ec_91_f0_44_b7_92_ba_33_f0_4c_ad_ba_c2_b0_99_bf_73_f5_42_1c_d5_4c_88_a9_0e_7f_a6_ea_f0_07_a8_e8_30_d7_ca_c7_5b_e8_b5; + cw [ 90] = 64'hfc_9e_56_ff_84_a6_9a_61; + key_except[ 90] = 448'hfa_98_50_f9_82_a0_9c_67_7f_7d_22_78_b2_28_f7_21_6a_d9_a3_6d_54_80_bb_ed_7c_5b_7d_b7_13_ee_a6_3e_0d_b8_65_8e_90_19_b5_e9_3c_62_62_d7_7b_cd_e4_e0_8d_2f_15_b4_56_d9_de_79; + cw [ 91] = 64'h15_14_36_21_5b_ec_ec_87; + key_except[ 91] = 448'h13_12_30_27_5d_ea_ea_81_c9_9b_a7_89_dd_7c_03_50_be_a4_2d_da_05_18_60_f3_17_ae_86_b1_0e_cd_90_60_b3_7b_98_17_3e_9b_b0_46_ed_c2_3c_12_90_02_3f_c9_76_40_d6_d4_a5_e2_54_a9; + cw [ 92] = 64'hd0_d6_92_a2_98_75_15_3b; + key_except[ 92] = 448'hd6_d0_94_a4_9e_73_13_3d_9e_7d_6d_cf_88_1d_c3_8b_a4_a3_e4_e7_1b_42_27_6d_f6_3a_df_32_64_1b_c7_06_40_95_bc_85_d1_08_38_52_7f_61_ba_51_e5_23_44_56_0b_85_0c_fd_a8_8a_1b_3b; + cw [ 93] = 64'ha8_f5_be_07_2e_e3_b4_20; + key_except[ 93] = 448'hae_f3_b8_01_28_e5_b2_26_d9_44_3a_8c_f0_16_8d_a8_4e_a4_d6_43_b5_ea_8a_bd_79_0a_ca_eb_b5_7a_8e_61_01_32_1e_f9_58_b4_ad_e2_e4_3a_23_bb_f5_66_94_11_0b_7b_34_cd_35_14_7c_93; + cw [ 94] = 64'h2d_42_c3_b6_68_db_5b_02; + key_except[ 94] = 448'h2b_44_c5_b0_6e_dd_5d_04_ac_73_08_03_2b_b4_5d_fd_84_43_63_1f_41_e7_cc_aa_4b_87_d1_0a_3c_f6_d3_9e_d8_ce_ca_09_d0_5f_0e_a4_53_89_09_c3_4e_77_a6_fd_b7_a8_c0_bb_74_52_a3_12; + cw [ 95] = 64'h82_d4_dc_7c_63_84_10_4e; + key_except[ 95] = 448'h84_d2_da_7a_65_82_16_48_15_dd_ee_35_ce_02_1c_19_9d_dc_ec_44_66_a6_36_9f_37_41_6b_2b_68_48_29_38_a6_12_c6_06_68_3c_c8_d9_a1_0d_6e_1f_7a_69_09_53_88_00_87_18_4f_b6_3c_57; + cw [ 96] = 64'hde_86_f9_08_90_0c_ce_95; + key_except[ 96] = 448'hd8_80_ff_0e_96_0a_c8_93_37_89_0d_c1_96_eb_42_62_35_a8_81_fc_6c_1f_a3_40_b6_b0_0d_b1_33_87_39_d7_3e_f9_34_16_07_61_5c_00_39_44_b6_8c_a9_31_73_a8_ec_64_5f_4a_80_cc_8a_2d; + cw [ 97] = 64'h0b_76_40_6e_34_24_01_0d; + key_except[ 97] = 448'h0d_70_46_68_32_22_07_0b_04_9e_64_2c_03_09_48_29_55_9a_74_85_46_a0_e4_45_55_2d_23_1b_d1_0a_61_16_24_87_02_46_42_0e_75_d5_34_cd_14_b5_09_49_00_57_91_b2_07_14_88_90_32_4e; + cw [ 98] = 64'he9_88_87_a5_e7_7f_0e_10; + key_except[ 98] = 448'hef_8e_81_a3_e1_79_08_16_7f_3f_8a_ce_64_b5_2d_f7_4a_25_aa_3e_08_e3_ef_36_ac_1e_19_0e_3f_34_92_a0_cb_48_37_0d_bb_4c_af_a6_c6_8b_82_c1_b4_f5_ed_68_1e_2e_c8_ff_11_b9_ed_00; + cw [ 99] = 64'heb_e1_dc_09_18_56_c8_9b; + key_except[ 99] = 448'hed_e7_da_0f_1e_50_ce_9d_d7_0a_5b_07_be_7b_00_2f_8f_0c_d6_ce_eb_16_eb_40_ae_a5_8b_f0_f4_27_2a_33_57_39_8e_6f_47_20_de_34_43_d6_ba_ac_39_27_e3_13_fe_3c_39_08_b8_86_4d_0f; + + #2; + + for(i=0;i<100;i=i+1) + begin + cwt=cw[i]; + #2; + if(key!=key_except[i]) + $display("error at %d",i); + #2; + end + + #2; + $finish; + end + + + key_computer k( + .cw(cwt) + ,.key(key) + ); +endmodule Index: csa/trunk/bench/decrypt_tb.v =================================================================== --- csa/trunk/bench/decrypt_tb.v (nonexistent) +++ csa/trunk/bench/decrypt_tb.v (revision 24) @@ -0,0 +1,371 @@ + +// this is the test bench for decrypt module + + +`define TEST_DECRYPT + +`timescale 10ns/1ns +module decrypt_tb; + +reg clk; +reg rst; + +`ifdef TEST_DECRYPT + + +integer bytes; +integer out_bytes; + +reg [204*8-1 : 0] tt; +reg [8*8-1 : 0] even_cw; +reg [8*8-1 : 0] odd_cw; +reg [8-1 : 0] encrypted [188:1]; +reg [8-1 : 0] decrypted [188:1]; + +reg [8*8-1:0] ck; +reg even_odd; +reg en; +reg key_en; +reg [ 8-1:0] enc; +wire [ 8-1:0] dec; +wire invalid; + +initial +begin + $read_data( + "../test_dat/decrypt.in" + ,tt + ); + + even_cw = tt [204*8-1 : 196*8 ] ; + odd_cw = tt [196*8-1 : 188*8 ] ; + out_bytes = 1; + + encrypted[188] = tt [188*8-1 :187*8 ] ; + encrypted[187] = tt [187*8-1 :186*8 ] ; + encrypted[186] = tt [186*8-1 :185*8 ] ; + encrypted[185] = tt [185*8-1 :184*8 ] ; + encrypted[184] = tt [184*8-1 :183*8 ] ; + encrypted[183] = tt [183*8-1 :182*8 ] ; + encrypted[182] = tt [182*8-1 :181*8 ] ; + encrypted[181] = tt [181*8-1 :180*8 ] ; + encrypted[180] = tt [180*8-1 :179*8 ] ; + encrypted[179] = tt [179*8-1 :178*8 ] ; + encrypted[178] = tt [178*8-1 :177*8 ] ; + encrypted[177] = tt [177*8-1 :176*8 ] ; + encrypted[176] = tt [176*8-1 :175*8 ] ; + encrypted[175] = tt [175*8-1 :174*8 ] ; + encrypted[174] = tt [174*8-1 :173*8 ] ; + encrypted[173] = tt [173*8-1 :172*8 ] ; + encrypted[172] = tt [172*8-1 :171*8 ] ; + encrypted[171] = tt [171*8-1 :170*8 ] ; + encrypted[170] = tt [170*8-1 :169*8 ] ; + encrypted[169] = tt [169*8-1 :168*8 ] ; + encrypted[168] = tt [168*8-1 :167*8 ] ; + encrypted[167] = tt [167*8-1 :166*8 ] ; + encrypted[166] = tt [166*8-1 :165*8 ] ; + encrypted[165] = tt [165*8-1 :164*8 ] ; + encrypted[164] = tt [164*8-1 :163*8 ] ; + encrypted[163] = tt [163*8-1 :162*8 ] ; + encrypted[162] = tt [162*8-1 :161*8 ] ; + encrypted[161] = tt [161*8-1 :160*8 ] ; + encrypted[160] = tt [160*8-1 :159*8 ] ; + encrypted[159] = tt [159*8-1 :158*8 ] ; + encrypted[158] = tt [158*8-1 :157*8 ] ; + encrypted[157] = tt [157*8-1 :156*8 ] ; + encrypted[156] = tt [156*8-1 :155*8 ] ; + encrypted[155] = tt [155*8-1 :154*8 ] ; + encrypted[154] = tt [154*8-1 :153*8 ] ; + encrypted[153] = tt [153*8-1 :152*8 ] ; + encrypted[152] = tt [152*8-1 :151*8 ] ; + encrypted[151] = tt [151*8-1 :150*8 ] ; + encrypted[150] = tt [150*8-1 :149*8 ] ; + encrypted[149] = tt [149*8-1 :148*8 ] ; + encrypted[148] = tt [148*8-1 :147*8 ] ; + encrypted[147] = tt [147*8-1 :146*8 ] ; + encrypted[146] = tt [146*8-1 :145*8 ] ; + encrypted[145] = tt [145*8-1 :144*8 ] ; + encrypted[144] = tt [144*8-1 :143*8 ] ; + encrypted[143] = tt [143*8-1 :142*8 ] ; + encrypted[142] = tt [142*8-1 :141*8 ] ; + encrypted[141] = tt [141*8-1 :140*8 ] ; + encrypted[140] = tt [140*8-1 :139*8 ] ; + encrypted[139] = tt [139*8-1 :138*8 ] ; + encrypted[138] = tt [138*8-1 :137*8 ] ; + encrypted[137] = tt [137*8-1 :136*8 ] ; + encrypted[136] = tt [136*8-1 :135*8 ] ; + encrypted[135] = tt [135*8-1 :134*8 ] ; + encrypted[134] = tt [134*8-1 :133*8 ] ; + encrypted[133] = tt [133*8-1 :132*8 ] ; + encrypted[132] = tt [132*8-1 :131*8 ] ; + encrypted[131] = tt [131*8-1 :130*8 ] ; + encrypted[130] = tt [130*8-1 :129*8 ] ; + encrypted[129] = tt [129*8-1 :128*8 ] ; + encrypted[128] = tt [128*8-1 :127*8 ] ; + encrypted[127] = tt [127*8-1 :126*8 ] ; + encrypted[126] = tt [126*8-1 :125*8 ] ; + encrypted[125] = tt [125*8-1 :124*8 ] ; + encrypted[124] = tt [124*8-1 :123*8 ] ; + encrypted[123] = tt [123*8-1 :122*8 ] ; + encrypted[122] = tt [122*8-1 :121*8 ] ; + encrypted[121] = tt [121*8-1 :120*8 ] ; + encrypted[120] = tt [120*8-1 :119*8 ] ; + encrypted[119] = tt [119*8-1 :118*8 ] ; + encrypted[118] = tt [118*8-1 :117*8 ] ; + encrypted[117] = tt [117*8-1 :116*8 ] ; + encrypted[116] = tt [116*8-1 :115*8 ] ; + encrypted[115] = tt [115*8-1 :114*8 ] ; + encrypted[114] = tt [114*8-1 :113*8 ] ; + encrypted[113] = tt [113*8-1 :112*8 ] ; + encrypted[112] = tt [112*8-1 :111*8 ] ; + encrypted[111] = tt [111*8-1 :110*8 ] ; + encrypted[110] = tt [110*8-1 :109*8 ] ; + encrypted[109] = tt [109*8-1 :108*8 ] ; + encrypted[108] = tt [108*8-1 :107*8 ] ; + encrypted[107] = tt [107*8-1 :106*8 ] ; + encrypted[106] = tt [106*8-1 :105*8 ] ; + encrypted[105] = tt [105*8-1 :104*8 ] ; + encrypted[104] = tt [104*8-1 :103*8 ] ; + encrypted[103] = tt [103*8-1 :102*8 ] ; + encrypted[102] = tt [102*8-1 :101*8 ] ; + encrypted[101] = tt [101*8-1 :100*8 ] ; + encrypted[100] = tt [100*8-1 : 99*8 ] ; + encrypted[ 99] = tt [ 99*8-1 : 98*8 ] ; + encrypted[ 98] = tt [ 98*8-1 : 97*8 ] ; + encrypted[ 97] = tt [ 97*8-1 : 96*8 ] ; + encrypted[ 96] = tt [ 96*8-1 : 95*8 ] ; + encrypted[ 95] = tt [ 95*8-1 : 94*8 ] ; + encrypted[ 94] = tt [ 94*8-1 : 93*8 ] ; + encrypted[ 93] = tt [ 93*8-1 : 92*8 ] ; + encrypted[ 92] = tt [ 92*8-1 : 91*8 ] ; + encrypted[ 91] = tt [ 91*8-1 : 90*8 ] ; + encrypted[ 90] = tt [ 90*8-1 : 89*8 ] ; + encrypted[ 89] = tt [ 89*8-1 : 88*8 ] ; + encrypted[ 88] = tt [ 88*8-1 : 87*8 ] ; + encrypted[ 87] = tt [ 87*8-1 : 86*8 ] ; + encrypted[ 86] = tt [ 86*8-1 : 85*8 ] ; + encrypted[ 85] = tt [ 85*8-1 : 84*8 ] ; + encrypted[ 84] = tt [ 84*8-1 : 83*8 ] ; + encrypted[ 83] = tt [ 83*8-1 : 82*8 ] ; + encrypted[ 82] = tt [ 82*8-1 : 81*8 ] ; + encrypted[ 81] = tt [ 81*8-1 : 80*8 ] ; + encrypted[ 80] = tt [ 80*8-1 : 79*8 ] ; + encrypted[ 79] = tt [ 79*8-1 : 78*8 ] ; + encrypted[ 78] = tt [ 78*8-1 : 77*8 ] ; + encrypted[ 77] = tt [ 77*8-1 : 76*8 ] ; + encrypted[ 76] = tt [ 76*8-1 : 75*8 ] ; + encrypted[ 75] = tt [ 75*8-1 : 74*8 ] ; + encrypted[ 74] = tt [ 74*8-1 : 73*8 ] ; + encrypted[ 73] = tt [ 73*8-1 : 72*8 ] ; + encrypted[ 72] = tt [ 72*8-1 : 71*8 ] ; + encrypted[ 71] = tt [ 71*8-1 : 70*8 ] ; + encrypted[ 70] = tt [ 70*8-1 : 69*8 ] ; + encrypted[ 69] = tt [ 69*8-1 : 68*8 ] ; + encrypted[ 68] = tt [ 68*8-1 : 67*8 ] ; + encrypted[ 67] = tt [ 67*8-1 : 66*8 ] ; + encrypted[ 66] = tt [ 66*8-1 : 65*8 ] ; + encrypted[ 65] = tt [ 65*8-1 : 64*8 ] ; + encrypted[ 64] = tt [ 64*8-1 : 63*8 ] ; + encrypted[ 63] = tt [ 63*8-1 : 62*8 ] ; + encrypted[ 62] = tt [ 62*8-1 : 61*8 ] ; + encrypted[ 61] = tt [ 61*8-1 : 60*8 ] ; + encrypted[ 60] = tt [ 60*8-1 : 59*8 ] ; + encrypted[ 59] = tt [ 59*8-1 : 58*8 ] ; + encrypted[ 58] = tt [ 58*8-1 : 57*8 ] ; + encrypted[ 57] = tt [ 57*8-1 : 56*8 ] ; + encrypted[ 56] = tt [ 56*8-1 : 55*8 ] ; + encrypted[ 55] = tt [ 55*8-1 : 54*8 ] ; + encrypted[ 54] = tt [ 54*8-1 : 53*8 ] ; + encrypted[ 53] = tt [ 53*8-1 : 52*8 ] ; + encrypted[ 52] = tt [ 52*8-1 : 51*8 ] ; + encrypted[ 51] = tt [ 51*8-1 : 50*8 ] ; + encrypted[ 50] = tt [ 50*8-1 : 49*8 ] ; + encrypted[ 49] = tt [ 49*8-1 : 48*8 ] ; + encrypted[ 48] = tt [ 48*8-1 : 47*8 ] ; + encrypted[ 47] = tt [ 47*8-1 : 46*8 ] ; + encrypted[ 46] = tt [ 46*8-1 : 45*8 ] ; + encrypted[ 45] = tt [ 45*8-1 : 44*8 ] ; + encrypted[ 44] = tt [ 44*8-1 : 43*8 ] ; + encrypted[ 43] = tt [ 43*8-1 : 42*8 ] ; + encrypted[ 42] = tt [ 42*8-1 : 41*8 ] ; + encrypted[ 41] = tt [ 41*8-1 : 40*8 ] ; + encrypted[ 40] = tt [ 40*8-1 : 39*8 ] ; + encrypted[ 39] = tt [ 39*8-1 : 38*8 ] ; + encrypted[ 38] = tt [ 38*8-1 : 37*8 ] ; + encrypted[ 37] = tt [ 37*8-1 : 36*8 ] ; + encrypted[ 36] = tt [ 36*8-1 : 35*8 ] ; + encrypted[ 35] = tt [ 35*8-1 : 34*8 ] ; + encrypted[ 34] = tt [ 34*8-1 : 33*8 ] ; + encrypted[ 33] = tt [ 33*8-1 : 32*8 ] ; + encrypted[ 32] = tt [ 32*8-1 : 31*8 ] ; + encrypted[ 31] = tt [ 31*8-1 : 30*8 ] ; + encrypted[ 30] = tt [ 30*8-1 : 29*8 ] ; + encrypted[ 29] = tt [ 29*8-1 : 28*8 ] ; + encrypted[ 28] = tt [ 28*8-1 : 27*8 ] ; + encrypted[ 27] = tt [ 27*8-1 : 26*8 ] ; + encrypted[ 26] = tt [ 26*8-1 : 25*8 ] ; + encrypted[ 25] = tt [ 25*8-1 : 24*8 ] ; + encrypted[ 24] = tt [ 24*8-1 : 23*8 ] ; + encrypted[ 23] = tt [ 23*8-1 : 22*8 ] ; + encrypted[ 22] = tt [ 22*8-1 : 21*8 ] ; + encrypted[ 21] = tt [ 21*8-1 : 20*8 ] ; + encrypted[ 20] = tt [ 20*8-1 : 19*8 ] ; + encrypted[ 19] = tt [ 19*8-1 : 18*8 ] ; + encrypted[ 18] = tt [ 18*8-1 : 17*8 ] ; + encrypted[ 17] = tt [ 17*8-1 : 16*8 ] ; + encrypted[ 16] = tt [ 16*8-1 : 15*8 ] ; + encrypted[ 15] = tt [ 15*8-1 : 14*8 ] ; + encrypted[ 14] = tt [ 14*8-1 : 13*8 ] ; + encrypted[ 13] = tt [ 13*8-1 : 12*8 ] ; + encrypted[ 12] = tt [ 12*8-1 : 11*8 ] ; + encrypted[ 11] = tt [ 11*8-1 : 10*8 ] ; + encrypted[ 10] = tt [ 10*8-1 : 9*8 ] ; + encrypted[ 9] = tt [ 9*8-1 : 8*8 ] ; + encrypted[ 8] = tt [ 8*8-1 : 7*8 ] ; + encrypted[ 7] = tt [ 7*8-1 : 6*8 ] ; + encrypted[ 6] = tt [ 6*8-1 : 5*8 ] ; + encrypted[ 5] = tt [ 5*8-1 : 4*8 ] ; + encrypted[ 4] = tt [ 4*8-1 : 3*8 ] ; + encrypted[ 3] = tt [ 3*8-1 : 2*8 ] ; + encrypted[ 2] = tt [ 2*8-1 : 1*8 ] ; + encrypted[ 1] = tt [ 1*8-1 : 0*8 ] ; + en=0; + key_en=0; + + repeat(14)@(posedge clk); + + // set even cw + @(posedge clk); + ck=even_cw; + en=0; + even_odd=0; + @(posedge clk); + key_en=1; + @(posedge clk); + key_en=0; + repeat (11) @(posedge clk); + + // set odd key + @(posedge clk); + ck=odd_cw; + key_en=1; + en=0; + even_odd=1; + @(posedge clk); + key_en=0; + repeat (11)@(posedge clk); + repeat(4)@(posedge clk); + + // decrypt + for(bytes=1;bytes<=188;bytes=bytes+1) + begin + en=1; + enc=encrypted[bytes]; + @(posedge clk); + en=0; + @(posedge clk); + end + + repeat(44) @(posedge clk); + + // output result + $write_data( + "../test_dat/decrypt.out.v" + ,"w" + ,decrypted[1] + ); + for(out_bytes=2;out_bytes<=188;out_bytes=out_bytes+1) + begin + $write_data( + "../test_dat/decrypt.out.v" + ,"a" + ,decrypted[out_bytes] + ); + end + + + $stop; + +end + +always @(posedge clk) + if(invalid) + begin + decrypted[out_bytes]=dec; + out_bytes=out_bytes+1; + end + + +decrypt b( + .clk (clk) + , .rst (rst) + , .ck (ck) + , .key_en (key_en) + , .even_odd (even_odd) + , .en (en) + , .encrypted (enc) + , .decrypted (dec) + , .invalid (invalid) + ); + + + +`else + +reg en; +reg init; +reg [8*8-1:0] ck; +reg [8*8-1:0] sb; +wire [8*8-1:0] cb; + +initial +begin + repeat (12)@(posedge clk); + init=1'h1; + en=1'h1; + ck=64'hffffffffffffffff; + sb=64'hffffffffffffffff; + @(posedge clk); + en=1'h0; + @(posedge clk); + en=1'h1; + init=1'h0; + @(posedge clk); + en=1'h0; + @(posedge clk); + repeat(10)@(posedge clk); + en=1'h1; + @(posedge clk); + en=1'h0; + repeat(10)@(posedge clk); + + $stop; + +end + +stream_cypher sc( + .clk (clk) + , .rst (rst) + , .en (en) + , .init (init) + , .ck (ck) + , .sb (sb) + , .cb (cb) + ); + +`endif + +initial +begin + clk<=1'b0; + forever #5 clk=~clk; +end + +initial +begin + rst<=1'b1; + @(posedge clk); + @(posedge clk); + rst=1'h0; +end +endmodule Index: csa/trunk/bench/key_schedule_tb.v =================================================================== --- csa/trunk/bench/key_schedule_tb.v (nonexistent) +++ csa/trunk/bench/key_schedule_tb.v (revision 24) @@ -0,0 +1,68 @@ +// the test bench module for key_schedule +`timescale 10ns/1ns + +module key_schedule_tb; +reg [8*8-1:0] ck; +reg clk; +reg rst; +reg start; +wire [56*8-1:0] kk; + + initial + begin + clk<=1'h0; + forever #5 clk=~clk; + end + + initial + begin + @(posedge clk); + rst<=1'h1; + @(posedge clk); + @(posedge clk); + rst=1'h0; + @(posedge clk); + end + + initial + begin + +`ifdef ____DEBUG + // read CK + $read_data( + "../test_dat/key_schedule.in" + ,ck + ); +`endif + start=1'h0; + ck=64'haf361916fd4b4b77; + + repeat (4) @(posedge clk); + start=1'h1; + @(posedge clk); + start=1'h0; + repeat (200) @(posedge clk); + + $display("ck=%h",ck); + $display("kk=%h",kk); + + // output kk + + //$write_data( + // "../test_dat/key_schedule.out.v" + // ,"a" + // ,kk + // ); + $finish; + end + + key_schedule ks( + .clk (clk) + ,.rst (rst) + ,.start (start) + ,.i_ck (ck) + ,.busy () + ,.done () + ,.o_kk (kk) + ); +endmodule Index: csa/trunk/bench/makefile =================================================================== --- csa/trunk/bench/makefile (nonexistent) +++ csa/trunk/bench/makefile (revision 24) @@ -0,0 +1,78 @@ + +PROJ_NAME ?= key_schedule +DEBUG ?= y + +MODELSIM_DIR=/opt/modeltech + +ifeq ($(DEBUG),y) +CFLAGS=-DDEBUG +else +CFLAGS= +endif + +all:csa_pli.vpi $(PROJ_NAME).vvp csa_pli_modelsim + +csa_pli.vpi:csa_pli.c + iverilog-vpi $(CFLAGS) --name=csa_pli $^ >/dev/null + rm -fr csa_pli.o + +csa_pli_modelsim:csa_pli.sl + +%.sl:%.o + ld -shared -E -o $@ $^ + rm -fr csa_pli.o + +%.o:%.c + gcc -c -g -I$(MODELSIM_DIR)/include $^ + + +%.vvp:%_tb.v ../rtl/%.v + iverilog $(CFLAGS) -tvvp -o$@ $^ + +test:csa_pli.vpi $(PROJ_NAME).vvp + vvp -M. -mcsa_pli $(PROJ_NAME).vvp + +clean: + rm -fr *.o *.vvp *.vpi *.log *.key *.sl + +key_schedule.vvp:key_schedule_tb.v ../rtl/key_schedule.v ../rtl/key_perm.v + +block_decypher.vvp:block_decypher_tb.v ../rtl/block_decypher.v ../rtl/block_perm.v ../rtl/block_sbox.v + +decrypt.vvp:decrypt_tb.v \ + ../rtl/decrypt.v \ + ../rtl/key_schedule.v \ + ../rtl/block_perm.v \ + ../rtl/key_perm.v \ + ../rtl/stream_cypher.v \ + ../rtl/sbox1.v \ + ../rtl/sbox2.v \ + ../rtl/sbox3.v \ + ../rtl/sbox4.v \ + ../rtl/sbox5.v \ + ../rtl/sbox6.v \ + ../rtl/sbox7.v \ + ../rtl/sboxes.v \ + ../rtl/stream_iteration.v \ + ../rtl/stream_byte.v \ + ../rtl/stream_8bytes.v \ + ../rtl/single_block_decryper.v \ + ../rtl/block_sbox.v \ + ../rtl/block_decypher.v + +stream_cypher.vvp:stream_cypher_tb.v \ + ../rtl/stream_cypher.v \ + ../rtl/sbox1.v \ + ../rtl/sbox2.v \ + ../rtl/sbox3.v \ + ../rtl/sbox4.v \ + ../rtl/sbox5.v \ + ../rtl/sbox6.v \ + ../rtl/sbox7.v \ + ../rtl/sboxes.v \ + ../rtl/stream_iteration.v \ + ../rtl/stream_byte.v \ + ../rtl/stream_8bytes.v + +veriwell_test: + veriwell key_schedule_tb.v ../rtl/key_schedule.v ../rtl/key_perm.v Index: csa/trunk/bench/stream_cypher_tb.v =================================================================== --- csa/trunk/bench/stream_cypher_tb.v (nonexistent) +++ csa/trunk/bench/stream_cypher_tb.v (revision 24) @@ -0,0 +1,90 @@ + + +// this file is the testbench of stream_cypher module + +`timescale 1ns/1ns +module stream_cypher_tb; + +reg clk; +reg rst; + +reg en; +reg init; + + +reg [8*8-1:0] ck; +reg [8*8-1:0] sb; + +wire [8*8-1:0] cb; + +reg [24*8-1:0] tt; // input + +initial +begin +// $read_data( +// "../test_dat/stream_cypher.in" +// ,tt +// ); + tt=192'b001001110001111100011000000100010000101000000010111110111111010011101101111001101101111011010111110100001100100111000001101110101011001110101100101001001001110110010110100011111000011110000000; + @(posedge rst); + ck =tt[ 24* 8-1: 16* 8]; + en=1; + init=1; + sb =tt[ 16*8-1:8* 8]; + @(posedge clk); + en=1; + init=0; + sb =tt[ 8*8-1:0* 8]; + +// $write_data( +// "../test_dat/stream_cypher.out.v" +// ,"w" +// ,cb +// ); + + @(posedge clk); + $display("\ncb=%b\n",cb); + $display("b.b.b1.b1.op=%b\n",b.b.b1.b1.op); + $display("b.b.b1.b1.Do=%b\n",b.b.b1.b1.Do); + $display("b.b.b1.b1.Ei=%b\n",b.b.b1.b1.Ei); + $display("b.b.b1.b1.Zi=%b\n",b.b.b1.b1.Zi); + $display("b.b.b1.b1.extra_B=%b\n",b.b.b1.b1.extra_B); + $display("b.b.b1.b2.op=%b\n",b.b.b1.b2.op); + $display("b.b.b1.b3.op=%b\n",b.b.b1.b3.op); + $display("b.b.b1.b4.op=%b\n",b.b.b1.b4.op); + +// $write_data( +// "../test_dat/stream_cypher.out.v" +// ,"a" +// ,cb +// ); + @(posedge clk); + + $finish; +end + +initial +begin + clk<=1'b0; + forever #5 clk=~clk; +end + +initial +begin + rst<=1'b0; + @(posedge clk); + @(posedge clk); + rst=1'h1; +end + +stream_cypher b( + .clk (clk) + ,.rst_n (rst) + ,.en (en) + ,.init (init) + ,.ck (ck) + ,.sb (sb) + ,.cb (cb) + ); + +endmodule Index: csa/trunk/bench/csa_pli.c =================================================================== --- csa/trunk/bench/csa_pli.c (nonexistent) +++ csa/trunk/bench/csa_pli.c (revision 24) @@ -0,0 +1,148 @@ +/* + * ===================================================================================== + * + * Filename: read_ikey.c + * + * Description: this is a pli module to read the input key + * + * Version: 1.0 + * Created: 07/10/2008 09:18:10 PM + * Revision: none + * Compiler: gcc + * + * Author: mengxipeng@gmail.com + * Company: mengxipeng + * + * ===================================================================================== + */ + +#include +#include +#include + + +char data[120*8*8]; + +static int read_data(char *fn) +{ + vpiHandle systf_handle; + vpiHandle arg_itr; + vpiHandle arg_handle; + s_vpi_value value_s; + + FILE *fp; + FILE *fp1; + char str[120]; + int i; + int n; + + systf_handle = vpi_handle(vpiSysTfCall, NULL); + arg_itr = vpi_iterate(vpiArgument, systf_handle); + if (arg_itr == NULL) + { + vpi_printf("ERROR: $pow failed to obtain systf arg handles\n"); + return(0); + } + + /* read file name */ + arg_handle = vpi_scan(arg_itr); + value_s.format = vpiStringVal; + vpi_get_value(arg_handle, &value_s); + strcpy(str,value_s.value.str); + + fp=fopen(str,"r"); + if(fp) + { + fscanf(fp,"%s",&data); + value_s.format = vpiBinStrVal; + value_s.value.str=data; + arg_handle = vpi_scan(arg_itr); + vpi_put_value(arg_handle, &value_s,NULL, vpiNoDelay); + fclose(fp); + } + else + { + vpi_printf("can't open the input file in %s \n", __FUNCTION__); + } + + return 0; +} + +static void read_data_register() +{ + s_vpi_systf_data tf_data; + tf_data.type = vpiSysTask; + tf_data.tfname = "$read_data"; + tf_data.calltf = read_data; + tf_data.compiletf = 0; + tf_data.sizetf = 0; + vpi_register_systf(&tf_data); +} + +static int write_data(char *xx) +{ + vpiHandle systf_handle; + vpiHandle arg_itr; + vpiHandle arg_handle; + s_vpi_value value_s; + + FILE *fp; + char str[120]; + int i; + int n; + + systf_handle = vpi_handle(vpiSysTfCall, NULL); + arg_itr = vpi_iterate(vpiArgument, systf_handle); + if (arg_itr == NULL) + { + vpi_printf("ERROR: $pow failed to obtain systf arg handles\n"); + return(0); + } + + /* read file name */ + arg_handle = vpi_scan(arg_itr); + value_s.format = vpiStringVal; + vpi_get_value(arg_handle, &value_s); + strcpy(str,value_s.value.str); + + arg_handle = vpi_scan(arg_itr); + value_s.format = vpiStringVal; + vpi_get_value(arg_handle, &value_s); + if(!strcmp("a",value_s.value.str)) + fp=fopen(str,"a"); + else + fp=fopen(str,"w"); + if(fp) + { + value_s.format = vpiBinStrVal; + arg_handle = vpi_scan(arg_itr); + vpi_get_value(arg_handle, &value_s); + //fprintf(fp,"%s\n",data); + fprintf(fp,"%s\n",value_s.value.str); + fclose(fp); + } + else + { + vpi_printf("can't open the output file in %s \n", __FUNCTION__); + } + + return 0; +} + +static void write_data_register() +{ + s_vpi_systf_data tf_data; + tf_data.type = vpiSysTask; + tf_data.tfname = "$write_data"; + tf_data.calltf = write_data; + tf_data.compiletf = 0; + tf_data.sizetf = 0; + vpi_register_systf(&tf_data); +} + +void (*vlog_startup_routines[])() = { + read_data_register, + write_data_register, + 0 +}; + Index: csa/trunk/bench/block_decypher_tb.v =================================================================== --- csa/trunk/bench/block_decypher_tb.v (nonexistent) +++ csa/trunk/bench/block_decypher_tb.v (revision 24) @@ -0,0 +1,47 @@ +// this is the test bench for block_decypher module + +`timescale 10ns/1ns +module block_decypher_tb; + reg [64*8-1:0] tt; + reg [56*8-1:0] kk; + reg [8*8-1:0] ib; + wire [8*8-1:0] bd; + +initial +begin + $read_data( + "../test_dat/block_decypher.in" + ,tt + ); + + kk=tt [64*8-1:8*8]; + ib=tt [8*8-1:0]; + + #10; + + $write_data( + "../test_dat/block_decypher.out.v" + ,"w" + ,bd + ); +`ifdef DEBUG + $write_data( + "../test_dat/block_decypher.out.v" + ,"a" + ,kk + ); + $write_data( + "../test_dat/block_decypher.out.v" + ,"a" + ,ib + ); +`endif + +end + +block_decypher b( + .kk(kk) + ,.ib(ib) + ,.bd(bd) + ); +endmodule Index: csa/trunk/bench/key_perm_tb.v =================================================================== --- csa/trunk/bench/key_perm_tb.v (nonexistent) +++ csa/trunk/bench/key_perm_tb.v (revision 24) @@ -0,0 +1,35 @@ + +// this is the testbench file for key_perm module + +`timescale 10ns/1ns +module key_perm_tb; + +integer ofile; + +reg [63:0]i_key; +wire [63:0]o_key; + +initial +begin + // read the input key + $read_data( + "../test_dat/key_perm.in" + ,i_key + ); + #10; + + // output the permated key + $write_data( + "../test_dat/key_perm.out.v" + ,"w" + ,o_key + ); + $finish; +end + +key_perm k( + .i_key(i_key) + ,.o_key(o_key) + ); + +endmodule Index: csa/trunk/modelsim6.2b/csa.cr.mti =================================================================== --- csa/trunk/modelsim6.2b/csa.cr.mti (nonexistent) +++ csa/trunk/modelsim6.2b/csa.cr.mti (revision 24) @@ -0,0 +1 @@ + Index: csa/trunk/modelsim6.2b/stream_cypher.do =================================================================== --- csa/trunk/modelsim6.2b/stream_cypher.do (nonexistent) +++ csa/trunk/modelsim6.2b/stream_cypher.do (revision 24) @@ -0,0 +1,91 @@ + +quit -sim + + vlib work + +puts { + ModelSimSE general compile script version 1.1 + Copyright (c) Doulos June 2004, SD +} + +# Simply change the project settings in this section +# for each new project. There should be no need to +# modify the rest of the script. + +set library_file_list { + design_library { + ../rtl/stream_cypher.v + ../rtl/stream_iteration.v + ../rtl/stream_8bytes.v + ../rtl/sboxes.v + ../rtl/sbox1.v + ../rtl/sbox2.v + ../rtl/sbox3.v + ../rtl/stream_byte.v + ../rtl/sbox4.v + ../rtl/sbox5.v + ../rtl/sbox6.v + ../rtl/sbox7.v + } + + test_library { + ../bench/stream_cypher_tb.v + ../bench/decrypt_tb.v + } +} +set top_level work.stream_cypher_tb + +set wave_radices { + hexadecimal {data q} +} + + +# After sourcing the script from ModelSim for the +# first time use these commands to recompile. + +proc r {} {uplevel #0 source compile.tcl} +proc rr {} {global last_compile_time + set last_compile_time 0 + r } + proc q {} {quit -force } + +#Does this installation support Tk? +set tk_ok 1 +if [catch {package require Tk}] {set tk_ok 0} + +# Prefer a fixed point font for the transcript +set PrefMain(font) {Courier 10 roman normal} + +# Compile out of date files +set time_now [clock seconds] +if [catch {set last_compile_time}] { + set last_compile_time 0 +} +foreach {library file_list} $library_file_list { + vmap work work + foreach file $file_list { + if { $last_compile_time < [file mtime $file] } { + if [regexp {.vhdl?$} $file] { + vcom -93 $file + } else { + vlog $file + } + set last_compile_time 0 + } + } +} +set last_compile_time $time_now + +# Load the simulation +vsim $top_level -pli ../bench/csa_pli.sl + + +add wave -r /* + +radix -hexadecimal + +# Run the simulation +run -all + + + Index: csa/trunk/modelsim6.2b/csa.mpf =================================================================== --- csa/trunk/modelsim6.2b/csa.mpf (nonexistent) +++ csa/trunk/modelsim6.2b/csa.mpf (revision 24) @@ -0,0 +1,792 @@ +; Copyright 2006 Mentor Graphics Corporation +; +; All Rights Reserved. +; +; THIS WORK CONTAINS TRADE SECRET AND PROPRIETARY INFORMATION WHICH IS THE PROPERTY OF +; MENTOR GRAPHICS CORPORATION OR ITS LICENSORS AND IS SUBJECT TO LICENSE TERMS. +; + +[Library] +std = $MODEL_TECH/../std +ieee = $MODEL_TECH/../ieee +verilog = $MODEL_TECH/../verilog +vital2000 = $MODEL_TECH/../vital2000 +std_developerskit = $MODEL_TECH/../std_developerskit +synopsys = $MODEL_TECH/../synopsys +modelsim_lib = $MODEL_TECH/../modelsim_lib +sv_std = $MODEL_TECH/../sv_std +;vhdl_psl_checkers = $MODEL_TECH/../vhdl_psl_checkers // Source files only for this release +;verilog_psl_checkers = $MODEL_TECH/../verilog_psl_checkers // Source files only for this release + +work = work +[vcom] +; VHDL93 variable selects language version as the default. +; Default is VHDL-2002. +; Value of 0 or 1987 for VHDL-1987. +; Value of 1 or 1993 for VHDL-1993. +; Default or value of 2 or 2002 for VHDL-2002. +VHDL93 = 2002 + +; Show source line containing error. Default is off. +; Show_source = 1 + +; Turn off unbound-component warnings. Default is on. +; Show_Warning1 = 0 + +; Turn off process-without-a-wait-statement warnings. Default is on. +; Show_Warning2 = 0 + +; Turn off null-range warnings. Default is on. +; Show_Warning3 = 0 + +; Turn off no-space-in-time-literal warnings. Default is on. +; Show_Warning4 = 0 + +; Turn off multiple-drivers-on-unresolved-signal warnings. Default is on. +; Show_Warning5 = 0 + +; Turn off optimization for IEEE std_logic_1164 package. Default is on. +; Optimize_1164 = 0 + +; Turn on resolving of ambiguous function overloading in favor of the +; "explicit" function declaration (not the one automatically created by +; the compiler for each type declaration). Default is off. +; The .ini file has Explicit enabled so that std_logic_signed/unsigned +; will match the behavior of synthesis tools. +Explicit = 1 + +; Turn off acceleration of the VITAL packages. Default is to accelerate. +; NoVital = 1 + +; Turn off VITAL compliance checking. Default is checking on. +; NoVitalCheck = 1 + +; Ignore VITAL compliance checking errors. Default is to not ignore. +; IgnoreVitalErrors = 1 + +; Turn off VITAL compliance checking warnings. Default is to show warnings. +; Show_VitalChecksWarnings = 0 + +; Turn off PSL assertion warning messages. Default is to show warnings. +; Show_PslChecksWarnings = 0 + +; Enable parsing of embedded PSL assertions. Default is enabled. +; EmbeddedPsl = 0 + +; Keep silent about case statement static warnings. +; Default is to give a warning. +; NoCaseStaticError = 1 + +; Keep silent about warnings caused by aggregates that are not locally static. +; Default is to give a warning. +; NoOthersStaticError = 1 + +; Treat as errors: +; case statement static warnings +; warnings caused by aggregates that are not locally static +; Overrides NoCaseStaticError, NoOthersStaticError settings. +; PedanticErrors = 1 + +; Turn off inclusion of debugging info within design units. +; Default is to include debugging info. +; NoDebug = 1 + +; Turn off "Loading..." messages. Default is messages on. +; Quiet = 1 + +; Turn on some limited synthesis rule compliance checking. Checks only: +; -- signals used (read) by a process must be in the sensitivity list +; CheckSynthesis = 1 + +; Activate optimizations on expressions that do not involve signals, +; waits, or function/procedure/task invocations. Default is off. +; ScalarOpts = 1 + +; Turns on lint-style checking. +; Show_Lint = 1 + +; Require the user to specify a configuration for all bindings, +; and do not generate a compile time default binding for the +; component. This will result in an elaboration error of +; 'component not bound' if the user fails to do so. Avoids the rare +; issue of a false dependency upon the unused default binding. +; RequireConfigForAllDefaultBinding = 1 + +; Perform default binding at compile time. +; Default is to do default binding at load time. +; BindAtCompile=1; + +; Inhibit range checking on subscripts of arrays. Range checking on +; scalars defined with subtypes is inhibited by default. +; NoIndexCheck = 1 + +; Inhibit range checks on all (implicit and explicit) assignments to +; scalar objects defined with subtypes. +; NoRangeCheck = 1 + +; Run the 0in tools from within the simulator. +; Default value set to 0. Please set it to 1 to invoke 0in. +; VcomZeroIn = 1 + +; Set the options to be passed to the 0in tools. +; Default value set to "". Please set it to appropriate options needed. +; VcomZeroInOptions = "" + +; Turn off code coverage in VHDL subprograms. Default is on. +; CoverageNoSub = 0 + +; Automatically exclude VHDL case statement default branches. +; Default is to not exclude. +; CoverExcludeDefault = 1 + +; Turn on code coverage in VHDL generate blocks. Default is off. +; CoverGenerate = 1 + +; Use this directory for compiler temporary files instead of "work/_temp" +; CompilerTempDir = /tmp + +[vlog] + +; Turn off inclusion of debugging info within design units. +; Default is to include debugging info. +; NoDebug = 1 + +; Turn on `protect compiler directive processing. +; Default is to ignore `protect directives. +; Protect = 1 + +; Turn off "Loading..." messages. Default is messages on. +; Quiet = 1 + +; Turn on Verilog hazard checking (order-dependent accessing of global vars). +; Default is off. +; Hazard = 1 + +; Turn on converting regular Verilog identifiers to uppercase. Allows case +; insensitivity for module names. Default is no conversion. +; UpCase = 1 + +; Activate optimizations on expressions that do not involve signals, +; waits, or function/procedure/task invocations. Default is off. +; ScalarOpts = 1 + +; Turns on lint-style checking. +; Show_Lint = 1 + +; Show source line containing error. Default is off. +; Show_source = 1 + +; Turn on bad option warning. Default is off. +; Show_BadOptionWarning = 1 + +; Revert back to IEEE 1364-1995 syntax, default is 0 (off). +vlog95compat = 0 + +; Turn off PSL warning messages. Default is to show warnings. +; Show_PslChecksWarnings = 0 + +; Enable parsing of embedded PSL assertions. Default is enabled. +; EmbeddedPsl = 0 + +; Set the threshold for automatically identifying sparse Verilog memories. +; A memory with depth equal to or more than the sparse memory threshold gets +; marked as sparse automatically, unless specified otherwise in source code. +; The default is 0 (i.e. no memory is automatically given sparse status) +; SparseMemThreshold = 1048576 + +; Set the maximum number of iterations permitted for a generate loop. +; Restricting this permits the implementation to recognize infinite +; generate loops. +; GenerateLoopIterationMax = 100000 + +; Set the maximum depth permitted for a recursive generate instantiation. +; Restricting this permits the implementation to recognize infinite +; recursions. +; GenerateRecursionDepthMax = 200 + +; Run the 0in tools from within the simulator. +; Default value set to 0. Please set it to 1 to invoke 0in. +; VlogZeroIn = 1 + +; Set the options to be passed to the 0in tools. +; Default value set to "". Please set it to appropriate options needed. +; VlogZeroInOptions = "" + +; Run the 0in tools from within the simulator. +; Default value set to 0. Please set it to 1 to invoke 0in. +; VoptZeroIn = 1 + +; Set the options to be passed to the 0in tools. +; Default value set to "". Please set it to appropriate options needed. +; VoptZeroInOptions = "" + +; Set the option to treat all files specified in a vlog invocation as a +; single compilation unit. The default value is set to 0 which will treat +; each file as a separate compilation unit as specified in the P1800 draft standard. +; MultiFileCompilationUnit = 1 + +; Automatically exclude Verilog case statement default branches. +; Default is to not exclude. +; CoverExcludeDefault = 1 + +; Turn on code coverage in VLOG generate blocks. Default is off. +; CoverGenerate = 1 + +[sccom] +; Enable use of SCV include files and library. Default is off. +; UseScv = 1 + +; Add C++ compiler options to the sccom command line by using this variable. +; CppOptions = -g + +; Use custom C++ compiler located at this path rather than the default path. +; The path should point directly at a compiler executable. +; CppPath = /usr/bin/g++ + +; Enable verbose messages from sccom. Default is off. +; SccomVerbose = 1 + +; sccom logfile. Default is no logfile. +; SccomLogfile = sccom.log + +; Enable use of SC_MS include files and library. Default is off. +; UseScMs = 1 + +[vsim] + +; vopt flow +; Set to turn on automatic optimization of a design. +; Default is on +VoptFlow = 1 + +; vopt automatic SDF +; If automatic design optimization is on, enables automatic compilation +; of SDF files. +; Default is on, uncomment to turn off. +; VoptAutoSDFCompile = 0 + +; Simulator resolution +; Set to fs, ps, ns, us, ms, or sec with optional prefix of 1, 10, or 100. +resolution = 1ns + +; User time unit for run commands +; Set to default, fs, ps, ns, us, ms, or sec. The default is to use the +; unit specified for Resolution. For example, if Resolution is 100ps, +; then UserTimeUnit defaults to ps. +; Should generally be set to default. +UserTimeUnit = default + +; Default run length +RunLength = 5 ns + +; Maximum iterations that can be run without advancing simulation time +IterationLimit = 5000 + +; Control PSL and Verilog Assume directives during simulation +; Set SimulateAssumeDirectives = 0 to disable assume being simulated as asserts +; Set SimulateAssumeDirectives = 1 to enable assume simulation as asserts +; SimulateAssumeDirectives = 1 + +; Control the simulation of PSL and SVA +; These switches can be overridden by the vsim command line switches: +; -psl, -nopsl, -sva, -nosva. +; Set SimulatePSL = 0 to disable PSL simulation +; Set SimulatePSL = 1 to enable PSL simulation (default) +; SimulatePSL = 1 +; Set SimulateSVA = 0 to disable SVA simulation +; Set SimulateSVA = 1 to enable concurrent SVA simulation (default) +; SimulateSVA = 1 + +; Directives to license manager can be set either as single value or as +; space separated multi-values: +; vhdl Immediately reserve a VHDL license +; vlog Immediately reserve a Verilog license +; plus Immediately reserve a VHDL and Verilog license +; nomgc Do not look for Mentor Graphics Licenses +; nomti Do not look for Model Technology Licenses +; noqueue Do not wait in the license queue when a license is not available +; viewsim Try for viewer license but accept simulator license(s) instead +; of queuing for viewer license (PE ONLY) +; noviewer Disable checkout of msimviewer and vsim-viewer license +; features (PE ONLY) +; noslvhdl Disable checkout of qhsimvh and vsim license features +; noslvlog Disable checkout of qhsimvl and vsimvlog license features +; nomix Disable checkout of msimhdlmix and hdlmix license features +; nolnl Disable checkout of msimhdlsim and hdlsim license features +; mixedonly Disable checkout of qhsimvh,qhsimvl,vsim,vsimvlog license +; features +; lnlonly Disable checkout of qhsimvh,qhsimvl,vsim,vsimvlog,msimhdlmix, +; hdlmix license features +; Single value: +; License = plus +; Multi-value: +; License = noqueue plus + +; Stop the simulator after a VHDL/Verilog immediate assertion message +; 0 = Note 1 = Warning 2 = Error 3 = Failure 4 = Fatal +BreakOnAssertion = 4 + +; VHDL assertion Message Format +; %S - Severity Level +; %R - Report Message +; %T - Time of assertion +; %D - Delta +; %I - Instance or Region pathname (if available) +; %i - Instance pathname with process +; %O - Process name +; %K - Kind of object path is to return: Instance, Signal, Process or Unknown +; %P - Instance or Region path without leaf process +; %F - File +; %L - Line number of assertion or, if assertion is in a subprogram, line +; from which the call is made +; %% - Print '%' character +; If specific format for assertion level is defined, use its format. +; If specific format is not defined for assertion level: +; - and if failure occurs during elaboration, use AssertionFormatBreakLine; +; - and if assertion triggers a breakpoint (controlled by BreakOnAssertion +; level), use AssertionFormatBreak; +; - otherwise, use AssertionFormat. +; AssertionFormatBreakLine = "** %S: %R\n Time: %T Iteration: %D %K: %i File: %F Line: %L\n" +; AssertionFormatBreak = "** %S: %R\n Time: %T Iteration: %D %K: %i File: %F\n" +; AssertionFormat = "** %S: %R\n Time: %T Iteration: %D%I\n" +; AssertionFormatNote = "** %S: %R\n Time: %T Iteration: %D%I\n" +; AssertionFormatWarning = "** %S: %R\n Time: %T Iteration: %D%I\n" +; AssertionFormatError = "** %S: %R\n Time: %T Iteration: %D %K: %i File: %F\n" +; AssertionFormatFail = "** %S: %R\n Time: %T Iteration: %D %K: %i File: %F\n" +; AssertionFormatFatal = "** %S: %R\n Time: %T Iteration: %D %K: %i File: %F\n" + +; Assertion File - alternate file for storing VHDL/PSL/Verilog assertion messages +; AssertFile = assert.log + + +; Simulation Breakpoint messages +; This flag controls the display of function names when reporting the location +; where the simulator stops do to a breakpoint or fatal error. +; Example w/function name: # Break in Process ctr at counter.vhd line 44 +; Example wo/function name: # Break at counter.vhd line 44 +ShowFunctions = 1 + + +; Default radix for all windows and commands. +; Set to symbolic, ascii, binary, octal, decimal, hex, unsigned +DefaultRadix = hexadecimal + +; VSIM Startup command +; Startup = do startup.do + +; File for saving command transcript +TranscriptFile = transcript + +; File for saving command history +; CommandHistory = cmdhist.log + +; Specify whether paths in simulator commands should be described +; in VHDL or Verilog format. +; For VHDL, PathSeparator = / +; For Verilog, PathSeparator = . +; Must not be the same character as DatasetSeparator. +PathSeparator = / + +; Specify the dataset separator for fully rooted contexts. +; The default is ':'. For example: sim:/top +; Must not be the same character as PathSeparator. +DatasetSeparator = : + +; Specify a unique path separator for the Signal Spy set of functions. +; The default will be to use the PathSeparator variable. +; Must not be the same character as DatasetSeparator. +; SignalSpyPathSeparator = / + +; Disable VHDL assertion messages +; IgnoreNote = 1 +; IgnoreWarning = 1 +; IgnoreError = 1 +; IgnoreFailure = 1 + +; Disable System Verilog assertion messages +; Info and Warning are disabled by default +; IgnoreSVAInfo = 0 +; IgnoreSVAWarning = 0 +; IgnoreSVAError = 1 +; IgnoreSVAFatal = 1 + +; Default force kind. May be freeze, drive, deposit, or default +; or in other terms, fixed, wired, or charged. +; A value of "default" will use the signal kind to determine the +; force kind, drive for resolved signals, freeze for unresolved signals +; DefaultForceKind = freeze + +; If zero, open files when elaborated; otherwise, open files on +; first read or write. Default is 0. +; DelayFileOpen = 1 + +; Control VHDL files opened for write. +; 0 = Buffered, 1 = Unbuffered +UnbufferedOutput = 0 + +; Control the number of VHDL files open concurrently. +; This number should always be less than the current ulimit +; setting for max file descriptors. +; 0 = unlimited +ConcurrentFileLimit = 40 + +; Control the number of hierarchical regions displayed as +; part of a signal name shown in the Wave window. +; A value of zero tells VSIM to display the full name. +; The default is 0. +; WaveSignalNameWidth = 0 + +; Turn off warnings when changing VHDL constants and generics +; Default is 1 to generate warning messages +; WarnConstantChange = 0 + +; Turn off warnings from the std_logic_arith, std_logic_unsigned +; and std_logic_signed packages. +; StdArithNoWarnings = 1 + +; Turn off warnings from the IEEE numeric_std and numeric_bit packages. +; NumericStdNoWarnings = 1 + +; Control the format of the (VHDL) FOR generate statement label +; for each iteration. Do not quote it. +; The format string here must contain the conversion codes %s and %d, +; in that order, and no other conversion codes. The %s represents +; the generate_label; the %d represents the generate parameter value +; at a particular generate iteration (this is the position number if +; the generate parameter is of an enumeration type). Embedded whitespace +; is allowed (but discouraged); leading and trailing whitespace is ignored. +; Application of the format must result in a unique scope name over all +; such names in the design so that name lookup can function properly. +; GenerateFormat = %s__%d + +; Specify whether checkpoint files should be compressed. +; The default is 1 (compressed). +; CheckpointCompressMode = 0 + +; Specify whether to enable SystemVerilog DPI out-of-the-blue call. +; Out-of-the-blue call refers to a SystemVerilog export function call +; directly from a C function that don't have the proper context setup +; as done in DPI-C import C functions. When this is enabled, one can +; call a DPI export function (but not task) from any C code. +; The default is 0 (disabled). +; DpiOutOfTheBlue = 1 + +; List of dynamically loaded objects for Verilog PLI applications +; Veriuser = veriuser.sl + +; Specify default options for the restart command. Options can be one +; or more of: -force -nobreakpoint -nolist -nolog -nowave -noassertions +; DefaultRestartOptions = -force + +; HP-UX 10.20 ONLY - Enable memory locking to speed up large designs +; (> 500 megabyte memory footprint). Default is disabled. +; Specify number of megabytes to lock. +; LockedMemory = 1000 + +; HP-UX 11.00 ONLY - Use /usr/lib/libCsup_v2.sl for shared object loading. +; This is necessary when C++ files have been compiled with aCC's -AA option. +; The default behavior is to use /usr/lib/libCsup.sl. +; UseCsupV2 = 1 + +; Turn on (1) or off (0) WLF file compression. +; The default is 1 (compress WLF file). +; WLFCompress = 0 + +; Specify whether to save all design hierarchy (1) in the WLF file +; or only regions containing logged signals (0). +; The default is 0 (save only regions with logged signals). +; WLFSaveAllRegions = 1 + +; WLF file time limit. Limit WLF file by time, as closely as possible, +; to the specified amount of simulation time. When the limit is exceeded +; the earliest times get truncated from the file. +; If both time and size limits are specified the most restrictive is used. +; UserTimeUnits are used if time units are not specified. +; The default is 0 (no limit). Example: WLFTimeLimit = {100 ms} +; WLFTimeLimit = 0 + +; WLF file size limit. Limit WLF file size, as closely as possible, +; to the specified number of megabytes. If both time and size limits +; are specified then the most restrictive is used. +; The default is 0 (no limit). +; WLFSizeLimit = 1000 + +; Specify whether or not a WLF file should be deleted when the +; simulation ends. A value of 1 will cause the WLF file to be deleted. +; The default is 0 (do not delete WLF file when simulation ends). +; WLFDeleteOnQuit = 1 + +; Specify whether or not a WLF file should be optimized during +; simulation. If set to 0, the WLF file will not be optimized. +; The default is 1, optimize the WLF file. +; WLFOptimize = 0 + +; Specify the name of the WLF file. +; The default is vsim.wlf +; WLFFilename = vsim.wlf + +; WLF reader cache size limit. Specifies the internal WLF file cache size, +; in megabytes, for EACH open WLF file. A value of 0 turns off the +; WLF cache. +; The default setting is enabled to 256M per open WLF file. +; WLFCacheSize = 1000 + +; Specify the WLF file event collapse mode. +; 0 = Preserve all events and event order. (same as -wlfnocollapse) +; 1 = Only record values of logged objects at the end of a simulator iteration. +; (same as -wlfcollapsedelta) +; 2 = Only record values of logged objects at the end of a simulator time step. +; (same as -wlfcollapsetime) +; The default is 1. +; WLFCollapseMode = 0 + +; Turn on/off undebuggable SystemC type warnings. Default is on. +; ShowUndebuggableScTypeWarning = 0 + +; Turn on/off unassociated SystemC name warnings. Default is off. +; ShowUnassociatedScNameWarning = 1 + +; Set SystemC default time unit. +; Set to fs, ps, ns, us, ms, or sec with optional +; prefix of 1, 10, or 100. The default is 1 ns. +; The ScTimeUnit value is honored if it is coarser than Resolution. +; If ScTimeUnit is finer than Resolution, it is set to the value +; of Resolution. For example, if Resolution is 100ps and ScTimeUnit is ns, +; then the default time unit will be 1 ns. However if Resolution +; is 10 ns and ScTimeUnit is ns, then the default time unit will be 10 ns. +ScTimeUnit = ns + +; Set the SCV relationship name that will be used to identify phase +; relations. If the name given to a transactor relation matches this +; name, the transactions involved will be treated as phase transactions +ScvPhaseRelationName = mti_phase + + +; Do not exit when executing sc_stop(). +; If this is enabled, the control will be returned to the user before exiting +; the simulation. This can make some cleanup tasks easier before kernel exits. +; The default is off. +; NoExitOnScStop = 1 + +; Run simulator in assertion debug mode. Default is off. +; AssertionDebug = 1 + +; Turn on/off PSL/SVA concurrent assertion pass enable. Default is on. +; AssertionPassEnable = 0 + +; Turn on/off PSL/SVA concurrent assertion fail enable. Default is on. +; AssertionFailEnable = 0 + +; Set PSL/SVA concurrent assertion pass limit. Default is -1. +; Any positive integer, -1 for infinity. +; AssertionPassLimit = 1 + +; Set PSL/SVA concurrent assertion fail limit. Default is -1. +; Any positive integer, -1 for infinity. +; AssertionFailLimit = 1 + +; Turn on/off PSL concurrent assertion pass log. Default is off. +; The flag does not affect SVA +; AssertionPassLog = 1 + +; Turn on/off PSL concurrent assertion fail log. Default is on. +; The flag does not affect SVA +; AssertionFailLog = 0 + +; Set action type for PSL/SVA concurrent assertion fail action. Default is continue. +; 0 = Continue 1 = Break 2 = Exit +; AssertionFailAction = 1 + +; Turn on/off code coverage +; CodeCoverage = 0 + +; Count all code coverage condition and expression truth table rows that match. +; CoverCountAll = 1 + +; Turn on/off all PSL/SVA cover directive enables. Default is on. +; CoverEnable = 0 + +; Turn on/off PSL/SVA cover log. Default is off. +; CoverLog = 1 + +; Set "at_least" value for all PSL/SVA cover directives. Default is 1. +; CoverAtLeast = 2 + +; Set "limit" value for all PSL/SVA cover directives. Default is -1. +; Any positive integer, -1 for infinity. +; CoverLimit = 1 + +; Specify the coverage database filename. Default is "" (i.e. database is NOT automatically saved on close). +; UCDBFilename = vsim.ucdb + +; Set weight for all PSL/SVA cover directives. Default is 1. +; CoverWeight = 2 + +; Check vsim plusargs. Default is 0 (off). +; 0 = Don't check plusargs +; 1 = Warning on unrecognized plusarg +; 2 = Error and exit on unrecognized plusarg +; CheckPlusargs = 1 + +; Load the specified shared objects with the RTLD_GLOBAL flag. +; This gives global visibility to all symbols in the shared objects, +; meaning that subsequently loaded shared objects can bind to symbols +; in the global shared objects. The list of shared objects should +; be whitespace delimited. This option is not supported on the +; Windows or AIX platforms. +; GlobalSharedObjectList = example1.so example2.so example3.so + +; Run the 0in tools from within the simulator. +; Default value set to 0. Please set it to 1 to invoke 0in. +; VsimZeroIn = 1 + +; Set the options to be passed to the 0in tools. +; Default value set to "". Please set it to appropriate options needed. +; VsimZeroInOptions = "" + +; Initial seed for the Random Number Generator (RNG) of the root thread (SystemVerilog). +; Sv_Seed = 0 + +; Maximum size of dynamic arrays that are resized during randomize(). +; The default is 1000. A value of 0 indicates no limit. +; SolveArrayResizeMax = 1000 + +; Error message severity when randomize() failure is detected (SystemVerilog). +; The default is 0 (no error). +; 0 = No error 1 = Warning 2 = Error 3 = Failure 4 = Fatal +; SolveFailSeverity = 0 + +; Enable/disable debug information for randomize() failures (SystemVerilog). +; The default is 0 (disabled). Set to 1 to enable. +; SolveFailDebug = 0 + +; When SolveFailDebug is enabled, this value specifies the maximum number of +; constraint subsets that will be tested for conflicts. +; The default is 0 (no limit). +; SolveFailDebugLimit = 0 + +; When SolveFailDebug is eanbled, this value specifies the maximum size of +; constraint subsets that will be tested for conflicts. +; The default value is 0 (no limit). +; SolveFailDebugMaxSet = 0 + +; Specify random sequence compatiblity with a prior letter release. This +; option is used to get the same random sequences during simulation as +; as a prior letter release. Only prior letter releases (of the current +; number release) are allowed. +; Note: To achieve the same random sequences, solver optimizations and/or +; bug fixes introduced since the specified release may be disabled - +; yielding the performance / behavior of the prior release. +; Default value set to "" (random compatibility not required). +; SolveRev = "" + +; Environment variable expansion of command line arguments has been depricated +; in favor shell level expansion. Universal environment variable expansion +; inside -f files is support and continued support for MGC Location Maps provide +; alternative methods for handling flexible pathnames. +; The following line may be uncommented and the value set to 1 to re-enable this +; deprecated behavior. The default value is 0. +; DeprecatedEnvironmentVariableExpansion = 0 + +; Retroactive Recording uses a limited number of private data channels in the WLF +; file. Too many channels degrade WLF performance. If the limit is reached, +; simulation ends with a fatal error. You may change this limit as needed, but be +; aware of the implications of too many channels. The value must be an integer +; greater than or equal to zero, where zero disables all retroactive recording. +; RetroChannelLimit = 20 + +; Options to give vopt when code coverage is turned on. +; Default is "+acc=lprnb -opt=-merge -opt=-suppressAlways" +; VoptCoverageOptions = +acc=lprnb -opt=-merge -opt=-suppressAlways + +DelayFileOpen = 1 +[lmc] +; The simulator's interface to Logic Modeling's SmartModel SWIFT software +libsm = $MODEL_TECH/libsm.sl +; The simulator's interface to Logic Modeling's SmartModel SWIFT software (Windows NT) +; libsm = $MODEL_TECH/libsm.dll +; Logic Modeling's SmartModel SWIFT software (HP 9000 Series 700) +; libswift = $LMC_HOME/lib/hp700.lib/libswift.sl +; Logic Modeling's SmartModel SWIFT software (IBM RISC System/6000) +; libswift = $LMC_HOME/lib/ibmrs.lib/swift.o +; Logic Modeling's SmartModel SWIFT software (Sun4 Solaris) +; libswift = $LMC_HOME/lib/sun4Solaris.lib/libswift.so +; Logic Modeling's SmartModel SWIFT software (Windows NT) +; libswift = $LMC_HOME/lib/pcnt.lib/libswift.dll +; Logic Modeling's SmartModel SWIFT software (Linux) +; libswift = $LMC_HOME/lib/x86_linux.lib/libswift.so + +; The simulator's interface to Logic Modeling's hardware modeler SFI software +libhm = $MODEL_TECH/libhm.sl +; The simulator's interface to Logic Modeling's hardware modeler SFI software (Windows NT) +; libhm = $MODEL_TECH/libhm.dll +; Logic Modeling's hardware modeler SFI software (HP 9000 Series 700) +; libsfi = /lib/hp700/libsfi.sl +; Logic Modeling's hardware modeler SFI software (IBM RISC System/6000) +; libsfi = /lib/rs6000/libsfi.a +; Logic Modeling's hardware modeler SFI software (Sun4 Solaris) +; libsfi = /lib/sun4.solaris/libsfi.so +; Logic Modeling's hardware modeler SFI software (Windows NT) +; libsfi = /lib/pcnt/lm_sfi.dll +; Logic Modeling's hardware modeler SFI software (Linux) +; libsfi = /lib/linux/libsfi.so + +[msg_system] +; Change a message severity or suppress a message. +; The format is: = [,...] +; Examples: +; note = 3009 +; warning = 3033 +; error = 3010,3016 +; fatal = 3016,3033 +; suppress = 3009,3016,3043 +; The command verror can be used to get the complete +; description of a message. + +; Control transcripting of elaboration/runtime messages. +; The default is to have messages appear in the transcript and +; recorded in the wlf file (messages that are recorded in the +; wlf file can be viewed in the MsgViewer). The other settings +; are to send messages only to the transcript or only to the +; wlf file. The valid values are +; both {default} +; tran {transcript only} +; wlf {wlf file only} +; msgmode = both +[Project] +Project_Version = 6 +Project_DefaultLib = work +Project_SortMethod = unused +Project_Files_Count = 0 +Project_Sim_Count = 0 +Project_Folder_Count = 0 +Echo_Compile_Output = 0 +Save_Compile_Report = 1 +Project_Opt_Count = 0 +ForceSoftPaths = 0 +ReOpenSourceFiles = 1 +VERILOG_DoubleClick = Edit +VERILOG_CustomDoubleClick = +VHDL_DoubleClick = Edit +VHDL_CustomDoubleClick = +PSL_DoubleClick = Edit +PSL_CustomDoubleClick = +TEXT_DoubleClick = Edit +TEXT_CustomDoubleClick = +SYSTEMC_DoubleClick = Edit +SYSTEMC_CustomDoubleClick = +TCL_DoubleClick = Edit +TCL_CustomDoubleClick = +MACRO_DoubleClick = Edit +MACRO_CustomDoubleClick = +VCD_DoubleClick = Edit +VCD_CustomDoubleClick = +SDF_DoubleClick = Edit +SDF_CustomDoubleClick = +XML_DoubleClick = Edit +XML_CustomDoubleClick = +LOGFILE_DoubleClick = Edit +LOGFILE_CustomDoubleClick = +EditorState = {tabbed horizontal 1} {/mnt/win_f/work/csa/csa/bench/decrypt_tb.v 0 1} +Project_Major_Version = 6 +Project_Minor_Version = 2 Index: csa/trunk/sw_sim/misc.h =================================================================== --- csa/trunk/sw_sim/misc.h (nonexistent) +++ csa/trunk/sw_sim/misc.h (revision 24) @@ -0,0 +1,45 @@ + +#define READ_DATA(a,n) \ +do{ \ + int i; \ + int c; \ + memset(a ,0,sizeof a); \ + for (i=n-1 ;i>=0;i--) \ + { \ + c=getchar(); \ + if(c=='1') \ + { \ + a [i/8]|=(1<<(i%8));\ + } \ + } \ +}while(0) + +#define WRITE_DATA(a,n) \ +do { \ + int i; \ + for (i= n-1;i>=0;i--) \ + { \ + if(a [i/8]&(1<<(i%8))) \ + printf("1"); \ + else \ + printf("0"); \ + } \ + printf("\n"); \ +}while(0) + +#define DEBUG_OUTPUT_ARR( a , n ) \ + do{ \ + int i; \ + printf("%s:\n",#a); \ + for(i=n-1;i>=0;i--) \ + { \ + printf("%x ",(a)[i]); \ + } \ + printf("\n"); \ + }while(0) + +#define DEBUG_OUTPUT_VAL( a ) \ + do{ \ + printf(" %s=%x ",#a,a); \ + printf("\n"); \ + }while(0) Index: csa/trunk/sw_sim/csa.c =================================================================== --- csa/trunk/sw_sim/csa.c (nonexistent) +++ csa/trunk/sw_sim/csa.c (revision 24) @@ -0,0 +1,415 @@ +/* + dvb common scrambling algorithm + + refs: + uk patent: gb 2322 994 + uk patent: gb 2322 995 + freedec v2.1 + iso/iec 13818-1 + etr289 / dvb document a007 + +*/ + +#include +#include +#include "csa.h" + +#include "misc.h" + +#ifndef NULL +#define NULL 0 +#endif + +/* stream cypher */ + +/* 107 state bits */ +/* 26 nibbles (4 bit) */ +/* + 3 bits */ +/* reg A[1]-A[10], 10 nibbles */ +/* reg B[1]-B[10], 10 nibbles */ +/* reg X, 1 nibble */ +/* reg Y, 1 nibble */ +/* reg Z, 1 nibble */ +/* reg D, 1 nibble */ +/* reg E, 1 nibble */ +/* reg F, 1 nibble */ +/* reg p, 1 bit */ +/* reg q, 1 bit */ +/* reg r, 1 bit */ + +int sbox1[0x20] = {2,0,1,1,2,3,3,0, 3,2,2,0,1,1,0,3, 0,3,3,0,2,2,1,1, 2,2,0,3,1,1,3,0}; +int sbox2[0x20] = {3,1,0,2,2,3,3,0, 1,3,2,1,0,0,1,2, 3,1,0,3,3,2,0,2, 0,0,1,2,2,1,3,1}; +int sbox3[0x20] = {2,0,1,2,2,3,3,1, 1,1,0,3,3,0,2,0, 1,3,0,1,3,0,2,2, 2,0,1,2,0,3,3,1}; +int sbox4[0x20] = {3,1,2,3,0,2,1,2, 1,2,0,1,3,0,0,3, 1,0,3,1,2,3,0,3, 0,3,2,0,1,2,2,1}; +int sbox5[0x20] = {2,0,0,1,3,2,3,2, 0,1,3,3,1,0,2,1, 2,3,2,0,0,3,1,1, 1,0,3,2,3,1,0,2}; +int sbox6[0x20] = {0,1,2,3,1,2,2,0, 0,1,3,0,2,3,1,3, 2,3,0,2,3,0,1,1, 2,1,1,2,0,3,3,0}; +int sbox7[0x20] = {0,3,2,2,3,0,0,1, 3,0,1,3,1,2,2,1, 1,0,3,3,0,1,1,2, 2,3,1,0,2,3,0,2}; + +void stream_cypher(int init, unsigned char *CK, unsigned char *sb, unsigned char *cb) { + int i,j; + int in1; /* most significant nibble of input byte */ + int in2; /* least significant nibble of input byte */ + int op; + int extra_B; + int s1,s2,s3,s4,s5,s6,s7; + int next_A1; + int next_B1; + int next_E; + + static int A[11]; + static int B[11]; + static int X; + static int Y; + static int Z; + static int D; + static int E; + static int F; + static int p; + static int q; + static int r; + + /* reset */ + if (init) { + /* load first 32 bits of CK into A[1]..A[8] */ + /* load last 32 bits of CK into B[1]..B[8] */ + /* all other regs = 0 */ + A[1] = (CK[0] >> 4) & 0xf; + A[2] = (CK[0] >> 0) & 0xf; + A[3] = (CK[1] >> 4) & 0xf; + A[4] = (CK[1] >> 0) & 0xf; + A[5] = (CK[2] >> 4) & 0xf; + A[6] = (CK[2] >> 0) & 0xf; + A[7] = (CK[3] >> 4) & 0xf; + A[8] = (CK[3] >> 0) & 0xf; + A[9] = 0; + A[10] = 0; + B[1] = (CK[4] >> 4) & 0xf; + B[2] = (CK[4] >> 0) & 0xf; + B[3] = (CK[5] >> 4) & 0xf; + B[4] = (CK[5] >> 0) & 0xf; + B[5] = (CK[6] >> 4) & 0xf; + B[6] = (CK[6] >> 0) & 0xf; + B[7] = (CK[7] >> 4) & 0xf; + B[8] = (CK[7] >> 0) & 0xf; + B[9] = 0; + B[10] = 0; + + X=0; + Y=0; + Z=0; + D=0; + E=0; + F=0; + p=0; + q=0; + r=0; + } /* init */ + + + + /* 8 bytes per operation */ + for(i=0; i<8; i++) { + if (init) { + in1 = (sb[i] >> 4) & 0x0f; + in2 = (sb[i] >> 0) & 0x0f; + } /* init */ + op = 0; + /* 2 bits per iteration */ + for(j=0; j<4; j++) { + /* from A[1]..A[10], 35 bits are selected as inputs to 7 s-boxes */ + /* 5 bits input per s-box, 2 bits output per s-box */ + s1 = sbox1[ (((A[4]>>0)&1)<<4) | (((A[1]>>2)&1)<<3) | (((A[6]>>1)&1)<<2) | (((A[7]>>3)&1)<<1) | (((A[9]>>0)&1)<<0) ]; + s2 = sbox2[ (((A[2]>>1)&1)<<4) | (((A[3]>>2)&1)<<3) | (((A[6]>>3)&1)<<2) | (((A[7]>>0)&1)<<1) | (((A[9]>>1)&1)<<0) ]; + s3 = sbox3[ (((A[1]>>3)&1)<<4) | (((A[2]>>0)&1)<<3) | (((A[5]>>1)&1)<<2) | (((A[5]>>3)&1)<<1) | (((A[6]>>2)&1)<<0) ]; + s4 = sbox4[ (((A[3]>>3)&1)<<4) | (((A[1]>>1)&1)<<3) | (((A[2]>>3)&1)<<2) | (((A[4]>>2)&1)<<1) | (((A[8]>>0)&1)<<0) ]; + s5 = sbox5[ (((A[5]>>2)&1)<<4) | (((A[4]>>3)&1)<<3) | (((A[6]>>0)&1)<<2) | (((A[8]>>1)&1)<<1) | (((A[9]>>2)&1)<<0) ]; + s6 = sbox6[ (((A[3]>>1)&1)<<4) | (((A[4]>>1)&1)<<3) | (((A[5]>>0)&1)<<2) | (((A[7]>>2)&1)<<1) | (((A[9]>>3)&1)<<0) ]; + s7 = sbox7[ (((A[2]>>2)&1)<<4) | (((A[3]>>0)&1)<<3) | (((A[7]>>1)&1)<<2) | (((A[8]>>2)&1)<<1) | (((A[8]>>3)&1)<<0) ]; + + /* use 4x4 xor to produce extra nibble for T3 */ + extra_B = ( ((B[3]&1)<<3) ^ ((B[6]&2)<<2) ^ ((B[7]&4)<<1) ^ ((B[9]&8)>>0) ) | + ( ((B[6]&1)<<2) ^ ((B[8]&2)<<1) ^ ((B[3]&8)>>1) ^ ((B[4]&4)>>0) ) | + ( ((B[5]&8)>>2) ^ ((B[8]&4)>>1) ^ ((B[4]&1)<<1) ^ ((B[5]&2)>>0) ) | + ( ((B[9]&4)>>2) ^ ((B[6]&8)>>3) ^ ((B[3]&2)>>1) ^ ((B[8]&1)>>0) ) ; + + /* T1 = xor all inputs */ + /* in1,in2, D are only used in T1 during initialisation, not generation */ + next_A1 = A[10] ^ X; + if (init) + next_A1 = next_A1 ^ D ^ ((j % 2) ? in2 : in1); + + + /* T2 = xor all inputs */ + /* in1,in2 are only used in T1 during initialisation, not generation */ + /* if p=0, use this, if p=1, rotate the result left */ + next_B1 = B[7] ^ B[10] ^ Y; + if (init) + next_B1 = next_B1 ^ ((j % 2) ? in1 : in2); + + /* if p=1, rotate left */ + if (p) + next_B1 = ( (next_B1 << 1) | ((next_B1 >> 3) & 1) ) & 0xf; + + /* T3 = xor all inputs */ + D = E ^ Z ^ extra_B; + + /* T4 = sum, carry of Z + E + r */ + next_E = F; + if (q) { + F = Z + E + r; + /* r is the carry */ + r = (F >> 4) & 1; + F = F & 0x0f; + } /* q */ + else { + F = E; + } + E = next_E; + + A[10] = A[9]; + A[9] = A[8]; + A[8] = A[7]; + A[7] = A[6]; + A[6] = A[5]; + A[5] = A[4]; + A[4] = A[3]; + A[3] = A[2]; + A[2] = A[1]; + A[1]= next_A1; + + B[10] = B[9]; + B[9] = B[8]; + B[8] = B[7]; + B[7] = B[6]; + B[6] = B[5]; + B[5] = B[4]; + B[4] = B[3]; + B[3] = B[2]; + B[2] = B[1]; + B[1] = next_B1; + + X = ((s4&1)<<3) | ((s3&1)<<2) | (s2&2) | ((s1&2)>>1); + Y = ((s6&1)<<3) | ((s5&1)<<2) | (s4&2) | ((s3&2)>>1); + Z = ((s2&1)<<3) | ((s1&1)<<2) | (s6&2) | ((s5&2)>>1); + p = (s7&2)>>1; + q = (s7&1); + + /* require 4 loops per output byte */ + /* 2 output bits are a function of the 4 bits of D */ + /* xor 2 by 2 */ + op = (op << 2)^ ( (((D^(D>>1))>>1)&2) | ((D^(D>>1))&1) ); + } + /* return input data during init */ + cb[i] = (init) ? sb[i] : op; + } +} + +/* block cypher */ + +/* key preparation */ +unsigned char key_perm[0x40] = { + 0x12,0x24,0x09,0x07,0x2A,0x31,0x1D,0x15,0x1C,0x36,0x3E,0x32,0x13,0x21,0x3B,0x40, + 0x18,0x14,0x25,0x27,0x02,0x35,0x1B,0x01,0x22,0x04,0x0D,0x0E,0x39,0x28,0x1A,0x29, + 0x33,0x23,0x34,0x0C,0x16,0x30,0x1E,0x3A,0x2D,0x1F,0x08,0x19,0x17,0x2F,0x3D,0x11, + 0x3C,0x05,0x38,0x2B,0x0B,0x06,0x0A,0x2C,0x20,0x3F,0x2E,0x0F,0x03,0x26,0x10,0x37, +}; + +/* block - sbox */ +unsigned char block_sbox[0x100] = { + 0x3A,0xEA,0x68,0xFE,0x33,0xE9,0x88,0x1A,0x83,0xCF,0xE1,0x7F,0xBA,0xE2,0x38,0x12, + 0xE8,0x27,0x61,0x95,0x0C,0x36,0xE5,0x70,0xA2,0x06,0x82,0x7C,0x17,0xA3,0x26,0x49, + 0xBE,0x7A,0x6D,0x47,0xC1,0x51,0x8F,0xF3,0xCC,0x5B,0x67,0xBD,0xCD,0x18,0x08,0xC9, + 0xFF,0x69,0xEF,0x03,0x4E,0x48,0x4A,0x84,0x3F,0xB4,0x10,0x04,0xDC,0xF5,0x5C,0xC6, + 0x16,0xAB,0xAC,0x4C,0xF1,0x6A,0x2F,0x3C,0x3B,0xD4,0xD5,0x94,0xD0,0xC4,0x63,0x62, + 0x71,0xA1,0xF9,0x4F,0x2E,0xAA,0xC5,0x56,0xE3,0x39,0x93,0xCE,0x65,0x64,0xE4,0x58, + 0x6C,0x19,0x42,0x79,0xDD,0xEE,0x96,0xF6,0x8A,0xEC,0x1E,0x85,0x53,0x45,0xDE,0xBB, + 0x7E,0x0A,0x9A,0x13,0x2A,0x9D,0xC2,0x5E,0x5A,0x1F,0x32,0x35,0x9C,0xA8,0x73,0x30, + + 0x29,0x3D,0xE7,0x92,0x87,0x1B,0x2B,0x4B,0xA5,0x57,0x97,0x40,0x15,0xE6,0xBC,0x0E, + 0xEB,0xC3,0x34,0x2D,0xB8,0x44,0x25,0xA4,0x1C,0xC7,0x23,0xED,0x90,0x6E,0x50,0x00, + 0x99,0x9E,0x4D,0xD9,0xDA,0x8D,0x6F,0x5F,0x3E,0xD7,0x21,0x74,0x86,0xDF,0x6B,0x05, + 0x8E,0x5D,0x37,0x11,0xD2,0x28,0x75,0xD6,0xA7,0x77,0x24,0xBF,0xF0,0xB0,0x02,0xB7, + 0xF8,0xFC,0x81,0x09,0xB1,0x01,0x76,0x91,0x7D,0x0F,0xC8,0xA0,0xF2,0xCB,0x78,0x60, + 0xD1,0xF7,0xE0,0xB5,0x98,0x22,0xB3,0x20,0x1D,0xA6,0xDB,0x7B,0x59,0x9F,0xAE,0x31, + 0xFB,0xD3,0xB6,0xCA,0x43,0x72,0x07,0xF4,0xD8,0x41,0x14,0x55,0x0D,0x54,0x8B,0xB9, + 0xAD,0x46,0x0B,0xAF,0x80,0x52,0x2C,0xFA,0x8C,0x89,0x66,0xFD,0xB2,0xA9,0x9B,0xC0, +}; + +/* block - perm */ +unsigned long block_perm[0x100] = { + 0x00,0x02,0x80,0x82,0x20,0x22,0xA0,0xA2, 0x10,0x12,0x90,0x92,0x30,0x32,0xB0,0xB2, + 0x04,0x06,0x84,0x86,0x24,0x26,0xA4,0xA6, 0x14,0x16,0x94,0x96,0x34,0x36,0xB4,0xB6, + 0x40,0x42,0xC0,0xC2,0x60,0x62,0xE0,0xE2, 0x50,0x52,0xD0,0xD2,0x70,0x72,0xF0,0xF2, + 0x44,0x46,0xC4,0xC6,0x64,0x66,0xE4,0xE6, 0x54,0x56,0xD4,0xD6,0x74,0x76,0xF4,0xF6, + 0x01,0x03,0x81,0x83,0x21,0x23,0xA1,0xA3, 0x11,0x13,0x91,0x93,0x31,0x33,0xB1,0xB3, + 0x05,0x07,0x85,0x87,0x25,0x27,0xA5,0xA7, 0x15,0x17,0x95,0x97,0x35,0x37,0xB5,0xB7, + 0x41,0x43,0xC1,0xC3,0x61,0x63,0xE1,0xE3, 0x51,0x53,0xD1,0xD3,0x71,0x73,0xF1,0xF3, + 0x45,0x47,0xC5,0xC7,0x65,0x67,0xE5,0xE7, 0x55,0x57,0xD5,0xD7,0x75,0x77,0xF5,0xF7, + + 0x08,0x0A,0x88,0x8A,0x28,0x2A,0xA8,0xAA, 0x18,0x1A,0x98,0x9A,0x38,0x3A,0xB8,0xBA, + 0x0C,0x0E,0x8C,0x8E,0x2C,0x2E,0xAC,0xAE, 0x1C,0x1E,0x9C,0x9E,0x3C,0x3E,0xBC,0xBE, + 0x48,0x4A,0xC8,0xCA,0x68,0x6A,0xE8,0xEA, 0x58,0x5A,0xD8,0xDA,0x78,0x7A,0xF8,0xFA, + 0x4C,0x4E,0xCC,0xCE,0x6C,0x6E,0xEC,0xEE, 0x5C,0x5E,0xDC,0xDE,0x7C,0x7E,0xFC,0xFE, + 0x09,0x0B,0x89,0x8B,0x29,0x2B,0xA9,0xAB, 0x19,0x1B,0x99,0x9B,0x39,0x3B,0xB9,0xBB, + 0x0D,0x0F,0x8D,0x8F,0x2D,0x2F,0xAD,0xAF, 0x1D,0x1F,0x9D,0x9F,0x3D,0x3F,0xBD,0xBF, + 0x49,0x4B,0xC9,0xCB,0x69,0x6B,0xE9,0xEB, 0x59,0x5B,0xD9,0xDB,0x79,0x7B,0xF9,0xFB, + 0x4D,0x4F,0xCD,0xCF,0x6D,0x6F,0xED,0xEF, 0x5D,0x5F,0xDD,0xDF,0x7D,0x7F,0xFD,0xFF, +}; + +void key_schedule(unsigned char *CK, int *kk) +{ + int i,j,k; + int bit[64]; + int newbit[64]; + int kb[9][8]; + + /* 56 steps */ + /* 56 key bytes kk(56)..kk(1) by key schedule from CK */ + + /* kb(7,1) .. kb(7,8) = CK(1) .. CK(8) */ + kb[7][1] = CK[0]; + kb[7][2] = CK[1]; + kb[7][3] = CK[2]; + kb[7][4] = CK[3]; + kb[7][5] = CK[4]; + kb[7][6] = CK[5]; + kb[7][7] = CK[6]; + kb[7][8] = CK[7]; + + /* calculate kb[6] .. kb[1] */ + for(i=0; i<7; i++) { + /* 64 bit perm on kb */ + for(j=0; j<8; j++) { + for(k=0; k<8; k++) { + bit[j*8+k] = (kb[7-i][1+j] >> (7-k)) & 1; + newbit[key_perm[j*8+k]-1] = bit[j*8+k]; + } + } + for(j=0; j<8; j++) { + kb[6-i][1+j] = 0; + for(k=0; k<8; k++) { + kb[6-i][1+j] |= newbit[j*8+k] << (7-k); + } + } + } + + /* xor to give kk */ + for(i=0; i<7; i++) { + for(j=0; j<8; j++) { + kk[1+i*8+j] = kb[1+i][1+j] ^ i; + } + } +} + +void block_decypher(int *kk, unsigned char *ib, unsigned char *bd) { + int i; + int sbox_in; + int sbox_out; + int perm_out; + int R[9]; + int next_R8; + + R[1] = ib[0]; + R[2] = ib[1]; + R[3] = ib[2]; + R[4] = ib[3]; + R[5] = ib[4]; + R[6] = ib[5]; + R[7] = ib[6]; + R[8] = ib[7]; + + /* loop over kk[56]..kk[1] */ + for(i=56; i>0; i--) { + sbox_in = kk[i] ^ R[7]; + sbox_out = block_sbox[sbox_in]; + perm_out = block_perm[sbox_out]; + + next_R8 = R[7]; + R[7] = R[6] ^ perm_out; + R[6] = R[5]; + R[5] = R[4] ^ R[8] ^ sbox_out; + R[4] = R[3] ^ R[8] ^ sbox_out; + R[3] = R[2] ^ R[8] ^ sbox_out; + R[2] = R[1]; + R[1] = R[8] ^ sbox_out; + + R[8] = next_R8; + } + + bd[0] = R[1]; + bd[1] = R[2]; + bd[2] = R[3]; + bd[3] = R[4]; + bd[4] = R[5]; + bd[5] = R[6]; + bd[6] = R[7]; + bd[7] = R[8]; + +} + +void set_cws(unsigned char *cws, struct key *key) { + memcpy(key->odd_ck,cws+8,8); + memcpy(key->even_ck,cws,8); + key_schedule(key->odd_ck,key->odd_kk); + key_schedule(key->even_ck,key->even_kk); +} + +void decrypt(struct key *key, unsigned char *encrypted, unsigned char *decrypted) { + int i,j,offset=4,N; + int *kk=key->even_kk; + unsigned char *ck=key->even_ck; + unsigned char stream[8]; + unsigned char ib[8]; + unsigned char block[8]; + int residue; + + ((unsigned long *) decrypted)[0]=((unsigned long *) encrypted)[0]; + + if(decrypted[3]&0x40) { + kk=key->odd_kk; + ck=key->odd_ck; + } + + decrypted[3] &= 0x3f; /* remove scrambling bits */ + + if ((decrypted[3] & 0x20) == 0x20) + offset += (encrypted[4] +1); /* skip adaption field */ + + N = (188 - offset) / 8; + residue = (188 - offset) % 8; + + /* 1st 8 bytes of initialisation */ + stream_cypher(1, ck, &encrypted[offset], ib); + DEBUG_OUTPUT_ARR(ib,8); + + for(j=1; j<(N+1); j++) { + block_decypher(kk, ib, block); + + if (j != N) { + stream_cypher(0, ck, NULL, stream); + + /* xor sb x stream */ + for(i=0; i<8; i++) + ib[i] = encrypted[offset+8*j+i] ^ stream[i]; + } + else { + /* last block - sb[N+1] = IV(initialisation vetor)(=0) */ + for(i=0; i<8; i++) ib[i] = 0; + } + + /* xor ib x block */ + for(i=0; i<8; i++) + decrypted[offset+8*(j-1)+i] = ib[i] ^ block[i]; + DEBUG_OUTPUT_ARR(ib,8); + DEBUG_OUTPUT_ARR(block,8); + DEBUG_OUTPUT_ARR(&decrypted[offset+8*(j-1)+0],8); + } /* for(j=1; j<(N+1); j++) */ + + if (residue) { + stream_cypher(0, ck, NULL, stream); + for (i=0;i

csa/trunk/sw_sim/csa.c Property changes : Added: svn:executable ## -0,0 +1 ## +* \ No newline at end of property Index: csa/trunk/sw_sim/decrypt.c =================================================================== --- csa/trunk/sw_sim/decrypt.c (nonexistent) +++ csa/trunk/sw_sim/decrypt.c (revision 24) @@ -0,0 +1,22 @@ + + +/* this file simulates the decrypt function */ +#include +#include +#include "misc.h" +#include "csa.h" + +int main() +{ + struct key key; + unsigned char cws[16]; + unsigned char encrypted[188]; + unsigned char decrypted[188]; + READ_DATA(cws,8*16); + READ_DATA(encrypted,188*8); + set_cws(cws,&key); + decrypt(&key,encrypted,decrypted); + DEBUG_OUTPUT_ARR(decrypted,64); + WRITE_DATA(decrypted,188*8); + return 0; +} Index: csa/trunk/sw_sim/makefile =================================================================== --- csa/trunk/sw_sim/makefile (nonexistent) +++ csa/trunk/sw_sim/makefile (revision 24) @@ -0,0 +1,33 @@ + +PROJ_NAME ?= decrypt +DEBUG ?=y + +CFLAGS=-g -ggdb -ansi + +ifeq ($(DEBUG),y) +CFLAGS+=-DDEBUG +endif + +all:$(PROJ_NAME) + +clean: + rm -fr $(PROJ_NAME) + rm -fr *.o + +test:$(PROJ_NAME) + ./$(PROJ_NAME) <../test_dat/$(PROJ_NAME).in >../test_dat/$(PROJ_NAME).out.sw + +debug:$(PROJ_NAME) + echo "set args <../test_dat/$(PROJ_NAME).in >../test_dat/$(PROJ_NAME).out.sw " >gdb-command + ddd ./$(PROJ_NAME) -x gdb-command + + +key_perm:csa.o key_perm.o + +key_schedule:csa.o key_schedule.o + +block_decypher:csa.o block_decypher.o + +decrypt:csa.o decrypt.o + +stream_cypher:csa.o stream_cypher.o Index: csa/trunk/sw_sim/stream_cypher.c =================================================================== --- csa/trunk/sw_sim/stream_cypher.c (nonexistent) +++ csa/trunk/sw_sim/stream_cypher.c (revision 24) @@ -0,0 +1,25 @@ + + + +/* this file simulate the stream cypher function */ +#include +#include +#include +#include "misc.h" +extern void stream_cypher(int init, unsigned char *CK, unsigned char *sb, unsigned char *cb); +int main() +{ + unsigned char ck[8]; + unsigned char sb[8]; + unsigned char sb1[8]; + unsigned char cb[8]; + READ_DATA(ck, 8*8); + READ_DATA(sb, 8*8); + READ_DATA(sb1,8*8); + stream_cypher(1,ck,sb,cb); + WRITE_DATA(cb,8*8); + stream_cypher(0,ck,sb1,cb); + WRITE_DATA(cb,8*8); + + return 0; +} Index: csa/trunk/sw_sim/misc.c =================================================================== --- csa/trunk/sw_sim/misc.c (nonexistent) +++ csa/trunk/sw_sim/misc.c (revision 24) @@ -0,0 +1,3 @@ +/* this file write some misc function */ + + Index: csa/trunk/sw_sim/block_decypher.c =================================================================== --- csa/trunk/sw_sim/block_decypher.c (nonexistent) +++ csa/trunk/sw_sim/block_decypher.c (revision 24) @@ -0,0 +1,27 @@ +/* this file simulates the block_decypher function */ + +#include +#include +#include "misc.h" + +extern void block_decypher(int *kk, unsigned char *ib, unsigned char *bd); + +int main() +{ + int kk[57]; + int kkt[56]; + unsigned char ib[8]; + unsigned char bd[8]; + READ_DATA(kkt,56*8); + memset(kk,0,sizeof kk); + memcpy(kk+1,kkt,sizeof kkt); + READ_DATA(ib,8*8); + block_decypher(kk, ib, bd); + WRITE_DATA(bd,8*8); +#ifdef DEBUG + WRITE_DATA(kkt,56*8); + WRITE_DATA(ib,8*8); +#endif + + return 0; +} Index: csa/trunk/sw_sim/key_schedule.c =================================================================== --- csa/trunk/sw_sim/key_schedule.c (nonexistent) +++ csa/trunk/sw_sim/key_schedule.c (revision 24) @@ -0,0 +1,41 @@ +/* this file simulates the key_schedule funtion */ + +#include +#include + +extern void key_schedule(unsigned char *CK, int *kk) ; + +int main() +{ + unsigned char CK[8]; + int kk[57]; + int i; + int c; + + memset(CK,0,sizeof CK); + for (i=63;i>=0;i--) + { + c=getchar(); +#ifdef DEBUG + printf("%c",c); +#endif + if(c=='1') + { + CK[i/8]|=(1<<(i%8)); + } + } +#ifdef DEBUG + printf("\n"); +#endif + memset(kk,0,sizeof kk); + key_schedule(CK,kk); + for(i=57*8-1;i>=8;i--) + { + if(kk[i/8]&(1<<(i%8))) + printf("1"); + else + printf("0"); + } + printf("\n"); + return 0; +} Index: csa/trunk/sw_sim/key_perm.c =================================================================== --- csa/trunk/sw_sim/key_perm.c (nonexistent) +++ csa/trunk/sw_sim/key_perm.c (revision 24) @@ -0,0 +1,75 @@ +/* + * ===================================================================================== + * + * Filename: key_perm.c + * + * Description: this file tests the key_perm function + * + * Version: 1.0 + * Created: 07/05/2008 07:51:58 AM + * Revision: none + * Compiler: gcc + * + * Author: mengxipeng$gmai.com + * Company: mengxipeng + * + * ===================================================================================== + */ + +#include +#include + +extern unsigned char key_perm[0x40]; /* defined in csa.c */ + +unsigned char i_key[8]; +unsigned char o_key[8]; + +int main() +{ + int i; + int j; + int k; + unsigned char p; + int v; + int c; + int b; + /* first read the input key */ + memset(i_key,0,sizeof i_key); + for (i=63;i>=0;i--) + { + c=getchar(); + printf("%c",c); + if(c=='1') + { + i_key[i/8]|=(1<<(i%8)); + } + } + printf("\n"); + + /* now do the key_perm operatioin */ + memset(o_key,0,sizeof o_key); + /* 64 bit perm on kb */ + for (j = 0; j < 8; j++) + { + for (k = 0; k < 8; k++) + { + b=key_perm[j*8+k]-1; + if((i_key[j] >> (7 - k)) & 1) + { + o_key[b/8] |= (1<<(7-(b%8))); + } + } + } + + /* output the o_key */ + for (i=63;i>=0;i--) + { + if(o_key[i/8]&(1<<(i%8))) + printf("1"); + else + printf("0"); + } + printf("\n"); + + return 0; +} Index: csa/trunk/sw_sim/get_key_perm_table.c =================================================================== --- csa/trunk/sw_sim/get_key_perm_table.c (nonexistent) +++ csa/trunk/sw_sim/get_key_perm_table.c (revision 24) @@ -0,0 +1,46 @@ +/* + * this alone program generate the partical code for key_perm.v + */ +#include +#include +#include +#include +unsigned char key_perm[0x40] = { + 0x12,0x24,0x09,0x07,0x2A,0x31,0x1D,0x15,0x1C,0x36,0x3E,0x32,0x13,0x21,0x3B,0x40, + 0x18,0x14,0x25,0x27,0x02,0x35,0x1B,0x01,0x22,0x04,0x0D,0x0E,0x39,0x28,0x1A,0x29, + 0x33,0x23,0x34,0x0C,0x16,0x30,0x1E,0x3A,0x2D,0x1F,0x08,0x19,0x17,0x2F,0x3D,0x11, + 0x3C,0x05,0x38,0x2B,0x0B,0x06,0x0A,0x2C,0x20,0x3F,0x2E,0x0F,0x03,0x26,0x10,0x37, +}; + +unsigned char unkey_perm[0x40]; + +#define RI(i) ((i)/8*8+(7-((i)%8))) + +int main() +{ + int i; + int n; + int sp; + int tp; + memset(unkey_perm,0,sizeof unkey_perm); + for(i=0;i<64;i++) + { + for(n=0;n<64;n++) + { + if(key_perm[n]==RI(i)+1) + break; + } + assert(n<64); + n=RI(n); + unkey_perm[i]=n; + } + + for (i=63;i>=0;i--) + { + printf("i_key[6\'h%02x]", unkey_perm[i]); + printf(","); + if((i%4)==0) + printf("\n"); + } + return 0; +} Index: csa/trunk/sw_sim/csa.h =================================================================== --- csa/trunk/sw_sim/csa.h (nonexistent) +++ csa/trunk/sw_sim/csa.h (revision 24) @@ -0,0 +1,13 @@ +#ifndef CSA_H +#define CSA_H + +struct key { + int odd_kk[57], even_kk[57]; + unsigned char odd_ck[8], even_ck[8]; +}; + +void set_cws(unsigned char *cws, struct key *key); + +void decrypt(struct key *key, unsigned char *encrypted, unsigned char *decrypted); + +#endif

csa/trunk/sw_sim/csa.h Property changes : Added: svn:executable ## -0,0 +1 ## +* \ No newline at end of property Index: csa/trunk/decrypted =================================================================== --- csa/trunk/decrypted (nonexistent) +++ csa/trunk/decrypted (revision 24) @@ -0,0 +1,204 @@ +ff +ff +ff +ff +ff +ff +ff +ff +ff +ff +ff +ff +ff +ff +ff +ff +ff +ff +ff +ff +ff +ff +ff +ff +ff +ff +ff +ff +ff +ff +ff +ff +ff +ff +ff +ff +ff +ff +ff +ff +ff +ff +ff +ff +ff +ff +ff +ff +ff +ff +ff +ff +ff +ff +ff +ff +ff +ff +ff +ff +ff +ff +ff +ff +ff +ff +ff +ff +ff +ff +ff +ff +ff +ff +ff +ff +ff +ff +ff +ff +ff +ff +ff +ff +ff +ff +ff +ff +ff +ff +ff +ff +ff +ff +ff +ff +ff +ff +ff +ff +ff +ff +ff +ff +ff +ff +ff +ff +ff +ff +ff +ff +ff +ff +ff +ff +ff +ff +ff +ff +ff +ff +ff +ff +ff +ff +ff +ff +ff +ff +ff +ff +ff +ff +ff +ff +ff +ff +ff +ff +ff +ff +ff +ff +ff +ff +ff +ff +ff +ff +ff +ff +ff +ff +ff +ff +ff +ff +ff +ff +ff +ff +ff +ff +ff +ff +ff +ff +ff +ff +ff +ff +ff +ff +ff +ff +ff +ff +ff +ff +ff +ff +ff +ff +ff +ff +ff +ff +ff +ff +ff +ff +ff +ff +ff +ff +ff +ff +ff +ff +90 +00 +00 +47 Index: csa/trunk/makefile =================================================================== --- csa/trunk/makefile (nonexistent) +++ csa/trunk/makefile (revision 24) @@ -0,0 +1,93 @@ +MODULE=decrypt +TEST_IN_FILE=test_dat/$(MODULE).in +TEST_TIMES=1 +DEBUG=y + +all:benchm sw_simm rtlm + +rtlm: + @echo compiling rtl ... + @make -s -C rtl PROJ_NAME=$(MODULE) DEBUG=$(DEBUG) + +benchm: + @echo compiling bench ... + @make -s -C bench PROJ_NAME=$(MODULE) DEBUG=$(DEBUG) + +sw_simm: + @echo compiling sw_sim ... + @make -s -C sw_sim PROJ_NAME=$(MODULE) DEBUG=$(DEBUG) + +synthesis: + @make -s -C rtl $(MODULE) + +sw: + @make -s -C sw_sim $(MODULE) + +preare_fn = \ + str="" ; \ + for ((i=0;i<$1;i=i+1)); \ + do \ + n=$$(expr $$RANDOM % 256 ) ; \ + binstr=$$(echo "ibase=10;obase=2;$$n"|bc) ; \ + binstr=$$(echo "$$binstr" | awk ' { n=8-length($$1);for(i=0;i$(TEST_IN_FILE) + +preare_block_decypher: + $(call preare_fn,64) + +preare_key_perm: + $(call preare_fn,8) + +preare_key_schedule: + $(call preare_fn,8) + +preare_decrypt: + #$(call preare_fn,204) # evenkey + oddkey + ts pacted (188) + str=""; + cp /dev/null $(TEST_IN_FILE); + cat decrypted | while read n; \ + do \ + n=$$(echo $$n | tr 'a-z' 'A-F'); \ + binstr=$$(echo "ibase=16;obase=2;$$n"|bc); \ + binstr=$$(echo "$$binstr" | awk ' { n=8-length($$1);for(i=0;i>$(TEST_IN_FILE); \ + done + +preare_stream_cypher: + $(call preare_fn,24) + +ifeq ($(DEBUG),y) +check: + @(for ((i=0;i<$(TEST_TIMES);i=i+1)) \ + do \ + make -s -C sw_sim test PROJ_NAME=$(MODULE); \ + make -s -C bench test PROJ_NAME=$(MODULE); \ + diff test_dat/$(MODULE).out.sw test_dat/$(MODULE).out.v ; \ + done) + +else +check: + @(for ((i=0;i<$(TEST_TIMES);i=i+1)) \ + do \ + make -s preare_$(MODULE); \ + make -s -C sw_sim test PROJ_NAME=$(MODULE); \ + make -s -C bench test PROJ_NAME=$(MODULE); \ + diff test_dat/$(MODULE).out.sw test_dat/$(MODULE).out.v ; \ + done) +endif + + +clean: + @make -s -C sw_sim clean + @make -s -C rtl clean + @make -s -C bench clean + @rm -fr test_dat/* + +cscope: + @find . -name "*.[ch]" >cscope.files + @cscope -b + + Index: csa/trunk/rtl/key_perm.v =================================================================== --- csa/trunk/rtl/key_perm.v (nonexistent) +++ csa/trunk/rtl/key_perm.v (revision 24) @@ -0,0 +1,30 @@ + + +// this module do a key 64bits perm +// author: mengxipeng +// mengxipeng@gmail.com + + +module key_perm(i_key,o_key); + input [63:0] i_key; + output [63:0] o_key; + + assign o_key={ + i_key[6'h1b],i_key[6'h20],i_key[6'h09],i_key[6'h37], + i_key[6'h29],i_key[6'h0d],i_key[6'h3e],i_key[6'h08], + i_key[6'h02],i_key[6'h0c],i_key[6'h27],i_key[6'h25], + i_key[6'h12],i_key[6'h0e],i_key[6'h38],i_key[6'h35], + i_key[6'h18],i_key[6'h03],i_key[6'h34],i_key[6'h30], + i_key[6'h2f],i_key[6'h3d],i_key[6'h2a],i_key[6'h22], + i_key[6'h0a],i_key[6'h1f],i_key[6'h26],i_key[6'h06], + i_key[6'h15],i_key[6'h3a],i_key[6'h14],i_key[6'h1a], + i_key[6'h2c],i_key[6'h19],i_key[6'h11],i_key[6'h0f], + i_key[6'h01],i_key[6'h21],i_key[6'h2e],i_key[6'h3f], + i_key[6'h28],i_key[6'h07],i_key[6'h0b],i_key[6'h16], + i_key[6'h00],i_key[6'h23],i_key[6'h2b],i_key[6'h17], + i_key[6'h05],i_key[6'h31],i_key[6'h33],i_key[6'h24], + i_key[6'h1d],i_key[6'h1c],i_key[6'h3c],i_key[6'h39], + i_key[6'h10],i_key[6'h13],i_key[6'h3b],i_key[6'h1e], + i_key[6'h36],i_key[6'h32],i_key[6'h04],i_key[6'h2d] + }; +endmodule Index: csa/trunk/rtl/key_schedule.v =================================================================== --- csa/trunk/rtl/key_schedule.v (nonexistent) +++ csa/trunk/rtl/key_schedule.v (revision 24) @@ -0,0 +1,95 @@ +// this key_schedule module +module key_schedule(clk,rst,start,i_ck,busy,done,o_kk); + input clk; + input rst; + input start; + input [ 8*8-1:0] i_ck; + output busy; + output done; + output [56*8-1:0] o_kk; + + reg [56*8-1:0] o_kk; + reg [ 2:0] cnt; + + wire [ 8*8-1:0] ik; + wire [ 8*8-1:0] okd; + wire [ 8*8-1:0] oki; + reg [ 8*8-1:0] ok_d; + reg done; + reg busy; + + key_perm kpo(.i_key(ok_d), .o_key(okd)); + key_perm kpi(.i_key(i_ck), .o_key(oki)); + + always @(posedge clk) + begin + done <= 1'h0; + if(rst) + begin + o_kk <= 448'h0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000; + cnt <= 3'h0; + ok_d <= 64'h0000000000000000; + busy <= 1'h0; + end + else + begin + if(cnt==3'h0 && busy) + begin + busy <= 1'h0; + done <= 1'h1; + end + + + if(start & ~busy) + begin + cnt <= 3'h5; + o_kk <= {o_kk [(6*8)*8-1:8*0], i_ck}; + busy <= 1'h1; + ok_d <= oki; + o_kk <= {o_kk [(6*8)*8-1:8*0], + oki ^ 64'h0606060606060606}; + end + + if(busy) + begin + o_kk <= {o_kk [(6*8)*8-1:8*0], + ok_d ^ { + 5'h00, cnt, + 5'h00, cnt, + 5'h00, cnt, + 5'h00, cnt, + 5'h00, cnt, + 5'h00, cnt, + 5'h00, cnt, + 5'h00, cnt + } + }; + if(cnt!=3'h0) + cnt <= cnt - 3'h1; + ok_d <= okd; + end + end + end + + +// wire [64*8-1:0] kb; +// assign kb[(8*8)*8-1:(7*8)*8] = i_ck; +// +// key_perm k1( .i_key(kb[(8*8)*8-1:(7*8)*8]) ,.o_key(kb[(7*8)*8-1:(6*8)*8])); +// key_perm k2( .i_key(kb[(7*8)*8-1:(6*8)*8]) ,.o_key(kb[(6*8)*8-1:(5*8)*8])); +// key_perm k3( .i_key(kb[(6*8)*8-1:(5*8)*8]) ,.o_key(kb[(5*8)*8-1:(4*8)*8])); +// key_perm k4( .i_key(kb[(5*8)*8-1:(4*8)*8]) ,.o_key(kb[(4*8)*8-1:(3*8)*8])); +// key_perm k5( .i_key(kb[(4*8)*8-1:(3*8)*8]) ,.o_key(kb[(3*8)*8-1:(2*8)*8])); +// key_perm k6( .i_key(kb[(3*8)*8-1:(2*8)*8]) ,.o_key(kb[(2*8)*8-1:(1*8)*8])); +// key_perm k7( .i_key(kb[(2*8)*8-1:(1*8)*8]) ,.o_key(kb[(1*8)*8-1:(0*8)*8])); +// +// assign o_kk [(1*8)*8-1:(0*8)*8] = kb[(2*8)*8-1:(1*8)*8] ^ 64'h0000000000000000; +// assign o_kk [(2*8)*8-1:(1*8)*8] = kb[(3*8)*8-1:(2*8)*8] ^ 64'h0101010101010101; +// assign o_kk [(3*8)*8-1:(2*8)*8] = kb[(4*8)*8-1:(3*8)*8] ^ 64'h0202020202020202; +// assign o_kk [(4*8)*8-1:(3*8)*8] = kb[(5*8)*8-1:(4*8)*8] ^ 64'h0303030303030303; +// assign o_kk [(5*8)*8-1:(4*8)*8] = kb[(6*8)*8-1:(5*8)*8] ^ 64'h0404040404040404; +// assign o_kk [(6*8)*8-1:(5*8)*8] = kb[(7*8)*8-1:(6*8)*8] ^ 64'h0505050505050505; +// assign o_kk [(7*8)*8-1:(6*8)*8] = kb[(8*8)*8-1:(7*8)*8] ^ 64'h0606060606060606; + + +endmodule Index: csa/trunk/rtl/stream_cypher.v =================================================================== --- csa/trunk/rtl/stream_cypher.v (nonexistent) +++ csa/trunk/rtl/stream_cypher.v (revision 24) @@ -0,0 +1,126 @@ + + +// this file implement the stream cypher module + +module stream_cypher(clk,rst,en,init,ck,sb,cb); +input clk; +input rst; // hi enable +input en; // hi enable +input init; // hi enable +input [8 *8-1:0] ck; +input [8 *8-1:0] sb; +output [8 *8-1:0] cb; + + +// intermediate variable +reg [10*4-1 : 0]A; +reg [10*4-1 : 0]B; +reg [4-1 : 0]X; +reg [4-1 : 0]Y; +reg [4-1 : 0]Z; +reg [4-1 : 0]D; +reg [4-1 : 0]E; +reg [4-1 : 0]F; +reg p; +reg q; +reg r; +reg [8 *8-1 : 0]cb; + +wire [10*4-1 : 0]Ao; +wire [10*4-1 : 0]Ainit; +wire [10*4-1 : 0]Bo; +wire [10*4-1 : 0]Binit; +wire [4-1 : 0]Xo; +wire [4-1 : 0]Yo; +wire [4-1 : 0]Zo; +wire [4-1 : 0]Do; +wire [4-1 : 0]Eo; +wire [4-1 : 0]Fo; +wire po; +wire qo; +wire ro; +wire [8 *8-1 : 0]cbo; + +assign Ainit = { + 4'b0, 4'b0, + ck[7*4-1:6*4],ck[8*4-1:7*4], + ck[5*4-1:4*4],ck[6*4-1:5*4], + ck[3*4-1:2*4],ck[4*4-1:3*4], + ck[1*4-1:0*4],ck[2*4-1:1*4] +}; + +assign Binit = { + 4'b0, 4'b0, + ck[15*4-1:14*4],ck[16*4-1:15*4], + ck[13*4-1:12*4],ck[14*4-1:13*4], + ck[11*4-1:10*4],ck[12*4-1:11*4], + ck[ 9*4-1: 8*4],ck[10*4-1: 9*4] +}; + +always @(posedge clk) +begin + if(rst) + begin + A<= 40'h0000000000; + B<= 40'h0000000000; + X<= 8'h00; + Y<= 8'h00; + Z<= 8'h00; + D<= 8'h00; + E<= 8'h00; + F<= 8'h00; + p<= 8'h00; + q<= 8'h00; + r<= 8'h00; + end + else + begin + if(en) + begin + cb <= cbo; + A<= Ao; + B<= Bo; + X<= Xo; + Y<= Yo; + Z<= Zo; + D<= Do; + E<= Eo; + F<= Fo; + p<= po; + q<= qo; + r<= ro; + end + end +end + + +stream_8bytes b( + .init(init) + ,.sb(sb) + ,.Ai((init)?Ainit:A) + ,.Bi((init)?Binit:B) + ,.Di((init)?4'b0 :D) + ,.Ei((init)?4'b0 :E) + ,.Fi((init)?4'b0 :F) + ,.Xi((init)?4'b0 :X) + ,.Yi((init)?4'b0 :Y) + ,.Zi((init)?4'b0 :Z) + ,.pi((init)?1'b0 :p) + ,.qi((init)?1'b0 :q) + ,.ri((init)?1'b0 :r) + + ,.Ao(Ao) + ,.Bo(Bo) + ,.Do(Do) + ,.Eo(Eo) + ,.Fo(Fo) + ,.Xo(Xo) + ,.Yo(Yo) + ,.Zo(Zo) + ,.po(po) + ,.qo(qo) + ,.ro(ro) + ,.cb(cbo) + ); + +endmodule Index: csa/trunk/rtl/key_computer.v =================================================================== --- csa/trunk/rtl/key_computer.v (nonexistent) +++ csa/trunk/rtl/key_computer.v (revision 24) @@ -0,0 +1,41 @@ + + +// this module is used to computer a key +// author: Simon panti +// mengxipeng@gmail.com +// refer: +// cas.c in vlc opensource project + +// this module implement the function csa_ComputeKey +// and cw accord to ck +// key accord to kk; + +// + +module key_computer(cw,key); + input [63:0] cw; // input cw, has 64bits + output [447:0] key; // output key, has 7*64bits + + wire [63:0] key1; + wire [63:0] key2; + wire [63:0] key3; + wire [63:0] key4; + wire [63:0] key5; + wire [63:0] key6; + + key_perm kp0 ( cw, key6 ); + key_perm kp1 ( key6, key5 ); + key_perm kp2 ( key5, key4 ); + key_perm kp3 ( key4, key3 ); + key_perm kp4 ( key3, key2 ); + key_perm kp5 ( key2, key1 ); + + assign key[64*1-1:64*0]=key1 ^ 64'h0000000000000000; + assign key[64*2-1:64*1]=key2 ^ 64'h0101010101010101; + assign key[64*3-1:64*2]=key3 ^ 64'h0202020202020202; + assign key[64*4-1:64*3]=key4 ^ 64'h0303030303030303; + assign key[64*5-1:64*4]=key5 ^ 64'h0404040404040404; + assign key[64*6-1:64*5]=key6 ^ 64'h0505050505050505; + assign key[64*7-1:64*6]=cw ^ 64'h0606060606060606; + +endmodule Index: csa/trunk/rtl/makefile =================================================================== --- csa/trunk/rtl/makefile (nonexistent) +++ csa/trunk/rtl/makefile (revision 24) @@ -0,0 +1,28 @@ +PROJ_NAME ?=decrypt +DEBUG ?=y + +ifeq ($(DEBUG),y) +VFLAGS=-DDEBUG +else +VFLAGS= +endif + +all:$(PROJ_NAME) + +key_perm: + iverilog -S $(VFLAGS) -tnull $@.v + +key_schedule: + iverilog -S $(VFLAGS) -tnull $@.v key_perm.v + +block_decypher: + iverilog -S $(VFLAGS) -tnull $@.v block_perm.v block_sbox.v + +stream_cypher: + iverilog -S $(VFLAGS) -tnull $@.v sbox1.v sbox2.v sbox3.v sbox4.v sbox5.v sbox6.v sbox7.v sboxes.v stream_iteration.v stream_byte.v stream_8bytes.v + +decrypt: + iverilog -S $(VFLAGS) -tnull $@.v key_schedule.v key_perm.v stream_cypher.v block_decypher.v block_perm.v block_sbox.v sbox1.v sbox2.v sbox3.v sbox4.v sbox5.v sbox6.v sbox7.v sboxes.v stream_iteration.v stream_byte.v stream_8bytes.v + +clean: + Index: csa/trunk/rtl/decrypt.v =================================================================== --- csa/trunk/rtl/decrypt.v (nonexistent) +++ csa/trunk/rtl/decrypt.v (revision 24) @@ -0,0 +1,259 @@ + +// this module will do csa decrypt work + +module decrypt(clk,rst,ck,key_en,even_odd,en,encrypted,decrypted,invalid); +input clk; +input rst; +input key_en; // signal high valid, +input even_odd; // indiate the input ck is even or odd, 0 --- even odd ---odd +input en; // decrypted +input [8*8-1:0] ck; // input ck +input [ 8-1:0] encrypted; // input ts stream +output [ 8-1:0] decrypted; // decrypt ts stream +output invalid; // thsi output data is invalid + + +// key register +reg [56*8-1 : 0] even_kk; +reg [56*8-1 : 0] odd_kk; +reg [ 8*8-1 : 0] even_ck; +reg [ 8*8-1 : 0] odd_ck; +reg even_odd_d; + +wire [56*8-1 : 0] kk; +wire ks_busy; +wire ks_done; + +key_schedule ks( + .clk (clk) + , .rst (rst) + , .start(key_en) + , .busy (ks_busy) + , .done (ks_done) + , .i_ck (ck) + , .o_kk (kk) + ); + +always @(posedge clk) +begin + if(rst) + begin + even_kk <= 448'h0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000; + odd_kk <= 448'h0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000; + even_ck <= 64'h0000000000000000; + odd_ck <= 64'h0000000000000000; + end + else + begin + if(key_en & ~ks_busy) + begin + even_odd_d <= even_odd; + if(even_odd) + begin + odd_ck <= ck; + end + else + begin + even_ck <= ck; + end + end + else if (ks_done) + if(even_odd_d) + odd_kk <= kk; + else + even_kk <= kk; + end +end + +// word grouper +reg [8*8-1:0] group; // 32bits +reg sync; // find sync +reg [8-1:0] ts_cnt; // ts packet count +reg using_even_odd_key; // 0 --- using even key; 1 --- using odd key +reg need_dec; +reg group_valid; +reg group_valid_d; +reg head; +reg [5:0] group_id; +reg [4*8-1:0] group_d; + + +always @(posedge clk) + if (rst) + begin + group <= 64'h00000000; + sync <= 1'h0; + ts_cnt <= 8'h00; + using_even_odd_key <= 1'h0; + need_dec <= 1'h0; + group_valid_d <=1'h0; + head <= 1'h0; + end + else + begin + group_valid <=1'h0; + group_valid_d <= group_valid; + head <= 1'h0; + group_d <= group; + if(sync) + begin + if(en) + ts_cnt <= ts_cnt + 8'h01; + if(ts_cnt == 8'hb7 ) // 0xb8=188-4 + begin + sync <= 1'h0; + ts_cnt<=8'h0; + group_valid<=1'h1; + group_id<=ts_cnt[7:3]; + end + if(ts_cnt[2:0]==3'h7 && en ) + begin + group_valid<=1'h1; + group_id<=ts_cnt[7:3]; + end + end + if(en) + begin + group <= { encrypted, group [8*8-1:1*8] }; + if(group[5*8-1:4*8]==8'h47) + begin + sync <= 1; + ts_cnt <= 8'h00; + using_even_odd_key <= group[62]; + head <= 1'h1; + group_d <= {1'h0,group[62:32]}; + end + end + end + +// decrypt +reg [8*8-1:0] db; +reg db_valid; + +wire [56*8-1:0]kk_decrypt; +wire [ 8*8-1:0]ck_decrypt; + +assign kk_decrypt = (using_even_odd_key) ? odd_kk : even_kk ; +assign ck_decrypt = (using_even_odd_key) ? odd_ck : even_ck ; + +wire [8*8-1:0] sc_sb; +wire [8*8-1:0] sc_cb; +wire init; +wire sc_en; +wire last; + +assign sc_sb = group; +assign init = group_id == 5'h00; +assign last = group_id == 5'd22; +reg [2:0] last_cnt; +reg last_run; +assign sc_en = group_valid; + +stream_cypher sc( + .clk (clk) + , .rst (rst) + , .en (sc_en) + , .init (init) + , .ck (ck_decrypt) + , .sb (sc_sb) + , .cb (sc_cb) + ); + +wire [ 8*8-1:0] bco; +reg [ 8*8-1:0] bc; +reg [ 8*8-1:0] ib; +block_decypher bcm( + .kk (kk_decrypt) + , .ib (ib[8*8-1:0]) + , .bd (bco) + ); + + +always @(posedge clk) +if(rst) +begin + db <= 64'h00; + ib <= 128'h00000000000000000000000000000000; + bc <= 64'hffffffffffffffff; + last_cnt<=3'h0; + last_run<=1'h0; +end +else +begin + db_valid<=1'h0; + if(group_valid_d) + begin + bc<=bco; + if(init) + begin + ib<={ ib[8*8-1:0],sc_cb }; + db<=bco^sc_cb; + end + else + begin + ib<={ ib[8*8-1:0],sc_cb^sc_sb }; + db<=bco^sc_cb^sc_sb; + end + if(group_id>1'h0) + begin + db_valid<=1'h1; + end + + if(last) + last_run<=1'h1; + + end + if(last_run) + begin + last_cnt<=last_cnt+3'h1; + if(last_cnt==3'h7) + begin + db_valid<=1'h1; + db<=bco; + last_run<=1'h0; + end + + end +end + +// degrouper +reg [2:0] cnt; +reg invalid; +reg [7:0] decrypted; +reg [7*8-1:0] dec_group_ouput; + +always @(posedge clk) + if(rst) + begin + dec_group_ouput <= 32'h00000000; + cnt <= 2'h0; + end + else + begin + invalid <= 1'h0; + if(db_valid) + begin + dec_group_ouput <= db[8*8-1:1*8]; + decrypted <= db[7:0]; + cnt <= 3'h7; + invalid <= 1'h1; + end + if(cnt) + begin + invalid <= 1'h1; + dec_group_ouput <= {dec_group_ouput [7:0],dec_group_ouput[7*8-1:1*8]}; + decrypted <= dec_group_ouput [ 7:0 ]; + cnt <= cnt - 2'h1; + end + if(head) + begin + dec_group_ouput <= group_d[4*8-1:1*8]; + decrypted <= group_d[7:0]; + cnt <= 2'h3; + invalid <= 1'h1; + end + end + + + +endmodule Index: csa/trunk/rtl/stream_byte.v =================================================================== --- csa/trunk/rtl/stream_byte.v (nonexistent) +++ csa/trunk/rtl/stream_byte.v (revision 24) @@ -0,0 +1,198 @@ + + +// this module do a stream_byte opertion + + +module stream_byte(init,sb, + Ai,Bi,Di,Ei,Fi,Xi,Yi,Zi,pi,qi,ri, + Ao,Bo,Do,Eo,Fo,Xo,Yo,Zo,po,qo,ro, + op + ); +input init; +input [7 :0] sb; + +input [10*4-1:0] Ai; +input [10*4-1:0] Bi; +input [3 :0] Di; +input [3 :0] Ei; +input [3 :0] Fi; +input [3 :0] Xi; +input [3 :0] Yi; +input [3 :0] Zi; +input pi; +input qi; +input ri; + +output [10*4-1:0] Ao; +output [10*4-1:0] Bo; +output [3 :0] Do; +output [3 :0] Eo; +output [3 :0] Fo; +output [3 :0] Xo; +output [3 :0] Yo; +output [3 :0] Zo; +output po; +output qo; +output ro; + +output[7 :0] op; + +// intermedate result; +wire [10*4-1:0] A1; +wire [10*4-1:0] B1; +wire [3 :0] D1; +wire [3 :0] E1; +wire [3 :0] F1; +wire [3 :0] X1; +wire [3 :0] Y1; +wire [3 :0] Z1; +wire p1; +wire q1; + +wire [10*4-1:0] A2; +wire [10*4-1:0] B2; +wire [3 :0] D2; +wire [3 :0] E2; +wire [3 :0] F2; +wire [3 :0] X2; +wire [3 :0] Y2; +wire [3 :0] Z2; +wire p2; +wire q2; + +wire [10*4-1:0] A3; +wire [10*4-1:0] B3; +wire [3 :0] D3; +wire [3 :0] E3; +wire [3 :0] F3; +wire [3 :0] X3; +wire [3 :0] Y3; +wire [3 :0] Z3; +wire p3; +wire q3; +wire [7 :0] _op; + +wire [3 :0] in1; +wire [3 :0] in2; + +assign in1 = sb[7:4]; +assign in2 = sb[3:0]; + +stream_iteration b1 ( + .init(init) + ,.in1 (in2) + ,.in2 (in1) + ,.Ai (Ai) + ,.Bi (Bi) + ,.Di (Di) + ,.Ei (Ei) + ,.Fi (Fi) + ,.Xi (Xi) + ,.Yi (Yi) + ,.Zi (Zi) + ,.pi (pi) + ,.qi (qi) + ,.ri (ri) + ,.Ao (A1) + ,.Bo (B1) + ,.Do (D1) + ,.Eo (E1) + ,.Fo (F1) + ,.Xo (X1) + ,.Yo (Y1) + ,.Zo (Z1) + ,.po (p1) + ,.qo (q1) + ,.ro (r1) + ,.op (_op[7:6]) + ); + +stream_iteration b2 ( + .init(init) + ,.in1 (in1) + ,.in2 (in2) + ,.Ai (A1) + ,.Bi (B1) + ,.Di (D1) + ,.Ei (E1) + ,.Fi (F1) + ,.Xi (X1) + ,.Yi (Y1) + ,.Zi (Z1) + ,.pi (p1) + ,.qi (q1) + ,.ri (r1) + ,.Ao (A2) + ,.Bo (B2) + ,.Do (D2) + ,.Eo (E2) + ,.Fo (F2) + ,.Xo (X2) + ,.Yo (Y2) + ,.Zo (Z2) + ,.po (p2) + ,.qo (q2) + ,.ro (r2) + ,.op (_op[5:4]) + ); + +stream_iteration b3 ( + .init(init) + ,.in1 (in2) + ,.in2 (in1) + ,.Ai (A2) + ,.Bi (B2) + ,.Di (D2) + ,.Ei (E2) + ,.Fi (F2) + ,.Xi (X2) + ,.Yi (Y2) + ,.Zi (Z2) + ,.pi (p2) + ,.qi (q2) + ,.ri (r2) + ,.Ao (A3) + ,.Bo (B3) + ,.Do (D3) + ,.Eo (E3) + ,.Fo (F3) + ,.Xo (X3) + ,.Yo (Y3) + ,.Zo (Z3) + ,.po (p3) + ,.qo (q3) + ,.ro (r3) + ,.op (_op[3:2]) + ); + +stream_iteration b4 ( + .init(init) + ,.in1 (in1) + ,.in2 (in2) + ,.Ai (A3) + ,.Bi (B3) + ,.Di (D3) + ,.Ei (E3) + ,.Fi (F3) + ,.Xi (X3) + ,.Yi (Y3) + ,.Zi (Z3) + ,.pi (p3) + ,.qi (q3) + ,.ri (r3) + ,.Ao (Ao) + ,.Bo (Bo) + ,.Do (Do) + ,.Eo (Eo) + ,.Fo (Fo) + ,.Xo (Xo) + ,.Yo (Yo) + ,.Zo (Zo) + ,.po (po) + ,.qo (qo) + ,.ro (ro) + ,.op (_op[1:0]) + ); + +assign op=(init)?sb:_op; +endmodule Index: csa/trunk/rtl/stream_8bytes.v =================================================================== --- csa/trunk/rtl/stream_8bytes.v (nonexistent) +++ csa/trunk/rtl/stream_8bytes.v (revision 24) @@ -0,0 +1,348 @@ + + +// this module do 8bytes iteration + +module stream_8bytes( + init,sb, + Ai,Bi,Di,Ei,Fi,Xi,Yi,Zi,pi,qi,ri, + Ao,Bo,Do,Eo,Fo,Xo,Yo,Zo,po,qo,ro, + cb + ); +input init; +input [8*8-1 :0] sb; + +input [10*4-1:0] Ai; +input [10*4-1:0] Bi; +input [3 :0] Di; +input [3 :0] Ei; +input [3 :0] Fi; +input [3 :0] Xi; +input [3 :0] Yi; +input [3 :0] Zi; +input pi; +input qi; +input ri; + +output [10*4-1:0] Ao; +output [10*4-1:0] Bo; +output [3 :0] Do; +output [3 :0] Eo; +output [3 :0] Fo; +output [3 :0] Xo; +output [3 :0] Yo; +output [3 :0] Zo; +output po; +output qo; +output ro; + +output [8*8-1 :0] cb; + +wire [10*4-1:0] A1; +wire [10*4-1:0] B1; +wire [3 :0] D1; +wire [3 :0] E1; +wire [3 :0] F1; +wire [3 :0] X1; +wire [3 :0] Y1; +wire [3 :0] Z1; +wire p1; +wire q1; +wire r1; + +wire [10*4-1:0] A2; +wire [10*4-1:0] B2; +wire [3 :0] D2; +wire [3 :0] E2; +wire [3 :0] F2; +wire [3 :0] X2; +wire [3 :0] Y2; +wire [3 :0] Z2; +wire p2; +wire q2; +wire r2; + +wire [10*4-1:0] A3; +wire [10*4-1:0] B3; +wire [3 :0] D3; +wire [3 :0] E3; +wire [3 :0] F3; +wire [3 :0] X3; +wire [3 :0] Y3; +wire [3 :0] Z3; +wire p3; +wire q3; +wire r3; + +wire [10*4-1:0] A4; +wire [10*4-1:0] B4; +wire [3 :0] D4; +wire [3 :0] E4; +wire [3 :0] F4; +wire [3 :0] X4; +wire [3 :0] Y4; +wire [3 :0] Z4; +wire p4; +wire q4; +wire r4; + +wire [10*4-1:0] A5; +wire [10*4-1:0] B5; +wire [3 :0] D5; +wire [3 :0] E5; +wire [3 :0] F5; +wire [3 :0] X5; +wire [3 :0] Y5; +wire [3 :0] Z5; +wire p5; +wire q5; +wire r5; + +wire [10*4-1:0] A6; +wire [10*4-1:0] B6; +wire [3 :0] D6; +wire [3 :0] E6; +wire [3 :0] F6; +wire [3 :0] X6; +wire [3 :0] Y6; +wire [3 :0] Z6; +wire p6; +wire q6; +wire r6; + +wire [10*4-1:0] A7; +wire [10*4-1:0] B7; +wire [3 :0] D7; +wire [3 :0] E7; +wire [3 :0] F7; +wire [3 :0] X7; +wire [3 :0] Y7; +wire [3 :0] Z7; +wire p7; +wire q7; +wire r7; + +stream_byte b1( + .init(init) + ,.sb (sb[8*1-1:8*0]) + ,.Ai (Ai) + ,.Bi (Bi) + ,.Di (Di) + ,.Ei (Ei) + ,.Fi (Fi) + ,.Xi (Xi) + ,.Yi (Yi) + ,.Zi (Zi) + ,.pi (pi) + ,.qi (qi) + ,.ri (ri) + ,.Ao (A1) + ,.Bo (B1) + ,.Do (D1) + ,.Eo (E1) + ,.Fo (F1) + ,.Xo (X1) + ,.Yo (Y1) + ,.Zo (Z1) + ,.po (p1) + ,.qo (q1) + ,.ro (r1) + ,.op (cb[8*1-1:8*0]) + ); + +stream_byte b2( + .init(init) + ,.sb (sb[8*2-1:8*1]) + ,.Ai (A1) + ,.Bi (B1) + ,.Di (D1) + ,.Ei (E1) + ,.Fi (F1) + ,.Xi (X1) + ,.Yi (Y1) + ,.Zi (Z1) + ,.pi (p1) + ,.qi (q1) + ,.ri (r1) + ,.Ao (A2) + ,.Bo (B2) + ,.Do (D2) + ,.Eo (E2) + ,.Fo (F2) + ,.Xo (X2) + ,.Yo (Y2) + ,.Zo (Z2) + ,.po (p2) + ,.qo (q2) + ,.ro (r2) + ,.op (cb[8*2-1:8*1]) + ); + +stream_byte b3( + .init(init) + ,.sb (sb[8*3-1:8*2]) + ,.Ai (A2) + ,.Bi (B2) + ,.Di (D2) + ,.Ei (E2) + ,.Fi (F2) + ,.Xi (X2) + ,.Yi (Y2) + ,.Zi (Z2) + ,.pi (p2) + ,.qi (q2) + ,.ri (r2) + ,.Ao (A3) + ,.Bo (B3) + ,.Do (D3) + ,.Eo (E3) + ,.Fo (F3) + ,.Xo (X3) + ,.Yo (Y3) + ,.Zo (Z3) + ,.po (p3) + ,.qo (q3) + ,.ro (r3) + ,.op (cb[8*3-1:8*2]) + ); + +stream_byte b4( + .init(init) + ,.sb (sb[8*4-1:8*3]) + ,.Ai (A3) + ,.Bi (B3) + ,.Di (D3) + ,.Ei (E3) + ,.Fi (F3) + ,.Xi (X3) + ,.Yi (Y3) + ,.Zi (Z3) + ,.pi (p3) + ,.qi (q3) + ,.ri (r3) + ,.Ao (A4) + ,.Bo (B4) + ,.Do (D4) + ,.Eo (E4) + ,.Fo (F4) + ,.Xo (X4) + ,.Yo (Y4) + ,.Zo (Z4) + ,.po (p4) + ,.qo (q4) + ,.ro (r4) + ,.op (cb[8*4-1:8*3]) + ); + +stream_byte b5( + .init(init) + ,.sb (sb[8*5-1:8*4]) + ,.Ai (A4) + ,.Bi (B4) + ,.Di (D4) + ,.Ei (E4) + ,.Fi (F4) + ,.Xi (X4) + ,.Yi (Y4) + ,.Zi (Z4) + ,.pi (p4) + ,.qi (q4) + ,.ri (r4) + ,.Ao (A5) + ,.Bo (B5) + ,.Do (D5) + ,.Eo (E5) + ,.Fo (F5) + ,.Xo (X5) + ,.Yo (Y5) + ,.Zo (Z5) + ,.po (p5) + ,.qo (q5) + ,.ro (r5) + ,.op (cb[8*5-1:8*4]) + ); + +stream_byte b6( + .init(init) + ,.sb (sb[8*6-1:8*5]) + ,.Ai (A5) + ,.Bi (B5) + ,.Di (D5) + ,.Ei (E5) + ,.Fi (F5) + ,.Xi (X5) + ,.Yi (Y5) + ,.Zi (Z5) + ,.pi (p5) + ,.qi (q5) + ,.ri (r5) + ,.Ao (A6) + ,.Bo (B6) + ,.Do (D6) + ,.Eo (E6) + ,.Fo (F6) + ,.Xo (X6) + ,.Yo (Y6) + ,.Zo (Z6) + ,.po (p6) + ,.qo (q6) + ,.ro (r6) + ,.op (cb[8*6-1:8*5]) + ); + +stream_byte b7( + .init(init) + ,.sb (sb[8*7-1:8*6]) + ,.Ai (A6) + ,.Bi (B6) + ,.Di (D6) + ,.Ei (E6) + ,.Fi (F6) + ,.Xi (X6) + ,.Yi (Y6) + ,.Zi (Z6) + ,.pi (p6) + ,.qi (q6) + ,.ri (r6) + ,.Ao (A7) + ,.Bo (B7) + ,.Do (D7) + ,.Eo (E7) + ,.Fo (F7) + ,.Xo (X7) + ,.Yo (Y7) + ,.Zo (Z7) + ,.po (p7) + ,.qo (q7) + ,.ro (r7) + ,.op (cb[8*7-1:8*6]) + ); + +stream_byte b8( + .init(init) + ,.sb (sb[8*8-1:8*7]) + ,.Ai (A7) + ,.Bi (B7) + ,.Di (D7) + ,.Ei (E7) + ,.Fi (F7) + ,.Xi (X7) + ,.Yi (Y7) + ,.Zi (Z7) + ,.pi (p7) + ,.qi (q7) + ,.ri (r7) + ,.Ao (Ao) + ,.Bo (Bo) + ,.Do (Do) + ,.Eo (Eo) + ,.Fo (Fo) + ,.Xo (Xo) + ,.Yo (Yo) + ,.Zo (Zo) + ,.po (po) + ,.qo (qo) + ,.ro (ro) + ,.op (cb[8*8-1:8*7]) + ); + +endmodule Index: csa/trunk/rtl/sbox1.v =================================================================== --- csa/trunk/rtl/sbox1.v (nonexistent) +++ csa/trunk/rtl/sbox1.v (revision 24) @@ -0,0 +1,41 @@ +module sbox1(in,out); +input [4:0]in; +output [1:0]out; +reg [1:0]out; + +always @(in) + case (in) // synthesis full_case + 5'h00:out=2'h2; + 5'h01:out=2'h0; + 5'h02:out=2'h1; + 5'h03:out=2'h1; + 5'h04:out=2'h2; + 5'h05:out=2'h3; + 5'h06:out=2'h3; + 5'h07:out=2'h0; + 5'h08:out=2'h3; + 5'h09:out=2'h2; + 5'h0a:out=2'h2; + 5'h0b:out=2'h0; + 5'h0c:out=2'h1; + 5'h0d:out=2'h1; + 5'h0e:out=2'h0; + 5'h0f:out=2'h3; + 5'h10:out=2'h0; + 5'h11:out=2'h3; + 5'h12:out=2'h3; + 5'h13:out=2'h0; + 5'h14:out=2'h2; + 5'h15:out=2'h2; + 5'h16:out=2'h1; + 5'h17:out=2'h1; + 5'h18:out=2'h2; + 5'h19:out=2'h2; + 5'h1a:out=2'h0; + 5'h1b:out=2'h3; + 5'h1c:out=2'h1; + 5'h1d:out=2'h1; + 5'h1e:out=2'h3; + 5'h1f:out=2'h0; + endcase +endmodule Index: csa/trunk/rtl/sbox2.v =================================================================== --- csa/trunk/rtl/sbox2.v (nonexistent) +++ csa/trunk/rtl/sbox2.v (revision 24) @@ -0,0 +1,41 @@ +module sbox2(in,out); +input [4:0]in; +output [1:0]out; +reg [1:0]out; + +always @(in) + case (in) // synthesis full_case + 5'h00:out=2'h3; + 5'h01:out=2'h1; + 5'h02:out=2'h0; + 5'h03:out=2'h2; + 5'h04:out=2'h2; + 5'h05:out=2'h3; + 5'h06:out=2'h3; + 5'h07:out=2'h0; + 5'h08:out=2'h1; + 5'h09:out=2'h3; + 5'h0a:out=2'h2; + 5'h0b:out=2'h1; + 5'h0c:out=2'h0; + 5'h0d:out=2'h0; + 5'h0e:out=2'h1; + 5'h0f:out=2'h2; + 5'h10:out=2'h3; + 5'h11:out=2'h1; + 5'h12:out=2'h0; + 5'h13:out=2'h3; + 5'h14:out=2'h3; + 5'h15:out=2'h2; + 5'h16:out=2'h0; + 5'h17:out=2'h2; + 5'h18:out=2'h0; + 5'h19:out=2'h0; + 5'h1a:out=2'h1; + 5'h1b:out=2'h2; + 5'h1c:out=2'h2; + 5'h1d:out=2'h1; + 5'h1e:out=2'h3; + 5'h1f:out=2'h1; + endcase +endmodule Index: csa/trunk/rtl/sbox3.v =================================================================== --- csa/trunk/rtl/sbox3.v (nonexistent) +++ csa/trunk/rtl/sbox3.v (revision 24) @@ -0,0 +1,41 @@ +module sbox3(in,out); +input [4:0]in; +output [1:0]out; +reg [1:0]out; + +always @(in) + case (in) // synthesis full_case + 5'h00:out=2'h2; + 5'h01:out=2'h0; + 5'h02:out=2'h1; + 5'h03:out=2'h2; + 5'h04:out=2'h2; + 5'h05:out=2'h3; + 5'h06:out=2'h3; + 5'h07:out=2'h1; + 5'h08:out=2'h1; + 5'h09:out=2'h1; + 5'h0a:out=2'h0; + 5'h0b:out=2'h3; + 5'h0c:out=2'h3; + 5'h0d:out=2'h0; + 5'h0e:out=2'h2; + 5'h0f:out=2'h0; + 5'h10:out=2'h1; + 5'h11:out=2'h3; + 5'h12:out=2'h0; + 5'h13:out=2'h1; + 5'h14:out=2'h3; + 5'h15:out=2'h0; + 5'h16:out=2'h2; + 5'h17:out=2'h2; + 5'h18:out=2'h2; + 5'h19:out=2'h0; + 5'h1a:out=2'h1; + 5'h1b:out=2'h2; + 5'h1c:out=2'h0; + 5'h1d:out=2'h3; + 5'h1e:out=2'h3; + 5'h1f:out=2'h1; + endcase +endmodule Index: csa/trunk/rtl/sbox4.v =================================================================== --- csa/trunk/rtl/sbox4.v (nonexistent) +++ csa/trunk/rtl/sbox4.v (revision 24) @@ -0,0 +1,41 @@ +module sbox4(in,out); +input [4:0]in; +output [1:0]out; +reg [1:0]out; + +always @(in) + case (in) // synthesis full_case + 5'h00:out=2'h3; + 5'h01:out=2'h1; + 5'h02:out=2'h2; + 5'h03:out=2'h3; + 5'h04:out=2'h0; + 5'h05:out=2'h2; + 5'h06:out=2'h1; + 5'h07:out=2'h2; + 5'h08:out=2'h1; + 5'h09:out=2'h2; + 5'h0a:out=2'h0; + 5'h0b:out=2'h1; + 5'h0c:out=2'h3; + 5'h0d:out=2'h0; + 5'h0e:out=2'h0; + 5'h0f:out=2'h3; + 5'h10:out=2'h1; + 5'h11:out=2'h0; + 5'h12:out=2'h3; + 5'h13:out=2'h1; + 5'h14:out=2'h2; + 5'h15:out=2'h3; + 5'h16:out=2'h0; + 5'h17:out=2'h3; + 5'h18:out=2'h0; + 5'h19:out=2'h3; + 5'h1a:out=2'h2; + 5'h1b:out=2'h0; + 5'h1c:out=2'h1; + 5'h1d:out=2'h2; + 5'h1e:out=2'h2; + 5'h1f:out=2'h1; + endcase +endmodule Index: csa/trunk/rtl/sbox5.v =================================================================== --- csa/trunk/rtl/sbox5.v (nonexistent) +++ csa/trunk/rtl/sbox5.v (revision 24) @@ -0,0 +1,41 @@ +module sbox5(in,out); +input [4:0]in; +output [1:0]out; +reg [1:0]out; + +always @(in) + case (in) // synthesis full_case + 5'h00:out=2'h2; + 5'h01:out=2'h0; + 5'h02:out=2'h0; + 5'h03:out=2'h1; + 5'h04:out=2'h3; + 5'h05:out=2'h2; + 5'h06:out=2'h3; + 5'h07:out=2'h2; + 5'h08:out=2'h0; + 5'h09:out=2'h1; + 5'h0a:out=2'h3; + 5'h0b:out=2'h3; + 5'h0c:out=2'h1; + 5'h0d:out=2'h0; + 5'h0e:out=2'h2; + 5'h0f:out=2'h1; + 5'h10:out=2'h2; + 5'h11:out=2'h3; + 5'h12:out=2'h2; + 5'h13:out=2'h0; + 5'h14:out=2'h0; + 5'h15:out=2'h3; + 5'h16:out=2'h1; + 5'h17:out=2'h1; + 5'h18:out=2'h1; + 5'h19:out=2'h0; + 5'h1a:out=2'h3; + 5'h1b:out=2'h2; + 5'h1c:out=2'h3; + 5'h1d:out=2'h1; + 5'h1e:out=2'h0; + 5'h1f:out=2'h2; + endcase +endmodule Index: csa/trunk/rtl/sbox6.v =================================================================== --- csa/trunk/rtl/sbox6.v (nonexistent) +++ csa/trunk/rtl/sbox6.v (revision 24) @@ -0,0 +1,41 @@ +module sbox6(in,out); +input [4:0]in; +output [1:0]out; +reg [1:0]out; + +always @(in) + case (in) // synthesis full_case + 5'h00:out=2'h0; + 5'h01:out=2'h1; + 5'h02:out=2'h2; + 5'h03:out=2'h3; + 5'h04:out=2'h1; + 5'h05:out=2'h2; + 5'h06:out=2'h2; + 5'h07:out=2'h0; + 5'h08:out=2'h0; + 5'h09:out=2'h1; + 5'h0a:out=2'h3; + 5'h0b:out=2'h0; + 5'h0c:out=2'h2; + 5'h0d:out=2'h3; + 5'h0e:out=2'h1; + 5'h0f:out=2'h3; + 5'h10:out=2'h2; + 5'h11:out=2'h3; + 5'h12:out=2'h0; + 5'h13:out=2'h2; + 5'h14:out=2'h3; + 5'h15:out=2'h0; + 5'h16:out=2'h1; + 5'h17:out=2'h1; + 5'h18:out=2'h2; + 5'h19:out=2'h1; + 5'h1a:out=2'h1; + 5'h1b:out=2'h2; + 5'h1c:out=2'h0; + 5'h1d:out=2'h3; + 5'h1e:out=2'h3; + 5'h1f:out=2'h0; + endcase +endmodule Index: csa/trunk/rtl/sbox7.v =================================================================== --- csa/trunk/rtl/sbox7.v (nonexistent) +++ csa/trunk/rtl/sbox7.v (revision 24) @@ -0,0 +1,41 @@ +module sbox7(in,out); +input [4:0]in; +output [1:0]out; +reg [1:0]out; + +always @(in) + case (in) // synthesis full_case + 5'h00:out=2'h0; + 5'h01:out=2'h3; + 5'h02:out=2'h2; + 5'h03:out=2'h2; + 5'h04:out=2'h3; + 5'h05:out=2'h0; + 5'h06:out=2'h0; + 5'h07:out=2'h1; + 5'h08:out=2'h3; + 5'h09:out=2'h0; + 5'h0a:out=2'h1; + 5'h0b:out=2'h3; + 5'h0c:out=2'h1; + 5'h0d:out=2'h2; + 5'h0e:out=2'h2; + 5'h0f:out=2'h1; + 5'h10:out=2'h1; + 5'h11:out=2'h0; + 5'h12:out=2'h3; + 5'h13:out=2'h3; + 5'h14:out=2'h0; + 5'h15:out=2'h1; + 5'h16:out=2'h1; + 5'h17:out=2'h2; + 5'h18:out=2'h2; + 5'h19:out=2'h3; + 5'h1a:out=2'h1; + 5'h1b:out=2'h0; + 5'h1c:out=2'h2; + 5'h1d:out=2'h3; + 5'h1e:out=2'h0; + 5'h1f:out=2'h2; + endcase +endmodule Index: csa/trunk/rtl/sboxes.v =================================================================== --- csa/trunk/rtl/sboxes.v (nonexistent) +++ csa/trunk/rtl/sboxes.v (revision 24) @@ -0,0 +1,23 @@ + +//this moudule preform the s-boxes transform + +module sboxes(A, s1, s2, s3, s4, s5, s6, s7); +input [9*4-1:0] A; + +output [2-1:0] s1; +output [2-1:0] s2; +output [2-1:0] s3; +output [2-1:0] s4; +output [2-1:0] s5; +output [2-1:0] s6; +output [2-1:0] s7; + +sbox1 b1({A[(4-1)*4+0], A[(1-1)*4+2], A[(6-1)*4+1], A[(7-1)*4+3], A[(9-1)*4+0]}, s1); +sbox2 b2({A[(2-1)*4+1], A[(3-1)*4+2], A[(6-1)*4+3], A[(7-1)*4+0], A[(9-1)*4+1]}, s2); +sbox3 b3({A[(1-1)*4+3], A[(2-1)*4+0], A[(5-1)*4+1], A[(5-1)*4+3], A[(6-1)*4+2]}, s3); +sbox4 b4({A[(3-1)*4+3], A[(1-1)*4+1], A[(2-1)*4+3], A[(4-1)*4+2], A[(8-1)*4+0]}, s4); +sbox5 b5({A[(5-1)*4+2], A[(4-1)*4+3], A[(6-1)*4+0], A[(8-1)*4+1], A[(9-1)*4+2]}, s5); +sbox6 b6({A[(3-1)*4+1], A[(4-1)*4+1], A[(5-1)*4+0], A[(7-1)*4+2], A[(9-1)*4+3]}, s6); +sbox7 b7({A[(2-1)*4+2], A[(3-1)*4+0], A[(7-1)*4+1], A[(8-1)*4+2], A[(8-1)*4+3]}, s7); + +endmodule Index: csa/trunk/rtl/stream_iteration.v =================================================================== --- csa/trunk/rtl/stream_iteration.v (nonexistent) +++ csa/trunk/rtl/stream_iteration.v (revision 24) @@ -0,0 +1,102 @@ + +// this module do a iteration operation for 2 bit + +module stream_iteration(init,in1,in2, + Ai,Bi,Di,Ei,Fi,Xi,Yi,Zi,pi,qi,ri, + Ao,Bo,Do,Eo,Fo,Xo,Yo,Zo,po,qo,ro, + op); +input init; +input [3 :0] in1; +input [3 :0] in2; + +input [10*4-1:0] Ai; +input [10*4-1:0] Bi; +input [3 :0] Di; +input [3 :0] Ei; +input [3 :0] Fi; +input [3 :0] Xi; +input [3 :0] Yi; +input [3 :0] Zi; +input pi; +input qi; +input ri; + +output [10*4-1:0] Ao; +output [10*4-1:0] Bo; +output [3 :0] Do; +output [3 :0] Eo; +output [3 :0] Fo; +output [3 :0] Xo; +output [3 :0] Yo; +output [3 :0] Zo; +output po; +output qo; +output ro; + +output[1 :0] op; + +wire [1:0] s1; +wire [1:0] s2; +wire [1:0] s3; +wire [1:0] s4; +wire [1:0] s5; +wire [1:0] s6; +wire [1:0] s7; + +wire [3:0] extra_B; +wire [3:0] next_A1; +wire [3:0] _next_B1; +wire [3:0] next_B1; +wire [3:0] next_E; + +wire [4:0] total; + +sboxes b( + .A(Ai[9*4-1:0]) + ,.s1(s1) + ,.s2(s2) + ,.s3(s3) + ,.s4(s4) + ,.s5(s5) + ,.s6(s6) + ,.s7(s7) + ); + +assign extra_B ={( Bi[(3-1)*4+0] ^ Bi[(6-1)*4+1] ^ Bi[(7-1)*4+2] ^ Bi[(9-1)*4+3]) , + ( Bi[(6-1)*4+0] ^ Bi[(8-1)*4+1] ^ Bi[(3-1)*4+3] ^ Bi[(4-1)*4+2]) , + ( Bi[(5-1)*4+3] ^ Bi[(8-1)*4+2] ^ Bi[(4-1)*4+0] ^ Bi[(5-1)*4+1]) , + ( Bi[(9-1)*4+2] ^ Bi[(6-1)*4+3] ^ Bi[(3-1)*4+1] ^ Bi[(8-1)*4+0]) }; + +assign next_A1=(init)? Ai[(10)*4-1:(10-1)*4] ^ Xi ^ Di ^ in2 + :Ai[(10)*4-1:(10-1)*4] ^ Xi; + +assign _next_B1=(init)? Bi[7*4-1:(7-1)*4] ^ Bi[10*4-1:(10-1)*4] ^ Yi ^ in1 + :Bi[7*4-1:(7-1)*4] ^ Bi[10*4-1:(10-1)*4] ^ Yi ; + +assign next_B1=(pi)?{ _next_B1[2:0], _next_B1[3] }: _next_B1; + +assign Do = Ei ^ Zi ^ extra_B; + +assign next_E=Fi; + +assign total=Zi+Ei+ri; + +assign Fo=(qi)? total[3:0]:Ei; +assign ro=(qi)? total[4]:ri; + +assign Eo=next_E; + +assign Ao[10*4-1:4]=Ai[9*4-1:0]; +assign Ao[1*4-1:0] =next_A1; +assign Bo[10*4-1:4]=Bi[9*4-1:0]; +assign Bo[1*4-1:0] =next_B1; + +assign Xo ={s4[0] , s3[0] , s2[1] , s1[1] }; +assign Yo ={s6[0] , s5[0] , s4[1] , s3[1] }; +assign Zo ={s2[0] , s1[0] , s6[1] , s5[1] }; + +assign po=s7[1]; +assign qo=s7[0]; + +assign op = { Do[3] ^ Do[2], Do[1] ^ Do[0] }; +endmodule Index: csa/trunk/rtl/block_perm.v =================================================================== --- csa/trunk/rtl/block_perm.v (nonexistent) +++ csa/trunk/rtl/block_perm.v (revision 24) @@ -0,0 +1,268 @@ + + +module block_perm(in, out); +input [7:0] in; +output [7:0] out; +reg [7:0] out; + +always @(in) + case (in) + 8'h00: out=8'h00; + 8'h01: out=8'h02; + 8'h02: out=8'h80; + 8'h03: out=8'h82; + 8'h04: out=8'h20; + 8'h05: out=8'h22; + 8'h06: out=8'hA0; + 8'h07: out=8'hA2; + 8'h08: out=8'h10; + 8'h09: out=8'h12; + 8'h0A: out=8'h90; + 8'h0B: out=8'h92; + 8'h0C: out=8'h30; + 8'h0D: out=8'h32; + 8'h0E: out=8'hB0; + 8'h0F: out=8'hB2; + 8'h10: out=8'h04; + 8'h11: out=8'h06; + 8'h12: out=8'h84; + 8'h13: out=8'h86; + 8'h14: out=8'h24; + 8'h15: out=8'h26; + 8'h16: out=8'hA4; + 8'h17: out=8'hA6; + 8'h18: out=8'h14; + 8'h19: out=8'h16; + 8'h1A: out=8'h94; + 8'h1B: out=8'h96; + 8'h1C: out=8'h34; + 8'h1D: out=8'h36; + 8'h1E: out=8'hB4; + 8'h1F: out=8'hB6; + 8'h20: out=8'h40; + 8'h21: out=8'h42; + 8'h22: out=8'hC0; + 8'h23: out=8'hC2; + 8'h24: out=8'h60; + 8'h25: out=8'h62; + 8'h26: out=8'hE0; + 8'h27: out=8'hE2; + 8'h28: out=8'h50; + 8'h29: out=8'h52; + 8'h2A: out=8'hD0; + 8'h2B: out=8'hD2; + 8'h2C: out=8'h70; + 8'h2D: out=8'h72; + 8'h2E: out=8'hF0; + 8'h2F: out=8'hF2; + 8'h30: out=8'h44; + 8'h31: out=8'h46; + 8'h32: out=8'hC4; + 8'h33: out=8'hC6; + 8'h34: out=8'h64; + 8'h35: out=8'h66; + 8'h36: out=8'hE4; + 8'h37: out=8'hE6; + 8'h38: out=8'h54; + 8'h39: out=8'h56; + 8'h3A: out=8'hD4; + 8'h3B: out=8'hD6; + 8'h3C: out=8'h74; + 8'h3D: out=8'h76; + 8'h3E: out=8'hF4; + 8'h3F: out=8'hF6; + 8'h40: out=8'h01; + 8'h41: out=8'h03; + 8'h42: out=8'h81; + 8'h43: out=8'h83; + 8'h44: out=8'h21; + 8'h45: out=8'h23; + 8'h46: out=8'hA1; + 8'h47: out=8'hA3; + 8'h48: out=8'h11; + 8'h49: out=8'h13; + 8'h4A: out=8'h91; + 8'h4B: out=8'h93; + 8'h4C: out=8'h31; + 8'h4D: out=8'h33; + 8'h4E: out=8'hB1; + 8'h4F: out=8'hB3; + 8'h50: out=8'h05; + 8'h51: out=8'h07; + 8'h52: out=8'h85; + 8'h53: out=8'h87; + 8'h54: out=8'h25; + 8'h55: out=8'h27; + 8'h56: out=8'hA5; + 8'h57: out=8'hA7; + 8'h58: out=8'h15; + 8'h59: out=8'h17; + 8'h5A: out=8'h95; + 8'h5B: out=8'h97; + 8'h5C: out=8'h35; + 8'h5D: out=8'h37; + 8'h5E: out=8'hB5; + 8'h5F: out=8'hB7; + 8'h60: out=8'h41; + 8'h61: out=8'h43; + 8'h62: out=8'hC1; + 8'h63: out=8'hC3; + 8'h64: out=8'h61; + 8'h65: out=8'h63; + 8'h66: out=8'hE1; + 8'h67: out=8'hE3; + 8'h68: out=8'h51; + 8'h69: out=8'h53; + 8'h6A: out=8'hD1; + 8'h6B: out=8'hD3; + 8'h6C: out=8'h71; + 8'h6D: out=8'h73; + 8'h6E: out=8'hF1; + 8'h6F: out=8'hF3; + 8'h70: out=8'h45; + 8'h71: out=8'h47; + 8'h72: out=8'hC5; + 8'h73: out=8'hC7; + 8'h74: out=8'h65; + 8'h75: out=8'h67; + 8'h76: out=8'hE5; + 8'h77: out=8'hE7; + 8'h78: out=8'h55; + 8'h79: out=8'h57; + 8'h7A: out=8'hD5; + 8'h7B: out=8'hD7; + 8'h7C: out=8'h75; + 8'h7D: out=8'h77; + 8'h7E: out=8'hF5; + 8'h7F: out=8'hF7; + 8'h80: out=8'h08; + 8'h81: out=8'h0A; + 8'h82: out=8'h88; + 8'h83: out=8'h8A; + 8'h84: out=8'h28; + 8'h85: out=8'h2A; + 8'h86: out=8'hA8; + 8'h87: out=8'hAA; + 8'h88: out=8'h18; + 8'h89: out=8'h1A; + 8'h8A: out=8'h98; + 8'h8B: out=8'h9A; + 8'h8C: out=8'h38; + 8'h8D: out=8'h3A; + 8'h8E: out=8'hB8; + 8'h8F: out=8'hBA; + 8'h90: out=8'h0C; + 8'h91: out=8'h0E; + 8'h92: out=8'h8C; + 8'h93: out=8'h8E; + 8'h94: out=8'h2C; + 8'h95: out=8'h2E; + 8'h96: out=8'hAC; + 8'h97: out=8'hAE; + 8'h98: out=8'h1C; + 8'h99: out=8'h1E; + 8'h9A: out=8'h9C; + 8'h9B: out=8'h9E; + 8'h9C: out=8'h3C; + 8'h9D: out=8'h3E; + 8'h9E: out=8'hBC; + 8'h9F: out=8'hBE; + 8'hA0: out=8'h48; + 8'hA1: out=8'h4A; + 8'hA2: out=8'hC8; + 8'hA3: out=8'hCA; + 8'hA4: out=8'h68; + 8'hA5: out=8'h6A; + 8'hA6: out=8'hE8; + 8'hA7: out=8'hEA; + 8'hA8: out=8'h58; + 8'hA9: out=8'h5A; + 8'hAA: out=8'hD8; + 8'hAB: out=8'hDA; + 8'hAC: out=8'h78; + 8'hAD: out=8'h7A; + 8'hAE: out=8'hF8; + 8'hAF: out=8'hFA; + 8'hB0: out=8'h4C; + 8'hB1: out=8'h4E; + 8'hB2: out=8'hCC; + 8'hB3: out=8'hCE; + 8'hB4: out=8'h6C; + 8'hB5: out=8'h6E; + 8'hB6: out=8'hEC; + 8'hB7: out=8'hEE; + 8'hB8: out=8'h5C; + 8'hB9: out=8'h5E; + 8'hBA: out=8'hDC; + 8'hBB: out=8'hDE; + 8'hBC: out=8'h7C; + 8'hBD: out=8'h7E; + 8'hBE: out=8'hFC; + 8'hBF: out=8'hFE; + 8'hC0: out=8'h09; + 8'hC1: out=8'h0B; + 8'hC2: out=8'h89; + 8'hC3: out=8'h8B; + 8'hC4: out=8'h29; + 8'hC5: out=8'h2B; + 8'hC6: out=8'hA9; + 8'hC7: out=8'hAB; + 8'hC8: out=8'h19; + 8'hC9: out=8'h1B; + 8'hCA: out=8'h99; + 8'hCB: out=8'h9B; + 8'hCC: out=8'h39; + 8'hCD: out=8'h3B; + 8'hCE: out=8'hB9; + 8'hCF: out=8'hBB; + 8'hD0: out=8'h0D; + 8'hD1: out=8'h0F; + 8'hD2: out=8'h8D; + 8'hD3: out=8'h8F; + 8'hD4: out=8'h2D; + 8'hD5: out=8'h2F; + 8'hD6: out=8'hAD; + 8'hD7: out=8'hAF; + 8'hD8: out=8'h1D; + 8'hD9: out=8'h1F; + 8'hDA: out=8'h9D; + 8'hDB: out=8'h9F; + 8'hDC: out=8'h3D; + 8'hDD: out=8'h3F; + 8'hDE: out=8'hBD; + 8'hDF: out=8'hBF; + 8'hE0: out=8'h49; + 8'hE1: out=8'h4B; + 8'hE2: out=8'hC9; + 8'hE3: out=8'hCB; + 8'hE4: out=8'h69; + 8'hE5: out=8'h6B; + 8'hE6: out=8'hE9; + 8'hE7: out=8'hEB; + 8'hE8: out=8'h59; + 8'hE9: out=8'h5B; + 8'hEA: out=8'hD9; + 8'hEB: out=8'hDB; + 8'hEC: out=8'h79; + 8'hED: out=8'h7B; + 8'hEE: out=8'hF9; + 8'hEF: out=8'hFB; + 8'hF0: out=8'h4D; + 8'hF1: out=8'h4F; + 8'hF2: out=8'hCD; + 8'hF3: out=8'hCF; + 8'hF4: out=8'h6D; + 8'hF5: out=8'h6F; + 8'hF6: out=8'hED; + 8'hF7: out=8'hEF; + 8'hF8: out=8'h5D; + 8'hF9: out=8'h5F; + 8'hFA: out=8'hDD; + 8'hFB: out=8'hDF; + 8'hFC: out=8'h7D; + 8'hFD: out=8'h7F; + 8'hFE: out=8'hFD; + 8'hFF: out=8'hFF; + + endcase +endmodule Index: csa/trunk/rtl/block_decypher.v =================================================================== --- csa/trunk/rtl/block_decypher.v (nonexistent) +++ csa/trunk/rtl/block_decypher.v (revision 24) @@ -0,0 +1,91 @@ + +// this module will do the block decrypter work +module single_block_decyper(ri,kk,ro); +input [8*8-1:0*8] ri; +input [8-1:0] kk; +output [8*8-1:0*8] ro; + +wire [8-1:0]sbox_in; +wire [8-1:0]sbox_out; +wire [8-1:0]perm_out; +wire [8-1:0]next_r8; + +assign sbox_in=kk ^ ri[7*8-1:6*8]; +block_sbox s(.in(sbox_in),.out(sbox_out)); +block_perm p(.in(sbox_out),.out(perm_out)); +assign next_r8=ri[7*8-1:6*8]; +assign ro[7*8-1:6*8]=ri[6*8-1:5*8]^perm_out; +assign ro[6*8-1:5*8]=ri[5*8-1:4*8]; +assign ro[5*8-1:4*8]=ri[4*8-1:3*8]^ri[8*8-1:7*8]^sbox_out; +assign ro[4*8-1:3*8]=ri[3*8-1:2*8]^ri[8*8-1:7*8]^sbox_out; +assign ro[3*8-1:2*8]=ri[2*8-1:1*8]^ri[8*8-1:7*8]^sbox_out; +assign ro[2*8-1:1*8]=ri[1*8-1:0*8]; +assign ro[1*8-1:0*8]=ri[8*8-1:7*8]^sbox_out; +assign ro[8*8-1:7*8]=next_r8; +endmodule + +module block_decypher(kk,ib,bd); +input [56 *8-1:0*8]kk; +input [8 *8-1:0]ib; +output [8 *8-1:0]bd; + +wire [56*8*8-1:0]r; +single_block_decyper b56(.ri(ib[8*8-1:0]),.kk(kk[56*8-1:55*8]),.ro(r[56*8*8-1:55*8*8])); +single_block_decyper b55(.ri(r[56*8*8-1:55*8*8]),.kk(kk[55*8-1:54*8]),.ro(r[55*8*8-1:54*8*8])); +single_block_decyper b54(.ri(r[55*8*8-1:54*8*8]),.kk(kk[54*8-1:53*8]),.ro(r[54*8*8-1:53*8*8])); +single_block_decyper b53(.ri(r[54*8*8-1:53*8*8]),.kk(kk[53*8-1:52*8]),.ro(r[53*8*8-1:52*8*8])); +single_block_decyper b52(.ri(r[53*8*8-1:52*8*8]),.kk(kk[52*8-1:51*8]),.ro(r[52*8*8-1:51*8*8])); +single_block_decyper b51(.ri(r[52*8*8-1:51*8*8]),.kk(kk[51*8-1:50*8]),.ro(r[51*8*8-1:50*8*8])); +single_block_decyper b50(.ri(r[51*8*8-1:50*8*8]),.kk(kk[50*8-1:49*8]),.ro(r[50*8*8-1:49*8*8])); +single_block_decyper b49(.ri(r[50*8*8-1:49*8*8]),.kk(kk[49*8-1:48*8]),.ro(r[49*8*8-1:48*8*8])); +single_block_decyper b48(.ri(r[49*8*8-1:48*8*8]),.kk(kk[48*8-1:47*8]),.ro(r[48*8*8-1:47*8*8])); +single_block_decyper b47(.ri(r[48*8*8-1:47*8*8]),.kk(kk[47*8-1:46*8]),.ro(r[47*8*8-1:46*8*8])); +single_block_decyper b46(.ri(r[47*8*8-1:46*8*8]),.kk(kk[46*8-1:45*8]),.ro(r[46*8*8-1:45*8*8])); +single_block_decyper b45(.ri(r[46*8*8-1:45*8*8]),.kk(kk[45*8-1:44*8]),.ro(r[45*8*8-1:44*8*8])); +single_block_decyper b44(.ri(r[45*8*8-1:44*8*8]),.kk(kk[44*8-1:43*8]),.ro(r[44*8*8-1:43*8*8])); +single_block_decyper b43(.ri(r[44*8*8-1:43*8*8]),.kk(kk[43*8-1:42*8]),.ro(r[43*8*8-1:42*8*8])); +single_block_decyper b42(.ri(r[43*8*8-1:42*8*8]),.kk(kk[42*8-1:41*8]),.ro(r[42*8*8-1:41*8*8])); +single_block_decyper b41(.ri(r[42*8*8-1:41*8*8]),.kk(kk[41*8-1:40*8]),.ro(r[41*8*8-1:40*8*8])); +single_block_decyper b40(.ri(r[41*8*8-1:40*8*8]),.kk(kk[40*8-1:39*8]),.ro(r[40*8*8-1:39*8*8])); +single_block_decyper b39(.ri(r[40*8*8-1:39*8*8]),.kk(kk[39*8-1:38*8]),.ro(r[39*8*8-1:38*8*8])); +single_block_decyper b38(.ri(r[39*8*8-1:38*8*8]),.kk(kk[38*8-1:37*8]),.ro(r[38*8*8-1:37*8*8])); +single_block_decyper b37(.ri(r[38*8*8-1:37*8*8]),.kk(kk[37*8-1:36*8]),.ro(r[37*8*8-1:36*8*8])); +single_block_decyper b36(.ri(r[37*8*8-1:36*8*8]),.kk(kk[36*8-1:35*8]),.ro(r[36*8*8-1:35*8*8])); +single_block_decyper b35(.ri(r[36*8*8-1:35*8*8]),.kk(kk[35*8-1:34*8]),.ro(r[35*8*8-1:34*8*8])); +single_block_decyper b34(.ri(r[35*8*8-1:34*8*8]),.kk(kk[34*8-1:33*8]),.ro(r[34*8*8-1:33*8*8])); +single_block_decyper b33(.ri(r[34*8*8-1:33*8*8]),.kk(kk[33*8-1:32*8]),.ro(r[33*8*8-1:32*8*8])); +single_block_decyper b32(.ri(r[33*8*8-1:32*8*8]),.kk(kk[32*8-1:31*8]),.ro(r[32*8*8-1:31*8*8])); +single_block_decyper b31(.ri(r[32*8*8-1:31*8*8]),.kk(kk[31*8-1:30*8]),.ro(r[31*8*8-1:30*8*8])); +single_block_decyper b30(.ri(r[31*8*8-1:30*8*8]),.kk(kk[30*8-1:29*8]),.ro(r[30*8*8-1:29*8*8])); +single_block_decyper b29(.ri(r[30*8*8-1:29*8*8]),.kk(kk[29*8-1:28*8]),.ro(r[29*8*8-1:28*8*8])); +single_block_decyper b28(.ri(r[29*8*8-1:28*8*8]),.kk(kk[28*8-1:27*8]),.ro(r[28*8*8-1:27*8*8])); +single_block_decyper b27(.ri(r[28*8*8-1:27*8*8]),.kk(kk[27*8-1:26*8]),.ro(r[27*8*8-1:26*8*8])); +single_block_decyper b26(.ri(r[27*8*8-1:26*8*8]),.kk(kk[26*8-1:25*8]),.ro(r[26*8*8-1:25*8*8])); +single_block_decyper b25(.ri(r[26*8*8-1:25*8*8]),.kk(kk[25*8-1:24*8]),.ro(r[25*8*8-1:24*8*8])); +single_block_decyper b24(.ri(r[25*8*8-1:24*8*8]),.kk(kk[24*8-1:23*8]),.ro(r[24*8*8-1:23*8*8])); +single_block_decyper b23(.ri(r[24*8*8-1:23*8*8]),.kk(kk[23*8-1:22*8]),.ro(r[23*8*8-1:22*8*8])); +single_block_decyper b22(.ri(r[23*8*8-1:22*8*8]),.kk(kk[22*8-1:21*8]),.ro(r[22*8*8-1:21*8*8])); +single_block_decyper b21(.ri(r[22*8*8-1:21*8*8]),.kk(kk[21*8-1:20*8]),.ro(r[21*8*8-1:20*8*8])); +single_block_decyper b20(.ri(r[21*8*8-1:20*8*8]),.kk(kk[20*8-1:19*8]),.ro(r[20*8*8-1:19*8*8])); +single_block_decyper b19(.ri(r[20*8*8-1:19*8*8]),.kk(kk[19*8-1:18*8]),.ro(r[19*8*8-1:18*8*8])); +single_block_decyper b18(.ri(r[19*8*8-1:18*8*8]),.kk(kk[18*8-1:17*8]),.ro(r[18*8*8-1:17*8*8])); +single_block_decyper b17(.ri(r[18*8*8-1:17*8*8]),.kk(kk[17*8-1:16*8]),.ro(r[17*8*8-1:16*8*8])); +single_block_decyper b16(.ri(r[17*8*8-1:16*8*8]),.kk(kk[16*8-1:15*8]),.ro(r[16*8*8-1:15*8*8])); +single_block_decyper b15(.ri(r[16*8*8-1:15*8*8]),.kk(kk[15*8-1:14*8]),.ro(r[15*8*8-1:14*8*8])); +single_block_decyper b14(.ri(r[15*8*8-1:14*8*8]),.kk(kk[14*8-1:13*8]),.ro(r[14*8*8-1:13*8*8])); +single_block_decyper b13(.ri(r[14*8*8-1:13*8*8]),.kk(kk[13*8-1:12*8]),.ro(r[13*8*8-1:12*8*8])); +single_block_decyper b12(.ri(r[13*8*8-1:12*8*8]),.kk(kk[12*8-1:11*8]),.ro(r[12*8*8-1:11*8*8])); +single_block_decyper b11(.ri(r[12*8*8-1:11*8*8]),.kk(kk[11*8-1:10*8]),.ro(r[11*8*8-1:10*8*8])); +single_block_decyper b10(.ri(r[11*8*8-1:10*8*8]),.kk(kk[10*8-1: 9*8]),.ro(r[10*8*8-1: 9*8*8])); +single_block_decyper b9 (.ri(r[10*8*8-1: 9*8*8]),.kk(kk[ 9*8-1: 8*8]),.ro(r[ 9*8*8-1: 8*8*8])); +single_block_decyper b8 (.ri(r[ 9*8*8-1: 8*8*8]),.kk(kk[ 8*8-1: 7*8]),.ro(r[ 8*8*8-1: 7*8*8])); +single_block_decyper b7 (.ri(r[ 8*8*8-1: 7*8*8]),.kk(kk[ 7*8-1: 6*8]),.ro(r[ 7*8*8-1: 6*8*8])); +single_block_decyper b6 (.ri(r[ 7*8*8-1: 6*8*8]),.kk(kk[ 6*8-1: 5*8]),.ro(r[ 6*8*8-1: 5*8*8])); +single_block_decyper b5 (.ri(r[ 6*8*8-1: 5*8*8]),.kk(kk[ 5*8-1: 4*8]),.ro(r[ 5*8*8-1: 4*8*8])); +single_block_decyper b4 (.ri(r[ 5*8*8-1: 4*8*8]),.kk(kk[ 4*8-1: 3*8]),.ro(r[ 4*8*8-1: 3*8*8])); +single_block_decyper b3 (.ri(r[ 4*8*8-1: 3*8*8]),.kk(kk[ 3*8-1: 2*8]),.ro(r[ 3*8*8-1: 2*8*8])); +single_block_decyper b2 (.ri(r[ 3*8*8-1: 2*8*8]),.kk(kk[ 2*8-1: 1*8]),.ro(r[ 2*8*8-1: 1*8*8])); +single_block_decyper b1 (.ri(r[ 2*8*8-1: 1*8*8]),.kk(kk[ 1*8-1: 0*8]),.ro(r[ 1*8*8-1: 0*8*8])); + +assign bd=r[ 1*8*8-1: 0*8*8]; +endmodule Index: csa/trunk/rtl/block_sbox.v =================================================================== --- csa/trunk/rtl/block_sbox.v (nonexistent) +++ csa/trunk/rtl/block_sbox.v (revision 24) @@ -0,0 +1,267 @@ + +module block_sbox(in, out); +input [7:0] in; +output [7:0] out; +reg [7:0] out; + +always @(in) + case (in) + 8'h00: out=8'h3A; + 8'h01: out=8'hEA; + 8'h02: out=8'h68; + 8'h03: out=8'hFE; + 8'h04: out=8'h33; + 8'h05: out=8'hE9; + 8'h06: out=8'h88; + 8'h07: out=8'h1A; + 8'h08: out=8'h83; + 8'h09: out=8'hCF; + 8'h0A: out=8'hE1; + 8'h0B: out=8'h7F; + 8'h0C: out=8'hBA; + 8'h0D: out=8'hE2; + 8'h0E: out=8'h38; + 8'h0F: out=8'h12; + 8'h10: out=8'hE8; + 8'h11: out=8'h27; + 8'h12: out=8'h61; + 8'h13: out=8'h95; + 8'h14: out=8'h0C; + 8'h15: out=8'h36; + 8'h16: out=8'hE5; + 8'h17: out=8'h70; + 8'h18: out=8'hA2; + 8'h19: out=8'h06; + 8'h1A: out=8'h82; + 8'h1B: out=8'h7C; + 8'h1C: out=8'h17; + 8'h1D: out=8'hA3; + 8'h1E: out=8'h26; + 8'h1F: out=8'h49; + 8'h20: out=8'hBE; + 8'h21: out=8'h7A; + 8'h22: out=8'h6D; + 8'h23: out=8'h47; + 8'h24: out=8'hC1; + 8'h25: out=8'h51; + 8'h26: out=8'h8F; + 8'h27: out=8'hF3; + 8'h28: out=8'hCC; + 8'h29: out=8'h5B; + 8'h2A: out=8'h67; + 8'h2B: out=8'hBD; + 8'h2C: out=8'hCD; + 8'h2D: out=8'h18; + 8'h2E: out=8'h08; + 8'h2F: out=8'hC9; + 8'h30: out=8'hFF; + 8'h31: out=8'h69; + 8'h32: out=8'hEF; + 8'h33: out=8'h03; + 8'h34: out=8'h4E; + 8'h35: out=8'h48; + 8'h36: out=8'h4A; + 8'h37: out=8'h84; + 8'h38: out=8'h3F; + 8'h39: out=8'hB4; + 8'h3A: out=8'h10; + 8'h3B: out=8'h04; + 8'h3C: out=8'hDC; + 8'h3D: out=8'hF5; + 8'h3E: out=8'h5C; + 8'h3F: out=8'hC6; + 8'h40: out=8'h16; + 8'h41: out=8'hAB; + 8'h42: out=8'hAC; + 8'h43: out=8'h4C; + 8'h44: out=8'hF1; + 8'h45: out=8'h6A; + 8'h46: out=8'h2F; + 8'h47: out=8'h3C; + 8'h48: out=8'h3B; + 8'h49: out=8'hD4; + 8'h4A: out=8'hD5; + 8'h4B: out=8'h94; + 8'h4C: out=8'hD0; + 8'h4D: out=8'hC4; + 8'h4E: out=8'h63; + 8'h4F: out=8'h62; + 8'h50: out=8'h71; + 8'h51: out=8'hA1; + 8'h52: out=8'hF9; + 8'h53: out=8'h4F; + 8'h54: out=8'h2E; + 8'h55: out=8'hAA; + 8'h56: out=8'hC5; + 8'h57: out=8'h56; + 8'h58: out=8'hE3; + 8'h59: out=8'h39; + 8'h5A: out=8'h93; + 8'h5B: out=8'hCE; + 8'h5C: out=8'h65; + 8'h5D: out=8'h64; + 8'h5E: out=8'hE4; + 8'h5F: out=8'h58; + 8'h60: out=8'h6C; + 8'h61: out=8'h19; + 8'h62: out=8'h42; + 8'h63: out=8'h79; + 8'h64: out=8'hDD; + 8'h65: out=8'hEE; + 8'h66: out=8'h96; + 8'h67: out=8'hF6; + 8'h68: out=8'h8A; + 8'h69: out=8'hEC; + 8'h6A: out=8'h1E; + 8'h6B: out=8'h85; + 8'h6C: out=8'h53; + 8'h6D: out=8'h45; + 8'h6E: out=8'hDE; + 8'h6F: out=8'hBB; + 8'h70: out=8'h7E; + 8'h71: out=8'h0A; + 8'h72: out=8'h9A; + 8'h73: out=8'h13; + 8'h74: out=8'h2A; + 8'h75: out=8'h9D; + 8'h76: out=8'hC2; + 8'h77: out=8'h5E; + 8'h78: out=8'h5A; + 8'h79: out=8'h1F; + 8'h7A: out=8'h32; + 8'h7B: out=8'h35; + 8'h7C: out=8'h9C; + 8'h7D: out=8'hA8; + 8'h7E: out=8'h73; + 8'h7F: out=8'h30; + 8'h80: out=8'h29; + 8'h81: out=8'h3D; + 8'h82: out=8'hE7; + 8'h83: out=8'h92; + 8'h84: out=8'h87; + 8'h85: out=8'h1B; + 8'h86: out=8'h2B; + 8'h87: out=8'h4B; + 8'h88: out=8'hA5; + 8'h89: out=8'h57; + 8'h8A: out=8'h97; + 8'h8B: out=8'h40; + 8'h8C: out=8'h15; + 8'h8D: out=8'hE6; + 8'h8E: out=8'hBC; + 8'h8F: out=8'h0E; + 8'h90: out=8'hEB; + 8'h91: out=8'hC3; + 8'h92: out=8'h34; + 8'h93: out=8'h2D; + 8'h94: out=8'hB8; + 8'h95: out=8'h44; + 8'h96: out=8'h25; + 8'h97: out=8'hA4; + 8'h98: out=8'h1C; + 8'h99: out=8'hC7; + 8'h9A: out=8'h23; + 8'h9B: out=8'hED; + 8'h9C: out=8'h90; + 8'h9D: out=8'h6E; + 8'h9E: out=8'h50; + 8'h9F: out=8'h00; + 8'hA0: out=8'h99; + 8'hA1: out=8'h9E; + 8'hA2: out=8'h4D; + 8'hA3: out=8'hD9; + 8'hA4: out=8'hDA; + 8'hA5: out=8'h8D; + 8'hA6: out=8'h6F; + 8'hA7: out=8'h5F; + 8'hA8: out=8'h3E; + 8'hA9: out=8'hD7; + 8'hAA: out=8'h21; + 8'hAB: out=8'h74; + 8'hAC: out=8'h86; + 8'hAD: out=8'hDF; + 8'hAE: out=8'h6B; + 8'hAF: out=8'h05; + 8'hB0: out=8'h8E; + 8'hB1: out=8'h5D; + 8'hB2: out=8'h37; + 8'hB3: out=8'h11; + 8'hB4: out=8'hD2; + 8'hB5: out=8'h28; + 8'hB6: out=8'h75; + 8'hB7: out=8'hD6; + 8'hB8: out=8'hA7; + 8'hB9: out=8'h77; + 8'hBA: out=8'h24; + 8'hBB: out=8'hBF; + 8'hBC: out=8'hF0; + 8'hBD: out=8'hB0; + 8'hBE: out=8'h02; + 8'hBF: out=8'hB7; + 8'hC0: out=8'hF8; + 8'hC1: out=8'hFC; + 8'hC2: out=8'h81; + 8'hC3: out=8'h09; + 8'hC4: out=8'hB1; + 8'hC5: out=8'h01; + 8'hC6: out=8'h76; + 8'hC7: out=8'h91; + 8'hC8: out=8'h7D; + 8'hC9: out=8'h0F; + 8'hCA: out=8'hC8; + 8'hCB: out=8'hA0; + 8'hCC: out=8'hF2; + 8'hCD: out=8'hCB; + 8'hCE: out=8'h78; + 8'hCF: out=8'h60; + 8'hD0: out=8'hD1; + 8'hD1: out=8'hF7; + 8'hD2: out=8'hE0; + 8'hD3: out=8'hB5; + 8'hD4: out=8'h98; + 8'hD5: out=8'h22; + 8'hD6: out=8'hB3; + 8'hD7: out=8'h20; + 8'hD8: out=8'h1D; + 8'hD9: out=8'hA6; + 8'hDA: out=8'hDB; + 8'hDB: out=8'h7B; + 8'hDC: out=8'h59; + 8'hDD: out=8'h9F; + 8'hDE: out=8'hAE; + 8'hDF: out=8'h31; + 8'hE0: out=8'hFB; + 8'hE1: out=8'hD3; + 8'hE2: out=8'hB6; + 8'hE3: out=8'hCA; + 8'hE4: out=8'h43; + 8'hE5: out=8'h72; + 8'hE6: out=8'h07; + 8'hE7: out=8'hF4; + 8'hE8: out=8'hD8; + 8'hE9: out=8'h41; + 8'hEA: out=8'h14; + 8'hEB: out=8'h55; + 8'hEC: out=8'h0D; + 8'hED: out=8'h54; + 8'hEE: out=8'h8B; + 8'hEF: out=8'hB9; + 8'hF0: out=8'hAD; + 8'hF1: out=8'h46; + 8'hF2: out=8'h0B; + 8'hF3: out=8'hAF; + 8'hF4: out=8'h80; + 8'hF5: out=8'h52; + 8'hF6: out=8'h2C; + 8'hF7: out=8'hFA; + 8'hF8: out=8'h8C; + 8'hF9: out=8'h89; + 8'hFA: out=8'h66; + 8'hFB: out=8'hFD; + 8'hFC: out=8'hB2; + 8'hFD: out=8'hA9; + 8'hFE: out=8'h9B; + 8'hFF: out=8'hC0; + + endcase +endmodule Index: csa/trunk/test_dat/key_schedule.in =================================================================== --- csa/trunk/test_dat/key_schedule.in (nonexistent) +++ csa/trunk/test_dat/key_schedule.in (revision 24) @@ -0,0 +1 @@ +1001111101011110010101110101000001001001010000100011101000110011 Index: csa/trunk/doc/readme =================================================================== --- csa/trunk/doc/readme (nonexistent) +++ csa/trunk/doc/readme (revision 24) @@ -0,0 +1,66 @@ +///////////////////////////////////////////////////////////////////// +//// //// +//// cas core //// +//// //// +//// Author: Simon Panti //// +//// mengxipeng@gmail.com //// +//// //// +///////////////////////////////////////////////////////////////////// +//// //// +//// Copyright (C) 2007 Simon Panti //// +//// mengxipeng@gmail.com //// +//// //// +//// This source file may be used and distributed without //// +//// restriction provided that this copyright statement is not //// +//// removed from the file and that any derivative work contains //// +//// the original copyright notice and the associated disclaimer.//// +//// //// +//// THIS SOFTWARE IS PROVIDED ``AS IS'' AND WITHOUT ANY //// +//// EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED //// +//// TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS //// +//// FOR A PARTICULAR PURPOSE. IN NO EVENT SHALL THE AUTHOR //// +//// OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, //// +//// INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES //// +//// (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE //// +//// GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR //// +//// BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF //// +//// LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT //// +//// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT //// +//// OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE //// +//// POSSIBILITY OF SUCH DAMAGE. //// +//// //// +///////////////////////////////////////////////////////////////////// + + + +cas core +=============== +attached is a cas core implementation in verilog. it implement +a cas descrambler + +reference: + csa.c and csa.h in vlc opensource project. + + + + +Status +====== +7-sep-2007 added key csa_ComputeKey + + +Directory Structure +=================== +[core_root] + | + +-doc Documentation + | + +-bench--+ Test Bench + | + +-rtl----+ Core RTL Sources + + +about the author +================ +if you have some issues and advance, please contact me: + mengxipeng@gmail.com \ No newline at end of file Index: csa/trunk =================================================================== --- csa/trunk (nonexistent) +++ csa/trunk (revision 24)

csa/trunk Property changes : Added: svn:mergeinfo ## -0,0 +0,0 ## Index: csa/web_uploads =================================================================== --- csa/web_uploads (nonexistent) +++ csa/web_uploads (revision 24)

csa/web_uploads Property changes : Added: svn:mergeinfo ## -0,0 +0,0 ## Index: csa/branches/avendor/bench/key_computer_tb.v =================================================================== --- csa/branches/avendor/bench/key_computer_tb.v (nonexistent) +++ csa/branches/avendor/bench/key_computer_tb.v (revision 24) @@ -0,0 +1,248 @@ + +`timescale 1ns/100ps + +// this is a testbench for key_computer module +// author: Simon panti +// mengxipeng@gmail.com +// refer: +// cas.cpp in vlc opensource project + +module key_computer_tb; + + // test 100 times + reg [63:0 ] cw [0:99]; // input cws + reg [447:0] key_except [0:99]; // output keys + + // test variables + reg [63:0 ] cwt; + wire [447:0] key; + + + // loop var + integer i; + + initial + begin + // test data, + cw [ 0] = 64'h1b_81_ec_85_1f_54_1a_45; + key_except[ 0] = 448'h1d_87_ea_83_19_52_1c_43_f5_ef_9e_16_47_3f_02_24_7f_05_08_8e_e1_8e_f6_5c_25_65_d5_52_37_04_08_71_6b_0b_0c_37_a8_22_df_8c_ca_d7_56_c9_59_63_39_21_9e_62_22_28_a3_b4_c5_3c; + cw [ 1] = 64'h40_0c_e3_5a_f3_58_08_0f; + key_except[ 1] = 448'h46_0a_e5_5c_f5_5e_0e_09_0f_85_cd_67_4b_b9_39_50_90_dc_0c_bf_42_2f_05_76_52_33_23_1e_6e_05_b1_d9_e4_49_e3_13_3a_46_18_11_e3_49_1d_05_0a_b9_7c_0a_87_44_c7_8a_c9_2b_21_48; + cw [ 2] = 64'ha9_fc_0e_65_ac_24_42_07; + key_except[ 2] = 448'haf_fa_08_63_aa_22_44_01_fd_9a_22_6c_0c_0f_2d_29_da_94_f2_24_25_a0_e6_61_3d_9f_a9_1f_90_0a_88_22_3b_02_af_46_52_2c_b5_e7_24_cb_0e_b9_31_cb_87_70_38_32_06_94_30_9f_fc_4a; + cw [ 3] = 64'h4a_f8_fb_80_36_70_1f_ac; + key_except[ 3] = 448'h4c_fe_fd_86_30_76_19_aa_3e_e4_6d_8e_c7_f7_a8_2c_51_27_50_ce_72_3b_87_3d_20_28_51_2c_f5_0f_cd_d1_6a_1d_17_d3_dc_66_6f_50_c6_2d_37_f8_c9_b1_75_37_ce_f7_02_ee_89_05_b1_17; + cw [ 4] = 64'h2b_6a_e8_6c_d2_fa_e8_9e; + key_except[ 4] = 448'h2d_6c_ee_6a_d4_fc_ee_98_01_92_48_6f_7f_72_60_7e_91_18_76_ba_6a_9a_c8_92_8b_bd_22_84_fc_66_39_54_f6_eb_a3_5b_4f_ba_6e_b5_d7_84_9d_ae_08_ec_b3_5a_f6_78_db_1c_9d_1f_03_c6; + cw [ 5] = 64'he6_01_4b_4d_96_01_5d_24; + key_except[ 5] = 448'he0_07_4d_4b_90_07_5b_22_4e_c1_10_e0_46_a3_80_85_57_3e_87_ac_f4_c5_05_38_08_b0_6b_43_03_96_ec_91_37_0d_32_a0_18_61_43_a1_80_37_15_0d_ed_59_e7_84_a4_87_23_c3_91_5c_48_54; + cw [ 6] = 64'h2b_2f_4c_29_ea_ca_2e_a8; + key_except[ 6] = 448'h2d_29_4a_2f_ec_cc_28_ae_e1_16_53_c5_67_72_ec_71_0b_a8_32_3a_f7_34_cc_96_1b_14_80_4d_df_67_3e_34_8f_ca_3b_eb_0e_be_c4_34_f1_bf_01_ae_98_86_a1_6a_d6_39_e5_50_3d_0d_e6_84; + cw [ 7] = 64'h3c_ac_45_6c_0c_1f_82_35; + key_except[ 7] = 448'h3a_aa_43_6a_0a_19_84_33_b5_9c_02_22_37_89_a7_e3_78_9c_33_14_59_c5_aa_44_bd_03_a5_96_93_b2_35_b2_6e_62_0d_cc_03_4b_95_a1_2a_60_86_a5_1d_df_81_e9_88_3b_5f_13_30_d1_85_68; + cw [ 8] = 64'h71_f1_49_67_8d_cb_74_00; + key_except[ 8] = 448'h77_f7_4f_61_8b_cd_72_06_d3_52_b0_e4_23_96_07_cd_66_34_7e_33_e5_c5_4f_89_68_96_e6_43_85_78_1a_92_11_40_3c_69_60_fa_03_e5_48_93_03_3b_cd_5e_ca_58_bb_1e_60_53_34_3c_50_f2; + cw [ 9] = 64'hb5_be_9a_cc_d1_1f_91_dc; + key_except[ 9] = 448'hb3_b8_9c_ca_d7_19_97_da_1c_ee_e8_73_b4_43_63_d3_30_9b_9f_f4_2a_d6_7a_2f_bf_77_7f_a4_eb_b8_f9_07_e6_f7_25_4c_b5_21_08_ff_3b_80_f6_7c_64_ed_8d_8e_58_98_df_a9_9a_fd_1b_71; + cw [ 10] = 64'h06_95_31_34_93_70_5b_c4; + key_except[ 10] = 448'h00_93_37_32_95_76_5d_c2_34_d1_b4_5b_c5_f5_10_00_15_c6_29_ee_80_99_16_19_33_f9_41_60_07_8c_41_c8_7a_1f_66_33_2c_4b_60_ca_e7_15_77_10_43_51_3b_e4_6e_c0_26_16_c3_78_91_15; + cw [ 11] = 64'hf9_3c_3a_9a_5f_96_c9_55; + key_except[ 11] = 448'hff_3a_3c_9c_59_90_cf_53_8e_aa_a1_16_f0_2a_33_32_70_cf_9e_cd_29_0c_f9_f3_dc_e7_9f_b6_9b_6d_e9_49_f4_3d_49_5e_bb_30_15_6e_aa_c0_f4_ff_22_87_fe_05_35_fe_9f_a0_f7_a5_19_29; + cw [ 12] = 64'h34_3f_96_dd_16_6f_c5_51; + key_except[ 12] = 448'h32_39_90_db_10_69_c3_57_4c_28_3a_b8_f5_19_73_c3_6a_fb_17_d6_8c_c2_38_71_9d_ea_37_f7_a7_ba_f2_2d_17_f7_51_6d_9b_03_b9_eb_fc_52_f0_75_97_ed_87_8d_22_9a_7d_ed_d3_d1_56_69; + cw [ 13] = 64'hf3_6c_57_41_6e_5a_ad_1e; + key_except[ 13] = 448'hf5_6a_51_47_68_5c_ab_18_ca_86_43_a6_fe_b5_2e_5b_fb_b6_d6_5a_4b_25_49_36_98_04_ae_ae_cc_27_d0_b1_e3_7c_99_4b_5b_c4_c1_35_ea_8e_ad_21_b8_9e_e5_1f_96_9e_de_c2_39_03_6d_e7; + cw [ 14] = 64'h84_55_47_ee_6f_bd_d2_44; + key_except[ 14] = 448'h82_53_41_e8_69_bb_d4_42_ad_f9_b6_3a_52_80_0d_d9_5c_9d_e9_15_c1_e1_30_bb_55_cb_f9_ca_09_d8_b1_b0_fc_62_0a_24_f8_5d_a1_c9_a6_18_44_57_7c_5b_0e_f9_a1_02_f7_b7_27_f0_bd_52; + cw [ 15] = 64'hca_d1_62_70_f7_80_fc_f3; + key_except[ 15] = 448'hcc_d7_64_76_f1_86_fa_f5_1b_51_b5_f4_5e_6c_98_3e_c5_74_ec_a8_dc_3c_93_fb_a0_f0_6a_d9_18_4d_87_58_92_29_f6_b2_7d_9c_57_49_80_7c_db_92_ea_08_7f_50_ec_67_b8_d0_c7_2a_38_de; + cw [ 16] = 64'hbe_7b_57_36_36_8f_e3_7b; + key_except[ 16] = 448'hb8_7d_51_30_30_89_e5_7d_28_18_72_10_fa_8c_fa_ef_e9_42_f3_d1_de_e5_b8_f1_cd_e1_0c_ff_d0_fa_d7_bc_18_f7_c1_ec_5b_dd_d7_f8_98_7c_f8_b3_3f_d4_86_ff_a1_bb_78_93_df_d3_be_af; + cw [ 17] = 64'he9_32_0b_13_33_5c_b7_d1; + key_except[ 17] = 448'hef_34_0d_15_35_5a_b1_d7_6a_4e_a1_97_50_df_59_67_06_62_9a_93_28_35_f1_7d_ce_66_48_98_97_09_da_8d_49_e5_52_47_3d_e4_16_6e_d3_ca_d0_b8_e3_10_cc_2d_53_b4_58_c2_d3_a4_fb_98; + cw [ 18] = 64'heb_98_16_c0_45_5a_9a_11; + key_except[ 18] = 448'hed_9e_10_c6_43_5c_9c_17_3f_67_a3_26_b4_3d_24_77_49_15_8a_5e_08_04_cb_6f_a8_05_79_b6_1f_2d_93_23_ca_78_07_0b_b1_00_d7_67_42_c4_a3_d1_70_8d_ed_29_1e_2e_d8_a0_10_21_9d_5d; + cw [ 19] = 64'hf7_93_44_57_9b_83_21_f7; + key_except[ 19] = 448'hf1_95_42_51_9d_85_27_f1_d2_87_b2_71_6a_4c_d2_87_bf_52_8f_a1_dd_d4_5f_d5_ea_75_ae_51_02_f8_44_3d_21_85_ec_a8_2f_91_d2_ed_99_f7_df_12_3f_4e_c8_84_d9_8d_2a_01_f7_7a_5e_ec; + cw [ 20] = 64'h55_ce_15_d9_b5_d3_d7_64; + key_except[ 20] = 448'h53_c8_13_df_b3_d5_d1_62_76_e3_87_f2_b5_90_fb_89_7a_fb_49_e6_10_65_5b_88_30_f6_75_ae_05_f1_64_af_7f_b5_75_89_e0_57_81_0f_7a_aa_77_47_d7_9d_4b_b4_3a_8f_17_63_c6_69_e7_73; + cw [ 21] = 64'hdf_39_3d_aa_e9_ca_ba_df; + key_except[ 21] = 448'hd9_3f_3b_ac_ef_cc_bc_d9_a3_f6_f7_51_b8_fa_2e_76_b9_0d_b9_7b_af_3d_d9_cf_c2_55_dc_fd_de_ed_39_e2_ac_78_a9_7b_a5_fd_d6_5e_49_dc_ed_fe_70_96_78_ea_57_7c_fb_32_2e_6f_bc_bd; + cw [ 22] = 64'h84_85_25_10_df_ee_bb_11; + key_except[ 22] = 448'h82_83_23_16_d9_e8_bd_17_b0_4d_97_48_74_bc_11_52_4c_c6_89_ba_8d_09_2a_de_b5_3b_c8_d3_0f_e5_53_e9_8a_6f_6e_3f_29_d1_b1_02_e4_50_92_03_72_16_39_ac_0e_ca_fc_06_e5_e8_8c_98; + cw [ 23] = 64'hc8_a9_68_b8_15_47_42_48; + key_except[ 23] = 448'hce_af_6e_be_13_41_44_4e_37_38_d5_14_26_13_31_a4_40_4d_b8_86_e6_4c_bf_00_24_e3_19_47_d7_31_2b_5a_1e_01_47_7d_a2_28_07_18_40_11_52_ed_2f_85_5b_63_aa_7e_21_31_ca_a5_88_00; + cw [ 24] = 64'h42_60_56_30_5b_e2_a8_f6; + key_except[ 24] = 448'h44_66_50_36_5d_e4_ae_f0_8b_94_87_1d_ff_74_90_1f_9d_44_7c_ca_5d_10_19_b6_82_69_82_a1_8c_65_85_38_a2_39_ca_cb_7f_9a_e2_08_c5_24_fd_22_1a_06_6d_51_c6_1d_9a_94_e7_22_04_87; + cw [ 25] = 64'h1c_a8_75_6e_58_4f_bb_2f; + key_except[ 25] = 448'h1a_ae_73_68_5e_49_bd_29_b0_dc_46_21_bb_b9_a3_f4_b8_1e_31_db_57_cd_aa_4e_67_23_e4_b7_de_b6_75_f2_ac_7f_8d_dd_00_cb_96_91_49_60_3e_a5_5c_de_30_ef_8f_f9_d3_13_a8_d3_84_f9; + cw [ 26] = 64'h97_45_fc_47_03_22_3e_2e; + key_except[ 26] = 448'h91_43_fa_41_05_24_38_28_61_c7_de_a9_ea_27_86_08_bf_b4_c9_49_f6_8a_4c_1c_53_0c_6c_63_60_a4_0c_71_29_1a_90_ba_68_a1_e8_95_ad_b7_2d_09_f9_6c_38_b3_95_49_26_4c_09_76_cc_f7; + cw [ 27] = 64'h85_3c_56_f9_2b_75_66_d0; + key_except[ 27] = 448'h83_3a_50_ff_2d_73_60_d6_e9_3a_a7_bb_c6_51_3d_83_0a_fd_b9_42_49_70_74_31_97_ce_b8_2c_87_99_a2_38_5f_12_5b_45_bf_8d_a0_4d_e7_8b_e0_74_bf_8a_0f_e1_f2_10_0d_f5_63_e1_fd_c1; + cw [ 28] = 64'hcd_58_a5_a2_f0_65_5e_17; + key_except[ 28] = 448'hcb_5e_a3_a4_f6_63_58_11_27_fb_2f_c9_08_bd_29_be_98_25_e1_af_0c_6b_e5_4b_c6_be_59_1f_3c_9f_01_e2_b8_09_b3_15_c1_4d_be_46_45_c9_9c_d1_f4_b1_72_f0_37_64_8a_7f_80_cb_bc_1a; + cw [ 29] = 64'hea_a8_3c_c7_47_91_c4_a9; + key_except[ 29] = 448'hec_ae_3a_c1_41_97_c2_af_57_20_c2_a6_d0_4e_a4_b4_4b_35_9e_45_32_dc_83_d2_68_80_3b_b4_db_50_0e_61_d1_30_17_d0_ae_30_d7_b3_82_66_23_ea_b4_c9_da_03_69_77_90_61_1d_35_4d_4d; + cw [ 30] = 64'h6c_ff_23_ce_7a_9e_2a_4f; + key_except[ 30] = 448'h6a_f9_25_c8_7c_98_2c_49_bb_ac_70_33_69_a8_69_78_90_99_53_99_83_ad_bf_f7_7e_63_b0_5e_d8_ee_b1_c5_ec_c9_8f_7e_da_d7_14_fb_b3_59_5e_f7_00_de_f4_bb_0d_7c_e7_a2_bf_d3_b3_ca; + cw [ 31] = 64'h75_73_97_84_a6_b5_96_76; + key_except[ 31] = 448'h73_75_91_82_a0_b3_90_70_2f_ee_3a_da_dd_84_cf_8f_fc_21_53_64_98_e3_71_bd_8c_5e_55_ea_a0_da_85_a5_6a_b0_b0_e4_d9_57_ab_ee_9e_b8_ec_73_d5_71_c5_b0_10_17_3a_ef_17_da_b7_33; + cw [ 32] = 64'h3d_df_87_97_3b_03_02_b1; + key_except[ 32] = 448'h3b_d9_81_91_3d_05_04_b7_fd_27_ba_01_61_cd_fb_ab_2a_c1_4b_85_9d_f7_ce_75_fb_27_95_5d_31_b8_86_ad_09_83_4d_a8_ff_47_9c_e6_b9_fb_93_d0_17_f7_8c_b1_59_29_2c_ab_f1_71_f6_2a; + cw [ 33] = 64'h8f_61_18_1d_7f_38_dc_35; + key_except[ 33] = 448'h89_67_1e_1b_79_3e_da_33_c5_c2_94_8a_d4_2b_98_7f_57_6c_dd_dc_b9_a0_c0_5a_81_ac_cb_fa_99_84_3c_09_f7_7b_5a_e2_69_25_77_86_86_fe_b5_ad_e2_43_2b_99_34_33_fb_44_e1_74_69_1f; + cw [ 34] = 64'h4a_dc_23_0b_0c_09_87_5c; + key_except[ 34] = 448'h4c_da_25_0d_0a_0f_81_5a_fe_85_65_94_11_81_24_ea_53_ae_40_15_0f_4d_93_25_f0_40_81_87_51_1b_f0_c3_2d_64_1f_10_53_42_45_5a_20_06_c7_95_85_93_54_3f_09_e6_5f_c3_2a_01_d0_06; + cw [ 35] = 64'he1_77_b2_bf_4d_ae_d9_22; + key_except[ 35] = 448'he7_71_b4_b9_4b_a8_df_24_ce_7a_b8_0c_b8_20_d5_58_c6_cb_fe_5d_95_8a_69_ab_5c_8f_db_e3_a8_6c_f6_4e_95_fc_ca_fe_f0_18_29_e6_34_b2_28_77_62_67_fe_5d_35_df_f5_bc_74_b2_5a_13; + cw [ 36] = 64'hdc_1c_86_77_05_65_9b_ab; + key_except[ 36] = 448'hda_1a_80_71_03_63_9d_ad_6e_5d_ee_28_18_7d_b7_a1_ea_d6_a9_0f_16_d2_a1_6d_54_0b_6d_95_76_9c_c6_2a_09_2c_c1_85_34_09_bd_d3_6c_62_08_90_77_e9_6c_e7_47_a7_14_9d_48_f3_dc_78; + cw [ 37] = 64'h54_fa_94_d8_c9_ed_0c_bb; + key_except[ 37] = 448'h52_fc_92_de_cf_eb_0a_bd_97_2c_ef_e9_8d_78_f7_df_a8_79_5d_7e_1f_52_27_c7_a6_1a_b7_35_ec_dd_37_2f_86_d8_fd_c5_e7_13_ba_53_5d_61_aa_76_96_ab_69_9a_4e_15_c9_6d_6c_eb_16_6b; + cw [ 38] = 64'h7b_04_82_68_80_0c_5e_3c; + key_except[ 38] = 448'h7d_02_84_6e_86_0a_58_3a_2f_db_49_e5_05_21_86_63_35_bc_22_3c_1e_06_e5_28_9e_94_65_03_73_07_b5_02_3e_48_30_86_11_0a_4c_37_29_a5_84_85_c1_29_e7_6a_34_25_4f_d8_18_88_80_74; + cw [ 39] = 64'h11_6f_2f_14_ea_09_37_bc; + key_except[ 39] = 448'h17_69_29_12_ec_0f_31_ba_a8_c6_56_c5_45_c7_ff_da_38_e2_50_30_bf_fd_44_3e_93_16_c4_4d_c9_12_dd_ed_aa_c6_79_f0_5d_e6_80_96_b9_b9_85_28_d6_d2_15_3e_50_d1_ee_c3_69_1d_a6_b2; + cw [ 40] = 64'hf0_38_29_ab_16_32_31_ed; + key_except[ 40] = 448'hf6_3e_2f_ad_10_34_37_eb_42_f4_61_1e_60_cb_a3_04_72_0f_b6_81_32_19_1d_5d_48_6b_5e_14_c3_2b_6c_c0_65_05_01_da_8c_e8_33_7a_8e_63_55_7c_61_94_d0_47_41_df_03_36_9b_05_59_b8; + cw [ 41] = 64'h81_9c_35_60_eb_58_5b_23; + key_except[ 41] = 448'h87_9a_33_66_ed_5e_5d_25_b4_53_a7_67_cc_bd_ad_50_88_96_a8_7e_11_2d_46_5b_33_97_e9_3e_0e_0d_57_e0_da_5e_af_93_28_4c_90_47_e3_e9_2b_11_70_9b_3b_6c_3e_c1_c4_12_21_2b_bd_59; + cw [ 42] = 64'h45_9e_cb_4c_a0_4e_b6_d9; + key_except[ 42] = 448'h43_98_cd_4a_a6_48_b0_df_3b_4f_6c_f1_37_db_6d_43_00_b8_01_32_6e_b7_7b_6d_b6_56_60_9d_67_aa_bb_97_0e_e0_37_0f_15_e7_18_dd_71_c8_c2_1c_c9_fc_45_aa_da_0c_5d_ca_0a_dd_b2_d8; + cw [ 43] = 64'h4d_84_97_ea_43_6d_b8_2d; + key_except[ 43] = 448'h4b_82_91_ec_45_6b_be_2b_1b_ff_cf_29_d1_b9_85_f1_1c_9d_2d_5b_16_43_e3_7e_76_0f_72_b3_7f_95_b5_a0_a4_78_06_85_b8_cb_bc_17_e5_e0_26_c5_54_38_6c_cb_1f_25_d7_bf_09_e0_04_d9; + cw [ 44] = 64'hc2_5a_f8_99_36_13_cd_5f; + key_except[ 44] = 448'hc4_5c_fe_9f_30_15_cb_59_46_a1_6d_96_fe_2b_78_8e_d3_6b_c4_cc_6a_6e_19_51_80_e0_1b_be_60_3f_68_5d_77_bd_d3_18_cb_24_5b_58_92_4e_fd_5d_af_a5_73_17_a4_ce_1b_69_cb_07_7b_0f; + cw [ 45] = 64'h5e_6e_85_1d_ad_20_d1_55; + key_except[ 45] = 448'h58_68_83_1b_ab_26_d7_53_c6_c0_8e_58_15_89_7e_2b_7b_ca_5d_24_0d_a3_91_48_90_d9_c7_9f_b1_80_60_af_37_a4_69_42_61_47_fd_8a_3c_4e_c5_a5_53_f3_4b_94_20_b6_1f_0e_62_79_66_3e; + cw [ 46] = 64'hf1_d2_83_1f_32_78_97_1a; + key_except[ 46] = 448'hf7_d4_85_19_34_7e_91_1c_7e_47_68_8f_58_91_5b_4f_a6_6a_c2_97_0a_a3_43_3d_ea_2e_4d_8a_64_0a_f2_8d_4d_e5_d4_03_59_44_2a_f6_df_8a_9b_15_e3_71_c4_3f_1b_84_59_ce_d9_12_fb_32; + cw [ 47] = 64'hdd_de_70_a8_22_83_65_5b; + key_except[ 47] = 448'hdb_d8_76_ae_24_85_63_5d_12_33_65_91_ee_08_6f_aa_a0_ab_e5_40_4e_6c_df_d1_b2_c6_1e_3f_50_fb_63_54_16_94_95_18_cb_9d_14_5c_b9_c9_eb_d7_ad_84_53_d7_b8_ec_0d_71_0f_43_3a_ab; + cw [ 48] = 64'h9a_ab_7c_aa_2d_b0_75_e9; + key_except[ 48] = 448'h9c_ad_7a_ac_2b_b6_73_ef_90_70_d7_9e_82_4a_ee_24_69_2b_bc_41_f3_38_96_c8_61_c8_de_7c_d3_41_6f_76_54_96_1d_f2_a4_bc_f7_18_1e_7d_63_ee_f9_82_1a_47_e9_f3_21_74_2e_25_2f_bd; + cw [ 49] = 64'h33_99_0b_78_d9_ed_76_3a; + key_except[ 49] = 448'h35_9f_0d_7e_df_eb_70_3c_b9_5b_f1_ed_0d_92_b2_d7_a1_7c_2a_b2_bf_41_66_ab_af_bc_e4_47_4e_59_bf_8a_9e_43_fd_a5_31_fa_62_77_4d_b5_9a_1f_c6_9a_8f_6a_3a_01_e9_d7_fc_af_90_f4; + cw [ 50] = 64'hc6_ca_34_48_ff_31_09_e7; + key_except[ 50] = 448'hc0_cc_32_4e_f9_37_0f_e1_96_85_87_7a_cc_69_e8_9c_d9_1a_cd_ec_11_78_17_56_20_79_ab_3c_08_95_65_65_e6_9d_af_90_6e_05_f3_0b_96_6d_7f_04_34_8b_79_94_4c_c7_83_05_a3_6b_2f_4f; + cw [ 51] = 64'h08_a4_45_b8_4d_f3_45_2f; + key_except[ 51] = 448'h0e_a2_43_be_4b_f5_43_29_94_b0_c7_8e_2f_98_95_b1_dc_ef_3c_06_53_41_8e_c2_31_8a_93_12_de_71_65_ba_f6_06_de_c9_a2_5a_b5_10_66_61_0f_e7_9e_17_0b_47_aa_bb_87_77_6c_22_05_08; + cw [ 52] = 64'hc0_53_3c_46_c2_b0_34_73; + key_except[ 52] = 448'hc6_55_3a_40_c4_b6_32_75_03_45_36_ff_c8_0e_c5_1e_8c_30_c4_61_b8_88_15_df_c2_5a_6a_72_08_4a_0f_65_c0_90_b2_b2_49_b0_b2_cb_97_71_e9_1b_f0_48_50_10_01_45_a8_44_07_1e_1f_db; + cw [ 53] = 64'h47_44_4f_d7_35_69_53_b8; + key_except[ 53] = 448'h41_42_49_d1_33_6f_55_be_6e_63_c6_28_03_d7_98_cb_4f_d7_49_97_7e_f1_45_28_d0_ad_71_09_45_90_de_bb_19_45_42_81_f5_67_e1_95_64_af_91_48_5f_59_4e_bf_f3_87_4c_a7_c8_74_e4_56; + cw [ 54] = 64'h0e_ab_65_31_cf_22_15_28; + key_except[ 54] = 448'h08_ad_63_37_c9_24_13_2e_d4_54_d7_c8_67_85_f4_34_4b_62_3d_24_d7_09_8e_1e_21_18_c3_47_db_a1_46_fc_83_86_7f_fa_28_4b_e7_10_94_37_03_a1_da_97_19_c6_88_fb_a0_56_69_69_46_14; + cw [ 55] = 64'h18_ff_9b_81_8c_64_60_91; + key_except[ 55] = 448'h1e_f9_9d_87_8a_62_66_97_d9_28_3d_4c_85_df_67_2b_62_81_54_62_ad_13_a6_61_b5_9b_96_75_b5_0b_8a_87_13_92_2d_67_d7_e2_3d_42_7c_53_a2_f8_01_b2_07_10_6a_32_2c_ae_20_8d_52_ab; + cw [ 56] = 64'h7b_79_c1_d6_bf_bc_0f_e5; + key_except[ 56] = 448'h7d_7f_c7_d0_b9_ba_09_e3_a6_ae_b8_fe_43_ec_ba_6d_71_77_5a_bd_d1_b3_f5_d5_4c_7c_b5_5c_b1_4c_55_99_68_4d_79_e6_ee_56_7f_ed_8e_fd_54_f2_8b_fb_e8_3c_d5_b7_62_6e_f7_b9_b1_6e; + cw [ 57] = 64'he3_98_da_a3_8b_3a_6f_b8; + key_except[ 57] = 448'he5_9e_dc_a5_8d_3c_69_be_fa_33_e9_cf_e2_67_a4_47_03_27_aa_79_7b_12_4f_31_ea_9c_98_24_63_2d_de_10_59_5c_3f_8a_bf_a8_6a_74_87_a7_a3_58_a9_a6_ee_6e_fd_8d_48_fc_39_2d_d9_85; + cw [ 58] = 64'h0f_a0_9f_41_6a_f2_c2_c5; + key_except[ 58] = 448'h09_a6_99_47_6c_f4_c4_c3_fd_82_0f_3b_f5_de_0c_35_1f_14_11_46_21_33_da_f2_23_cd_a1_b8_bf_e3_88_a1_fb_32_0e_4b_1e_77_fe_0f_c7_ce_67_aa_10_3f_07_a1_7a_38_92_8e_27_44_e5_4d; + cw [ 59] = 64'h53_16_fc_6b_a9_7f_bf_6a; + key_except[ 59] = 448'h55_10_fa_6d_af_79_b9_6c_e2_5f_ef_ff_bb_33_ce_c0_af_ba_28_7b_73_6a_79_0d_56_5c_e4_aa_66_3d_7e_76_4d_fc_b8_9d_20_ae_e8_5d_7f_ae_68_1d_dd_2e_78_6e_97_cd_55_5d_2a_ae_f7_f5; + cw [ 60] = 64'h14_45_91_c0_ea_7b_10_27; + key_except[ 60] = 448'h12_43_97_c6_ec_7d_16_21_85_e5_1d_6b_ed_9d_8f_d9_b4_95_45_76_91_63_0c_5e_13_1b_f7_7a_2c_b3_15_81_e2_52_a8_a9_c8_47_38_03_ef_79_2d_41_44_3f_01_98_02_09_e6_2f_21_4a_21_7b; + cw [ 61] = 64'h4f_bd_33_45_a1_08_d2_23; + key_except[ 61] = 448'h49_bb_35_43_a7_0e_d4_25_7f_42_b4_61_9d_8d_ac_60_83_94_19_74_94_ad_c3_69_32_95_61_ff_92_88_96_c3_1b_70_a7_f2_30_47_54_c7_21_fe_2b_b1_41_d9_5f_a8_38_75_74_82_00_7b_f0_5d; + cw [ 62] = 64'h13_ce_69_e0_97_4a_19_a7; + key_except[ 62] = 448'h15_c8_6f_e6_91_4c_1f_a1_14_f7_85_64_6f_ff_e2_48_f1_93_6c_be_74_1d_4e_5c_31_35_77_15_04_25_5d_d4_22_cf_a5_9b_ec_6a_51_05_f8_e5_1f_48_49_9d_39_5c_de_cb_46_32_81_2f_02_7e; + cw [ 63] = 64'h02_12_ef_de_6a_eb_69_a0; + key_except[ 63] = 448'h04_14_e9_d8_6c_ed_6f_a6_88_21_2e_2d_63_f2_dc_d4_0d_5b_04_1b_75_fb_0c_b3_43_89_b2_09_2f_7e_ff_fd_94_ce_4a_99_9e_f6_ea_c1_d5_2d_01_5e_1e_7e_36_0d_e7_c9_c1_af_65_14_36_c4; + cw [ 64] = 64'hd3_e0_36_6e_0b_96_3e_21; + key_except[ 64] = 448'hd5_e6_30_68_0d_90_38_27_bb_5e_86_a7_e0_28_86_0c_2d_3c_f8_49_11_8c_6f_fc_66_04_ec_32_81_64_a7_60_4c_18_1c_de_78_98_d2_87_8b_e5_22_27_f1_4e_7c_71_1d_5d_01_d0_25_b0_8d_ff; + cw [ 65] = 64'hd3_da_e2_23_3f_7c_85_df; + key_except[ 65] = 448'hd5_dc_e4_25_39_7a_83_d9_de_9f_ed_9e_5a_5d_6a_4e_f3_22_ec_97_4b_3a_73_75_e4_6c_8f_9c_64_09_d0_54_61_e5_9d_17_7f_0c_7b_5c_de_ce_de_10_a9_a3_5c_5f_db_c6_5a_dc_ab_a3_7b_2e; + cw [ 66] = 64'h60_60_4b_76_20_d2_20_b4; + key_except[ 66] = 448'h66_66_4d_70_26_d4_26_b2_0b_94_00_27_23_d6_9d_0f_14_54_76_03_78_b5_0d_a4_ca_03_22_08_85_62_8d_9a_60_00_42_cb_57_fe_02_a1_43_29_85_2a_0b_5c_c4_51_c3_1d_0a_92_54_14_21_c2; + cw [ 67] = 64'h6c_1a_fd_42_99_50_66_1d; + key_except[ 67] = 448'h6a_1c_fb_44_9f_56_60_1b_a3_81_eb_e3_83_9f_61_26_18_30_0b_e3_6b_0f_85_41_ca_b2_a0_36_77_89_09_f7_78_91_3b_13_23_e3_9e_71_53_41_b5_99_99_ba_da_a2_a3_64_0a_4a_b8_6d_97_c9; + cw [ 68] = 64'h00_72_38_46_ec_b4_a1_bc; + key_except[ 68] = 448'h06_74_3e_40_ea_b2_a7_ba_80_8c_64_6e_91_46_cd_1e_54_12_54_61_3b_b8_20_87_c5_1b_a2_a8_c9_4a_4d_47_e0_b6_2a_d6_47_b6_23_d3_16_28_a4_3a_00_4a_10_16_41_d3_9a_04_2c_9c_33_c3; + cw [ 69] = 64'hb7_17_70_a7_2f_3d_8f_d6; + key_except[ 69] = 448'hb1_11_76_a1_29_3b_89_d0_e4_bf_b0_9a_da_65_4e_c2_f7_a3_ab_5d_c9_f8_70_15_dd_4c_9d_e8_02_9c_50_54_69_fe_98_34_af_0d_61_ec_be_9e_ec_50_ad_43_b8_ed_d5_c2_7e_75_33_f2_fb_25; + cw [ 70] = 64'h3e_7c_cd_6b_cb_31_e1_d5; + key_except[ 70] = 448'h38_7a_cb_6d_cd_37_e7_d3_c0_90_ab_7b_53_cb_26_bb_3b_9e_7f_21_69_53_90_53_db_d9_a6_94_b9_99_68_b0_f5_26_29_40_6f_eb_fc_69_af_46_c5_bc_1c_ba_8a_d4_e1_b0_9f_1f_33_6d_55_ee; + cw [ 71] = 64'hdb_57_ac_ff_fc_58_bf_c7; + key_except[ 71] = 448'hdd_51_aa_f9_fa_5e_b9_c1_e2_f7_3e_f6_18_7b_5a_78_ff_fb_e0_bb_a1_be_d1_4f_50_74_fc_d8_3c_0e_78_6e_ed_ed_f8_33_c4_ac_dd_cf_7a_de_5d_dc_f2_6a_70_7c_57_e6_f7_78_e2_1e_ff_fe; + cw [ 72] = 64'he3_22_1d_b2_54_7e_42_de; + key_except[ 72] = 448'he5_24_1b_b4_52_78_44_d8_27_ba_43_1e_a8_d7_50_57_dd_41_b2_d7_2a_11_7d_02_cc_ed_19_20_ce_23_19_ae_f8_d1_c2_4f_87_68_e3_3e_56_85_fc_68_32_15_c2_6b_73_1e_ca_36_da_86_8f_05; + cw [ 73] = 64'h42_9d_64_38_38_f4_f8_ee; + key_except[ 73] = 448'h44_9b_62_3e_3e_f2_fe_e8_93_d9_77_1f_1f_70_b8_00_99_cc_24_8a_d3_38_33_89_36_e9_c2_cc_46_4f_25_7a_76_29_cf_b7_04_9e_e0_58_67_3c_5e_16_5b_82_73_43_ee_45_37_14_ee_83_35_94; + cw [ 74] = 64'hf7_4b_78_28_61_10_64_f3; + key_except[ 74] = 448'hf1_4d_7e_2e_67_16_62_f5_03_13_91_93_8e_4b_ee_1e_a1_28_ef_40_f8_3c_55_42_8a_c4_0e_7c_08_81_2f_56_d6_90_91_b2_67_ad_52_2c_1b_fd_e9_0c_a8_80_db_d1_f0_45_a9_50_12_67_2b_af; + cw [ 75] = 64'h95_f0_87_7d_5c_a9_7b_88; + key_except[ 75] = 448'h93_f6_81_7b_5a_af_7d_8e_f8_52_6e_28_04_e0_13_dd_6e_5e_f1_98_07_d3_46_ab_21_af_ec_01_e9_de_f2_aa_9f_4f_4c_40_54_d9_ab_d7_0c_83_13_36_76_7a_27_ff_7c_92_c1_9f_ec_50_dc_f2; + cw [ 76] = 64'hc4_19_6f_19_0a_9b_28_70; + key_except[ 76] = 448'hc2_1f_69_1f_0c_9d_2e_76_cb_05_37_13_66_a2_b5_c6_0a_4c_85_18_f9_4d_1d_b5_82_43_8a_46_03_ff_be_f9_47_48_4b_b8_1b_f1_82_48_83_33_c1_1f_3f_96_75_89_84_4d_69_83_67_45_5d_80; + cw [ 77] = 64'hbd_94_46_3d_21_49_c9_11; + key_except[ 77] = 448'hbb_92_40_3b_27_4f_cf_17_5c_13_a2_01_16_39_1f_e3_2e_ce_af_1e_4c_e4_c2_61_bb_87_0f_9b_17_9c_f2_3a_17_6e_44_01_33_0d_94_e4_69_ca_83_95_3f_41_af_cd_be_a0_5d_91_50_70_7c_28; + cw [ 78] = 64'hd2_f4_d3_13_a9_16_af_f4; + key_except[ 78] = 448'hd4_f2_d5_15_af_10_a9_f2_fa_8c_ad_d7_b2_e5_9e_0b_37_e6_d8_69_59_37_3b_25_f6_50_8c_a8_a1_2d_c4_9b_69_3c_7c_ce_77_c4_48_48_2b_2e_e6_30_ab_36_6c_34_cd_9d_1e_ca_62_a8_f9_a7; + cw [ 79] = 64'he3_0e_13_25_80_eb_a2_47; + key_except[ 79] = 448'he5_08_15_23_86_ed_a4_41_6b_97_00_5d_bc_9c_64_c1_93_80_a2_72_04_c1_59_e4_1a_5d_08_b7_06_72_90_86_2b_f0_a3_09_12_d8_70_ae_75_c6_6d_03_25_d4_c5_68_12_0c_56_97_16_1b_ca_8d; + cw [ 80] = 64'hea_7f_b5_e3_d7_b4_5b_5b; + key_except[ 80] = 448'hec_79_b3_e5_d1_b2_5d_5d_66_78_fb_7e_c8_ac_60_3a_cb_93_fa_ed_8a_0b_b5_db_dc_f9_79_76_f8_4d_42_e4_d9_9d_a3_76_e9_58_fd_7b_b6_57_f8_f3_70_b9_fa_76_25_f6_ac_3e_9f_ab_df_5f; + cw [ 81] = 64'h70_24_9f_20_b3_e3_09_26; + key_except[ 81] = 448'h76_22_99_26_b5_e5_0f_20_0e_94_8b_4d_ed_b6_8b_81_bc_86_3e_ee_34_63_0d_b4_1a_3b_07_2b_a6_75_cd_a0_22_1d_a0_c9_3a_7e_a8_22_ed_29_3d_2b_15_35_ed_44_06_9d_06_9f_95_2e_24_21; + cw [ 82] = 64'h16_9f_67_95_6d_ec_cc_c2; + key_except[ 82] = 448'h10_99_61_93_6b_ea_ca_c4_dd_29_b6_98_1f_f4_7e_50_eb_e1_0d_1e_c5_b9_32_a3_35_c8_97_cd_0e_cc_92_ff_93_ea_dd_37_b6_57_e1_c8_7c_1e_4a_52_9a_d3_3f_89_ee_42_f4_e6_66_f3_76_24; + cw [ 83] = 64'h0d_d9_da_5d_32_c7_3d_ec; + key_except[ 83] = 448'h0b_df_dc_5b_34_c1_3b_ea_58_cf_7c_b1_e7_72_b9_ad_12_7e_45_ca_f6_f6_fe_bd_27_66_62_6d_75_fe_ec_19_27_1f_57_ad_5c_b7_0e_dd_c1_bb_76_9e_cf_ec_25_97_de_a9_23_c9_cf_d5_70_d3; + cw [ 84] = 64'h9e_7b_78_77_83_71_e4_85; + key_except[ 84] = 448'h98_7d_7e_71_85_77_e2_83_41_90_b4_eb_d2_5f_76_ac_33_70_fd_63_e0_d8_80_51_43_98_2e_f4_95_98_08_5c_71_b2_71_71_6e_a9_76_c1_df_56_25_b8_af_c8_1a_d0_e3_70_32_55_41_7d_5b_ef; + cw [ 85] = 64'ha3_73_f5_48_b6_6b_c0_15; + key_except[ 85] = 448'ha5_75_f3_4e_b0_6d_c6_13_05_82_3b_6c_f6_99_48_ce_5d_18_d6_f6_cc_6b_48_51_89_bd_2b_fb_a5_3b_31_f5_36_f3_22_79_4b_44_fb_65_d4_dc_b5_35_3d_3d_93_18_b2_5a_7b_0f_91_08_3e_4f; + cw [ 86] = 64'h0c_76_ba_17_73_39_c3_43; + key_except[ 86] = 448'h0a_70_bc_11_75_3f_c5_45_6c_00_ac_1b_d9_0f_59_f8_86_c2_59_d5_20_ea_90_73_53_eb_01_ba_b8_98_da_4d_d9_f7_c2_50_7a_27_3c_ca_b7_4a_79_b9_06_61_1e_bd_21_f0_d4_8d_c3_76_f3_0b; + cw [ 87] = 64'h5b_78_63_8e_38_e4_53_5e; + key_except[ 87] = 448'h5d_7e_65_88_3e_e2_55_58_ae_ea_64_1d_0b_90_2a_2e_b1_0f_50_87_4f_a9_f5_a9_c6_ed_d5_0f_d4_4a_e1_d3_3c_05_89_57_d1_56_66_dc_4d_8d_dc_f7_49_d3_56_37_b3_f4_0b_a6_ae_93_b0_36; + cw [ 88] = 64'h28_35_3f_3f_d6_79_ca_d8; + key_except[ 88] = 448'h2e_33_39_39_d0_7f_cc_de_6d_10_72_5e_d1_f3_11_f2_4e_cc_32_ff_aa_d9_90_33_d9_fb_01_e0_df_1e_ba_e8_dd_7b_62_71_1f_6a_a5_fa_e6_12_f1_bc_16_51_b6_6a_67_72_fd_97_db_1c_d5_01; + cw [ 89] = 64'h9e_ac_d3_1d_f2_88_f6_c6; + key_except[ 89] = 448'h98_aa_d5_1b_f4_8e_f0_c0_79_c0_0c_d1_de_c0_3a_71_b3_ec_91_f0_44_b7_92_ba_33_f0_4c_ad_ba_c2_b0_99_bf_73_f5_42_1c_d5_4c_88_a9_0e_7f_a6_ea_f0_07_a8_e8_30_d7_ca_c7_5b_e8_b5; + cw [ 90] = 64'hfc_9e_56_ff_84_a6_9a_61; + key_except[ 90] = 448'hfa_98_50_f9_82_a0_9c_67_7f_7d_22_78_b2_28_f7_21_6a_d9_a3_6d_54_80_bb_ed_7c_5b_7d_b7_13_ee_a6_3e_0d_b8_65_8e_90_19_b5_e9_3c_62_62_d7_7b_cd_e4_e0_8d_2f_15_b4_56_d9_de_79; + cw [ 91] = 64'h15_14_36_21_5b_ec_ec_87; + key_except[ 91] = 448'h13_12_30_27_5d_ea_ea_81_c9_9b_a7_89_dd_7c_03_50_be_a4_2d_da_05_18_60_f3_17_ae_86_b1_0e_cd_90_60_b3_7b_98_17_3e_9b_b0_46_ed_c2_3c_12_90_02_3f_c9_76_40_d6_d4_a5_e2_54_a9; + cw [ 92] = 64'hd0_d6_92_a2_98_75_15_3b; + key_except[ 92] = 448'hd6_d0_94_a4_9e_73_13_3d_9e_7d_6d_cf_88_1d_c3_8b_a4_a3_e4_e7_1b_42_27_6d_f6_3a_df_32_64_1b_c7_06_40_95_bc_85_d1_08_38_52_7f_61_ba_51_e5_23_44_56_0b_85_0c_fd_a8_8a_1b_3b; + cw [ 93] = 64'ha8_f5_be_07_2e_e3_b4_20; + key_except[ 93] = 448'hae_f3_b8_01_28_e5_b2_26_d9_44_3a_8c_f0_16_8d_a8_4e_a4_d6_43_b5_ea_8a_bd_79_0a_ca_eb_b5_7a_8e_61_01_32_1e_f9_58_b4_ad_e2_e4_3a_23_bb_f5_66_94_11_0b_7b_34_cd_35_14_7c_93; + cw [ 94] = 64'h2d_42_c3_b6_68_db_5b_02; + key_except[ 94] = 448'h2b_44_c5_b0_6e_dd_5d_04_ac_73_08_03_2b_b4_5d_fd_84_43_63_1f_41_e7_cc_aa_4b_87_d1_0a_3c_f6_d3_9e_d8_ce_ca_09_d0_5f_0e_a4_53_89_09_c3_4e_77_a6_fd_b7_a8_c0_bb_74_52_a3_12; + cw [ 95] = 64'h82_d4_dc_7c_63_84_10_4e; + key_except[ 95] = 448'h84_d2_da_7a_65_82_16_48_15_dd_ee_35_ce_02_1c_19_9d_dc_ec_44_66_a6_36_9f_37_41_6b_2b_68_48_29_38_a6_12_c6_06_68_3c_c8_d9_a1_0d_6e_1f_7a_69_09_53_88_00_87_18_4f_b6_3c_57; + cw [ 96] = 64'hde_86_f9_08_90_0c_ce_95; + key_except[ 96] = 448'hd8_80_ff_0e_96_0a_c8_93_37_89_0d_c1_96_eb_42_62_35_a8_81_fc_6c_1f_a3_40_b6_b0_0d_b1_33_87_39_d7_3e_f9_34_16_07_61_5c_00_39_44_b6_8c_a9_31_73_a8_ec_64_5f_4a_80_cc_8a_2d; + cw [ 97] = 64'h0b_76_40_6e_34_24_01_0d; + key_except[ 97] = 448'h0d_70_46_68_32_22_07_0b_04_9e_64_2c_03_09_48_29_55_9a_74_85_46_a0_e4_45_55_2d_23_1b_d1_0a_61_16_24_87_02_46_42_0e_75_d5_34_cd_14_b5_09_49_00_57_91_b2_07_14_88_90_32_4e; + cw [ 98] = 64'he9_88_87_a5_e7_7f_0e_10; + key_except[ 98] = 448'hef_8e_81_a3_e1_79_08_16_7f_3f_8a_ce_64_b5_2d_f7_4a_25_aa_3e_08_e3_ef_36_ac_1e_19_0e_3f_34_92_a0_cb_48_37_0d_bb_4c_af_a6_c6_8b_82_c1_b4_f5_ed_68_1e_2e_c8_ff_11_b9_ed_00; + cw [ 99] = 64'heb_e1_dc_09_18_56_c8_9b; + key_except[ 99] = 448'hed_e7_da_0f_1e_50_ce_9d_d7_0a_5b_07_be_7b_00_2f_8f_0c_d6_ce_eb_16_eb_40_ae_a5_8b_f0_f4_27_2a_33_57_39_8e_6f_47_20_de_34_43_d6_ba_ac_39_27_e3_13_fe_3c_39_08_b8_86_4d_0f; + + #2; + + for(i=0;i<100;i=i+1) + begin + cwt=cw[i]; + #2; + if(key!=key_except[i]) + $display("error at %d",i); + #2; + end + + #2; + $finish; + end + + + key_computer k( + .cw(cwt) + ,.key(key) + ); +endmodule Index: csa/branches/avendor/rtl/key_perm.v =================================================================== --- csa/branches/avendor/rtl/key_perm.v (nonexistent) +++ csa/branches/avendor/rtl/key_perm.v (revision 24) @@ -0,0 +1,33 @@ + + +// this module do a key 64bits perm +// author: Simon panti +// mengxipeng@gmail.com +// refer: +// cas.c in vlc opensource project + + + +module key_perm(i_key,o_key); + input [63:0] i_key; + output [63:0] o_key; + + assign o_key={ + i_key[6'h1B], i_key[6'h20], i_key[6'h09], i_key[6'h37], + i_key[6'h29], i_key[6'h0D], i_key[6'h3E], i_key[6'h08], + i_key[6'h02], i_key[6'h0C], i_key[6'h27], i_key[6'h25], + i_key[6'h12], i_key[6'h0E], i_key[6'h38], i_key[6'h35], + i_key[6'h18], i_key[6'h03], i_key[6'h34], i_key[6'h30], + i_key[6'h2F], i_key[6'h3D], i_key[6'h2A], i_key[6'h22], + i_key[6'h0A], i_key[6'h1F], i_key[6'h26], i_key[6'h06], + i_key[6'h15], i_key[6'h3A], i_key[6'h14], i_key[6'h1A], + i_key[6'h2C], i_key[6'h19], i_key[6'h11], i_key[6'h0F], + i_key[6'h01], i_key[6'h21], i_key[6'h2E], i_key[6'h3F], + i_key[6'h28], i_key[6'h07], i_key[6'h0B], i_key[6'h16], + i_key[6'h00], i_key[6'h23], i_key[6'h2B], i_key[6'h17], + i_key[6'h05], i_key[6'h31], i_key[6'h33], i_key[6'h24], + i_key[6'h1D], i_key[6'h1C], i_key[6'h3C], i_key[6'h39], + i_key[6'h10], i_key[6'h13], i_key[6'h3B], i_key[6'h1E], + i_key[6'h36], i_key[6'h32], i_key[6'h04], i_key[6'h2D] + }; +endmodule Index: csa/branches/avendor/rtl/key_computer.v =================================================================== --- csa/branches/avendor/rtl/key_computer.v (nonexistent) +++ csa/branches/avendor/rtl/key_computer.v (revision 24) @@ -0,0 +1,42 @@ + + +// this module is used to computer a key +// author: Simon panti +// mengxipeng@gmail.com +// refer: +// cas.c in vlc opensource project + +// this module implement the function csa_ComputeKey +// and cw accord to ck +// key accord to kk; + +// + +module key_computer(cw,key); + input [63:0] cw; // input cw, has 64bits + output [447:0] key; // output key, has 7*64bits + + wire [63:0] key1; + wire [63:0] key2; + wire [63:0] key3; + wire [63:0] key4; + wire [63:0] key5; + wire [63:0] key6; + + + key_perm kp0 ( cw, key6 ); + key_perm kp1 ( key6, key5 ); + key_perm kp2 ( key5, key4 ); + key_perm kp3 ( key4, key3 ); + key_perm kp4 ( key3, key2 ); + key_perm kp5 ( key2, key1 ); + + assign key[64*1-1:64*0]=key1 ^ 64'h0000000000000000; + assign key[64*2-1:64*1]=key2 ^ 64'h0101010101010101; + assign key[64*3-1:64*2]=key3 ^ 64'h0202020202020202; + assign key[64*4-1:64*3]=key4 ^ 64'h0303030303030303; + assign key[64*5-1:64*4]=key5 ^ 64'h0404040404040404; + assign key[64*6-1:64*5]=key6 ^ 64'h0505050505050505; + assign key[64*7-1:64*6]=cw ^ 64'h0606060606060606; + +endmodule Index: csa/branches/avendor/doc/readme =================================================================== --- csa/branches/avendor/doc/readme (nonexistent) +++ csa/branches/avendor/doc/readme (revision 24) @@ -0,0 +1,66 @@ +///////////////////////////////////////////////////////////////////// +//// //// +//// cas core //// +//// //// +//// Author: Simon Panti //// +//// mengxipeng@gmail.com //// +//// //// +///////////////////////////////////////////////////////////////////// +//// //// +//// Copyright (C) 2007 Simon Panti //// +//// mengxipeng@gmail.com //// +//// //// +//// This source file may be used and distributed without //// +//// restriction provided that this copyright statement is not //// +//// removed from the file and that any derivative work contains //// +//// the original copyright notice and the associated disclaimer.//// +//// //// +//// THIS SOFTWARE IS PROVIDED ``AS IS'' AND WITHOUT ANY //// +//// EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED //// +//// TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS //// +//// FOR A PARTICULAR PURPOSE. IN NO EVENT SHALL THE AUTHOR //// +//// OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, //// +//// INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES //// +//// (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE //// +//// GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR //// +//// BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF //// +//// LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT //// +//// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT //// +//// OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE //// +//// POSSIBILITY OF SUCH DAMAGE. //// +//// //// +///////////////////////////////////////////////////////////////////// + + + +cas core +=============== +attached is a cas core implementation in verilog. it implement +a cas descrambler + +reference: + csa.c and csa.h in vlc opensource project. + + + + +Status +====== +7-sep-2007 added key csa_ComputeKey + + +Directory Structure +=================== +[core_root] + | + +-doc Documentation + | + +-bench--+ Test Bench + | + +-rtl----+ Core RTL Sources + + +about the author +================ +if you have some issues and advance, please contact me: + mengxipeng@gmail.com \ No newline at end of file Index: csa/branches =================================================================== --- csa/branches (nonexistent) +++ csa/branches (revision 24)

csa/branches Property changes : Added: svn:mergeinfo ## -0,0 +0,0 ## Index: csa/tags/arelease/bench/key_computer_tb.v =================================================================== --- csa/tags/arelease/bench/key_computer_tb.v (nonexistent) +++ csa/tags/arelease/bench/key_computer_tb.v (revision 24) @@ -0,0 +1,248 @@ + +`timescale 1ns/100ps + +// this is a testbench for key_computer module +// author: Simon panti +// mengxipeng@gmail.com +// refer: +// cas.cpp in vlc opensource project + +module key_computer_tb; + + // test 100 times + reg [63:0 ] cw [0:99]; // input cws + reg [447:0] key_except [0:99]; // output keys + + // test variables + reg [63:0 ] cwt; + wire [447:0] key; + + + // loop var + integer i; + + initial + begin + // test data, + cw [ 0] = 64'h1b_81_ec_85_1f_54_1a_45; + key_except[ 0] = 448'h1d_87_ea_83_19_52_1c_43_f5_ef_9e_16_47_3f_02_24_7f_05_08_8e_e1_8e_f6_5c_25_65_d5_52_37_04_08_71_6b_0b_0c_37_a8_22_df_8c_ca_d7_56_c9_59_63_39_21_9e_62_22_28_a3_b4_c5_3c; + cw [ 1] = 64'h40_0c_e3_5a_f3_58_08_0f; + key_except[ 1] = 448'h46_0a_e5_5c_f5_5e_0e_09_0f_85_cd_67_4b_b9_39_50_90_dc_0c_bf_42_2f_05_76_52_33_23_1e_6e_05_b1_d9_e4_49_e3_13_3a_46_18_11_e3_49_1d_05_0a_b9_7c_0a_87_44_c7_8a_c9_2b_21_48; + cw [ 2] = 64'ha9_fc_0e_65_ac_24_42_07; + key_except[ 2] = 448'haf_fa_08_63_aa_22_44_01_fd_9a_22_6c_0c_0f_2d_29_da_94_f2_24_25_a0_e6_61_3d_9f_a9_1f_90_0a_88_22_3b_02_af_46_52_2c_b5_e7_24_cb_0e_b9_31_cb_87_70_38_32_06_94_30_9f_fc_4a; + cw [ 3] = 64'h4a_f8_fb_80_36_70_1f_ac; + key_except[ 3] = 448'h4c_fe_fd_86_30_76_19_aa_3e_e4_6d_8e_c7_f7_a8_2c_51_27_50_ce_72_3b_87_3d_20_28_51_2c_f5_0f_cd_d1_6a_1d_17_d3_dc_66_6f_50_c6_2d_37_f8_c9_b1_75_37_ce_f7_02_ee_89_05_b1_17; + cw [ 4] = 64'h2b_6a_e8_6c_d2_fa_e8_9e; + key_except[ 4] = 448'h2d_6c_ee_6a_d4_fc_ee_98_01_92_48_6f_7f_72_60_7e_91_18_76_ba_6a_9a_c8_92_8b_bd_22_84_fc_66_39_54_f6_eb_a3_5b_4f_ba_6e_b5_d7_84_9d_ae_08_ec_b3_5a_f6_78_db_1c_9d_1f_03_c6; + cw [ 5] = 64'he6_01_4b_4d_96_01_5d_24; + key_except[ 5] = 448'he0_07_4d_4b_90_07_5b_22_4e_c1_10_e0_46_a3_80_85_57_3e_87_ac_f4_c5_05_38_08_b0_6b_43_03_96_ec_91_37_0d_32_a0_18_61_43_a1_80_37_15_0d_ed_59_e7_84_a4_87_23_c3_91_5c_48_54; + cw [ 6] = 64'h2b_2f_4c_29_ea_ca_2e_a8; + key_except[ 6] = 448'h2d_29_4a_2f_ec_cc_28_ae_e1_16_53_c5_67_72_ec_71_0b_a8_32_3a_f7_34_cc_96_1b_14_80_4d_df_67_3e_34_8f_ca_3b_eb_0e_be_c4_34_f1_bf_01_ae_98_86_a1_6a_d6_39_e5_50_3d_0d_e6_84; + cw [ 7] = 64'h3c_ac_45_6c_0c_1f_82_35; + key_except[ 7] = 448'h3a_aa_43_6a_0a_19_84_33_b5_9c_02_22_37_89_a7_e3_78_9c_33_14_59_c5_aa_44_bd_03_a5_96_93_b2_35_b2_6e_62_0d_cc_03_4b_95_a1_2a_60_86_a5_1d_df_81_e9_88_3b_5f_13_30_d1_85_68; + cw [ 8] = 64'h71_f1_49_67_8d_cb_74_00; + key_except[ 8] = 448'h77_f7_4f_61_8b_cd_72_06_d3_52_b0_e4_23_96_07_cd_66_34_7e_33_e5_c5_4f_89_68_96_e6_43_85_78_1a_92_11_40_3c_69_60_fa_03_e5_48_93_03_3b_cd_5e_ca_58_bb_1e_60_53_34_3c_50_f2; + cw [ 9] = 64'hb5_be_9a_cc_d1_1f_91_dc; + key_except[ 9] = 448'hb3_b8_9c_ca_d7_19_97_da_1c_ee_e8_73_b4_43_63_d3_30_9b_9f_f4_2a_d6_7a_2f_bf_77_7f_a4_eb_b8_f9_07_e6_f7_25_4c_b5_21_08_ff_3b_80_f6_7c_64_ed_8d_8e_58_98_df_a9_9a_fd_1b_71; + cw [ 10] = 64'h06_95_31_34_93_70_5b_c4; + key_except[ 10] = 448'h00_93_37_32_95_76_5d_c2_34_d1_b4_5b_c5_f5_10_00_15_c6_29_ee_80_99_16_19_33_f9_41_60_07_8c_41_c8_7a_1f_66_33_2c_4b_60_ca_e7_15_77_10_43_51_3b_e4_6e_c0_26_16_c3_78_91_15; + cw [ 11] = 64'hf9_3c_3a_9a_5f_96_c9_55; + key_except[ 11] = 448'hff_3a_3c_9c_59_90_cf_53_8e_aa_a1_16_f0_2a_33_32_70_cf_9e_cd_29_0c_f9_f3_dc_e7_9f_b6_9b_6d_e9_49_f4_3d_49_5e_bb_30_15_6e_aa_c0_f4_ff_22_87_fe_05_35_fe_9f_a0_f7_a5_19_29; + cw [ 12] = 64'h34_3f_96_dd_16_6f_c5_51; + key_except[ 12] = 448'h32_39_90_db_10_69_c3_57_4c_28_3a_b8_f5_19_73_c3_6a_fb_17_d6_8c_c2_38_71_9d_ea_37_f7_a7_ba_f2_2d_17_f7_51_6d_9b_03_b9_eb_fc_52_f0_75_97_ed_87_8d_22_9a_7d_ed_d3_d1_56_69; + cw [ 13] = 64'hf3_6c_57_41_6e_5a_ad_1e; + key_except[ 13] = 448'hf5_6a_51_47_68_5c_ab_18_ca_86_43_a6_fe_b5_2e_5b_fb_b6_d6_5a_4b_25_49_36_98_04_ae_ae_cc_27_d0_b1_e3_7c_99_4b_5b_c4_c1_35_ea_8e_ad_21_b8_9e_e5_1f_96_9e_de_c2_39_03_6d_e7; + cw [ 14] = 64'h84_55_47_ee_6f_bd_d2_44; + key_except[ 14] = 448'h82_53_41_e8_69_bb_d4_42_ad_f9_b6_3a_52_80_0d_d9_5c_9d_e9_15_c1_e1_30_bb_55_cb_f9_ca_09_d8_b1_b0_fc_62_0a_24_f8_5d_a1_c9_a6_18_44_57_7c_5b_0e_f9_a1_02_f7_b7_27_f0_bd_52; + cw [ 15] = 64'hca_d1_62_70_f7_80_fc_f3; + key_except[ 15] = 448'hcc_d7_64_76_f1_86_fa_f5_1b_51_b5_f4_5e_6c_98_3e_c5_74_ec_a8_dc_3c_93_fb_a0_f0_6a_d9_18_4d_87_58_92_29_f6_b2_7d_9c_57_49_80_7c_db_92_ea_08_7f_50_ec_67_b8_d0_c7_2a_38_de; + cw [ 16] = 64'hbe_7b_57_36_36_8f_e3_7b; + key_except[ 16] = 448'hb8_7d_51_30_30_89_e5_7d_28_18_72_10_fa_8c_fa_ef_e9_42_f3_d1_de_e5_b8_f1_cd_e1_0c_ff_d0_fa_d7_bc_18_f7_c1_ec_5b_dd_d7_f8_98_7c_f8_b3_3f_d4_86_ff_a1_bb_78_93_df_d3_be_af; + cw [ 17] = 64'he9_32_0b_13_33_5c_b7_d1; + key_except[ 17] = 448'hef_34_0d_15_35_5a_b1_d7_6a_4e_a1_97_50_df_59_67_06_62_9a_93_28_35_f1_7d_ce_66_48_98_97_09_da_8d_49_e5_52_47_3d_e4_16_6e_d3_ca_d0_b8_e3_10_cc_2d_53_b4_58_c2_d3_a4_fb_98; + cw [ 18] = 64'heb_98_16_c0_45_5a_9a_11; + key_except[ 18] = 448'hed_9e_10_c6_43_5c_9c_17_3f_67_a3_26_b4_3d_24_77_49_15_8a_5e_08_04_cb_6f_a8_05_79_b6_1f_2d_93_23_ca_78_07_0b_b1_00_d7_67_42_c4_a3_d1_70_8d_ed_29_1e_2e_d8_a0_10_21_9d_5d; + cw [ 19] = 64'hf7_93_44_57_9b_83_21_f7; + key_except[ 19] = 448'hf1_95_42_51_9d_85_27_f1_d2_87_b2_71_6a_4c_d2_87_bf_52_8f_a1_dd_d4_5f_d5_ea_75_ae_51_02_f8_44_3d_21_85_ec_a8_2f_91_d2_ed_99_f7_df_12_3f_4e_c8_84_d9_8d_2a_01_f7_7a_5e_ec; + cw [ 20] = 64'h55_ce_15_d9_b5_d3_d7_64; + key_except[ 20] = 448'h53_c8_13_df_b3_d5_d1_62_76_e3_87_f2_b5_90_fb_89_7a_fb_49_e6_10_65_5b_88_30_f6_75_ae_05_f1_64_af_7f_b5_75_89_e0_57_81_0f_7a_aa_77_47_d7_9d_4b_b4_3a_8f_17_63_c6_69_e7_73; + cw [ 21] = 64'hdf_39_3d_aa_e9_ca_ba_df; + key_except[ 21] = 448'hd9_3f_3b_ac_ef_cc_bc_d9_a3_f6_f7_51_b8_fa_2e_76_b9_0d_b9_7b_af_3d_d9_cf_c2_55_dc_fd_de_ed_39_e2_ac_78_a9_7b_a5_fd_d6_5e_49_dc_ed_fe_70_96_78_ea_57_7c_fb_32_2e_6f_bc_bd; + cw [ 22] = 64'h84_85_25_10_df_ee_bb_11; + key_except[ 22] = 448'h82_83_23_16_d9_e8_bd_17_b0_4d_97_48_74_bc_11_52_4c_c6_89_ba_8d_09_2a_de_b5_3b_c8_d3_0f_e5_53_e9_8a_6f_6e_3f_29_d1_b1_02_e4_50_92_03_72_16_39_ac_0e_ca_fc_06_e5_e8_8c_98; + cw [ 23] = 64'hc8_a9_68_b8_15_47_42_48; + key_except[ 23] = 448'hce_af_6e_be_13_41_44_4e_37_38_d5_14_26_13_31_a4_40_4d_b8_86_e6_4c_bf_00_24_e3_19_47_d7_31_2b_5a_1e_01_47_7d_a2_28_07_18_40_11_52_ed_2f_85_5b_63_aa_7e_21_31_ca_a5_88_00; + cw [ 24] = 64'h42_60_56_30_5b_e2_a8_f6; + key_except[ 24] = 448'h44_66_50_36_5d_e4_ae_f0_8b_94_87_1d_ff_74_90_1f_9d_44_7c_ca_5d_10_19_b6_82_69_82_a1_8c_65_85_38_a2_39_ca_cb_7f_9a_e2_08_c5_24_fd_22_1a_06_6d_51_c6_1d_9a_94_e7_22_04_87; + cw [ 25] = 64'h1c_a8_75_6e_58_4f_bb_2f; + key_except[ 25] = 448'h1a_ae_73_68_5e_49_bd_29_b0_dc_46_21_bb_b9_a3_f4_b8_1e_31_db_57_cd_aa_4e_67_23_e4_b7_de_b6_75_f2_ac_7f_8d_dd_00_cb_96_91_49_60_3e_a5_5c_de_30_ef_8f_f9_d3_13_a8_d3_84_f9; + cw [ 26] = 64'h97_45_fc_47_03_22_3e_2e; + key_except[ 26] = 448'h91_43_fa_41_05_24_38_28_61_c7_de_a9_ea_27_86_08_bf_b4_c9_49_f6_8a_4c_1c_53_0c_6c_63_60_a4_0c_71_29_1a_90_ba_68_a1_e8_95_ad_b7_2d_09_f9_6c_38_b3_95_49_26_4c_09_76_cc_f7; + cw [ 27] = 64'h85_3c_56_f9_2b_75_66_d0; + key_except[ 27] = 448'h83_3a_50_ff_2d_73_60_d6_e9_3a_a7_bb_c6_51_3d_83_0a_fd_b9_42_49_70_74_31_97_ce_b8_2c_87_99_a2_38_5f_12_5b_45_bf_8d_a0_4d_e7_8b_e0_74_bf_8a_0f_e1_f2_10_0d_f5_63_e1_fd_c1; + cw [ 28] = 64'hcd_58_a5_a2_f0_65_5e_17; + key_except[ 28] = 448'hcb_5e_a3_a4_f6_63_58_11_27_fb_2f_c9_08_bd_29_be_98_25_e1_af_0c_6b_e5_4b_c6_be_59_1f_3c_9f_01_e2_b8_09_b3_15_c1_4d_be_46_45_c9_9c_d1_f4_b1_72_f0_37_64_8a_7f_80_cb_bc_1a; + cw [ 29] = 64'hea_a8_3c_c7_47_91_c4_a9; + key_except[ 29] = 448'hec_ae_3a_c1_41_97_c2_af_57_20_c2_a6_d0_4e_a4_b4_4b_35_9e_45_32_dc_83_d2_68_80_3b_b4_db_50_0e_61_d1_30_17_d0_ae_30_d7_b3_82_66_23_ea_b4_c9_da_03_69_77_90_61_1d_35_4d_4d; + cw [ 30] = 64'h6c_ff_23_ce_7a_9e_2a_4f; + key_except[ 30] = 448'h6a_f9_25_c8_7c_98_2c_49_bb_ac_70_33_69_a8_69_78_90_99_53_99_83_ad_bf_f7_7e_63_b0_5e_d8_ee_b1_c5_ec_c9_8f_7e_da_d7_14_fb_b3_59_5e_f7_00_de_f4_bb_0d_7c_e7_a2_bf_d3_b3_ca; + cw [ 31] = 64'h75_73_97_84_a6_b5_96_76; + key_except[ 31] = 448'h73_75_91_82_a0_b3_90_70_2f_ee_3a_da_dd_84_cf_8f_fc_21_53_64_98_e3_71_bd_8c_5e_55_ea_a0_da_85_a5_6a_b0_b0_e4_d9_57_ab_ee_9e_b8_ec_73_d5_71_c5_b0_10_17_3a_ef_17_da_b7_33; + cw [ 32] = 64'h3d_df_87_97_3b_03_02_b1; + key_except[ 32] = 448'h3b_d9_81_91_3d_05_04_b7_fd_27_ba_01_61_cd_fb_ab_2a_c1_4b_85_9d_f7_ce_75_fb_27_95_5d_31_b8_86_ad_09_83_4d_a8_ff_47_9c_e6_b9_fb_93_d0_17_f7_8c_b1_59_29_2c_ab_f1_71_f6_2a; + cw [ 33] = 64'h8f_61_18_1d_7f_38_dc_35; + key_except[ 33] = 448'h89_67_1e_1b_79_3e_da_33_c5_c2_94_8a_d4_2b_98_7f_57_6c_dd_dc_b9_a0_c0_5a_81_ac_cb_fa_99_84_3c_09_f7_7b_5a_e2_69_25_77_86_86_fe_b5_ad_e2_43_2b_99_34_33_fb_44_e1_74_69_1f; + cw [ 34] = 64'h4a_dc_23_0b_0c_09_87_5c; + key_except[ 34] = 448'h4c_da_25_0d_0a_0f_81_5a_fe_85_65_94_11_81_24_ea_53_ae_40_15_0f_4d_93_25_f0_40_81_87_51_1b_f0_c3_2d_64_1f_10_53_42_45_5a_20_06_c7_95_85_93_54_3f_09_e6_5f_c3_2a_01_d0_06; + cw [ 35] = 64'he1_77_b2_bf_4d_ae_d9_22; + key_except[ 35] = 448'he7_71_b4_b9_4b_a8_df_24_ce_7a_b8_0c_b8_20_d5_58_c6_cb_fe_5d_95_8a_69_ab_5c_8f_db_e3_a8_6c_f6_4e_95_fc_ca_fe_f0_18_29_e6_34_b2_28_77_62_67_fe_5d_35_df_f5_bc_74_b2_5a_13; + cw [ 36] = 64'hdc_1c_86_77_05_65_9b_ab; + key_except[ 36] = 448'hda_1a_80_71_03_63_9d_ad_6e_5d_ee_28_18_7d_b7_a1_ea_d6_a9_0f_16_d2_a1_6d_54_0b_6d_95_76_9c_c6_2a_09_2c_c1_85_34_09_bd_d3_6c_62_08_90_77_e9_6c_e7_47_a7_14_9d_48_f3_dc_78; + cw [ 37] = 64'h54_fa_94_d8_c9_ed_0c_bb; + key_except[ 37] = 448'h52_fc_92_de_cf_eb_0a_bd_97_2c_ef_e9_8d_78_f7_df_a8_79_5d_7e_1f_52_27_c7_a6_1a_b7_35_ec_dd_37_2f_86_d8_fd_c5_e7_13_ba_53_5d_61_aa_76_96_ab_69_9a_4e_15_c9_6d_6c_eb_16_6b; + cw [ 38] = 64'h7b_04_82_68_80_0c_5e_3c; + key_except[ 38] = 448'h7d_02_84_6e_86_0a_58_3a_2f_db_49_e5_05_21_86_63_35_bc_22_3c_1e_06_e5_28_9e_94_65_03_73_07_b5_02_3e_48_30_86_11_0a_4c_37_29_a5_84_85_c1_29_e7_6a_34_25_4f_d8_18_88_80_74; + cw [ 39] = 64'h11_6f_2f_14_ea_09_37_bc; + key_except[ 39] = 448'h17_69_29_12_ec_0f_31_ba_a8_c6_56_c5_45_c7_ff_da_38_e2_50_30_bf_fd_44_3e_93_16_c4_4d_c9_12_dd_ed_aa_c6_79_f0_5d_e6_80_96_b9_b9_85_28_d6_d2_15_3e_50_d1_ee_c3_69_1d_a6_b2; + cw [ 40] = 64'hf0_38_29_ab_16_32_31_ed; + key_except[ 40] = 448'hf6_3e_2f_ad_10_34_37_eb_42_f4_61_1e_60_cb_a3_04_72_0f_b6_81_32_19_1d_5d_48_6b_5e_14_c3_2b_6c_c0_65_05_01_da_8c_e8_33_7a_8e_63_55_7c_61_94_d0_47_41_df_03_36_9b_05_59_b8; + cw [ 41] = 64'h81_9c_35_60_eb_58_5b_23; + key_except[ 41] = 448'h87_9a_33_66_ed_5e_5d_25_b4_53_a7_67_cc_bd_ad_50_88_96_a8_7e_11_2d_46_5b_33_97_e9_3e_0e_0d_57_e0_da_5e_af_93_28_4c_90_47_e3_e9_2b_11_70_9b_3b_6c_3e_c1_c4_12_21_2b_bd_59; + cw [ 42] = 64'h45_9e_cb_4c_a0_4e_b6_d9; + key_except[ 42] = 448'h43_98_cd_4a_a6_48_b0_df_3b_4f_6c_f1_37_db_6d_43_00_b8_01_32_6e_b7_7b_6d_b6_56_60_9d_67_aa_bb_97_0e_e0_37_0f_15_e7_18_dd_71_c8_c2_1c_c9_fc_45_aa_da_0c_5d_ca_0a_dd_b2_d8; + cw [ 43] = 64'h4d_84_97_ea_43_6d_b8_2d; + key_except[ 43] = 448'h4b_82_91_ec_45_6b_be_2b_1b_ff_cf_29_d1_b9_85_f1_1c_9d_2d_5b_16_43_e3_7e_76_0f_72_b3_7f_95_b5_a0_a4_78_06_85_b8_cb_bc_17_e5_e0_26_c5_54_38_6c_cb_1f_25_d7_bf_09_e0_04_d9; + cw [ 44] = 64'hc2_5a_f8_99_36_13_cd_5f; + key_except[ 44] = 448'hc4_5c_fe_9f_30_15_cb_59_46_a1_6d_96_fe_2b_78_8e_d3_6b_c4_cc_6a_6e_19_51_80_e0_1b_be_60_3f_68_5d_77_bd_d3_18_cb_24_5b_58_92_4e_fd_5d_af_a5_73_17_a4_ce_1b_69_cb_07_7b_0f; + cw [ 45] = 64'h5e_6e_85_1d_ad_20_d1_55; + key_except[ 45] = 448'h58_68_83_1b_ab_26_d7_53_c6_c0_8e_58_15_89_7e_2b_7b_ca_5d_24_0d_a3_91_48_90_d9_c7_9f_b1_80_60_af_37_a4_69_42_61_47_fd_8a_3c_4e_c5_a5_53_f3_4b_94_20_b6_1f_0e_62_79_66_3e; + cw [ 46] = 64'hf1_d2_83_1f_32_78_97_1a; + key_except[ 46] = 448'hf7_d4_85_19_34_7e_91_1c_7e_47_68_8f_58_91_5b_4f_a6_6a_c2_97_0a_a3_43_3d_ea_2e_4d_8a_64_0a_f2_8d_4d_e5_d4_03_59_44_2a_f6_df_8a_9b_15_e3_71_c4_3f_1b_84_59_ce_d9_12_fb_32; + cw [ 47] = 64'hdd_de_70_a8_22_83_65_5b; + key_except[ 47] = 448'hdb_d8_76_ae_24_85_63_5d_12_33_65_91_ee_08_6f_aa_a0_ab_e5_40_4e_6c_df_d1_b2_c6_1e_3f_50_fb_63_54_16_94_95_18_cb_9d_14_5c_b9_c9_eb_d7_ad_84_53_d7_b8_ec_0d_71_0f_43_3a_ab; + cw [ 48] = 64'h9a_ab_7c_aa_2d_b0_75_e9; + key_except[ 48] = 448'h9c_ad_7a_ac_2b_b6_73_ef_90_70_d7_9e_82_4a_ee_24_69_2b_bc_41_f3_38_96_c8_61_c8_de_7c_d3_41_6f_76_54_96_1d_f2_a4_bc_f7_18_1e_7d_63_ee_f9_82_1a_47_e9_f3_21_74_2e_25_2f_bd; + cw [ 49] = 64'h33_99_0b_78_d9_ed_76_3a; + key_except[ 49] = 448'h35_9f_0d_7e_df_eb_70_3c_b9_5b_f1_ed_0d_92_b2_d7_a1_7c_2a_b2_bf_41_66_ab_af_bc_e4_47_4e_59_bf_8a_9e_43_fd_a5_31_fa_62_77_4d_b5_9a_1f_c6_9a_8f_6a_3a_01_e9_d7_fc_af_90_f4; + cw [ 50] = 64'hc6_ca_34_48_ff_31_09_e7; + key_except[ 50] = 448'hc0_cc_32_4e_f9_37_0f_e1_96_85_87_7a_cc_69_e8_9c_d9_1a_cd_ec_11_78_17_56_20_79_ab_3c_08_95_65_65_e6_9d_af_90_6e_05_f3_0b_96_6d_7f_04_34_8b_79_94_4c_c7_83_05_a3_6b_2f_4f; + cw [ 51] = 64'h08_a4_45_b8_4d_f3_45_2f; + key_except[ 51] = 448'h0e_a2_43_be_4b_f5_43_29_94_b0_c7_8e_2f_98_95_b1_dc_ef_3c_06_53_41_8e_c2_31_8a_93_12_de_71_65_ba_f6_06_de_c9_a2_5a_b5_10_66_61_0f_e7_9e_17_0b_47_aa_bb_87_77_6c_22_05_08; + cw [ 52] = 64'hc0_53_3c_46_c2_b0_34_73; + key_except[ 52] = 448'hc6_55_3a_40_c4_b6_32_75_03_45_36_ff_c8_0e_c5_1e_8c_30_c4_61_b8_88_15_df_c2_5a_6a_72_08_4a_0f_65_c0_90_b2_b2_49_b0_b2_cb_97_71_e9_1b_f0_48_50_10_01_45_a8_44_07_1e_1f_db; + cw [ 53] = 64'h47_44_4f_d7_35_69_53_b8; + key_except[ 53] = 448'h41_42_49_d1_33_6f_55_be_6e_63_c6_28_03_d7_98_cb_4f_d7_49_97_7e_f1_45_28_d0_ad_71_09_45_90_de_bb_19_45_42_81_f5_67_e1_95_64_af_91_48_5f_59_4e_bf_f3_87_4c_a7_c8_74_e4_56; + cw [ 54] = 64'h0e_ab_65_31_cf_22_15_28; + key_except[ 54] = 448'h08_ad_63_37_c9_24_13_2e_d4_54_d7_c8_67_85_f4_34_4b_62_3d_24_d7_09_8e_1e_21_18_c3_47_db_a1_46_fc_83_86_7f_fa_28_4b_e7_10_94_37_03_a1_da_97_19_c6_88_fb_a0_56_69_69_46_14; + cw [ 55] = 64'h18_ff_9b_81_8c_64_60_91; + key_except[ 55] = 448'h1e_f9_9d_87_8a_62_66_97_d9_28_3d_4c_85_df_67_2b_62_81_54_62_ad_13_a6_61_b5_9b_96_75_b5_0b_8a_87_13_92_2d_67_d7_e2_3d_42_7c_53_a2_f8_01_b2_07_10_6a_32_2c_ae_20_8d_52_ab; + cw [ 56] = 64'h7b_79_c1_d6_bf_bc_0f_e5; + key_except[ 56] = 448'h7d_7f_c7_d0_b9_ba_09_e3_a6_ae_b8_fe_43_ec_ba_6d_71_77_5a_bd_d1_b3_f5_d5_4c_7c_b5_5c_b1_4c_55_99_68_4d_79_e6_ee_56_7f_ed_8e_fd_54_f2_8b_fb_e8_3c_d5_b7_62_6e_f7_b9_b1_6e; + cw [ 57] = 64'he3_98_da_a3_8b_3a_6f_b8; + key_except[ 57] = 448'he5_9e_dc_a5_8d_3c_69_be_fa_33_e9_cf_e2_67_a4_47_03_27_aa_79_7b_12_4f_31_ea_9c_98_24_63_2d_de_10_59_5c_3f_8a_bf_a8_6a_74_87_a7_a3_58_a9_a6_ee_6e_fd_8d_48_fc_39_2d_d9_85; + cw [ 58] = 64'h0f_a0_9f_41_6a_f2_c2_c5; + key_except[ 58] = 448'h09_a6_99_47_6c_f4_c4_c3_fd_82_0f_3b_f5_de_0c_35_1f_14_11_46_21_33_da_f2_23_cd_a1_b8_bf_e3_88_a1_fb_32_0e_4b_1e_77_fe_0f_c7_ce_67_aa_10_3f_07_a1_7a_38_92_8e_27_44_e5_4d; + cw [ 59] = 64'h53_16_fc_6b_a9_7f_bf_6a; + key_except[ 59] = 448'h55_10_fa_6d_af_79_b9_6c_e2_5f_ef_ff_bb_33_ce_c0_af_ba_28_7b_73_6a_79_0d_56_5c_e4_aa_66_3d_7e_76_4d_fc_b8_9d_20_ae_e8_5d_7f_ae_68_1d_dd_2e_78_6e_97_cd_55_5d_2a_ae_f7_f5; + cw [ 60] = 64'h14_45_91_c0_ea_7b_10_27; + key_except[ 60] = 448'h12_43_97_c6_ec_7d_16_21_85_e5_1d_6b_ed_9d_8f_d9_b4_95_45_76_91_63_0c_5e_13_1b_f7_7a_2c_b3_15_81_e2_52_a8_a9_c8_47_38_03_ef_79_2d_41_44_3f_01_98_02_09_e6_2f_21_4a_21_7b; + cw [ 61] = 64'h4f_bd_33_45_a1_08_d2_23; + key_except[ 61] = 448'h49_bb_35_43_a7_0e_d4_25_7f_42_b4_61_9d_8d_ac_60_83_94_19_74_94_ad_c3_69_32_95_61_ff_92_88_96_c3_1b_70_a7_f2_30_47_54_c7_21_fe_2b_b1_41_d9_5f_a8_38_75_74_82_00_7b_f0_5d; + cw [ 62] = 64'h13_ce_69_e0_97_4a_19_a7; + key_except[ 62] = 448'h15_c8_6f_e6_91_4c_1f_a1_14_f7_85_64_6f_ff_e2_48_f1_93_6c_be_74_1d_4e_5c_31_35_77_15_04_25_5d_d4_22_cf_a5_9b_ec_6a_51_05_f8_e5_1f_48_49_9d_39_5c_de_cb_46_32_81_2f_02_7e; + cw [ 63] = 64'h02_12_ef_de_6a_eb_69_a0; + key_except[ 63] = 448'h04_14_e9_d8_6c_ed_6f_a6_88_21_2e_2d_63_f2_dc_d4_0d_5b_04_1b_75_fb_0c_b3_43_89_b2_09_2f_7e_ff_fd_94_ce_4a_99_9e_f6_ea_c1_d5_2d_01_5e_1e_7e_36_0d_e7_c9_c1_af_65_14_36_c4; + cw [ 64] = 64'hd3_e0_36_6e_0b_96_3e_21; + key_except[ 64] = 448'hd5_e6_30_68_0d_90_38_27_bb_5e_86_a7_e0_28_86_0c_2d_3c_f8_49_11_8c_6f_fc_66_04_ec_32_81_64_a7_60_4c_18_1c_de_78_98_d2_87_8b_e5_22_27_f1_4e_7c_71_1d_5d_01_d0_25_b0_8d_ff; + cw [ 65] = 64'hd3_da_e2_23_3f_7c_85_df; + key_except[ 65] = 448'hd5_dc_e4_25_39_7a_83_d9_de_9f_ed_9e_5a_5d_6a_4e_f3_22_ec_97_4b_3a_73_75_e4_6c_8f_9c_64_09_d0_54_61_e5_9d_17_7f_0c_7b_5c_de_ce_de_10_a9_a3_5c_5f_db_c6_5a_dc_ab_a3_7b_2e; + cw [ 66] = 64'h60_60_4b_76_20_d2_20_b4; + key_except[ 66] = 448'h66_66_4d_70_26_d4_26_b2_0b_94_00_27_23_d6_9d_0f_14_54_76_03_78_b5_0d_a4_ca_03_22_08_85_62_8d_9a_60_00_42_cb_57_fe_02_a1_43_29_85_2a_0b_5c_c4_51_c3_1d_0a_92_54_14_21_c2; + cw [ 67] = 64'h6c_1a_fd_42_99_50_66_1d; + key_except[ 67] = 448'h6a_1c_fb_44_9f_56_60_1b_a3_81_eb_e3_83_9f_61_26_18_30_0b_e3_6b_0f_85_41_ca_b2_a0_36_77_89_09_f7_78_91_3b_13_23_e3_9e_71_53_41_b5_99_99_ba_da_a2_a3_64_0a_4a_b8_6d_97_c9; + cw [ 68] = 64'h00_72_38_46_ec_b4_a1_bc; + key_except[ 68] = 448'h06_74_3e_40_ea_b2_a7_ba_80_8c_64_6e_91_46_cd_1e_54_12_54_61_3b_b8_20_87_c5_1b_a2_a8_c9_4a_4d_47_e0_b6_2a_d6_47_b6_23_d3_16_28_a4_3a_00_4a_10_16_41_d3_9a_04_2c_9c_33_c3; + cw [ 69] = 64'hb7_17_70_a7_2f_3d_8f_d6; + key_except[ 69] = 448'hb1_11_76_a1_29_3b_89_d0_e4_bf_b0_9a_da_65_4e_c2_f7_a3_ab_5d_c9_f8_70_15_dd_4c_9d_e8_02_9c_50_54_69_fe_98_34_af_0d_61_ec_be_9e_ec_50_ad_43_b8_ed_d5_c2_7e_75_33_f2_fb_25; + cw [ 70] = 64'h3e_7c_cd_6b_cb_31_e1_d5; + key_except[ 70] = 448'h38_7a_cb_6d_cd_37_e7_d3_c0_90_ab_7b_53_cb_26_bb_3b_9e_7f_21_69_53_90_53_db_d9_a6_94_b9_99_68_b0_f5_26_29_40_6f_eb_fc_69_af_46_c5_bc_1c_ba_8a_d4_e1_b0_9f_1f_33_6d_55_ee; + cw [ 71] = 64'hdb_57_ac_ff_fc_58_bf_c7; + key_except[ 71] = 448'hdd_51_aa_f9_fa_5e_b9_c1_e2_f7_3e_f6_18_7b_5a_78_ff_fb_e0_bb_a1_be_d1_4f_50_74_fc_d8_3c_0e_78_6e_ed_ed_f8_33_c4_ac_dd_cf_7a_de_5d_dc_f2_6a_70_7c_57_e6_f7_78_e2_1e_ff_fe; + cw [ 72] = 64'he3_22_1d_b2_54_7e_42_de; + key_except[ 72] = 448'he5_24_1b_b4_52_78_44_d8_27_ba_43_1e_a8_d7_50_57_dd_41_b2_d7_2a_11_7d_02_cc_ed_19_20_ce_23_19_ae_f8_d1_c2_4f_87_68_e3_3e_56_85_fc_68_32_15_c2_6b_73_1e_ca_36_da_86_8f_05; + cw [ 73] = 64'h42_9d_64_38_38_f4_f8_ee; + key_except[ 73] = 448'h44_9b_62_3e_3e_f2_fe_e8_93_d9_77_1f_1f_70_b8_00_99_cc_24_8a_d3_38_33_89_36_e9_c2_cc_46_4f_25_7a_76_29_cf_b7_04_9e_e0_58_67_3c_5e_16_5b_82_73_43_ee_45_37_14_ee_83_35_94; + cw [ 74] = 64'hf7_4b_78_28_61_10_64_f3; + key_except[ 74] = 448'hf1_4d_7e_2e_67_16_62_f5_03_13_91_93_8e_4b_ee_1e_a1_28_ef_40_f8_3c_55_42_8a_c4_0e_7c_08_81_2f_56_d6_90_91_b2_67_ad_52_2c_1b_fd_e9_0c_a8_80_db_d1_f0_45_a9_50_12_67_2b_af; + cw [ 75] = 64'h95_f0_87_7d_5c_a9_7b_88; + key_except[ 75] = 448'h93_f6_81_7b_5a_af_7d_8e_f8_52_6e_28_04_e0_13_dd_6e_5e_f1_98_07_d3_46_ab_21_af_ec_01_e9_de_f2_aa_9f_4f_4c_40_54_d9_ab_d7_0c_83_13_36_76_7a_27_ff_7c_92_c1_9f_ec_50_dc_f2; + cw [ 76] = 64'hc4_19_6f_19_0a_9b_28_70; + key_except[ 76] = 448'hc2_1f_69_1f_0c_9d_2e_76_cb_05_37_13_66_a2_b5_c6_0a_4c_85_18_f9_4d_1d_b5_82_43_8a_46_03_ff_be_f9_47_48_4b_b8_1b_f1_82_48_83_33_c1_1f_3f_96_75_89_84_4d_69_83_67_45_5d_80; + cw [ 77] = 64'hbd_94_46_3d_21_49_c9_11; + key_except[ 77] = 448'hbb_92_40_3b_27_4f_cf_17_5c_13_a2_01_16_39_1f_e3_2e_ce_af_1e_4c_e4_c2_61_bb_87_0f_9b_17_9c_f2_3a_17_6e_44_01_33_0d_94_e4_69_ca_83_95_3f_41_af_cd_be_a0_5d_91_50_70_7c_28; + cw [ 78] = 64'hd2_f4_d3_13_a9_16_af_f4; + key_except[ 78] = 448'hd4_f2_d5_15_af_10_a9_f2_fa_8c_ad_d7_b2_e5_9e_0b_37_e6_d8_69_59_37_3b_25_f6_50_8c_a8_a1_2d_c4_9b_69_3c_7c_ce_77_c4_48_48_2b_2e_e6_30_ab_36_6c_34_cd_9d_1e_ca_62_a8_f9_a7; + cw [ 79] = 64'he3_0e_13_25_80_eb_a2_47; + key_except[ 79] = 448'he5_08_15_23_86_ed_a4_41_6b_97_00_5d_bc_9c_64_c1_93_80_a2_72_04_c1_59_e4_1a_5d_08_b7_06_72_90_86_2b_f0_a3_09_12_d8_70_ae_75_c6_6d_03_25_d4_c5_68_12_0c_56_97_16_1b_ca_8d; + cw [ 80] = 64'hea_7f_b5_e3_d7_b4_5b_5b; + key_except[ 80] = 448'hec_79_b3_e5_d1_b2_5d_5d_66_78_fb_7e_c8_ac_60_3a_cb_93_fa_ed_8a_0b_b5_db_dc_f9_79_76_f8_4d_42_e4_d9_9d_a3_76_e9_58_fd_7b_b6_57_f8_f3_70_b9_fa_76_25_f6_ac_3e_9f_ab_df_5f; + cw [ 81] = 64'h70_24_9f_20_b3_e3_09_26; + key_except[ 81] = 448'h76_22_99_26_b5_e5_0f_20_0e_94_8b_4d_ed_b6_8b_81_bc_86_3e_ee_34_63_0d_b4_1a_3b_07_2b_a6_75_cd_a0_22_1d_a0_c9_3a_7e_a8_22_ed_29_3d_2b_15_35_ed_44_06_9d_06_9f_95_2e_24_21; + cw [ 82] = 64'h16_9f_67_95_6d_ec_cc_c2; + key_except[ 82] = 448'h10_99_61_93_6b_ea_ca_c4_dd_29_b6_98_1f_f4_7e_50_eb_e1_0d_1e_c5_b9_32_a3_35_c8_97_cd_0e_cc_92_ff_93_ea_dd_37_b6_57_e1_c8_7c_1e_4a_52_9a_d3_3f_89_ee_42_f4_e6_66_f3_76_24; + cw [ 83] = 64'h0d_d9_da_5d_32_c7_3d_ec; + key_except[ 83] = 448'h0b_df_dc_5b_34_c1_3b_ea_58_cf_7c_b1_e7_72_b9_ad_12_7e_45_ca_f6_f6_fe_bd_27_66_62_6d_75_fe_ec_19_27_1f_57_ad_5c_b7_0e_dd_c1_bb_76_9e_cf_ec_25_97_de_a9_23_c9_cf_d5_70_d3; + cw [ 84] = 64'h9e_7b_78_77_83_71_e4_85; + key_except[ 84] = 448'h98_7d_7e_71_85_77_e2_83_41_90_b4_eb_d2_5f_76_ac_33_70_fd_63_e0_d8_80_51_43_98_2e_f4_95_98_08_5c_71_b2_71_71_6e_a9_76_c1_df_56_25_b8_af_c8_1a_d0_e3_70_32_55_41_7d_5b_ef; + cw [ 85] = 64'ha3_73_f5_48_b6_6b_c0_15; + key_except[ 85] = 448'ha5_75_f3_4e_b0_6d_c6_13_05_82_3b_6c_f6_99_48_ce_5d_18_d6_f6_cc_6b_48_51_89_bd_2b_fb_a5_3b_31_f5_36_f3_22_79_4b_44_fb_65_d4_dc_b5_35_3d_3d_93_18_b2_5a_7b_0f_91_08_3e_4f; + cw [ 86] = 64'h0c_76_ba_17_73_39_c3_43; + key_except[ 86] = 448'h0a_70_bc_11_75_3f_c5_45_6c_00_ac_1b_d9_0f_59_f8_86_c2_59_d5_20_ea_90_73_53_eb_01_ba_b8_98_da_4d_d9_f7_c2_50_7a_27_3c_ca_b7_4a_79_b9_06_61_1e_bd_21_f0_d4_8d_c3_76_f3_0b; + cw [ 87] = 64'h5b_78_63_8e_38_e4_53_5e; + key_except[ 87] = 448'h5d_7e_65_88_3e_e2_55_58_ae_ea_64_1d_0b_90_2a_2e_b1_0f_50_87_4f_a9_f5_a9_c6_ed_d5_0f_d4_4a_e1_d3_3c_05_89_57_d1_56_66_dc_4d_8d_dc_f7_49_d3_56_37_b3_f4_0b_a6_ae_93_b0_36; + cw [ 88] = 64'h28_35_3f_3f_d6_79_ca_d8; + key_except[ 88] = 448'h2e_33_39_39_d0_7f_cc_de_6d_10_72_5e_d1_f3_11_f2_4e_cc_32_ff_aa_d9_90_33_d9_fb_01_e0_df_1e_ba_e8_dd_7b_62_71_1f_6a_a5_fa_e6_12_f1_bc_16_51_b6_6a_67_72_fd_97_db_1c_d5_01; + cw [ 89] = 64'h9e_ac_d3_1d_f2_88_f6_c6; + key_except[ 89] = 448'h98_aa_d5_1b_f4_8e_f0_c0_79_c0_0c_d1_de_c0_3a_71_b3_ec_91_f0_44_b7_92_ba_33_f0_4c_ad_ba_c2_b0_99_bf_73_f5_42_1c_d5_4c_88_a9_0e_7f_a6_ea_f0_07_a8_e8_30_d7_ca_c7_5b_e8_b5; + cw [ 90] = 64'hfc_9e_56_ff_84_a6_9a_61; + key_except[ 90] = 448'hfa_98_50_f9_82_a0_9c_67_7f_7d_22_78_b2_28_f7_21_6a_d9_a3_6d_54_80_bb_ed_7c_5b_7d_b7_13_ee_a6_3e_0d_b8_65_8e_90_19_b5_e9_3c_62_62_d7_7b_cd_e4_e0_8d_2f_15_b4_56_d9_de_79; + cw [ 91] = 64'h15_14_36_21_5b_ec_ec_87; + key_except[ 91] = 448'h13_12_30_27_5d_ea_ea_81_c9_9b_a7_89_dd_7c_03_50_be_a4_2d_da_05_18_60_f3_17_ae_86_b1_0e_cd_90_60_b3_7b_98_17_3e_9b_b0_46_ed_c2_3c_12_90_02_3f_c9_76_40_d6_d4_a5_e2_54_a9; + cw [ 92] = 64'hd0_d6_92_a2_98_75_15_3b; + key_except[ 92] = 448'hd6_d0_94_a4_9e_73_13_3d_9e_7d_6d_cf_88_1d_c3_8b_a4_a3_e4_e7_1b_42_27_6d_f6_3a_df_32_64_1b_c7_06_40_95_bc_85_d1_08_38_52_7f_61_ba_51_e5_23_44_56_0b_85_0c_fd_a8_8a_1b_3b; + cw [ 93] = 64'ha8_f5_be_07_2e_e3_b4_20; + key_except[ 93] = 448'hae_f3_b8_01_28_e5_b2_26_d9_44_3a_8c_f0_16_8d_a8_4e_a4_d6_43_b5_ea_8a_bd_79_0a_ca_eb_b5_7a_8e_61_01_32_1e_f9_58_b4_ad_e2_e4_3a_23_bb_f5_66_94_11_0b_7b_34_cd_35_14_7c_93; + cw [ 94] = 64'h2d_42_c3_b6_68_db_5b_02; + key_except[ 94] = 448'h2b_44_c5_b0_6e_dd_5d_04_ac_73_08_03_2b_b4_5d_fd_84_43_63_1f_41_e7_cc_aa_4b_87_d1_0a_3c_f6_d3_9e_d8_ce_ca_09_d0_5f_0e_a4_53_89_09_c3_4e_77_a6_fd_b7_a8_c0_bb_74_52_a3_12; + cw [ 95] = 64'h82_d4_dc_7c_63_84_10_4e; + key_except[ 95] = 448'h84_d2_da_7a_65_82_16_48_15_dd_ee_35_ce_02_1c_19_9d_dc_ec_44_66_a6_36_9f_37_41_6b_2b_68_48_29_38_a6_12_c6_06_68_3c_c8_d9_a1_0d_6e_1f_7a_69_09_53_88_00_87_18_4f_b6_3c_57; + cw [ 96] = 64'hde_86_f9_08_90_0c_ce_95; + key_except[ 96] = 448'hd8_80_ff_0e_96_0a_c8_93_37_89_0d_c1_96_eb_42_62_35_a8_81_fc_6c_1f_a3_40_b6_b0_0d_b1_33_87_39_d7_3e_f9_34_16_07_61_5c_00_39_44_b6_8c_a9_31_73_a8_ec_64_5f_4a_80_cc_8a_2d; + cw [ 97] = 64'h0b_76_40_6e_34_24_01_0d; + key_except[ 97] = 448'h0d_70_46_68_32_22_07_0b_04_9e_64_2c_03_09_48_29_55_9a_74_85_46_a0_e4_45_55_2d_23_1b_d1_0a_61_16_24_87_02_46_42_0e_75_d5_34_cd_14_b5_09_49_00_57_91_b2_07_14_88_90_32_4e; + cw [ 98] = 64'he9_88_87_a5_e7_7f_0e_10; + key_except[ 98] = 448'hef_8e_81_a3_e1_79_08_16_7f_3f_8a_ce_64_b5_2d_f7_4a_25_aa_3e_08_e3_ef_36_ac_1e_19_0e_3f_34_92_a0_cb_48_37_0d_bb_4c_af_a6_c6_8b_82_c1_b4_f5_ed_68_1e_2e_c8_ff_11_b9_ed_00; + cw [ 99] = 64'heb_e1_dc_09_18_56_c8_9b; + key_except[ 99] = 448'hed_e7_da_0f_1e_50_ce_9d_d7_0a_5b_07_be_7b_00_2f_8f_0c_d6_ce_eb_16_eb_40_ae_a5_8b_f0_f4_27_2a_33_57_39_8e_6f_47_20_de_34_43_d6_ba_ac_39_27_e3_13_fe_3c_39_08_b8_86_4d_0f; + + #2; + + for(i=0;i<100;i=i+1) + begin + cwt=cw[i]; + #2; + if(key!=key_except[i]) + $display("error at %d",i); + #2; + end + + #2; + $finish; + end + + + key_computer k( + .cw(cwt) + ,.key(key) + ); +endmodule Index: csa/tags/arelease/rtl/key_perm.v =================================================================== --- csa/tags/arelease/rtl/key_perm.v (nonexistent) +++ csa/tags/arelease/rtl/key_perm.v (revision 24) @@ -0,0 +1,33 @@ + + +// this module do a key 64bits perm +// author: Simon panti +// mengxipeng@gmail.com +// refer: +// cas.c in vlc opensource project + + + +module key_perm(i_key,o_key); + input [63:0] i_key; + output [63:0] o_key; + + assign o_key={ + i_key[6'h1B], i_key[6'h20], i_key[6'h09], i_key[6'h37], + i_key[6'h29], i_key[6'h0D], i_key[6'h3E], i_key[6'h08], + i_key[6'h02], i_key[6'h0C], i_key[6'h27], i_key[6'h25], + i_key[6'h12], i_key[6'h0E], i_key[6'h38], i_key[6'h35], + i_key[6'h18], i_key[6'h03], i_key[6'h34], i_key[6'h30], + i_key[6'h2F], i_key[6'h3D], i_key[6'h2A], i_key[6'h22], + i_key[6'h0A], i_key[6'h1F], i_key[6'h26], i_key[6'h06], + i_key[6'h15], i_key[6'h3A], i_key[6'h14], i_key[6'h1A], + i_key[6'h2C], i_key[6'h19], i_key[6'h11], i_key[6'h0F], + i_key[6'h01], i_key[6'h21], i_key[6'h2E], i_key[6'h3F], + i_key[6'h28], i_key[6'h07], i_key[6'h0B], i_key[6'h16], + i_key[6'h00], i_key[6'h23], i_key[6'h2B], i_key[6'h17], + i_key[6'h05], i_key[6'h31], i_key[6'h33], i_key[6'h24], + i_key[6'h1D], i_key[6'h1C], i_key[6'h3C], i_key[6'h39], + i_key[6'h10], i_key[6'h13], i_key[6'h3B], i_key[6'h1E], + i_key[6'h36], i_key[6'h32], i_key[6'h04], i_key[6'h2D] + }; +endmodule Index: csa/tags/arelease/rtl/key_computer.v =================================================================== --- csa/tags/arelease/rtl/key_computer.v (nonexistent) +++ csa/tags/arelease/rtl/key_computer.v (revision 24) @@ -0,0 +1,42 @@ + + +// this module is used to computer a key +// author: Simon panti +// mengxipeng@gmail.com +// refer: +// cas.c in vlc opensource project + +// this module implement the function csa_ComputeKey +// and cw accord to ck +// key accord to kk; + +// + +module key_computer(cw,key); + input [63:0] cw; // input cw, has 64bits + output [447:0] key; // output key, has 7*64bits + + wire [63:0] key1; + wire [63:0] key2; + wire [63:0] key3; + wire [63:0] key4; + wire [63:0] key5; + wire [63:0] key6; + + + key_perm kp0 ( cw, key6 ); + key_perm kp1 ( key6, key5 ); + key_perm kp2 ( key5, key4 ); + key_perm kp3 ( key4, key3 ); + key_perm kp4 ( key3, key2 ); + key_perm kp5 ( key2, key1 ); + + assign key[64*1-1:64*0]=key1 ^ 64'h0000000000000000; + assign key[64*2-1:64*1]=key2 ^ 64'h0101010101010101; + assign key[64*3-1:64*2]=key3 ^ 64'h0202020202020202; + assign key[64*4-1:64*3]=key4 ^ 64'h0303030303030303; + assign key[64*5-1:64*4]=key5 ^ 64'h0404040404040404; + assign key[64*6-1:64*5]=key6 ^ 64'h0505050505050505; + assign key[64*7-1:64*6]=cw ^ 64'h0606060606060606; + +endmodule Index: csa/tags/arelease/doc/readme =================================================================== --- csa/tags/arelease/doc/readme (nonexistent) +++ csa/tags/arelease/doc/readme (revision 24) @@ -0,0 +1,66 @@ +///////////////////////////////////////////////////////////////////// +//// //// +//// cas core //// +//// //// +//// Author: Simon Panti //// +//// mengxipeng@gmail.com //// +//// //// +///////////////////////////////////////////////////////////////////// +//// //// +//// Copyright (C) 2007 Simon Panti //// +//// mengxipeng@gmail.com //// +//// //// +//// This source file may be used and distributed without //// +//// restriction provided that this copyright statement is not //// +//// removed from the file and that any derivative work contains //// +//// the original copyright notice and the associated disclaimer.//// +//// //// +//// THIS SOFTWARE IS PROVIDED ``AS IS'' AND WITHOUT ANY //// +//// EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED //// +//// TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS //// +//// FOR A PARTICULAR PURPOSE. IN NO EVENT SHALL THE AUTHOR //// +//// OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, //// +//// INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES //// +//// (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE //// +//// GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR //// +//// BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF //// +//// LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT //// +//// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT //// +//// OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE //// +//// POSSIBILITY OF SUCH DAMAGE. //// +//// //// +///////////////////////////////////////////////////////////////////// + + + +cas core +=============== +attached is a cas core implementation in verilog. it implement +a cas descrambler + +reference: + csa.c and csa.h in vlc opensource project. + + + + +Status +====== +7-sep-2007 added key csa_ComputeKey + + +Directory Structure +=================== +[core_root] + | + +-doc Documentation + | + +-bench--+ Test Bench + | + +-rtl----+ Core RTL Sources + + +about the author +================ +if you have some issues and advance, please contact me: + mengxipeng@gmail.com \ No newline at end of file Index: csa/tags =================================================================== --- csa/tags (nonexistent) +++ csa/tags (revision 24)

csa/tags Property changes : Added: svn:mergeinfo ## -0,0 +0,0 ##