URL
https://opencores.org/ocsvn/or1k/or1k/trunk
Subversion Repositories or1k
Compare Revisions
- This comparison shows the changes necessary to convert path
/
- from Rev 236 to Rev 237
- ↔ Reverse comparison
Rev 236 → Rev 237
/trunk/or1ksim/support/dumpverilog.c
17,7 → 17,7
You should have received a copy of the GNU General Public License |
along with this program; if not, write to the Free Software |
Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. */ |
|
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/* Verilog dump can be used for stimulating OpenRISC Verilog RTL models. */ |
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#include <stdio.h> |
47,7 → 47,7
struct label_entry *tmp; |
char dis[DISWIDTH + 100]; |
struct mem_entry *entry; |
printf("// This file was generated by or1ksim %s\n", rcsrev); |
printf("// This file was generated by or1ksim %s\n", rcsrev); |
printf(OR1K_MEM_VERILOG_HEADER(verilog_modname, from/DWQ, to/DWQ, (DISWIDTH*8))); |
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for(i = from; i < to; i++) |
55,30 → 55,30
unsigned int _insn = evalsim_mem32 (i); |
int index = insn_decode(_insn); |
if (index >= 0) |
{ |
if (verify_memoryarea(i) && cur_area->getentry && (entry = cur_area->getentry(i))) |
tmp = entry->label; |
for(; tmp; tmp = tmp->next) |
printf("\n//\t%s%s", tmp->name, LABELEND_CHAR); |
{ |
if (verify_memoryarea(i) && cur_area->getentry && (entry = cur_area->getentry(i))) |
tmp = entry->label; |
for(; tmp; tmp = tmp->next) |
printf("\n//\t%s%s", tmp->name, LABELEND_CHAR); |
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printf("\n\tmem['h%x] = %d'h%.2x%.2x", i/DWQ, DW, evalsim_mem8(i), evalsim_mem8(i + 1)); |
printf("%.2x%.2x;", evalsim_mem8(i + 2), evalsim_mem8(i + 3)); |
printf("\n\tmem['h%x] = %d'h%.2x%.2x", i/DWQ, DW, evalsim_mem8(i), evalsim_mem8(i + 1)); |
printf("%.2x%.2x;", evalsim_mem8(i + 2), evalsim_mem8(i + 3)); |
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disassemble_insn (_insn); |
strcpy (dis, disassembled); |
disassemble_insn (_insn); |
strcpy (dis, disassembled); |
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if (strlen(dis) < DISWIDTH) |
memset(dis + strlen(dis), ' ', DISWIDTH); |
dis[DISWIDTH] = '\0'; |
printf("\n\tdis['h%x] = {\"%s\"};", i/DWQ, dis); |
dis[0] = '\0'; |
i += insn_len(index) - 1; |
} else { |
if (i % 64 == 0) |
printf("\n"); |
if (strlen(dis) < DISWIDTH) |
memset(dis + strlen(dis), ' ', DISWIDTH); |
dis[DISWIDTH] = '\0'; |
printf("\n\tdis['h%x] = {\"%s\"};", i/DWQ, dis); |
dis[0] = '\0'; |
i += insn_len(index) - 1; |
} else { |
if (i % 64 == 0) |
printf("\n"); |
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printf("\n\tmem['h%x] = 'h%.2x;", i/DWQ, evalsim_mem8(i)); |
} |
printf("\n\tmem['h%x] = 'h%.2x;", i/DWQ, evalsim_mem8(i)); |
} |
done = 1; |
} |
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93,13 → 93,13
for(i = from; i < to; i++) |
{ |
if (i % 8 == 0) |
printf("\n%.8x: ", i); |
printf("\n%.8x: ", i); |
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/* don't print ascii chars below 0x20. */ |
if (evalsim_mem32(i) < 0x20) |
printf("0x%.2x ", (unsigned char)evalsim_mem32(i)); |
printf("0x%.2x ", (unsigned char)evalsim_mem32(i)); |
else |
printf("0x%.2x'%c' ", (unsigned char)evalsim_mem32(i), (unsigned char)evalsim_mem32(i)); |
printf("0x%.2x'%c' ", (unsigned char)evalsim_mem32(i), (unsigned char)evalsim_mem32(i)); |
} |
printf(OR1K_MEM_VERILOG_FOOTER); |
} |