URL
https://opencores.org/ocsvn/plasma/plasma/trunk
Subversion Repositories plasma
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- This comparison shows the changes necessary to convert path
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- from Rev 237 to Rev 238
- ↔ Reverse comparison
Rev 237 → Rev 238
/trunk/vhdl/plasma_if.ucf
0,0 → 1,111
NET "clk_in" TNM_NET = "clk_in"; |
TIMESPEC "TS_clk_in" = PERIOD "clk_in" 20 ns HIGH 50 %; |
#NET "clk_reg1" TNM_NET = "clk_reg1"; |
#TIMESPEC "TS_clk_reg1" = PERIOD "clk_reg1" 40 ns HIGH 50 %; |
NET "clk_reg1" TNM_NET = "clk_reg1"; |
TIMESPEC "TS_clk_reg1" = PERIOD "clk_reg1" 39.9 ns HIGH 50 %; |
#PACE: Start of Constraints generated by PACE |
#PACE: Start of PACE I/O Pin Assignments |
NET "clk_in" LOC = "T9"; |
NET "gpio0_out<0>" LOC = "K12"; |
NET "gpio0_out<10>" LOC = "N15"; |
NET "gpio0_out<11>" LOC = "P15"; |
NET "gpio0_out<12>" LOC = "R16"; |
NET "gpio0_out<13>" LOC = "F13"; |
NET "gpio0_out<14>" LOC = "N16"; |
NET "gpio0_out<15>" LOC = "P16"; |
NET "gpio0_out<16>" LOC = "E13"; |
NET "gpio0_out<17>" LOC = "F14"; |
NET "gpio0_out<18>" LOC = "G14"; |
NET "gpio0_out<19>" LOC = "D14"; |
NET "gpio0_out<1>" LOC = "P14"; |
NET "gpio0_out<24>" LOC = "R12"; |
NET "gpio0_out<25>" LOC = "T12"; |
NET "gpio0_out<26>" LOC = "R11"; |
NET "gpio0_out<27>" LOC = "R9"; |
NET "gpio0_out<28>" LOC = "T10"; |
NET "gpio0_out<2>" LOC = "L12"; |
NET "gpio0_out<3>" LOC = "N14"; |
NET "gpio0_out<4>" LOC = "P13"; |
NET "gpio0_out<5>" LOC = "N12"; |
NET "gpio0_out<6>" LOC = "P12"; |
NET "gpio0_out<7>" LOC = "P11"; |
NET "gpio0_out<8>" LOC = "E14"; |
NET "gpio0_out<9>" LOC = "G13"; |
NET "gpioA_in<0>" LOC = "F12"; |
NET "gpioA_in<10>" LOC = "L13"; |
NET "gpioA_in<1>" LOC = "G12"; |
NET "gpioA_in<2>" LOC = "H14"; |
NET "gpioA_in<30>" LOC = "M15"; |
NET "gpioA_in<31>" LOC = "M16"; |
NET "gpioA_in<3>" LOC = "H13"; |
NET "gpioA_in<4>" LOC = "J14"; |
NET "gpioA_in<5>" LOC = "J13"; |
NET "gpioA_in<6>" LOC = "K14"; |
NET "gpioA_in<7>" LOC = "K13"; |
NET "gpioA_in<8>" LOC = "M13"; |
NET "gpioA_in<9>" LOC = "M14"; |
NET "ram_address<10>" LOC = "E3"; |
NET "ram_address<11>" LOC = "E4"; |
NET "ram_address<12>" LOC = "G5"; |
NET "ram_address<13>" LOC = "H3"; |
NET "ram_address<14>" LOC = "H4"; |
NET "ram_address<15>" LOC = "J4"; |
NET "ram_address<16>" LOC = "J3"; |
NET "ram_address<17>" LOC = "K3"; |
NET "ram_address<18>" LOC = "K5"; |
NET "ram_address<19>" LOC = "L3"; |
NET "ram_address<2>" LOC = "L5"; |
NET "ram_address<3>" LOC = "N3"; |
NET "ram_address<4>" LOC = "M4"; |
NET "ram_address<5>" LOC = "M3"; |
NET "ram_address<6>" LOC = "L4"; |
NET "ram_address<7>" LOC = "G4"; |
NET "ram_address<8>" LOC = "F3"; |
NET "ram_address<9>" LOC = "F4"; |
NET "ram_ce1_n" LOC = "P7"; |
NET "ram_ce2_n" LOC = "N5"; |
NET "ram_data<0>" LOC = "P2"; |
NET "ram_data<10>" LOC = "G1"; |
NET "ram_data<11>" LOC = "F5"; |
NET "ram_data<12>" LOC = "C3"; |
NET "ram_data<13>" LOC = "K2"; |
NET "ram_data<14>" LOC = "M1"; |
NET "ram_data<15>" LOC = "N1"; |
NET "ram_data<16>" LOC = "N7"; |
NET "ram_data<17>" LOC = "T8"; |
NET "ram_data<18>" LOC = "R6"; |
NET "ram_data<19>" LOC = "T5"; |
NET "ram_data<1>" LOC = "N2"; |
NET "ram_data<20>" LOC = "R5"; |
NET "ram_data<21>" LOC = "C2"; |
NET "ram_data<22>" LOC = "C1"; |
NET "ram_data<23>" LOC = "B1"; |
NET "ram_data<24>" LOC = "D3"; |
NET "ram_data<25>" LOC = "P8"; |
NET "ram_data<26>" LOC = "F2"; |
NET "ram_data<27>" LOC = "H1"; |
NET "ram_data<28>" LOC = "J2"; |
NET "ram_data<29>" LOC = "L2"; |
NET "ram_data<2>" LOC = "M2"; |
NET "ram_data<30>" LOC = "P1"; |
NET "ram_data<31>" LOC = "R1"; |
NET "ram_data<3>" LOC = "K1"; |
NET "ram_data<4>" LOC = "J1"; |
NET "ram_data<5>" LOC = "G2"; |
NET "ram_data<6>" LOC = "E1"; |
NET "ram_data<7>" LOC = "D1"; |
NET "ram_data<8>" LOC = "D2"; |
NET "ram_data<9>" LOC = "E2"; |
NET "ram_lb1_n" LOC = "P6"; |
NET "ram_lb2_n" LOC = "P5"; |
NET "ram_oe_n" LOC = "K4"; |
NET "ram_ub1_n" LOC = "T4"; |
NET "ram_ub2_n" LOC = "R4"; |
NET "ram_we_n" LOC = "G3"; |
NET "reset" LOC = "L14"; |
NET "uart_read" LOC = "T13"; |
NET "uart_write" LOC = "R13"; |
#PACE: Start of PACE Area Constraints |
#PACE: Start of PACE Prohibit Constraints |
#PACE: End of Constraints generated by PACE |