OpenCores
URL https://opencores.org/ocsvn/or1k_old/or1k_old/trunk

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    from Rev 238 to Rev 239
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Rev 238 → Rev 239

/trunk/or1ksim/sim-config.h
23,10 → 23,12
 
#define NR_UARTS 4 /* Number of UARTs simulated */
#define NR_DMAS 1 /* Number of DMA controllers */
#define NONE 0
#define VIRTUAL 1
#define PHYSICAL 2
#define NONE 0
#define VIRTUAL 1
#define PHYSICAL 2
 
#define STR_SIZE (256)
 
typedef struct MemoryBlock {
int address;
char* file;
34,42 → 36,57
} MemoryBlock;
 
struct config {
struct {
int tagtype;
} dc;
struct {
int tagtype;
} ic;
struct {
int bpb_sim;
int btic_sim;
} bp; /* Branch prediction */
int clkcycle_ns; /* Clock cycle in nanoseconds */
struct {
char *rxfile; /* File for RX */
char *txfile; /* File for TX (required) */
int jitter; /* CZ 250801 - in msecs...time to block */
unsigned long baseaddr; /* Naturally aligned base address */
} uarts[NR_UARTS];
struct {
unsigned long baseaddr;
unsigned irq;
} dmas[NR_DMAS];
int simdebug; /* Simulator debugging */
struct {
int tagtype;
} dc;
struct {
int tagtype;
} ic;
struct {
int bpb_sim;
int btic_sim;
} bp; /* Branch prediction */
int clkcycle_ns; /* Clock cycle in nanoseconds */
struct {
char *rxfile; /* File for RX */
char *txfile; /* File for TX (required) */
int jitter; /* CZ 250801 - in msecs...time to block */
unsigned long baseaddr; /* Naturally aligned base address */
} uarts[NR_UARTS];
struct {
unsigned long baseaddr;
unsigned irq;
} dmas[NR_DMAS];
struct {
char memory_table_file[STR_SIZE]; /* Memory table filename */
int enabled; /* is MC enabled? */
unsigned POC; /* power on reset configuration register */
} mc;
 
int simdebug; /* Simulator debugging */
int profile; /* Is profiler running */
FILE *fprof; /* profiler file */
int iprompt; /* Interactive prompt */
int dependstats;/* Calculation of dependency statistics */
int dependency; /* Calculation of dependency (implied by dependstats) */
int history; /* Instruction stream history remembered by the simulator */
int superscalar;/* "Superscalar" simulation */
int slp;
int inhibit_server; /* Don't start up the JTAG proxy server */
int server_port; /* A user specified port number for services */
int pattern_mem; /* A user specified memory initialization pattern */
int random_mem; /* Initialize the memory with random values */
MemoryBlock* memory; /* New style memory initializer file (CZ) */
char* filename; /* Original Command Simulator file (CZ) */
int iprompt; /* Interactive prompt */
int dependstats;/* Calculation of dependency statistics */
int dependency; /* Calculation of dependency (implied by dependstats) */
int history; /* Instruction stream history remembered by the simulator */
int superscalar;/* "Superscalar" simulation */
int slp;
int inhibit_server; /* Don't start up the JTAG proxy server */
int server_port; /* A user specified port number for services */
int pattern_mem; /* A user specified memory initialization pattern */
int random_mem; /* Initialize the memory with random values */
MemoryBlock* memory; /* New style memory initializer file (CZ) */
char* filename; /* Original Command Simulator file (CZ) */
};
 
extern struct config config;
 
/* Read environment from a script file. Does not fail - assumes defaukt configuration instead. */
void read_script_file (char *filename);
/trunk/or1ksim/cpu/common/abstract.c
56,51 → 56,51
 
void dumpmemory(unsigned int from, unsigned int to, int disasm)
{
unsigned int i, j;
struct label_entry *tmp;
int breakpoint = 0;
int ilen = disasm ? 4 : 16;
unsigned int i, j;
struct label_entry *tmp;
int breakpoint = 0;
int ilen = disasm ? 4 : 16;
 
for(i = from; i < to; i += ilen) {
for (j = 0; j < ilen;) {
int data = -1;
if (!disasm) {
tmp = NULL;
if (verify_memoryarea(i+j)) {
struct mem_entry *entry;
if (cur_area->getentry && (entry = cur_area->getentry(i+j)))
for(tmp = entry->label; tmp; tmp = tmp->next)
printf(" %s%s", tmp->name, LABELEND_CHAR);
printf("%02x ", data = evalsim_mem8(i+j));
} else printf("XX ");
j++;
} else {
int breakpoint;
unsigned int _insn = eval_mem32(i, &breakpoint);
int index = insn_decode (_insn);
int len = insn_len (index);
tmp = NULL;
if (verify_memoryarea(i+j)) {
struct mem_entry *entry;
if (cur_area->getentry && (entry = cur_area->getentry(i+j)))
tmp = entry->label;
for(; tmp; tmp = tmp->next)
printf(" %s%s", tmp->name, LABELEND_CHAR);
printf("%.8x: ", i);
for(i = from; i < to; i += ilen) {
for (j = 0; j < ilen;) {
int data = -1;
if (!disasm) {
tmp = NULL;
if (verify_memoryarea(i+j)) {
struct mem_entry *entry;
if (cur_area->getentry && (entry = cur_area->getentry(i+j)))
for(tmp = entry->label; tmp; tmp = tmp->next)
printf(" %s%s", tmp->name, LABELEND_CHAR);
printf("%02x ", data = evalsim_mem8(i+j));
} else printf("XX ");
j++;
} else {
int breakpoint;
unsigned int _insn = eval_mem32(i, &breakpoint);
int index = insn_decode (_insn);
int len = insn_len (index);
tmp = NULL;
if (verify_memoryarea(i+j)) {
struct mem_entry *entry;
if (cur_area->getentry && (entry = cur_area->getentry(i+j)))
tmp = entry->label;
for(; tmp; tmp = tmp->next)
printf(" %s%s", tmp->name, LABELEND_CHAR);
printf("%.8x: ", i);
 
printf("%08x ", (unsigned char)_insn);
if (index >= 0) {
disassemble_insn (_insn);
printf(" %s", disassembled);
} else
printf("<invalid>");
} else printf("XXXXXXXX");
j += len;
}
}
}
printf("%08x ", (unsigned char)_insn);
if (index >= 0) {
disassemble_insn (_insn);
printf(" %s", disassembled);
} else
printf("<invalid>");
} else printf("XXXXXXXX");
j += len;
}
}
}
}
 
/* Searches mem array for a particular label and returns label's address.
108,39 → 108,39
 
unsigned long eval_label(char *label)
{
int i;
char *plus;
char *minus;
int positive_offset = 0;
int negative_offset = 0;
int i;
char *plus;
char *minus;
int positive_offset = 0;
int negative_offset = 0;
 
if (plus = strchr(label, '+')) {
*plus = '\0';
positive_offset = atoi(++plus);
}
if (plus = strchr(label, '+')) {
*plus = '\0';
positive_offset = atoi(++plus);
}
 
if (minus = strchr(label, '-')) {
*minus = '\0';
negative_offset = atoi(++minus);
}
for (cur_area = dev_list; cur_area; cur_area = cur_area->next) {
for(i = 0; i < cur_area->size; i++) if (cur_area->getentry) {
int mi = i + cur_area->start;
struct mem_entry *entry = cur_area->getentry(mi);
if (entry) {
struct label_entry *tmp = entry->label;
for(; tmp; tmp = tmp->next)
if (strcmp(label, tmp->name) == 0) {
debug("eval_label(%s) => 0x%x\n", label, i + positive_offset - negative_offset + cur_area->start);
return i + positive_offset - negative_offset + cur_area->start;
}
}
}
}
if (minus = strchr(label, '-')) {
*minus = '\0';
negative_offset = atoi(++minus);
}
for (cur_area = dev_list; cur_area; cur_area = cur_area->next) {
for(i = 0; i < cur_area->size; i++) if (cur_area->getentry) {
int mi = i + cur_area->start;
struct mem_entry *entry = cur_area->getentry(mi);
if (entry) {
struct label_entry *tmp = entry->label;
for(; tmp; tmp = tmp->next)
if (strcmp(label, tmp->name) == 0) {
debug("eval_label(%s) => 0x%x\n", label, i + positive_offset - negative_offset + cur_area->start);
return i + positive_offset - negative_offset + cur_area->start;
}
}
}
}
 
printf("\nINTERNAL ERROR: undefined label %s\n", label);
cont_run = 0;
return 0;
printf("\nINTERNAL ERROR: undefined label %s\n", label);
cont_run = 0;
return 0;
}
 
/* Calls IMMU translation routines before simulating insn
149,50 → 149,50
 
unsigned long simulate_ic_mmu_fetch(unsigned long virtaddr)
{
if (config.ic.tagtype == NONE)
return virtaddr;
else
if (config.ic.tagtype == VIRTUAL) {
ic_simulate_fetch(virtaddr);
return immu_translate(virtaddr);
}
else if (config.dc.tagtype == PHYSICAL) {
unsigned long phyaddr = immu_translate(virtaddr);
ic_simulate_fetch(phyaddr);
return phyaddr;
}
else {
printf("INTERNAL ERROR: Unknown insn cache type.\n");
cont_run = 0;
}
if (config.ic.tagtype == NONE)
return virtaddr;
else
if (config.ic.tagtype == VIRTUAL) {
ic_simulate_fetch(virtaddr);
return immu_translate(virtaddr);
}
else if (config.dc.tagtype == PHYSICAL) {
unsigned long phyaddr = immu_translate(virtaddr);
ic_simulate_fetch(phyaddr);
return phyaddr;
}
else {
printf("INTERNAL ERROR: Unknown insn cache type.\n");
cont_run = 0;
}
 
return -1;
return -1;
}
 
/* Calls DMMU translation routines (load cycles) before simulating data
cache for virtually indexed data cache or after simulating data cache
for physically indexed data cache. It returns physical address. */
cache for virtually indexed data cache or after simulating data cache
for physically indexed data cache. It returns physical address. */
 
unsigned long simulate_dc_mmu_load(unsigned long virtaddr)
{
if (config.dc.tagtype == NONE)
return virtaddr;
else
if (config.ic.tagtype == VIRTUAL) {
ic_simulate_fetch(virtaddr);
return immu_translate(virtaddr);
}
else if (config.dc.tagtype == PHYSICAL) {
unsigned long phyaddr = immu_translate(virtaddr);
ic_simulate_fetch(phyaddr);
return phyaddr;
}
else {
printf("INTERNAL ERROR: Unknown insn cache type.\n");
cont_run = 0;
}
if (config.dc.tagtype == NONE)
return virtaddr;
else
if (config.ic.tagtype == VIRTUAL) {
ic_simulate_fetch(virtaddr);
return immu_translate(virtaddr);
}
else if (config.dc.tagtype == PHYSICAL) {
unsigned long phyaddr = immu_translate(virtaddr);
ic_simulate_fetch(phyaddr);
return phyaddr;
}
else {
printf("INTERNAL ERROR: Unknown insn cache type.\n");
cont_run = 0;
}
 
return -1;
return -1;
}
 
/* Calls DMMU translation routines (store cycles) before simulating data
201,63 → 201,63
 
unsigned long simulate_dc_mmu_store(unsigned long virtaddr)
{
if (config.dc.tagtype == NONE)
return virtaddr;
else
if (config.dc.tagtype == VIRTUAL) {
dc_simulate_write(virtaddr);
return dmmu_translate(virtaddr);
}
else if (config.dc.tagtype == PHYSICAL) {
unsigned long phyaddr = dmmu_translate(virtaddr);
dc_simulate_write(phyaddr);
return phyaddr;
}
else {
printf("INTERNAL ERROR: Unknown data cache type.\n");
cont_run = 0;
}
if (config.dc.tagtype == NONE)
return virtaddr;
else
if (config.dc.tagtype == VIRTUAL) {
dc_simulate_write(virtaddr);
return dmmu_translate(virtaddr);
}
else if (config.dc.tagtype == PHYSICAL) {
unsigned long phyaddr = dmmu_translate(virtaddr);
dc_simulate_write(phyaddr);
return phyaddr;
}
else {
printf("INTERNAL ERROR: Unknown data cache type.\n");
cont_run = 0;
}
 
return -1;
return -1;
}
 
/* Register read and write function for a memory area (used by peripheral
devices like 16450 UART etc.) */
void register_memoryarea(unsigned long start, unsigned long size,
unsigned granularity,
unsigned long (readfunc)(unsigned long),
void (writefunc)(unsigned long, unsigned long),
struct mem_entry *(getentry)(unsigned long))
unsigned granularity,
unsigned long (readfunc)(unsigned long),
void (writefunc)(unsigned long, unsigned long),
struct mem_entry *(getentry)(unsigned long))
{
struct dev_memarea **pptmp;
struct dev_memarea **pptmp;
 
/* Go to the end of the list. */
for(pptmp = &dev_list; *pptmp; pptmp = &(*pptmp)->next);
/* Go to the end of the list. */
for(pptmp = &dev_list; *pptmp; pptmp = &(*pptmp)->next);
 
cur_area = *pptmp = (struct dev_memarea *)malloc(sizeof(struct dev_memarea));
(*pptmp)->start = start;
(*pptmp)->size = size;
(*pptmp)->end = start + size;
(*pptmp)->granularity = granularity;
(*pptmp)->readfunc = readfunc;
(*pptmp)->writefunc = writefunc;
(*pptmp)->getentry = getentry;
(*pptmp)->next = NULL;
cur_area = *pptmp = (struct dev_memarea *)malloc(sizeof(struct dev_memarea));
(*pptmp)->start = start;
(*pptmp)->size = size;
(*pptmp)->end = start + size;
(*pptmp)->granularity = granularity;
(*pptmp)->readfunc = readfunc;
(*pptmp)->writefunc = writefunc;
(*pptmp)->getentry = getentry;
(*pptmp)->next = NULL;
 
return;
return;
}
 
/* Check if access is to registered area of memory. */
struct dev_memarea *verify_memoryarea(unsigned long addr)
{
struct dev_memarea *ptmp;
struct dev_memarea *ptmp;
 
/* Check list of registered devices. */
for(ptmp = dev_list; ptmp; ptmp = ptmp->next)
if (addr >= ptmp->start &&
addr < (ptmp->end))
return cur_area = ptmp;
return cur_area = NULL;
/* Check list of registered devices. */
for(ptmp = dev_list; ptmp; ptmp = ptmp->next)
if (addr >= ptmp->start &&
addr < (ptmp->end))
return cur_area = ptmp;
return cur_area = NULL;
}
 
/* Returns 32-bit values from mem array. Big endian version. */
264,43 → 264,43
unsigned long eval_mem32(unsigned long memaddr,int* breakpoint)
{
 
unsigned long temp;
struct dev_memarea *dev;
unsigned long temp;
struct dev_memarea *dev;
 
slp_checkaccess(memaddr, SLP_MEMREAD);
memaddr = simulate_dc_mmu_load(memaddr);
*breakpoint += CheckDebugUnit(DebugLoadAddress,memaddr); /* 28/05/01 CZ */
temp = evalsim_mem32(memaddr);
*breakpoint += CheckDebugUnit(DebugLoadData,temp); /* MM170901 */
return temp;
slp_checkaccess(memaddr, SLP_MEMREAD);
memaddr = simulate_dc_mmu_load(memaddr);
*breakpoint += CheckDebugUnit(DebugLoadAddress,memaddr); /* 28/05/01 CZ */
temp = evalsim_mem32(memaddr);
*breakpoint += CheckDebugUnit(DebugLoadData,temp); /* MM170901 */
return temp;
}
 
unsigned long evalsim_mem32(unsigned long memaddr)
{
unsigned long temp;
unsigned long temp;
 
if (verify_memoryarea(memaddr)) {
switch(cur_area->granularity) {
case 1:
temp = cur_area->readfunc(memaddr) << 24;
temp |= cur_area->readfunc(memaddr + 1) << 16;
temp |= cur_area->readfunc(memaddr + 2) << 8;
temp |= cur_area->readfunc(memaddr + 3);
break;
case 2:
temp = cur_area->readfunc(memaddr) << 16;
temp |= cur_area->readfunc(memaddr + 2);
break;
case 4:
temp = cur_area->readfunc(memaddr);
break;
}
} else {
printf("EXCEPTION: read out of memory (32-bit access to %.8lx)\n", memaddr);
cont_run = 0;
temp = 0;
}
return temp;
if (verify_memoryarea(memaddr)) {
switch(cur_area->granularity) {
case 1:
temp = cur_area->readfunc(memaddr) << 24;
temp |= cur_area->readfunc(memaddr + 1) << 16;
temp |= cur_area->readfunc(memaddr + 2) << 8;
temp |= cur_area->readfunc(memaddr + 3);
break;
case 2:
temp = cur_area->readfunc(memaddr) << 16;
temp |= cur_area->readfunc(memaddr + 2);
break;
case 4:
temp = cur_area->readfunc(memaddr);
break;
}
} else {
printf("EXCEPTION: read out of memory (32-bit access to %.8lx)\n", memaddr);
cont_run = 0;
temp = 0;
}
return temp;
}
 
/* Returns 16-bit values from mem array. Big endian version. */
307,39 → 307,39
 
unsigned short eval_mem16(unsigned long memaddr,int* breakpoint)
{
unsigned short temp;
memaddr = simulate_dc_mmu_load(memaddr);
*breakpoint += CheckDebugUnit(DebugLoadAddress,memaddr); /* 28/05/01 CZ */
unsigned short temp;
memaddr = simulate_dc_mmu_load(memaddr);
*breakpoint += CheckDebugUnit(DebugLoadAddress,memaddr); /* 28/05/01 CZ */
 
temp = evalsim_mem16(memaddr);
*breakpoint += CheckDebugUnit(DebugLoadData,temp); /* MM170901 */
return temp;
temp = evalsim_mem16(memaddr);
*breakpoint += CheckDebugUnit(DebugLoadData,temp); /* MM170901 */
return temp;
}
 
unsigned short evalsim_mem16(unsigned long memaddr)
{
unsigned short temp;
unsigned short temp;
 
if (verify_memoryarea(memaddr)) {
switch(cur_area->granularity) {
case 1:
temp = cur_area->readfunc(memaddr) << 8;
temp |= cur_area->readfunc(memaddr + 1);
break;
case 2:
temp = cur_area->readfunc(memaddr);
break;
case 4:
printf("EXCEPTION: read 16-bit value from 32-bit region (address 0x%08lX)\n", cur_area->granularity * 8, memaddr);
cont_run = 0;
break;
}
} else {
printf("EXCEPTION: read out of memory (16-bit access to %.8lx)\n", memaddr);
cont_run = 0;
temp = 0;
}
return temp;
if (verify_memoryarea(memaddr)) {
switch(cur_area->granularity) {
case 1:
temp = cur_area->readfunc(memaddr) << 8;
temp |= cur_area->readfunc(memaddr + 1);
break;
case 2:
temp = cur_area->readfunc(memaddr);
break;
case 4:
printf("EXCEPTION: read 16-bit value from 32-bit region (address 0x%08lX)\n", cur_area->granularity * 8, memaddr);
cont_run = 0;
break;
}
} else {
printf("EXCEPTION: read out of memory (16-bit access to %.8lx)\n", memaddr);
cont_run = 0;
temp = 0;
}
return temp;
}
 
 
347,39 → 347,39
 
unsigned char eval_mem8(unsigned long memaddr,int* breakpoint)
{
unsigned char temp;
memaddr = simulate_dc_mmu_load(memaddr);
*breakpoint += CheckDebugUnit(DebugLoadAddress,memaddr); /* 28/05/01 CZ */
unsigned char temp;
memaddr = simulate_dc_mmu_load(memaddr);
*breakpoint += CheckDebugUnit(DebugLoadAddress,memaddr); /* 28/05/01 CZ */
 
temp = evalsim_mem8(memaddr);
*breakpoint += CheckDebugUnit(DebugLoadData,temp); /* MM170901 */
return temp;
temp = evalsim_mem8(memaddr);
*breakpoint += CheckDebugUnit(DebugLoadData,temp); /* MM170901 */
return temp;
}
 
unsigned char evalsim_mem8(unsigned long memaddr)
{
unsigned char temp;
unsigned char temp;
 
if (verify_memoryarea(memaddr)) {
switch(cur_area->granularity) {
case 1:
temp = cur_area->readfunc(memaddr);
temp |= cur_area->readfunc(memaddr + 1) << 16;
temp |= cur_area->readfunc(memaddr + 2) << 8;
temp |= cur_area->readfunc(memaddr + 3);
break;
case 2:
case 4:
printf("EXCEPTION: read 8-bit value from %u-bit region (address 0x%08lX)\n", cur_area->granularity * 8, memaddr);
cont_run = 0;
break;
}
} else {
printf("EXCEPTION: read out of memory (8-bit access to %.8lx)\n", memaddr);
cont_run = 0;
temp = 0;
}
return temp;
if (verify_memoryarea(memaddr)) {
switch(cur_area->granularity) {
case 1:
temp = cur_area->readfunc(memaddr);
temp |= cur_area->readfunc(memaddr + 1) << 16;
temp |= cur_area->readfunc(memaddr + 2) << 8;
temp |= cur_area->readfunc(memaddr + 3);
break;
case 2:
case 4:
printf("EXCEPTION: read 8-bit value from %u-bit region (address 0x%08lX)\n", cur_area->granularity * 8, memaddr);
cont_run = 0;
break;
}
} else {
printf("EXCEPTION: read out of memory (8-bit access to %.8lx)\n", memaddr);
cont_run = 0;
temp = 0;
}
return temp;
}
 
/* Set mem, 32-bit. Big endian version. */
386,43 → 386,43
 
void set_mem32(unsigned long memaddr, unsigned long value,int* breakpoint)
{
slp_checkaccess(memaddr, SLP_MEMWRITE);
memaddr = simulate_dc_mmu_store(memaddr);
slp_checkaccess(memaddr, SLP_MEMWRITE);
memaddr = simulate_dc_mmu_store(memaddr);
 
*breakpoint += CheckDebugUnit(DebugStoreAddress,memaddr); /* 28/05/01 CZ */
*breakpoint += CheckDebugUnit(DebugStoreData,value);
*breakpoint += CheckDebugUnit(DebugStoreAddress,memaddr); /* 28/05/01 CZ */
*breakpoint += CheckDebugUnit(DebugStoreData,value);
 
setsim_mem32(memaddr, value);
setsim_mem32(memaddr, value);
 
return;
return;
}
 
void setsim_mem32(unsigned long memaddr, unsigned long value)
{
struct dev_memarea *dev;
struct dev_memarea *dev;
 
if (verify_memoryarea(memaddr)) {
switch(cur_area->granularity) {
case 1:
cur_area->writefunc(memaddr, (value >> 24) & 0xFF);
cur_area->writefunc(memaddr + 1, (value >> 16) & 0xFF);
cur_area->writefunc(memaddr + 2, (value >> 8) & 0xFF);
cur_area->writefunc(memaddr + 3, value & 0xFF);
break;
case 2:
cur_area->writefunc(memaddr, (value >> 16) & 0xFFFF);
cur_area->writefunc(memaddr + 2, value & 0xFFFF);
break;
case 4:
cur_area->writefunc(memaddr, value);
break;
}
} else {
printf("EXCEPTION: write out of memory (32-bit access to %.8lx)\n", memaddr);
cont_run = 0;
}
if (verify_memoryarea(memaddr)) {
switch(cur_area->granularity) {
case 1:
cur_area->writefunc(memaddr, (value >> 24) & 0xFF);
cur_area->writefunc(memaddr + 1, (value >> 16) & 0xFF);
cur_area->writefunc(memaddr + 2, (value >> 8) & 0xFF);
cur_area->writefunc(memaddr + 3, value & 0xFF);
break;
case 2:
cur_area->writefunc(memaddr, (value >> 16) & 0xFFFF);
cur_area->writefunc(memaddr + 2, value & 0xFFFF);
break;
case 4:
cur_area->writefunc(memaddr, value);
break;
}
} else {
printf("EXCEPTION: write out of memory (32-bit access to %.8lx)\n", memaddr);
cont_run = 0;
}
 
return;
return;
}
 
/* Set mem, 16-bit. Big endian version. */
429,38 → 429,38
 
void set_mem16(unsigned long memaddr, unsigned short value,int* breakpoint)
{
memaddr = simulate_dc_mmu_store(memaddr);
memaddr = simulate_dc_mmu_store(memaddr);
 
*breakpoint += CheckDebugUnit(DebugStoreAddress,memaddr); /* 28/05/01 CZ */
*breakpoint += CheckDebugUnit(DebugStoreData,value);
*breakpoint += CheckDebugUnit(DebugStoreAddress,memaddr); /* 28/05/01 CZ */
*breakpoint += CheckDebugUnit(DebugStoreData,value);
 
setsim_mem16(memaddr, value);
setsim_mem16(memaddr, value);
 
return;
return;
}
 
void setsim_mem16(unsigned long memaddr, unsigned short value)
{
if (verify_memoryarea(memaddr)) {
switch(cur_area->granularity) {
case 1:
cur_area->writefunc(memaddr, (value >> 8) & 0xFF);
cur_area->writefunc(memaddr + 1, value & 0xFF);
break;
case 2:
cur_area->writefunc(memaddr, (value >> 16) & 0xFFFF);
break;
case 4:
printf("EXCEPTION: write 16-bit value to 32-bit region (address 0x%08lX)\n", memaddr);
cont_run = 0;
break;
}
} else {
printf("EXCEPTION: write out of memory (16-bit access to %.8lx)\n", memaddr);
cont_run = 0;
}
if (verify_memoryarea(memaddr)) {
switch(cur_area->granularity) {
case 1:
cur_area->writefunc(memaddr, (value >> 8) & 0xFF);
cur_area->writefunc(memaddr + 1, value & 0xFF);
break;
case 2:
cur_area->writefunc(memaddr, (value >> 16) & 0xFFFF);
break;
case 4:
printf("EXCEPTION: write 16-bit value to 32-bit region (address 0x%08lX)\n", memaddr);
cont_run = 0;
break;
}
} else {
printf("EXCEPTION: write out of memory (16-bit access to %.8lx)\n", memaddr);
cont_run = 0;
}
 
return;
return;
}
 
/* Set mem, 8-bit. */
467,71 → 467,90
 
void set_mem8(unsigned long memaddr, unsigned char value,int* breakpoint)
{
memaddr = simulate_dc_mmu_store(memaddr);
memaddr = simulate_dc_mmu_store(memaddr);
 
*breakpoint += CheckDebugUnit(DebugStoreAddress,memaddr); /* 28/05/01 CZ */
*breakpoint += CheckDebugUnit(DebugStoreData,value);
*breakpoint += CheckDebugUnit(DebugStoreAddress,memaddr); /* 28/05/01 CZ */
*breakpoint += CheckDebugUnit(DebugStoreData,value);
 
setsim_mem8(memaddr, value);
setsim_mem8(memaddr, value);
 
return;
return;
}
 
void setsim_mem8(unsigned long memaddr, unsigned char value)
{
if (verify_memoryarea(memaddr)) {
if (cur_area->granularity == 1)
cur_area->writefunc(memaddr, value);
else {
printf("EXCEPTION: write 8-bit value to %u-bit region (address 0x%08lX)\n", cur_area->granularity * 8, memaddr);
cont_run = 0;
}
} else {
printf("EXCEPTION: write out of memory (8-bit access to %.8lx)\n", memaddr);
cont_run = 0;
}
if (verify_memoryarea(memaddr)) {
if (cur_area->granularity == 1)
cur_area->writefunc(memaddr, value);
else {
printf("EXCEPTION: write 8-bit value to %u-bit region (address 0x%08lX)\n", cur_area->granularity * 8, memaddr);
cont_run = 0;
}
} else {
printf("EXCEPTION: write out of memory (8-bit access to %.8lx)\n", memaddr);
cont_run = 0;
}
 
return;
return;
}
 
unsigned long simmem_read_byte(unsigned long addr) {
return simmem[cur_area->misc + addr - cur_area->start].data;
return simmem[cur_area->misc + addr - cur_area->start].data;
}
 
void simmem_write_byte(unsigned long addr, unsigned long value) {
simmem[cur_area->misc + addr - cur_area->start].data = (unsigned char)value;
simmem[cur_area->misc + addr - cur_area->start].data = (unsigned char)value;
}
 
struct mem_entry * simmem_getentry(unsigned long addr) {
return &simmem[cur_area->misc + addr - cur_area->start];
return &simmem[cur_area->misc + addr - cur_area->start];
}
 
/* Initialize memory table from a file. Syntax:
start_address1 length1 type1 [delayr1 delayw1]
start_address2 length2 type2 [delayr2 delayw2]
start_address3 length3 type3 [delayr3 delayw3]
Example:
00000100 00001F00 flash 3 100
80000000 00010000 RAM
*/
void sim_read_memory_table (char *filename)
{
FILE *f;
unsigned long memory_needed = 0;
char *home = getenv("HOME");
char ctmp[256];
int local = 1;
sprintf(ctmp, "%s/.or1k/%s", home, filename);
if ((f = fopen (filename, "rt")) != NULL
|| home != NULL && !(local = 0) && (f = fopen (ctmp, "rt")) != NULL) {
unsigned long start, length;
char type[100];
printf ("Reading memory table from '%s':\n", local ? filename : ctmp);
while (fscanf (f, "%08x %08x %s\n", &start, &length, &type) == 3) {
printf ("%08X %08X (%i KB): %s\n", start, length, length >> 10, type);
register_memoryarea(start, length, 1, &simmem_read_byte, &simmem_write_byte, &simmem_getentry);
cur_area->misc = memory_needed;
memory_needed += DEFAULT_MEMORY_LEN;
}
fclose (f);
printf ("\n");
} else {
fprintf (stderr, "Cannot read memory table from '%s',\nneither '%s', assuming standard configuration.\n", filename, ctmp);
register_memoryarea(DEFAULT_MEMORY_START, DEFAULT_MEMORY_LEN, 1, &simmem_read_byte, &simmem_write_byte, &simmem_getentry);
memory_needed += DEFAULT_MEMORY_LEN;
}
simmem = (struct mem_entry *) malloc (sizeof (struct mem_entry) * memory_needed);
FILE *f;
unsigned long memory_needed = 0;
char *home = getenv("HOME");
char ctmp[256];
int local = 1;
sprintf(ctmp, "%s/.or1k/%s", home, filename);
if ((f = fopen (filename, "rt")) != NULL
|| home != NULL && !(local = 0) && (f = fopen (ctmp, "rt")) != NULL) {
unsigned long start, length;
char type[100];
int nparam;
int rd, wd;
printf ("Reading memory table from '%s':\n", local ? filename : ctmp);
while ((nparam = fscanf (f, "%08x %08x %s %i %i\n", &start, &length, &type, &rd, &wd)) >= 3 && nparam <= 5) {
if (nparam == 3)
rd = 1;
if (nparam < 5)
wd = 1;
printf ("%08X %08X (%i KB): %s (read delay = %icyc, write delay = %icyc)\n", start, length, length >> 10, type, rd, wd);
register_memoryarea(start, length, 1, &simmem_read_byte, &simmem_write_byte, &simmem_getentry);
cur_area->misc = memory_needed;
memory_needed += DEFAULT_MEMORY_LEN;
}
fclose (f);
printf ("\n");
} else {
fprintf (stderr, "Cannot read memory table from '%s',\nneither '%s', assuming standard configuration.\n", filename, ctmp);
register_memoryarea(DEFAULT_MEMORY_START, DEFAULT_MEMORY_LEN, 1, &simmem_read_byte, &simmem_write_byte, &simmem_getentry);
memory_needed += DEFAULT_MEMORY_LEN;
}
simmem = (struct mem_entry *) malloc (sizeof (struct mem_entry) * memory_needed);
if (!simmem) {
fprintf (stderr, "Failed to allocate sim memory. Aborting\n");
exit (-1);
}
}
/trunk/or1ksim/tick/Makefile
65,7 → 65,7
AUTOMAKE = automake
AUTOHEADER = autoheader
 
INSTALL = /usr/bin/install -c
INSTALL = /usr/bin//install -c
INSTALL_PROGRAM = ${INSTALL} $(AM_INSTALL_PROGRAM_FLAGS)
INSTALL_DATA = ${INSTALL} -m 644
INSTALL_SCRIPT = ${INSTALL_PROGRAM}
85,11 → 85,12
target_triplet = or32-unknown-none
AR = ar
ARFLAGS = cr
BUILD_DIR = /projects/or1k/src/or1ksim
BUILD_DIR = /projects/show/or1k/or1ksim
CC = gcc
CFLAGS = -g -O2 -DOR32 -DDEBUGMOD_OFF
CFLAGS = -g -O2 -DOR32 -DIMPL_DEFAULT
CPU_ARCH = or32
INCLUDES = -I${top_srcdir}/cpu/common -I${top_srcdir}/cpu/or1k -I${top_srcdir}/cpu/or32 -I${top_srcdir}/cache -I${top_srcdir}/mmu -I${top_srcdir}/bpb -I${top_srcdir}/peripheral -I${top_srcdir}/tick -I${top_srcdir}/pm -I${top_srcdir}/pic
FPM =
INCLUDES = -I${top_srcdir}/cpu/common -I${top_srcdir}/cpu/or1k -I${top_srcdir}/cpu/or32 -I${top_srcdir}/cache -I${top_srcdir}/mmu -I${top_srcdir}/bpb -I${top_srcdir}/peripheral -I${top_srcdir}/tick -I${top_srcdir}/pm -I${top_srcdir}/pic -I${top_srcdir}/debug
LOCAL_CFLAGS =
LOCAL_DEFS =
LOCAL_LDFLAGS =
/trunk/or1ksim/profiler.c
47,7 → 47,7
argv++; argc--;
if (argv[0] && argv[0][0] != '-') {
strcpy (&fprofname[0], argv[0]);
argv++; argc--;
argv++; argc--;
}
}
}
64,53 → 64,53
line++;
if (dir == '+') {
if (fscanf (fprof, "%08X %08X %08X %s\n", &stack[nstack].cycles, &stack[nstack].raddr,
&stack[nstack].addr, &stack[nstack].name[0]) != 4)
fprintf (stderr, "Error reading line #%i\n", line);
&stack[nstack].addr, &stack[nstack].name[0]) != 4)
fprintf (stderr, "Error reading line #%i\n", line);
else {
cycles = stack[nstack].cycles;
nstack++;
if (nstack > maxstack)
maxstack = nstack;
}
} else if (dir == '-') {
cycles = stack[nstack].cycles;
nstack++;
if (nstack > maxstack)
maxstack = nstack;
}
} else if (dir == '-') {
struct stack_struct s;
if (fscanf (fprof, "%08X %08X\n", &s.cycles, &s.raddr) != 2)
fprintf (stderr, "Error reading line #%i\n", line);
fprintf (stderr, "Error reading line #%i\n", line);
else {
int i;
cycles = s.cycles;
for (i = nstack - 1; i >= 0; i--)
if (stack[i].raddr == s.raddr) break;
if (i >= 0) {
int j;
long time = s.cycles - stack[nstack - 1].cycles;
int i;
cycles = s.cycles;
for (i = nstack - 1; i >= 0; i--)
if (stack[i].raddr == s.raddr) break;
if (i >= 0) {
int j;
long time = s.cycles - stack[nstack - 1].cycles;
 
/* Whether in normal mode, we must substract called function from execution time. */
if (!cumulative)
for (j = 0; j < nstack - 1; j++)
stack[j].cycles += time;
/* Whether in normal mode, we must substract called function from execution time. */
if (!cumulative)
for (j = 0; j < nstack - 1; j++)
stack[j].cycles += time;
 
/* pop everything above from current from stack,
if more than one, something went wrong */
while (i < nstack) {
nstack--;
if (i != nstack)
fprintf (stderr, "WARNING: Missaligned return call for %s (%08X) (found %s @ %08X), closing.\n", stack[nstack].name, stack[nstack].raddr, stack[i].name, stack[i].raddr);
for (j = 0; j < nfuncs; j++)
if (stack[nstack].addr == func[j].addr) { /* function exists, append. */
func[j].cum_cycles += s.cycles - stack[nstack].cycles;
func[j].calls++;
break;
}
if (j >= nfuncs) { /* function does not yet exist, create new. */
func[nfuncs].cum_cycles = s.cycles - stack[nstack].cycles;
func[nfuncs].calls = 1;
func[nfuncs].addr = stack[nstack].addr;
strcpy (func[nfuncs].name, stack[nstack].name);
nfuncs++;
}
}
} else fprintf (stderr, "WARNING: Cannot find return call for (%08X), ignoring.\n", s.raddr);
/* pop everything above from current from stack,
if more than one, something went wrong */
while (i < nstack) {
nstack--;
if (i != nstack)
fprintf (stderr, "WARNING: Missaligned return call for %s (%08X) (found %s @ %08X), closing.\n", stack[nstack].name, stack[nstack].raddr, stack[i].name, stack[i].raddr);
for (j = 0; j < nfuncs; j++)
if (stack[nstack].addr == func[j].addr) { /* function exists, append. */
func[j].cum_cycles += s.cycles - stack[nstack].cycles;
func[j].calls++;
break;
}
if (j >= nfuncs) { /* function does not yet exist, create new. */
func[nfuncs].cum_cycles = s.cycles - stack[nstack].cycles;
func[nfuncs].calls = 1;
func[nfuncs].addr = stack[nstack].addr;
strcpy (func[nfuncs].name, stack[nstack].name);
nfuncs++;
}
}
} else fprintf (stderr, "WARNING: Cannot find return call for (%08X), ignoring.\n", s.raddr);
}
} else
break;
128,13 → 128,13
for (j = 0; j < nfuncs; j++) {
int bestcyc = 0, besti = 0;
for (i = 0; i < nfuncs; i++)
if (func[i].cum_cycles > bestcyc) {
bestcyc = func[i].cum_cycles;
besti = i;
}
if (func[i].cum_cycles > bestcyc) {
bestcyc = func[i].cum_cycles;
besti = i;
}
i = besti;
printf ("| %-24s|%08X|%8i|%12.1f|%11i,%3.0f%%|\n",
func[i].name, func[i].addr, func[i].calls, ((double)func[i].cum_cycles / func[i].calls), func[i].cum_cycles, (100. * func[i].cum_cycles / cycles));
func[i].name, func[i].addr, func[i].calls, ((double)func[i].cum_cycles / func[i].calls), func[i].cum_cycles, (100. * func[i].cum_cycles / cycles));
func[i].cum_cycles = -1;
}
printf ("---------------------------------------------------------------------------\n");
/trunk/or1ksim/peripheral/mc.c
0,0 → 1,31
/* mc.c -- Simulation of Memory Controller
Copyright (C) 2001 by Marko Mlinar, markom@opencores.org
 
This file is part of OpenRISC 1000 Architectural Simulator.
This program is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 2 of the License, or
(at your option) any later version.
This program is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
 
You should have received a copy of the GNU General Public License
along with this program; if not, write to the Free Software
Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
*/
 
/* Enable memory controller, via:
section mc
enable = 1
POC = 0x13243545
end
 
Simulates only bank switching.
*/
 
#include "mc.h"
#include "abstract.h"
trunk/or1ksim/peripheral/mc.c Property changes : Added: svn:executable ## -0,0 +1 ## +* \ No newline at end of property Index: trunk/or1ksim/peripheral/mc.h =================================================================== --- trunk/or1ksim/peripheral/mc.h (nonexistent) +++ trunk/or1ksim/peripheral/mc.h (revision 239) @@ -0,0 +1,19 @@ +/* mc.c -- Simulation of Memory Controller + Copyright (C) 2001 by Marko Mlinar, markom@opencores.org + + This file is part of OpenRISC 1000 Architectural Simulator. + + This program is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 2 of the License, or + (at your option) any later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program; if not, write to the Free Software + Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. +*/
trunk/or1ksim/peripheral/mc.h Property changes : Added: svn:executable ## -0,0 +1 ## +* \ No newline at end of property Index: trunk/or1ksim/peripheral/Makefile.am =================================================================== --- trunk/or1ksim/peripheral/Makefile.am (revision 238) +++ trunk/or1ksim/peripheral/Makefile.am (revision 239) @@ -19,4 +19,4 @@ # noinst_LIBRARIES = libperipheral.a -libperipheral_a_SOURCES = 16450.c dma.c +libperipheral_a_SOURCES = 16450.c dma.c mc.c
/trunk/or1ksim/toplevel.c
84,7 → 84,7
#endif /* no DEBUGMOD_OFF */
 
/* CVS revision number. */
const char rcsrev[] = "$Revision: 1.27 $";
const char rcsrev[] = "$Revision: 1.28 $";
 
/* Continuos run versus single step tracing switch. */
int cont_run;
286,7 → 286,7
/* Initialize memory table. */
sim_read_memory_table ("sim_memory_table");
read_script_file("sim.cfg");
print_config();
signal(SIGINT, ctrl_c);
initstats();
/trunk/or1ksim/sim-config.c
19,7 → 19,7
 
/* Simulator configuration. Eventually this one will be a lot bigger. */
 
#include <stdio.h>
#include <stdlib.h>
#include "sim-config.h"
#include "abstract.h"
#include "spr_defs.h"
29,205 → 29,288
 
void init_defconfig()
{
unsigned long val;
memset(&config, 0, sizeof(config));
config.dc.tagtype = NONE/*VIRTUAL*/;
config.ic.tagtype = NONE/*VIRTUAL*/;
config.bp.bpb_sim = 1;
config.bp.btic_sim = 1;
config.clkcycle_ns = 4; /* 4 for 4ns (250MHz) */
config.uarts[0].rxfile = "/tmp/uart0.rx";
config.uarts[0].txfile = "/tmp/uart0.tx";
config.uarts[0].baseaddr = 0x80000000;
config.uarts[0].jitter = -1; /* Async behavior */
config.dmas[0].baseaddr = 0x90000000;
config.dmas[0].irq = INT_DMA;
config.simdebug = 0;
config.profile = 0;
config.iprompt = 0;
config.dependstats = 1;
config.dependency = 1;
config.history = 1;
config.superscalar = 1;
config.slp = 1;
config.profile = 0;
unsigned long val;
memset(&config, 0, sizeof(config));
config.dc.tagtype = NONE/*VIRTUAL*/;
config.ic.tagtype = NONE/*VIRTUAL*/;
config.bp.bpb_sim = 1;
config.bp.btic_sim = 1;
config.clkcycle_ns = 4; /* 4 for 4ns (250MHz) */
config.uarts[0].rxfile = "/tmp/uart0.rx";
config.uarts[0].txfile = "/tmp/uart0.tx";
config.uarts[0].baseaddr = 0x80000000;
config.uarts[0].jitter = -1; /* Async behavior */
config.dmas[0].baseaddr = 0x90000000;
config.dmas[0].irq = INT_DMA;
config.simdebug = 0;
config.profile = 0;
config.iprompt = 0;
config.dependstats = 1;
config.dependency = 1;
config.history = 1;
config.superscalar = 1;
config.slp = 1;
config.profile = 0;
strcpy(config.memory_table_file, "sim.mem");
 
mtspr(SPR_VR, SPR_VR_VER & 0x1200);
mtspr(SPR_VR, SPR_VR_VER & 0x1200);
 
val = SPR_UPR_UP | SPR_UPR_DCP | SPR_UPR_ICP | SPR_UPR_DMP |
SPR_UPR_IMP | SPR_UPR_OB32P | SPR_UPR_DUP | SPR_UPR_PICP |
SPR_UPR_PMP | SPR_UPR_TTP;
val = SPR_UPR_UP | SPR_UPR_DCP | SPR_UPR_ICP | SPR_UPR_DMP |
SPR_UPR_IMP | SPR_UPR_OB32P | SPR_UPR_DUP | SPR_UPR_PICP |
SPR_UPR_PMP | SPR_UPR_TTP;
 
mtspr(SPR_UPR, val);
mtspr(SPR_UPR, val);
}
 
int parse_args(int argc, char *argv[])
{
unsigned long val;
argv++; argc--;
while (argc) {
if (argc && (*argv[0] != '-')) {
config.filename = argv[0];
argc--;
argv++;
} else
if (strncmp(*argv, "-loadmem",8) == 0) { /* (CZ) */
MemoryBlock** block = &config.memory;
int address = 0;
unsigned long val;
argv++; argc--;
while (argc) {
if (argc && (*argv[0] != '-')) {
config.filename = argv[0];
argc--;
argv++;
} else
if (strcmp(*argv, "-initmem") == 0) { /* (CZ) */
char *pattern,*s;
if(!--argc)
return 1;
pattern = *(++argv);
if(!strcmp(pattern,"random"))
config.random_mem = 1;
else
{
val = strtol(pattern,&s,0);
if(*s)
return 1;
config.pattern_mem = val;
}
} else
if (strcmp(*argv, "-nosrv") == 0) { /* (CZ) */
config.inhibit_server = 1;
argv++; argc--;
} else
if (strcmp(*argv, "-srv") == 0) { /* (CZ) */
char *s;
if(!--argc)
return 1;
config.server_port = strtol(*(++argv),&s,10);
if(*s)
return 1;
argv++; argc--;
} else
if (strcmp(*argv, "-i") == 0) {
config.iprompt = 1;
argv++; argc--;
} else
if (strcmp(*argv, "-v") == 0) {
version();
exit(0);
} else
if (strcmp(*argv, "-bpb") == 0) {
config.bp.bpb_sim = 0;
argv++; argc--;
} else
if (strcmp(*argv, "-hazards") == 0) {
config.dependstats = 0;
config.dependency = 0;
argv++; argc--;
} else
if (strcmp(*argv, "-history") == 0) {
config.history = 0;
argv++; argc--;
} else
if (strcmp(*argv, "-superscalar") == 0) {
config.superscalar = 0;
argv++; argc--;
} else
if (strcmp(*argv, "-fast") == 0) {
config.superscalar = 0;
config.history = 0;
config.dependstats = 0;
config.dependency = 0;
config.bp.bpb_sim = 0;
config.bp.btic_sim = 0;
config.slp = 0;
argv++; argc--;
} else
if (strcmp(*argv, "-btic") == 0) {
config.bp.btic_sim = 0;
argv++; argc--;
} else
if (strcmp(*argv, "-upr") == 0) {
argv++; argc--;
val = strtoul(*argv, NULL, 0);
mtspr(SPR_UPR, val);
argv++; argc--;
} else
if (strcmp(*argv, "-ver") == 0) {
argv++; argc--;
val = strtoul(*argv, NULL, 0);
setsprbits(SPR_VR, SPR_VR_VER, val);
argv++; argc--;
} else
if (strcmp(*argv, "-rev") == 0) {
argv++; argc--;
val = strtoul(*argv, NULL, 0);
setsprbits(SPR_VR, SPR_VR_REV, val);
argv++; argc--;
} else
if (strcmp(*argv, "-profile") == 0) {
config.profile = 1;
argv++; argc--;
} else {
printf("Unknown option: %s\n", *argv);
return 1;
}
}
if (!argc)
return 0;
return 0;
}
 
if(!--argc)
return 1;
void print_config()
{
printf("Machine initialization...\n");
if (testsprbits(SPR_UPR, SPR_UPR_DCP))
printf("Data cache tag: %s\n", config.dc.tagtype == VIRTUAL ? "virtual" : "physical");
else
printf("No data cache.\n");
if (testsprbits(SPR_UPR, SPR_UPR_ICP))
printf("Insn cache tag: %s\n", config.ic.tagtype == VIRTUAL ? "virtual" : "physical");
else
printf("No instruction cache.\n");
if (config.bp.bpb_sim)
printf("BPB simulation on.\n");
else
printf("BPB simulation off.\n");
if (config.bp.btic_sim)
printf("BTIC simulation on.\n");
else
printf("BTIC simulation off.\n");
printf("Clock cycle: %d ns\n", config.clkcycle_ns);
/*printf("RAM: 0x%x to 0x%x (%d KB)\n\n", config.ram.startaddr, config.ram.endaddr);
(config.ram.endaddr - config.ram.startaddr) / 1024); MM170901 different memory scheme. */
if (config.simdebug)
printf("simdebug on, ");
else
printf("simdebug off, ");
if (config.iprompt)
printf("interactive prompt on\n");
else
printf("interactive prompt off\n");
}
 
if(argv[0][8] == '@')
{
char *s;
 
address = strtol(address,&s,0);
if(*s)
return 1;
}
else if(argv[0][8])
return 1;
char memory_file[256] = "sim.mem";
 
while(*block)
block = &(*block)->next;
*block = (MemoryBlock*)malloc(sizeof(MemoryBlock));
memset(*block,0,sizeof(MemoryBlock));
(*block)->address = address;
(*block)->file = *(++argv);
argv++; argc--;
} else
if (strcmp(*argv, "-initmem") == 0) { /* (CZ) */
char *pattern,*s;
if(!--argc)
return 1;
pattern = *(++argv);
if(!strcmp(pattern,"random"))
config.random_mem = 1;
else
{
val = strtol(pattern,&s,0);
if(*s)
return 1;
config.pattern_mem = val;
}
} else
if (strcmp(*argv, "-nosrv") == 0) { /* (CZ) */
config.inhibit_server = 1;
argv++; argc--;
} else
if (strcmp(*argv, "-srv") == 0) { /* (CZ) */
char *s;
if(!--argc)
return 1;
config.server_port = strtol(*(++argv),&s,10);
if(*s)
return 1;
argv++; argc--;
} else
if (strcmp(*argv, "-i") == 0) {
config.iprompt = 1;
argv++; argc--;
} else
if (strcmp(*argv, "-v") == 0) {
version();
exit(0);
} else
if (strcmp(*argv, "-bpb") == 0) {
config.bp.bpb_sim = 0;
argv++; argc--;
} else
if (strcmp(*argv, "-hazards") == 0) {
config.dependstats = 0;
config.dependency = 0;
argv++; argc--;
} else
if (strcmp(*argv, "-history") == 0) {
config.history = 0;
argv++; argc--;
} else
if (strcmp(*argv, "-superscalar") == 0) {
config.superscalar = 0;
argv++; argc--;
} else
if (strcmp(*argv, "-fast") == 0) {
config.superscalar = 0;
config.history = 0;
config.dependstats = 0;
config.dependency = 0;
config.bp.bpb_sim = 0;
config.bp.btic_sim = 0;
config.slp = 0;
argv++; argc--;
} else
if (strcmp(*argv, "-btic") == 0) {
config.bp.btic_sim = 0;
argv++; argc--;
} else
if (strcmp(*argv, "-upr") == 0) {
argv++; argc--;
val = strtoul(*argv, NULL, 0);
mtspr(SPR_UPR, val);
argv++; argc--;
} else
if (strcmp(*argv, "-ver") == 0) {
argv++; argc--;
val = strtoul(*argv, NULL, 0);
setsprbits(SPR_VR, SPR_VR_VER, val);
argv++; argc--;
} else
if (strcmp(*argv, "-rev") == 0) {
argv++; argc--;
val = strtoul(*argv, NULL, 0);
setsprbits(SPR_VR, SPR_VR_REV, val);
argv++; argc--;
} else
if (strcmp(*argv, "-profile") == 0) {
config.profile = 1;
argv++; argc--;
} else {
printf("Unknown option: %s\n", *argv);
return 1;
}
char *sections[] = {
"",
"mc"
};
 
/* Parameter definitions */
struct config_params {
int section;
char *name;
char *type;
void *addr;
} config_params[] = {
{1, "memory_table_file", "%255s", (void *)(&config.mc.memory_table_file[0])},
{1, "enable", "%i", (void *)(&config.mc.enable)},
{1, "POC", "%i", (void *)(&config.mc.POC)}
};
 
/* Read environment from a script file. Does not fail - assumes defaukt configuration instead.
The syntax of script file is:
param = value
section x
data
param = value
end
Example:
section mc
memory_table_file = sim.mem
enable = 1
POC = 0x47892344
end
*/
void read_script_file (char *filename)
{
FILE *f;
unsigned long memory_needed = 0;
char *home = getenv("HOME");
char ctmp[STR_SIZE];
int local = 1;
int section = 0;
 
sprintf(ctmp, "%s/.or1k/%s", home, filename);
if ((f = fopen (filename, "rt")) != NULL
|| home != NULL && !(local = 0) && (f = fopen (ctmp, "rt")) != NULL) {
unsigned long start, length;
char type[STR_SIZE];
int nparam;
int rd, wd;
printf ("Reading script file from '%s':\n", local ? filename : ctmp);
while (!feof(f)) {
char param[STR_SIZE];
if (fscanf(f, "%s ", &param) != 1) break;
/* Is this a sections? */
if (strcmp (param, "section") == 0) {
int i;
section = 0;
if (fscanf (f, "%s\n", &param) != 1) {
fprintf (stderr, "%s: ERROR: Section name required.\n", local ? filename : ctmp);
exit (-1);
}
for (i = 1; i < sizeof(sections) / sizeof(char *); i++)
if (strcmp (sections[i], param) == 0) {
section = i;
break;
}
if (!section) {
fprintf (stderr, "%s: WARNING: Unknown section: %s; ignoring.\n", local ? filename : ctmp, param);
/* just skip section */
while (fscanf (f, "%s\n", &param) != 1 && strcmp (param, "end"));
}
} else if (strcmp (param, "end") == 0) {
section = 0;
} else {
int i, found = -1;
for (i = 0; i < sizeof(config_params)/sizeof(struct config_params); i++)
if (config_params[i].section == section && strcmp (config_params[i].name, param) == 0) {
found = i;
break;
}
if (found < 0) {
fprintf (stderr, "%s: WARNING: Invalid parameter: %s; ignoring.\n", local ? filename : ctmp, param);
fscanf (f, "%s\n", &param);
continue;
}
 
/* Parse parameter value */
{
char fmt[8];
sprintf (fmt, "= %s\n", config_params[found].type);
fscanf (f, fmt, config_params[found].addr);
}
}
}
fclose (f);
printf ("\n");
} else {
fprintf (stderr, "Cannot read script file from '%s',\nneither '%s'; assuming standard configuration.\n", filename, ctmp);
}
if (!argc)
return 0;
return 0;
}
 
void print_config()
{
printf("Machine initialization...\n");
if (testsprbits(SPR_UPR, SPR_UPR_DCP))
printf("Data cache tag: %s\n", config.dc.tagtype == VIRTUAL ? "virtual" : "physical");
else
printf("No data cache.\n");
if (testsprbits(SPR_UPR, SPR_UPR_ICP))
printf("Insn cache tag: %s\n", config.ic.tagtype == VIRTUAL ? "virtual" : "physical");
else
printf("No instruction cache.\n");
if (config.bp.bpb_sim)
printf("BPB simulation on.\n");
else
printf("BPB simulation off.\n");
if (config.bp.btic_sim)
printf("BTIC simulation on.\n");
else
printf("BTIC simulation off.\n");
printf("Clock cycle: %d ns\n", config.clkcycle_ns);
/*printf("RAM: 0x%x to 0x%x (%d KB)\n\n", config.ram.startaddr, config.ram.endaddr);
(config.ram.endaddr - config.ram.startaddr) / 1024); MM170901 different memory scheme. */
if (config.simdebug)
printf("simdebug on, ");
else
printf("simdebug off, ");
if (config.iprompt)
printf("interactive prompt on\n");
else
printf("interactive prompt off\n");
/* Initialize memory table. */
sim_read_memory_table (config.memory_table_file);
}

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